Multi-chip modules and electronic control units

Abstract

To provide a multi-chip module that can suppress noise propagation to a main board.SOLUTION: A multi-chip module 100 is mounted on a mother board and includes a module substrate 1, a semiconductor element 2 mounted on the module substrate 1 and having a communication function, and a power supply circuit 3 mounted on the module substrate 1 and supplying power to the semiconductor element 2. The semiconductor element 2 has, as element terminals, power supply terminals 212, 213 connected to a power supply path and a plurality of communication terminals 211 connected to a communication path provided around the power supply path. Furthermore, the multi-chip module 100 has a coupling capacitor 4 connected in series to the communication path mounted on an opposite surface to a mother board 200 and on an opposite area of a communication terminal group including the plurality of communication terminals.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present disclosure relates to a multi-chip module and an electronic control device including the multi-chip module.

Background Art

[0002] Patent Document 1 discloses a circuit module which is an example of a multi-chip module. In the circuit module, a system LSI, a memory, and a part of a power supply circuit are mounted on a module substrate. The circuit module is mounted on a main substrate. The power supply circuit includes a voltage generation circuit including a power supply IC and an inductor, a first capacitor, and a second capacitor. The voltage generation circuit and the first capacitor are mounted on the module substrate. The second capacitor is mounted on the main substrate. The voltage generation circuit and the second capacitor are connected via a wiring pattern on the module substrate.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, it is conceivable that power supply wiring of a power supply circuit and communication wiring of a communication path of a system LSI are mixed within the circuit module. For this reason, in Patent Document 1, power supply noise emitted from the power supply wiring may be superimposed as noise on the communication wiring, and communication noise generated by the communication wiring may be superimposed on the power supply noise and propagated to the main substrate.

[0005] One object of the disclosure is to provide a multi-chip module capable of suppressing propagation of noise to a main substrate. Another object of the disclosure is to provide an electronic control device capable of suppressing propagation of noise from a multi-chip module to a main substrate. [Means for solving the problem]

[0006] The multi-chip module disclosed herein is A module substrate (1) is mounted on a main board and has multiple substrate electrodes (13a~13e, 14) and multiple wirings connected to the substrate electrodes, and the wiring has a conductor pattern stacked with an insulator in between and an interlayer connection portion that connects the conductor patterns of different layers. A semiconductor element (2) having multiple element terminals (21, 211~213), the element terminals being connected to substrate electrodes and mounted on the mounting surface of a module substrate, A power supply circuit (3) has multiple circuit terminals (32a, 32b), the circuit terminals are connected to substrate electrodes and mounted on the mounting surface, and supplies power to the semiconductor element. It is provided on the opposite side of the mounting surface, facing the main board, and includes multiple connection terminals (15) for electrically connecting to the main board, The semiconductor element has, as element terminals, power terminals (212, 213) connected to a power supply path that includes some wiring and some substrate electrodes which form a path to the power supply circuit, and a plurality of communication terminals (211) having a communication interface function that are connected to a communication path provided around the power supply path that includes some wiring and some substrate electrodes which form a path to the main substrate, The power supply circuit has its circuit terminals connected to the power supply path. The module board is In the stacking direction of the conductor pattern, the communication path is located outside the region opposite the power path. A noise reduction element (4) connected in series with the communication path is mounted on the opposing surface and in the opposing region of the communication terminal group (21a, 21b) which includes multiple communication terminals. Occasionally, The noise reduction element has a first terminal and a second terminal mounted on opposite sides. The first terminal is connected to a substrate electrode included in the communication path. The second terminal is connected to some of the connection terminals. .

[0007] As described above, the multi-chip module is equipped with noise reduction elements, so the wiring from the communication terminals to the noise reduction elements can be connected using only short wires and vias within the multi-chip module, eliminating the need for wiring to run all over the module board and avoiding parallel wiring with other wiring. Therefore, the multi-chip module can suppress the superposition of power supply noise emitted from the power supply circuit and power supply path and communication noise emitted from semiconductor elements and communication wiring. As a result, the multi-chip module can suppress the propagation of noise to the main board. Furthermore, as described above, the multi-chip module is equipped with noise reduction elements, so compared to cases where the noise reduction elements are mounted on the mounting surface, the amount of wiring on the mounting surface is reduced by the size of the noise reduction elements. As a result, even with the noise reduction elements mounted, the size of the module board of the multi-chip module can be kept from increasing.

[0008] The electronic control device disclosed herein is An electronic control device comprising the above-mentioned multi-chip module and a main board, The main board comprises an insulating substrate (201), a plurality of wiring layers (202) stacked via the insulating substrate, and a plurality of through-vias (203) that penetrate the insulating substrate and electrically connect each wiring layer.

[0009] Thus, the electronic control unit incorporates a multi-chip module. Therefore, the electronic control unit can suppress the propagation of noise from the multi-chip module to the main board.

[0010] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The claims and the reference numerals in parentheses in this section are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings. [Brief explanation of the drawing]

[0011] [Figure 1] It is a plan view showing a schematic configuration of an electronic control device in an embodiment. [Figure 2] It is a cross-sectional view taken along line II-II of FIG. 1. [Figure 3] It is a plan view showing a schematic configuration of an electronic control device in Modification 1. [Figure 4] It is a plan view showing a schematic configuration of an electronic control device in Modification 2. [Figure 5] It is a plan view showing a schematic configuration of an electronic control device in Modification 3.

MODE FOR CARRYING OUT THE INVENTION

[0012] Hereinafter, a plurality of embodiments for implementing the present disclosure will be described with reference to the drawings. In each embodiment, parts corresponding to those described in the preceding embodiment may be denoted by the same reference numerals and redundant descriptions may be omitted. In each embodiment, when only a part of the configuration is described, other parts of the configuration may be applied by referring to other embodiments described previously.

[0013] (Embodiment) The multi-chip module 100 and the electronic control device 1000 will be described with reference to FIGS. 1 and 2. The electronic control device 1000 is configured to be mounted on a vehicle, for example. That is, the electronic control device 1000 can be adopted for an in-vehicle electronic control device, for example. The electronic control device 1000 includes a multi-chip module 100 and a mother board 200. Hereinafter, the multi-chip module will also be described with the abbreviation MCM. The mother board 200 corresponds to the main board.

[0014] <Multi-chip module> As shown in FIGS. 1 and 2, MCM100 includes a module substrate 1, a semiconductor element 2, a power supply circuit 3, and a coupling capacitor 4. Mounted components such as the semiconductor element 2, the power supply circuit 3, and the coupling capacitor 4 are mounted on the module substrate 1. Further, MCM100 may include a memory device or the like in addition to the semiconductor element 2 and the power supply circuit 3.

[0015] <Module substrate> As shown in FIGS. 1 and 2, the module substrate 1 includes an insulating substrate 10, a protective film 11, a pattern wiring 12a, an interlayer connection portion 12b, a plurality of pads 13e to 13e, 14, and chip connection terminals 15. The insulating substrate 10 is mainly composed of an electrically insulating member such as resin or ceramics. The module substrate 1 has a mounting surface on which the semiconductor element 2 and the power supply circuit 3 are mounted, and a surface opposite to the mounting surface. The opposite surface corresponds to a facing surface facing the mother substrate 200. The insulating substrate 10 corresponds to an insulator.

[0016] The protective film 11 is mainly composed of an electrically insulating member. The protective film 11 covers the surface of the insulating substrate 10 and the pattern wiring 12a provided on the surface of the insulating substrate 10 so that at least a part of each of the pads 13e to 13e, 14 is exposed. The protective film 11 is provided to ensure electrical insulation between each of the pads 13e to 13e, 14 as necessary. Further, the protective film 11 is provided to protect the surface of the insulating substrate 10 and the pattern wiring 12a provided on the surface of the insulating substrate 10.

[0017] The pattern wiring 12a and the interlayer connection portion 12b constitute wiring. The pattern wiring 12a and the interlayer connection portion 12b are mainly composed of a conductive member. The pattern wiring 12a is laminated via the insulating substrate 10. The pattern wiring 12a is provided on the inner layer and the surface layer of the insulating substrate 10. The interlayer connection portion 12b connects the pattern wirings 12a of different layers. The module substrate 1 is provided with a plurality of pattern wirings 12a and a plurality of interlayer connection portions 12b. The pattern wiring 12a corresponds to a conductor pattern.

[0018] The direction in which the pattern wiring 12a is stacked is also referred to as the stacking direction. The stacking direction coincides with the mounting direction of the semiconductor element 2 on the module substrate 1. Furthermore, the stacking direction also coincides with the thickness direction of the module substrate 1.

[0019] The multiple pads 13a-13e,14 are mainly composed of conductive material. Each pad 13a-13e,14 is connected to the pattern wiring 12a and the interlayer connection portion 12b, respectively. The multiple pads 13a-13e are provided on the mounting side of the module substrate 1. The back pad 14 is provided on the opposite side of the module substrate 1. Each pad 13a-13e,14 corresponds to a substrate electrode.

[0020] As shown in Figure 2, the module board 1 has a power supply path formed by some wiring and some substrate electrodes. The power supply path is the path between the semiconductor element 2 and the power supply circuit 3. The module board 1 has a supply path and a ground path as power supply paths. The supply path includes some wiring and a first power pad 13a and a second power pad 13b. The first power pad 13a and the second power pad 13b are electrically connected via some wiring. The ground path includes some wiring different from the supply path and a first ground pad 13c and a second ground pad 13d. The first ground pad 13c and the second ground pad 13d are electrically connected via some wiring different from the supply path. The dashed line in Figure 2 shows the current loop formed between the semiconductor element 2 and the power supply circuit 3.

[0021] As shown in Figure 2, the module board 1 has a communication path formed by some wiring different from the power supply path and some board electrodes different from the power supply path. The communication path is the path through which signals are transmitted and received between the semiconductor element 2 and the mother board 200. Therefore, the semiconductor element 2 is configured to communicate with the mother board 200 via the communication path. In this embodiment, only one communication path is shown. However, the module board 1 may have multiple communication paths.

[0022] The motherboard 200 may also include circuit elements that communicate with the semiconductor element 2. The dashed line in Figure 2 shows the signal flow between the semiconductor element 2 and the motherboard 200.

[0023] The communication path includes some wiring separate from the power supply path and the communication pad 13e. Furthermore, the communication path includes the back pad 14. The communication pad 13e and the back pad 14 are electrically connected via some wiring separate from the power supply path.

[0024] Thus, in the stacking direction, the communication path of the module substrate 1 is located outside the area opposite to the power path. In other words, the pattern wiring 12a, communication pad 13e, and back surface pad 14 included in the communication path are located outside the area opposite to the power path in the stacking direction. It can also be said that the communication path is positioned close to the outer edge of the module substrate 1. As a result, the module substrate 1 can be formed without the communication path running through the inside of the module substrate 1. In other words, the communication path of the module substrate 1 is provided linearly along the thickness direction of the module substrate 1.

[0025] Therefore, the MCM100 can reduce noise caused by the parallel operation of communication paths and power paths within the module board 1. Furthermore, the MCM100 allows for efficient routing of communication and power paths within the module board 1. Thus, the MCM100 can reduce noise within the module board 1 without increasing its size.

[0026] The first power pad 13a, the first ground pad 13c, and the communication pad 13e are arranged opposite the semiconductor element 2. The first power pad 13a is electrically connected to the element power terminal 212. The module board 1 is provided with the same number of first power pads 13a as the number of element power terminals 212. Therefore, if the module board 1 is provided with multiple element power terminals 212, it can be said that the module board 1 is provided with a group of first power pads consisting of multiple first power pads 13a.

[0027] The first grounding pad 13c is electrically connected to the element grounding terminal 213. The module board 1 is provided with the same number of first grounding pads 13c as the number of element grounding terminals 213. Therefore, if the module board 1 is provided with multiple element grounding terminals 213, it can be said that the module board 1 is provided with a group of first grounding pads consisting of multiple first grounding pads 13c.

[0028] The communication pad 13e is electrically connected to the communication terminal 211. The module board 1 is provided with the same number of communication pads 13e as there are communication terminals 211. Therefore, if the module board 1 is provided with multiple communication terminals 211, it can be said that it is provided with a group of communication pads consisting of multiple communication pads 13e.

[0029] The second power supply pad 13b and the second grounding pad 13d are positioned opposite the power supply circuit 3. The second power supply pad 13b is electrically connected to the circuit power supply terminal 32a. The module board 1 is provided with the same number of second power supply pads 13b as the number of circuit power supply terminals 32a. Therefore, if the module board 1 is provided with multiple circuit power supply terminals 32a, it can be said that the module board 1 is provided with a group of second power supply pads consisting of multiple second power supply pads 13b.

[0030] The second grounding pad 13d is electrically connected to the circuit grounding terminal 32b. The module board 1 is provided with the same number of second grounding pads 13d as the number of circuit grounding terminals 32b. Therefore, when the module board 1 is provided with multiple circuit grounding terminals 32b, it can be said that the module board 1 is provided with a group of second grounding pads consisting of multiple second grounding pads 13d.

[0031] The back pads 14 are electrically connected to the motherboard 200. The module board 1 is provided with the same number of back pads 14 as the number of communication terminals 211. Therefore, if the module board 1 is provided with multiple communication terminals 211, it can be said that it is provided with a group of communication pads consisting of multiple back pads 14. The back pads 14 are provided in the area opposite the communication terminals 211. The back pads 14 are provided on the surface opposite the motherboard 200. The back pads 14 are terminals for electrically connecting the MCM 100 and the motherboard 200.

[0032] The chip connection terminal 15 is electrically connected to the back pad 14. The chip connection terminal 15 is a terminal for connecting to the motherboard 200 in the MCM100. Ball-shaped solder can be used for the chip connection terminal 15. The module board 1 has multiple chip connection terminals 15. Some of the multiple chip connection terminals 15 are electrically connected to the back pad 14. The chip connection terminal 15 corresponds to a connection terminal. In Figure 2 and other figures, only some of the chip connection terminals 15 are illustrated.

[0033] <Semiconductor elements> The semiconductor device (SoC) 2 employs a system-on-a-chip (SOC) architecture. The SoC 2 integrates all the functions necessary for the system's operation onto a single semiconductor chip. For example, the SoC 2 includes communication circuits. In other words, the SoC 2 possesses communication capabilities. SoC is an abbreviation for System on Chip.

[0034] As shown in Figure 2, the semiconductor element 2 comprises an element substrate 20 and element terminals 21. The semiconductor element 2 includes a communication terminal 211, an element power terminal 212, and an element ground terminal 213 as element terminals 21. The element terminals 21 are mainly composed of a conductive material. The element terminals 21 are provided on the portion of the element substrate 20 facing the module substrate 1 (hereinafter referred to as the facing portion). The semiconductor element 2 has multiple element terminals 21. The semiconductor element 2 is mounted on the module substrate 1 with the element terminals 21 connected to substrate electrodes.

[0035] The communication terminal 211 has a communication interface function. The semiconductor element 2 has multiple communication terminals 211. The communication terminals 211 are positioned opposite the communication pad 13e. The communication terminals 211 are connected to the communication pad 13e. Therefore, it can be said that the communication terminals 211 are connected to the communication path.

[0036] The semiconductor element 2 is equipped with multiple element power terminals 212 and multiple element ground terminals 213. The multiple element power terminals 212 are electrically connected to the first power pad 13a via solder. The multiple element ground terminals 213 are electrically connected to the first ground pad 13c via solder. Therefore, the element power terminals 212 and element ground terminals 213 can be said to be connected to the power supply path. The element power terminals 212 and element ground terminals 213 correspond to power supply terminals. Note that the element terminals 21 can be made of ball-shaped solder or the like.

[0037] The semiconductor element 2 is provided with multiple communication terminal groups 21a and 21b. Each of the terminal groups 21a and 21b contains multiple communication terminals 211. In addition to the communication terminal groups 21a and 21b, the semiconductor element 2 may also be provided with a power supply terminal group 21c. The power supply terminal group 21c contains multiple element power supply terminals 212 and multiple element grounding terminals 213.

[0038] As shown in Figure 1, the semiconductor element 2 has, for example, a power supply terminal group 21c located in the center of the opposing portion. The semiconductor element 2 has communication terminal groups 21a and 21b located around the power supply terminal group 21c in the opposing portion. It can also be said that the communication terminal groups 21a and 21b are located around the opposing region of the power supply path.

[0039] Furthermore, the communication terminal groups 21a and 21b are arranged parallel to two orthogonal edges of the module board 1. These two edges are the edges furthest from the power supply circuit 3 in a plan view. Note that these edges can also be considered as the sides of the module board 1.

[0040] However, the communication terminal groups 21a and 21b are not limited to the above arrangement. Preferably, the communication terminal groups 21a and 21b are provided so as to avoid the area opposite to the area where pattern wiring 12a and interlayer connection portions 12b that are not included in the communication path on the module substrate 1 are formed. Also, in a plan view, the module substrate 1 has more wiring and other elements formed in the central area surrounded by the outer periphery than in the outer periphery. For this reason, it is preferable that the communication terminal groups 21a and 21b are provided in positions facing the outer periphery rather than facing the central area.

[0041] In this embodiment, as an example, a case in which one semiconductor element 2 is mounted on the module substrate 1 is adopted. However, in this disclosure, multiple semiconductor elements 2 may be mounted on the module substrate 1.

[0042] <Power circuit> As shown in Figure 2, the power supply circuit (PMIC) 3 comprises a circuit board 30, a circuit power supply terminal 32a, and a circuit ground terminal 32b. The power supply circuit 3 is a circuit element that supplies power to the semiconductor element 2. In other words, the power supply circuit 3 supplies power to the semiconductor element 2 via a power supply path.

[0043] The circuit power terminal 32a and the circuit ground terminal 32b are provided on the circuit board 30 in the area facing the module board 1. The power supply circuit 3 is provided with multiple circuit power terminals 32a and multiple circuit ground terminals 32b. The power supply circuit 3 is mounted on the module board 1 with the circuit power terminals 32a and circuit ground terminals 32b connected to the board electrodes.

[0044] Multiple circuit power terminals 32a are electrically connected to the second power pad 13b. Multiple circuit ground terminals 32b are electrically connected to the second ground pad 13d. Ball-shaped solder can be used for the circuit power terminals 32a and circuit ground terminals 32b. The circuit power terminals 32a and circuit ground terminals 32b correspond to circuit terminals.

[0045] <Coupling Capacitor> As shown in Figure 2, the coupling capacitor 4 has a first terminal 41 and a second terminal 42. The coupling capacitor 4 is mounted on the opposite side of the module board 1. Furthermore, the coupling capacitor 4 is mounted in the opposite region of the communication terminal groups 21a and 21b. Here, if even a part of the coupling capacitor 4 is included in the opposite region, it is considered to be mounted in the opposite region of the communication terminal groups 21a and 21b.

[0046] The first terminal 41 is connected to the back pad 14 included in the communication path. The first terminal 41 is electrically connected to the back pad 14 via a conductive connecting member such as solder. The second terminal 42 is connected to some of the chip connection terminals 15. The second terminal 42 is electrically connected to the pattern wiring 12a provided on the surface layer of the insulating substrate 10 via a conductive connecting member such as solder. This pattern wiring 12a is electrically connected to the chip connection terminals 15. Therefore, the second terminal 42 is electrically connected to the chip connection terminals 15 via the pattern wiring 12a and solder. In other words, the second terminal 42 is indirectly connected to the chip connection terminals 15. In this way, the coupling capacitor 4 is connected in series with the communication path.

[0047] The coupling capacitor 4 is a component that allows only frequencies above a certain frequency, such as those used in high-speed communication, to pass through, thereby reducing low-frequency noise caused by power supply noise and other factors. More specifically, as described above, the module board 1 has a communication path and a power supply path. To prevent noise from being superimposed between the communication path and the power supply path within the module board 1, it is desirable to reduce noise propagation from the communication path to the power supply path. To reduce noise from the communication path, it is effective to suppress high-frequency components (such as overshoot and ringback) that are the main cause of noise. The end of the communication path corresponds to the back pad 14. In addition, the coupling capacitor 4 allows only AC components to pass through, that is, it can isolate DC levels.

[0048] In this embodiment, the coupling capacitor 4 is mounted in the opposing region of the communication terminal groups 21a and 21b. This allows the MCM100 to place the coupling capacitor 4 near the back pad 14 without increasing the size of the module board 1. In other words, the MCM100 can suppress an increase in the size of the module board 1 compared to a configuration in which the back pad 14 and the coupling capacitor 4 are electrically connected via pattern wiring 12a provided on the surface layer of the insulating board 10. Furthermore, by placing the coupling capacitor 4 near the back pad 14, the path from the coupling capacitor 4 to the back pad 14 can be shortened. This weakens the electrical coupling with the ground and other wiring layers, which are sources of noise inflow, when low-frequency noise is superimposed on the communication path. In addition, by shortening the path within the MCM100 before the DC level is separated by the coupling capacitor, the electrical coupling with the ground and other wiring layers is weakened, thereby suppressing noise inflow from the mother board 200 or low-frequency noise outflow from within the MCM100.

[0049] In this embodiment, only one coupling capacitor 4 is shown. However, this disclosure is not limited to this. Coupling capacitors 4 may be provided individually for each communication path. Coupling capacitors 4 correspond to noise reduction elements. The noise reduction elements of this disclosure are not limited to coupling capacitors 4. Damping resistors and the like can also be used as noise reduction elements. When used as termination resistors, damping resistors can achieve impedance matching. In other words, damping resistors are provided to eliminate impedance mismatch at the end of the communication path, which is the main cause of superposition of high-frequency components due to reflection. To put it another way, damping resistors contribute to noise reduction by suppressing reflections of communication caused by impedance mismatch. Furthermore, even when not used as termination resistors, damping resistors can remove high-frequency noise emitted from the back pad 14. This point is also true for the modifications described later.

[0050] <Motherboard> The motherboard (MB) 200 is a wiring board in which multiple wirings 202, mainly composed of conductive materials, are provided on an insulating substrate 201 made of resin or ceramics. The multiple wirings 202 are provided inside and on the surface of the insulating substrate 201 of the motherboard 200. The multiple wirings 202 are stacked on the motherboard 200 via the insulating substrate 201. The wirings 202 correspond to wiring layers.

[0051] The motherboard 200 is a through-hole substrate in which through-vias 203 are formed that penetrate the insulating substrate 201. The through-vias 203 are electrically connected to the wiring 202. The through-vias 203 electrically connect the wiring 202 of different layers. More specifically, the motherboard 200 has a metal film on the surface of the through-holes that penetrate from one side of the insulating substrate 201 to the opposite side of the insulating substrate 201, as the through-vias 203. In other words, the motherboard 200 has through-vias 203 with metal plating on the surface of the through-holes. The surface of the through-hole is the surface of the annular wall surrounding the through-hole in the insulating substrate.

[0052] On the motherboard 200, some of the through-vias 203 are provided as electrodes on one side and the opposite side of the insulating substrate 201. The electrodes on the motherboard 200 are electrically connected to the chip connection terminals 15. The motherboard 200 has wiring 202 and through-vias 203 at multiple locations. However, in Figure 2, for the sake of simplifying the drawing, only some of the wiring 202 and through-vias 203 are shown.

[0053] As described above, the motherboard 200 may also be configured to include circuit elements that communicate with the semiconductor element 2. In this case, the circuit elements are connected to the communication path via wiring 202, through-vias 203, chip connection terminals 15, etc. This makes the circuit elements capable of communicating with the semiconductor element 2.

[0054] <Electronic control unit> The electronic control unit 1000 is configured by mounting an MCM 100 on a motherboard 200. In this embodiment, as an example, an electronic control unit 1000 is used in which one MCM 100 is mounted on the motherboard 200. However, this disclosure is not limited thereto. The electronic control unit 1000 may have multiple MCMs 100 mounted on it. Furthermore, the electronic control unit 1000 may have circuit elements, connectors, etc. that are different from the MCM 100 mounted on it.

[0055] <Effects> The MCM100 has a communication path located around the power supply path on the module board 1. Furthermore, the MCM100 has a coupling capacitor 4 connected in series with the communication path in the region opposite the communication terminal groups 21a and 21b on the opposite side of the module board 1. Therefore, the MCM100 can suppress the communication path from running within the module board.

[0056] Furthermore, the MCM100 can suppress the superposition of power supply noise emitted from the power supply circuit 3 and power supply path, and communication noise emitted from the semiconductor element 2 and communication wiring. Therefore, the MCM100 can suppress the propagation of noise to the motherboard 200. In addition, because the coupling capacitor 4 is provided in the above-mentioned position, the MCM100 can suppress an increase in the board size of the module board 1 even when the coupling capacitor 4 is mounted.

[0057] The electronic control unit 1000 comprises such an MCM 100 and a motherboard 200. The motherboard 200 comprises an insulating board 201, a plurality of wirings 202, and through-vias 203 that penetrate the insulating board 201 and electrically connect each wiring 202.

[0058] Therefore, the electronic control unit 1000 can suppress the propagation of noise from the MCM 100 to the motherboard 200. In addition, the electronic control unit 1000 uses a wiring board provided with through-vias 203.

[0059] Preferred embodiments of the present disclosure have been described above. However, the present disclosure is not limited in any way to the above embodiments, and various modifications are possible without departing from the spirit of the present disclosure. Below, modifications 1 to 3 are described as other forms of the present disclosure. The above embodiments and modifications 1 to 3 can be implemented individually, but they can also be implemented in various combinations as appropriate. The present disclosure can be implemented in various combinations, not limited to the combinations shown in the embodiments.

[0060] (Variation 1) Using Figure 3, the MCM100 of Modification 1 will be explained. In Modification 1, the main differences from the above embodiment will be explained. In Modification 1, the position of the coupling capacitor 4 and the connection relationship between the coupling capacitor 4 and the back pad 14 and chip connection terminal 15 differ from the above embodiment.

[0061] As shown in Figure 3, the back pad 14 is located in the area opposite the communication terminal 211. The solid lines in Figure 3 show the pattern wiring 12a connecting the coupling capacitor 4 to the back pad 14 and the chip connection terminal 15.

[0062] The coupling capacitor 4 is surrounded by multiple back-side pads 14 and multiple chip connection terminals 15 that are part of the communication path. Therefore, the first terminal 41 is connected to the nearest back-side pad 14 among the multiple back-side pads 14 included in the communication path. On the other hand, the second terminal 42 is connected to the nearest chip connection terminal 15 among the multiple chip connection terminals 15.

[0063] This allows the MCM100 to shorten the distance from the communication path to the chip connection terminal 15 through the coupling capacitor 4. Therefore, the MCM100 can further reduce low-frequency noise.

[0064] Furthermore, in a plan view, the MCM100 may be positioned such that the first terminal 41 of the coupling capacitor 4 and the communication terminal 211 (backside pad 14) overlap. This is preferable because it allows the distance between the first terminal 41 and the backside pad 14 to be reduced.

[0065] Furthermore, the motherboard 200, like the module board 1, is provided with mother communication wiring and mother power wiring. These mother communication wiring and mother power wiring are also provided on the surface of the motherboard 200. It is preferable that the electronic control unit 1000 shortens the parallel distance between the path from the back pad 14 to which the coupling capacitor 4 is connected to the chip connection terminal 15 and the mother communication wiring or mother power wiring provided on the surface. This reduces the noise superposition between the MCM 100 and the motherboard 200, thereby reducing the overall noise of the electronic control unit 1000. Note that the MCM 100 and electronic control unit 1000 in Modification 1 can also achieve the same effects as in the above embodiment.

[0066] (Modification 2) Using Figure 4, the MCM100 of Modification 2 will be explained. In Modification 2, the differences from the above embodiment will be mainly explained. In Modification 2, the arrangement of the chip connection terminals 15 differs from the above embodiment. In the MCM100, multiple chip connection terminals 15 are arranged in a rectangular ring shape. Furthermore, in the MCM100, multiple chip connection terminals 15 are arranged in the opposing regions of the communication terminal groups 21a and 21b. The MCM100 and electronic control device 1000 of Modification 2 can achieve the same effects as the above embodiment. In addition, the MCM100 may have multiple chip connection terminals 15 arranged in a grid pattern.

[0067] (Variation 3) Figure 5 will be used to explain the MCM100 of Modification 3. In Modification 3, the main differences from the above embodiment will be explained. The configuration of the MCM100 in Modification 3 differs from that of the above embodiment.

[0068] The semiconductor element 2 has a function for high-speed communication with the motherboard 200 and a function for low-speed communication that is slower than high-speed communication. In other words, the semiconductor element 2 has a high-speed communication circuit for high-speed communication and a low-speed communication circuit for low-speed communication.

[0069] The multiple communication terminals 211 included in the communication terminal groups 21a and 21b are terminals used for high-speed communication. Therefore, the communication terminals 211 can also be called high-speed communication terminals. Similarly, the communication terminal groups 21a and 21b can also be called a high-speed terminal group.

[0070] Furthermore, the semiconductor element 2 is equipped with multiple low-speed communication terminals as element terminals 21, which are used when performing low-speed communication. The low-speed communication terminals are connected to the motherboard 200 without going through the coupling capacitor 4.

[0071] Furthermore, the semiconductor element 2 is equipped with a low-speed terminal group 21d that includes multiple low-speed communication terminals. Therefore, the semiconductor element 2 is equipped with high-speed terminal groups 21a and 21b and a low-speed terminal group 21d. The MCM 100 and electronic control unit 1000 of the modified example 3 can achieve the same effects as the embodiment described above.

[0072] This disclosure is described in accordance with embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, while various combinations and forms are shown in this disclosure, other combinations and forms that include one, more, or fewer of those elements also fall within the scope and idea of ​​this disclosure.

[0073] This specification discloses several technical ideas described in the following sections, and also discloses several combined technical ideas, shown by the alternative reference of preceding technical ideas in subsequent technical ideas.

[0074] Technical thought 1 A module substrate (1) is mounted on a main board and has a plurality of substrate electrodes (13a~13e, 14) and a plurality of wirings connected to the substrate electrodes, wherein the wiring has a conductor pattern laminated with an insulator in between and an interlayer connection portion connecting the conductor patterns of different layers. A semiconductor element (2) having multiple element terminals (21, 211~213), the element terminals being connected to the substrate electrodes and mounted on the module substrate, A power supply circuit (3) having multiple circuit terminals (32a, 32b), the circuit terminals being connected to the substrate electrodes and mounted on the module substrate, and supplying power to the semiconductor element, It is provided on the surface facing the main board and comprises a plurality of connection terminals (15) for electrically connecting to the main board, The semiconductor element has, as element terminals, power terminals (212, 213) connected to a power path including some of the wiring and some of the substrate electrodes which form a path to the power supply circuit, and a plurality of communication terminals (211) having a communication interface function connected to a communication path provided around the power path which includes some of the wiring and some of the substrate electrodes which form a path to the main substrate, The power supply circuit has its circuit terminals connected to the power supply path. The module board is a multi-chip module in which a noise reduction element (4) connected in series with the communication path is mounted on the opposing surface and in the region opposite to the communication terminal group (21a, 21b) which includes a plurality of communication terminals.

[0075] Technical thought 2 The multi-chip module according to technical concept 1, wherein the group of communication terminals is provided around the area opposite the power supply path and is arranged parallel to the edge of the module board.

[0076] Technical thought 3 The noise reduction element comprises a first terminal connected to the substrate electrode included in the communication path, and a second terminal connected to some of the connection terminals. The first terminal is connected to the nearest board terminal among the plurality of board terminals included in the communication path. The multichip module according to technical concept 1 or 2, wherein the second terminal is connected to the nearest connection terminal among a plurality of connection terminals.

[0077] Technical thought 4 The semiconductor element has a function for performing high-speed communication with the main substrate and a function for performing low-speed communication which is slower than the high-speed communication. The multiple communication terminals included in the group of communication terminals are used when performing the high-speed communication. Furthermore, the multi-chip module according to any one of technical concepts 1 to 3 is provided with a group of low-speed communication terminals, including a plurality of low-speed communication terminals used when performing the low-speed communication, which are part of the element terminals.

[0078] Technical thought 5 The noise reduction element is a coupling capacitor or a damping resistor, as described in one of the technical ideas 1 to 4 of the multi-chip module.

[0079] technical thought 6 An electronic control device comprising the multi-chip module described in any one of the technical concepts 1 to 5, and the main board, The main substrate comprises an insulating substrate (201), a plurality of wiring layers (202) laminated via the insulating substrate, and a plurality of through-vias (203) that penetrate the insulating substrate and electrically connect each wiring layer, in an electronic control device. [Explanation of Symbols]

[0080] 1... Module board, 10... Insulating board, 11... Protective film, 12a... Pattern wiring, 12b... Interlayer connection part, 13a... First power pad, 13b... Second power pad, 13c... First ground pad, 13d... Second ground pad, 13e... Communication pad, 14... Backside pad, 15... Chip connection terminal, 2... Semiconductor element, 20... Element board, 21... Element terminal, 211... Communication terminal, 212... Element power terminal, 213... Element ground terminal, 21a, 21b... Communication terminal group, 21c... Power terminal group, 21d... Low-speed terminal group, 3... Power supply circuit, 30... Circuit board, 32a... Circuit power terminal, 32b... Circuit ground terminal, 100... Multi-chip module, 200... Motherboard, 1000... Electronic control unit

Claims

1. A module substrate (1) is mounted on a main substrate and has a plurality of substrate electrodes (13a to 13e, 14) and a plurality of wirings connected to the substrate electrodes, wherein the wiring has a conductor pattern laminated with an insulator in between and an interlayer connection portion connecting the conductor patterns of different layers. A semiconductor element (2) having multiple element terminals (21, 211-213), the element terminals being connected to the substrate electrodes and mounted on the mounting surface of the module substrate, A power supply circuit (3) having multiple circuit terminals (32a, 32b), the circuit terminals being connected to the substrate electrodes and mounted on the mounting surface, and supplying power to the semiconductor element, The mounting surface is located on the opposite side and is on the side facing the main board, and includes a plurality of connection terminals (15) for electrically connecting to the main board. The semiconductor element has, as element terminals, power terminals (212, 213) connected to a power path including some of the wiring and some of the substrate electrodes which form a path to the power supply circuit, and a plurality of communication terminals (211) having a communication interface function connected to a communication path provided around the power path which includes some of the wiring and some of the substrate electrodes which form a path to the main substrate, The power supply circuit has its circuit terminals connected to the power supply path. In the module substrate, the communication path is provided outside the region opposite the power supply path in the stacking direction of the conductor pattern, and a noise reduction element (4) connected in series with the communication path is mounted on the opposing surface and in the region opposite the communication terminal group (21a, 21b) which includes a plurality of communication terminals. The noise reduction element has a first terminal and a second terminal mounted on the opposing surface, The first terminal is connected to the substrate electrode included in the communication path, The second terminal is a multi-chip module connected to some of the aforementioned connection terminals.

2. The multi-chip module according to claim 1, wherein the group of communication terminals is provided around the area opposite the power supply path and is arranged parallel to the edge of the module board.

3. The first terminal is connected to the nearest substrate electrode among the plurality of substrate electrodes included in the communication path, The multichip module according to claim 1 or 2, wherein the second terminal is connected to the nearest connection terminal among a plurality of connection terminals.

4. The semiconductor element has a function for performing high-speed communication with the main substrate and a function for performing low-speed communication which is slower than the high-speed communication. The multiple communication terminals included in the group of communication terminals are used when performing the high-speed communication. Furthermore, the multi-chip module according to claim 1 or 2, further comprising a group of low-speed communication terminals, including a plurality of low-speed communication terminals used when performing the low-speed communication which are part of the element terminals.

5. The multi-chip module according to claim 1, wherein the noise reduction element is a coupling capacitor or a damping resistor.

6. The multi-chip module according to claim 1, wherein the noise reduction element reduces noise propagation from the communication path to the power supply path.

7. An electronic control device comprising a multichip module according to claim 1 or 2 and the main board, The main substrate comprises an insulating substrate (201), a plurality of wiring layers (202) laminated via the insulating substrate, and a plurality of through-vias (203) that penetrate the insulating substrate and electrically connect each wiring layer, in an electronic control device.

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