Semiconductor device and method for manufacturing a semiconductor device

Abstract

This semiconductor device (1) comprises: a semiconductor substrate (2) on which a semiconductor element is formed; a surface electrode (5) that is formed on a first main surface of the semiconductor substrate (2); a rear surface electrode (6) that is formed on a second main surface of the semiconductor substrate (2); and a surface protection film (7) that is formed on the first main surface of the semiconductor substrate (2) so as to cover the surface electrode (5), and has an opening that exposes a portion of the surface electrode (5). The upper surface of the surface protection film (7) is roughened by cutting marks.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.

Background Art

[0002] A semiconductor device having a surface protection film made of a polyimide resin or the like on its surface is known. Further, for example, Patent Document 1 below discloses a technique for roughening (hereinafter referred to as "roughening") the upper surface of the surface protection film by sputtering.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When a semiconductor device having a surface protection film is mounted in a resin mold package, if the adhesion between the surface protection film and the mold resin cannot be ensured, the mold resin may peel off from the surface protection film due to stress caused by heat generation during the operation of the semiconductor device, resulting in a decrease in the reliability of the semiconductor device. If the upper surface of the surface protection film is roughened, an improvement in the adhesion between the surface protection film and the mold resin can be expected. However, even if the sputtering process is used for roughening as in Patent Document 1, the maximum surface roughness of the upper surface of the surface protection film is as small as several nm to several tens of nm, and the adhesion between the surface protection film and the mold resin cannot be made sufficiently high.

[0005] The present disclosure has been made to solve the above problems, and an object thereof is to provide a semiconductor device capable of improving the adhesion between a surface protection film and a mold resin.

Means for Solving the Problems

[0006] The semiconductor device according to this disclosure comprises a semiconductor substrate on which semiconductor elements are formed, a surface electrode formed on a first main surface of the semiconductor substrate, a back electrode formed on a second main surface of the semiconductor substrate, and a surface protective film formed on the first main surface of the semiconductor substrate so as to cover the surface electrode and having an opening that exposes a part of the surface electrode, wherein the upper surface of the surface protective film is roughened by cutting marks. Furthermore, the maximum surface roughness of the upper surface of the surface protective film is 100 nm or more. . [Effects of the Invention]

[0007] According to this disclosure, the maximum surface roughness of the upper surface of the surface protective film can be increased, which improves the adhesion between the surface protective film and the molding resin when the semiconductor device is sealed with molding resin, thereby contributing to improved reliability of the semiconductor device.

[0008] The purposes, features, aspects, and advantages of this disclosure will become more apparent from the following detailed description and accompanying drawings. [Brief explanation of the drawing]

[0009] [Figure 1] This is a cross-sectional view showing the configuration of a semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view showing the configuration of a semiconductor device according to Embodiment 2. [Figure 3] This is a process diagram showing a method for manufacturing a semiconductor device according to Embodiment 3. [Figure 4] This is a process diagram showing a method for manufacturing a semiconductor device according to Embodiment 3. [Figure 5] This is a process diagram showing a method for manufacturing a semiconductor device according to Embodiment 3. [Figure 6] This is a process diagram showing a method for manufacturing a semiconductor device according to Embodiment 3. [Figure 7] This is a process diagram showing a method for manufacturing a semiconductor device according to Embodiment 3. [Figure 8] This is a process diagram showing a method for manufacturing a semiconductor device according to Embodiment 3. [Modes for carrying out the invention]

[0010] <Embodiment 1> Figure 1 is a cross-sectional view showing the configuration of the semiconductor device 1 according to Embodiment 1.

[0011] The semiconductor device 1 comprises a semiconductor substrate 2 on which semiconductor elements are formed. Here, the upper surface of the semiconductor substrate 2 in Figure 1 is defined as the "first main surface," and the lower surface is defined as the "second main surface."

[0012] The semiconductor substrate 2 may be made of silicon (Si), or other wide-bandgap semiconductors such as silicon carbide (SiC) or gallium nitride (GaN). When a wide-bandgap semiconductor is used as the material for the semiconductor substrate 2, superior characteristics are obtained in operation at high voltage, high current, and high temperature compared to semiconductor devices using silicon. There are no restrictions on the type of semiconductor element formed on the semiconductor substrate 2. If the semiconductor device 1 is a semiconductor device for power control, power elements such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), SBDs (Schottky Barrier Diodes), and PNDs (PN Junction Diodes) may be formed on the semiconductor substrate 2.

[0013] This embodiment shows an example in which a vertical power element, a PN junction diode, is formed on a semiconductor substrate 2. In this case, as shown in Figure 1, a P-type anode region 3 is formed on the surface layer of the first main surface of the N-type semiconductor substrate 2, and the N-type region below the anode region 3 becomes the cathode region 4. The anode region 3 contains a high concentration of P-type impurities (e.g., boron (B)), and the cathode region 4 contains a high concentration of N-type impurities (e.g., phosphorus (P)).

[0014] On the first main surface of the semiconductor substrate 2, a surface electrode 5 as an anode electrode is formed, and on the second main surface of the semiconductor substrate 2, a back surface electrode 6 as a cathode electrode is formed. Further, on the first main surface of the semiconductor substrate 2, a surface protective film 7 made of a thermosetting resin such as polyimide is formed so as to cover the surface electrode 5. An opening for exposing a part of the surface electrode 5 is formed in the surface protective film 7, and wiring or the like can be connected to the surface electrode 5 through the opening.

[0015] As shown in FIG. 1, the semiconductor device 1 is sealed with a mold resin 8. Epoxy resin, polyimide resin, or the like is used as the material of the mold resin 8.

[0016] Here, the upper surface of the surface protective film 7 is subjected to a cutting process using a cutting machine and is roughened by the cutting marks of the cutting process. The roughening process by the cutting process can increase the roughness of the upper surface of the surface protective film 7 as compared with the roughening process by the sputtering process disclosed in the above Patent Document 1. In the present embodiment, the maximum surface roughness of the upper surface of the surface protective film 7 is adjusted to 100 nm or more. The surface protective film 7 having a large maximum surface roughness on the upper surface can obtain high adhesion with the mold resin 8 due to the anchor effect.

[0017] Although details will be described later, in a conventional semiconductor device, a protective film corresponding to the surface protective film 7 is provided to protect the surface (first main surface) of the semiconductor substrate 2 when processing the back surface (second main surface) of the semiconductor substrate, and is removed at the time of product shipment.

[0018] According to the semiconductor device 1 according to Embodiment 1, since high adhesion is obtained between the mold resin 8 and the surface protective film 7, the mold resin 8 is prevented from peeling from the surface protective film 7 due to the stress caused by the heat generation of the semiconductor device 1, and the reliability of the semiconductor device is improved.

[0019] The above effects are particularly effective when the semiconductor substrate 2 is a wide-bandgap semiconductor, as the semiconductor device 1 is expected to operate at high temperatures. Furthermore, the thermal stress generated when the semiconductor substrate 2 is silicon carbide is significantly greater than when the semiconductor substrate 2 is silicon, a common semiconductor material; therefore, the above effects are extremely effective when the semiconductor substrate 2 is silicon carbide.

[0020] <Embodiment 2> Figure 2 is a cross-sectional view showing the configuration of the semiconductor device 1 according to Embodiment 2. As shown in Figure 2, in Embodiment 2, the surface protective film 7 is composed of a first protective film 7a and a second protective film 7b. The other configurations are the same as in Embodiment 1 (Figure 1).

[0021] The first protective film 7a is the upper layer of the surface protective film 7, and its upper surface is roughened by cutting marks. The second protective film 7b is the lower layer of the surface protective film 7 and is interposed between the first protective film 7a and the semiconductor substrate 2. The first protective film 7a and the second protective film 7b are made of thermosetting resins such as polyimide. However, the materials for the first protective film 7a and the second protective film 7b are selected such that the thermal expansion coefficient of the second protective film 7b is between the thermal expansion coefficient of the first protective film 7a and the thermal expansion coefficient of the semiconductor substrate 2. Since the thermal expansion coefficients of silicon and silicon carbide, which are the materials for the semiconductor substrate 2, are smaller than those of polyimide, etc., for example, the thermal expansion coefficient of the first protective film 7a is set to 80 ppm / K, and the thermal expansion coefficient of the second protective film 7b is set to 50 ppm / K.

[0022] If the thermal expansion coefficient of the surface protective film 7 and the thermal expansion coefficient of the semiconductor substrate 2 differ significantly, stress caused by heat generation from the semiconductor device 1 may cause cracks or delamination at the interface between the surface protective film 7 and the semiconductor substrate 2. In this embodiment, a second protective film 7b, whose thermal expansion coefficient is relatively close to that of the semiconductor substrate 2, is interposed in the portion of the surface protective film 7 that contacts the semiconductor substrate 2, thereby reducing the stress generated between the surface protective film 7 and the semiconductor substrate 2.

[0023] <Embodiment 3> Embodiment 3 describes the manufacturing method of the semiconductor device 1 shown in Embodiments 1 and 2. Figures 3 to 8 are process diagrams illustrating this manufacturing method.

[0024] First, semiconductor elements such as PN junction diodes (not shown in Figures 3 to 8) are formed on the semiconductor substrate 2, and surface electrodes 5 are formed on the first main surface of the semiconductor substrate 2.

[0025] Next, as shown in Figure 3, a surface protective film 7 is formed on the first main surface of the semiconductor substrate 2 to cover the surface electrode 5. When forming the semiconductor device 1 according to Embodiment 2, the surface protective film 7 has a two-layer structure consisting of a first protective film 7a and a second protective film 7b.

[0026] Then, the upper surface of the surface protective film 7 is cut with a cutting machine, and as shown in Figure 4, the large irregularities on the upper surface of the surface protective film 7 (irregularities corresponding to the shape of the surface electrode 5) are flattened, while the upper surface of the surface protective film 7 is roughened by the cutting marks. After this cutting process, a heat treatment may be performed to harden the surface protective film.

[0027] Next, as shown in Figure 5, with the first main surface of the semiconductor substrate 2 covered with the surface protective film 7, the semiconductor substrate 2 is flipped over and the second main surface of the semiconductor substrate 2 is processed. In this process, for example, the semiconductor substrate 2 is thinned by grinding the second main surface, or impurities are implanted into the second main surface. Also, as shown in Figure 6, with the first main surface of the semiconductor substrate 2 covered with the surface protective film 7, the back surface electrode 6 is formed on the second main surface of the semiconductor substrate 2. In this way, the processing of the second main surface of the semiconductor substrate 2 is performed with the first main surface covered with the surface protective film 7. Therefore, the surface protective film 7 also plays a role in protecting the structure of the first main surface of the semiconductor substrate 2 during processing of the second main surface of the semiconductor substrate 2.

[0028] Subsequently, as shown in Figure 7, the semiconductor substrate 2 is turned over again, and a portion of the surface protective film 7 is removed to form an opening in the surface protective film 7 that exposes a portion of the surface electrode 5. Then, as shown in Figure 8, the semiconductor chip 1 is formed by cutting the semiconductor substrate 2.

[0029] Finally, by sealing the semiconductor device 1 with molding resin 8, the configuration of the semiconductor device 1 shown in Figure 1 or Figure 2 is obtained.

[0030] In the manufacturing method of the semiconductor device 1 according to this embodiment, the surface protective film 7 serves as a protective film that protects the structure of the first main surface side of the semiconductor substrate 2 when processing the second main surface side of the semiconductor substrate 2. As mentioned above, the protective film equivalent to the surface protective film 7 in conventional semiconductor devices was removed before product shipment, but in this embodiment, the surface protective film 7 is left on the semiconductor device 1 after productization, making it possible to reduce costs by reducing the number of processes. Furthermore, by performing the processing of the upper surface of the surface protective film 7 by cutting with a cutting machine, it is possible to adjust the maximum surface roughness of the upper surface of the surface protective film 7 without adding any other processes.

[0031] Furthermore, it is possible to freely combine each embodiment, or to modify or omit each embodiment as appropriate.

[0032] The above description is illustrative in all embodiments, and it should be understood that countless variations not illustrated are conceivable. [Explanation of symbols]

[0033] 1 Semiconductor device, 2 Semiconductor substrate, 3 Anode region, 4 Cathode region, 5 Surface electrode, 6 Back electrode, 7 Surface protective film, 7a First protective film, 7b Second protective film, 8 Molding resin.

Claims

1. A semiconductor substrate on which semiconductor elements are formed, A surface electrode formed on the first main surface of the semiconductor substrate, A back surface electrode formed on the second main surface of the semiconductor substrate, A surface protective film is formed on the first main surface of the semiconductor substrate so as to cover the surface electrode, and has an opening that exposes a part of the surface electrode. Equipped with, The upper surface of the aforementioned surface protective film is roughened by cutting marks. The maximum surface roughness of the upper surface of the aforementioned protective film is 100 nm or more. Semiconductor equipment.

2. The aforementioned surface protective film is a thermosetting resin. The semiconductor device according to claim 1.

3. The surface protective film includes a first protective film whose upper surface is roughened by the cutting marks, and a second protective film interposed between the first protective film and the semiconductor substrate. The thermal expansion coefficient of the second protective film is the value between the thermal expansion coefficient of the first protective film and the thermal expansion coefficient of the semiconductor substrate. The semiconductor device according to claim 1 or claim 2.

4. The semiconductor substrate is a wide-bandgap semiconductor. The semiconductor device according to claim 1 or claim 2.

5. The process of forming semiconductor elements on a semiconductor substrate, The process of forming a surface electrode on the first main surface of the semiconductor substrate, A step of forming a surface protective film on the first main surface of the semiconductor substrate to cover the surface electrode, A step of cutting the upper surface of the surface protective film and roughening the upper surface of the surface protective film by cutting marks, The steps include forming a back surface electrode on the second main surface of the semiconductor substrate while the first main surface of the semiconductor substrate is covered with the surface protective film, After the formation of the back electrode, a step is to form an opening in the surface protective film that exposes a part of the surface electrode, A step of forming a semiconductor chip by cutting the aforementioned semiconductor substrate, Equipped with, The maximum surface roughness of the upper surface of the surface protective film, which has been roughened by the aforementioned cutting marks, is 100 nm or more. A method for manufacturing a semiconductor device.

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