Imaging device and electronic equipment

Abstract

The present invention inhibits the deterioration of charge transfer efficiency. An imaging device according to one embodiment comprises a plurality of pixels (2) arranged in a two-dimensional grid shape, each of the pixels comprising: a photoelectric conversion unit (PD) that photoelectrically converts incident light; a gate electrode (108) that transfers charge accumulated in the photoelectric conversion unit; and a diffusion region (FD) serving as an inflow destination for the charge transferred from the photoelectric conversion unit. The photoelectric conversion unit, the gate electrode, and the diffusion region are arranged in a semiconductor substrate (11) along the substrate thickness direction of the semiconductor substrate.

Description

Technical Field

[0001] The present disclosure relates to an imaging device and an electronic device.

Background Art

[0002] Conventionally, in a CMOS (Complementary Metal-Oxide-Semiconductor) type solid-state imaging device (CMOS image sensor), in order to increase the amount of charge that can be accumulated in a photodiode that performs photoelectric conversion in a pixel portion, a potential may be formed such that charge can be accumulated up to a deep region. In such a case, instead of a normal transfer gate, a vertical gate electrode inserted into silicon is used to modulate up to a deep region and apply an electric field for reading. Also, in order to increase the modulation power, a structure employing a plurality of vertical gate electrodes has been proposed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the conventional element structure, due to design constraints, it is difficult to make the path for extracting charge from the photoelectric conversion portion straight, and there is a problem that the charge transfer efficiency decreases.

[0005] Therefore, the present disclosure proposes an imaging device and an electronic device capable of suppressing a decrease in charge transfer efficiency.

Means for Solving the Problems

[0006] To solve the above problems, one embodiment of the imaging device according to the present disclosure comprises a plurality of pixels arranged in a two-dimensional grid, each of which comprises a photoelectric conversion unit that converts incident light into photoelectric energy, a gate electrode that transfers the charge accumulated in the photoelectric conversion unit, and a diffusion region that serves as the destination for the charge transferred from the photoelectric conversion unit, and the photoelectric conversion unit, the gate electrode, and the diffusion region are arranged within a semiconductor substrate along the substrate thickness direction of the semiconductor substrate. [Brief explanation of the drawing]

[0007] [Figure 1] This block diagram shows a schematic configuration example of an imaging device applicable to each embodiment of this disclosure. [Figure 2] This figure illustrates an example of the seat structure of an imaging device applied to each embodiment of the present disclosure. [Figure 3] Figure 2 is a circuit diagram showing an example of a pixel and readout circuit. [Figure 4] This block diagram shows an example configuration of an imaging device mounted on an electronic device applicable to each embodiment of the present disclosure. [Figure 5] This is a top view showing a schematic example of the pixel configuration according to the first embodiment. [Figure 6] Figure 5 is a vertical cross-sectional view showing an example of the structure of the A-A' section. [Figure 7] Figure 5 is a vertical cross-sectional view showing an example of the structure of the B-B' section. [Figure 8] Figure 5 is a horizontal cross-sectional view showing an example of the structure of the C-C' section. [Figure 9] Figure 5 is a horizontal cross-sectional view showing an example of the structure of the D-D' section. [Figure 10] This is a process cross-sectional view (part 1) showing an example of the manufacturing process for a pixel according to the first embodiment. [Figure 11] This is a process cross-sectional view (part 2) showing an example of the manufacturing process for a pixel according to the first embodiment. [Figure 12] This is a process cross-sectional view (part 3) showing an example of the manufacturing process for a pixel according to the first embodiment. [Figure 13]It is a process cross-sectional view showing an example of the manufacturing process of a pixel according to the first embodiment (Part 4). [Figure 14] It is a process cross-sectional view showing an example of the manufacturing process of a pixel according to the first embodiment (Part 5). [Figure 15] It is a process cross-sectional view showing an example of the manufacturing process of a pixel according to the first embodiment (Part 6). [Figure 16] It is a process cross-sectional view showing an example of the manufacturing process of a pixel according to the first embodiment (Part 7). [Figure 17] It is a top view showing an example of the schematic configuration of a pixel according to the second embodiment. [Figure 18] It is a vertical cross-sectional view showing an example of the structure of the A-A' cross-section in FIG. 17. [Figure 19] It is a vertical cross-sectional view showing an example of the structure of the B-B' cross-section in FIG. 17. [Figure 20] It is a top view showing an example of the schematic configuration of a pixel according to the third embodiment. [Figure 21] It is a vertical cross-sectional view showing an example of the structure of the A-A' cross-section in FIG. 20. [Figure 22] It is a vertical cross-sectional view showing an example of the structure of the B-B' cross-section in FIG. 20. [Figure 23] It is a top view showing an example of the schematic configuration of a pixel according to the fourth embodiment. [Figure 24] It is a vertical cross-sectional view showing an example of the structure of the A-A' cross-section in FIG. 23. [Figure 25] It is a vertical cross-sectional view showing an example of the structure of the B-B' cross-section in FIG. 23. [Figure 26] It is a top view showing an example of the schematic configuration of a pixel according to the fifth embodiment. [Figure 27] It is a vertical cross-sectional view showing an example of the structure of the A-A' cross-section in FIG. 26. [Figure 28] It is a vertical cross-sectional view showing an example of the structure of the B-B' cross-section in FIG. 26. [Figure 29] It is a block diagram showing an example of the schematic configuration of a vehicle control system. [Figure 30] It is an explanatory diagram showing an example of the installation positions of an external vehicle information detection unit and an imaging unit. [Figure 31] This figure shows an example of a schematic configuration of an endoscopic surgical system. [Figure 32] This block diagram shows an example of the functional configuration of a camera head and CCU. [Modes for carrying out the invention]

[0008] An embodiment of this disclosure will be described in detail below with reference to the drawings. In the following embodiment, the same parts will be denoted by the same reference numerals to avoid redundant descriptions.

[0009] Furthermore, this disclosure will be explained in the order of the items shown below. 1. Common Configuration 1.1 Schematic Configuration Example of an Imaging Device 1.2 Example of a stacked structure of an imaging device 1.3 Example of a schematic configuration of electronic equipment 2. First Embodiment 2.1 Pixel Configuration Example 2.2 Manufacturing process example 2.3 Summary 3. Second Embodiment 4. Third Embodiment 5. Fourth Embodiment 6. Fifth Embodiment 7. Examples of applications to mobile devices 8. Examples of applications to endoscopic surgical systems

[0010] 1. Common Configuration First, the configuration of the imaging device and electronic equipment common to the following embodiments will be described in detail with reference to the drawings.

[0011] 1.1 Schematic Configuration Example of an Imaging Device Figure 1 is a block diagram showing a schematic configuration example of an imaging device applicable to each embodiment of the present disclosure. As shown in Figure 1, the imaging device 1 is configured to have a pixel array section (so-called imaging region) 3 in which pixels 2, each containing a plurality of photoelectric conversion elements, are regularly arranged in two dimensions on a semiconductor substrate ST (e.g., a silicon substrate), and a peripheral circuit section. Each pixel 2 consists of, for example, a photodiode, which is a photoelectric conversion element, and a plurality of pixel transistors (so-called MOS transistors). The plurality of pixel transistors can be composed of, for example, three transistors: a transfer transistor, a reset transistor, and an amplification transistor. Alternatively, a selection transistor can be added to make a total of four transistors. The equivalent circuit of a unit pixel is the same as usual, so a detailed explanation is omitted. The pixel 2 can also be a shared pixel structure. This shared pixel structure consists of a plurality of photodiodes, a plurality of transfer transistors, one shared floating diffusion, and one other shared pixel transistor.

[0012] The peripheral circuit section consists of a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, a control circuit 8, and the like.

[0013] The control circuit 8 receives the input clock and data that commands the operating mode, and outputs data such as internal information of the imaging device. Specifically, the control circuit 8 generates clock signals and control signals that serve as the reference for the operation of the vertical drive circuit 4, column signal processing circuit 5, and horizontal drive circuit 6, etc., based on the vertical synchronization signal, horizontal synchronization signal, and master clock. These signals are then input to the vertical drive circuit 4, column signal processing circuit 5, and horizontal drive circuit 6, etc.

[0014] The vertical drive circuit 4 is composed of, for example, a shift register, selects a pixel drive wiring, supplies pulses to the selected pixel drive wiring to drive the pixels, and drives the pixels row by row. That is, the vertical drive circuit 4 sequentially selects and scans each pixel 2 of the pixel array 3 row by row in the vertical direction, and supplies a pixel signal based on the signal charge generated in accordance with the amount of light received in, for example, a photodiode which is a photoelectric conversion element of each pixel 2, to the column signal processing circuit 5 via the vertical signal line 24.

[0015] The column signal processing circuit 5 is arranged for each column of pixels 2, and performs signal processing such as noise reduction on the signal output from one row of pixels 2 for each pixel column. Specifically, the column signal processing circuit 5 performs signal processing such as correlated double sampling (CDS) to remove fixed pattern noise specific to pixels 2, signal amplification, and AD conversion. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 5, connected to the horizontal signal line HL.

[0016] The horizontal drive circuit 6 is composed of, for example, a shift register, and sequentially outputs horizontal scanning pulses to select each of the column signal processing circuits 5 in order, causing each of the column signal processing circuits 5 to output a pixel signal to the horizontal signal line HL.

[0017] The output circuit 7 processes the signals sequentially supplied from each of the column signal processing circuits 5 through the horizontal signal line HL and outputs them. For example, it may only perform buffering HL, or it may perform black level adjustment, column variation correction, and various digital signal processing. The input / output terminal I / O exchanges signals with the outside world.

[0018] 1.2 Example of a stacked structure of an imaging device Next, examples of the stacked structure of the imaging device 1 applied to each embodiment of the present disclosure will be described. Figure 2 is a diagram illustrating examples of the stacked structure of the imaging device applied to each embodiment of the present disclosure. As shown in Figure 2, the imaging device 1 can be a three-dimensional structure composed of three substrates (first substrate 10, second substrate 20, and third substrate 30) bonded together. The first substrate 10, the second substrate 20, and the third substrate 30 are stacked in this order.

[0019] The first substrate 10 has a semiconductor substrate 11 with a plurality of pixels 2 that perform photoelectric conversion. The plurality of pixels 2 are arranged in a matrix within the pixel array section 3 of the first substrate 10. The second substrate 20 has a semiconductor substrate 21 with one readout circuit 22 for every four pixels 2 that outputs a pixel signal based on the charge output from the pixels 2. The second substrate 20 has a plurality of pixel drive lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction. The third substrate 30 has a semiconductor substrate 31 with a logic circuit 32 that processes the pixel signals. The logic circuit 32 includes, for example, a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, and a control circuit 8. The logic circuit 32 (specifically the horizontal drive circuit 6) outputs an output voltage Vout for each pixel 2 to the outside. In the logic circuit 32, for example, a low-resistance region may be formed on the surface of the impurity diffusion region in contact with the source electrode and the drain electrode, consisting of silicide formed using a salicide (Self-Aligned Silicide) process such as CoSi2 or NiSi.

[0020] The vertical drive circuit 4, for example, sequentially selects multiple pixels 2 row by row. The column signal processing circuit 5, for example, applies CDS processing to the pixel signals output from each pixel 2 in the row selected by the vertical drive circuit 4. The column signal processing circuit 5, for example, extracts the signal level of the pixel signals by applying CDS processing and holds pixel data corresponding to the amount of light received by each pixel 2. The horizontal drive circuit 6, for example, sequentially outputs the pixel data held by the column signal processing circuit 5 to the outside. The control circuit 8, for example, controls the driving of each block in the logic circuit 32 (vertical drive circuit 4, column signal processing circuit 5, and horizontal drive circuit 6).

[0021] Figure 3 shows an example of a pixel 2 and a readout circuit 22. Below, we will explain the case where four pixels 2 share one readout circuit 22, as shown in Figure 3. Here, "sharing" means that the outputs of the four pixels 2 are input to a common readout circuit 22.

[0022] Each pixel 2 has common components. In Figure 3, identification numbers (1, 2, 3, 4) are added to the end of the codes of each pixel 2's components to distinguish them from one another. Hereafter, when it is necessary to distinguish the components of each pixel 2 from one another, an identification number will be added to the end of the codes of each pixel 2's components. However, when it is not necessary to distinguish the components of each pixel 2 from one another, the identification number at the end of the codes of each pixel 2's components will be omitted.

[0023] Each pixel 2 includes, for example, a photodiode PD, a transfer transistor TR electrically connected to the photodiode PD, and a floating diffusion region FD that temporarily holds the charge output from the photodiode PD via the transfer transistor TR. The photodiode PD corresponds to a specific example of the "photoelectric conversion unit" of this disclosure. The photodiode PD performs photoelectric conversion to generate a charge corresponding to the amount of light received. The cathode of the photodiode PD is electrically connected to the source of the transfer transistor TR, and the anode of the photodiode PD is electrically connected to a reference potential line (e.g., ground). The drain of the transfer transistor TR is electrically connected to the floating diffusion region FD, and the gate of the transfer transistor TR is electrically connected to the pixel drive line 23. The transfer transistor TR is, for example, a CMOS transistor.

[0024] The floating diffusion regions FD of each pixel 2 that share a single readout circuit 22 are electrically connected to each other and are also electrically connected to the input terminal of the common readout circuit 22. The readout circuit 22 includes, for example, a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP. The selection transistor SEL may be omitted if necessary. The source of the reset transistor RST (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion region FD, and the drain of the reset transistor RST is electrically connected to the power line VDD and the drain of the amplification transistor AMP. The gate of the reset transistor RST is electrically connected to the pixel drive line 23 (see Figure 2). The source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST. The source of the selection transistor SEL (the output terminal of the readout circuit 22) is electrically connected to the vertical signal line 24, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 23 (see Figure 2).

[0025] 1.3 Example of a schematic configuration of electronic equipment Furthermore, the imaging device 1 described above can be applied to various electronic devices such as imaging systems like digital still cameras and digital video cameras, mobile phones equipped with imaging functions, or other devices equipped with imaging functions.

[0026] Figure 4 is a block diagram showing an example configuration of an imaging device mounted on an electronic device.

[0027] As shown in Figure 4, the electronic device 1001 includes an optical system 1002, an imaging device 1003, and a DSP (Digital Signal Processor) 1004. The DSP 1004, display device 1005, operating system 1006, memory 1008, recording device 1009, and power supply system 1010 are connected via a bus 1007, enabling the capture of still and moving images.

[0028] The optical system 1002 is composed of one or more lenses and guides the image light (incident light) from the subject to the imaging device 1003, where it forms an image on the light-receiving surface (sensor part) of the imaging device 1003.

[0029] The imaging device 1003 is one of the imaging devices 1 described above. Electrons are accumulated in the imaging device 1003 for a certain period of time, corresponding to the image formed on the light-receiving surface via the optical system 1002. A signal corresponding to the electrons accumulated in the imaging device 1003 is then supplied to the DSP 1004.

[0030] The DSP 1004 performs various signal processing on the signal from the imaging device 1003 to acquire an image, and temporarily stores the image data in the memory 1008. The image data stored in the memory 1008 is recorded in the recording device 1009 or supplied to the display device 1005 to display the image. The operation system 1006 accepts various operations from the user and supplies operation signals to each block of the electronic equipment 1001, and the power supply system 1010 supplies the power necessary to drive each block of the electronic equipment 1001.

[0031] In the electronic device 1001 configured in this way, by applying the imaging device 1 described above as the imaging device 1003, the number of metal layers 58 can be reduced more effectively, thereby lowering costs.

[0032] 2. First Embodiment First, the imaging device and electronic equipment according to the first embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 100 may correspond to the pixel 2 provided on the first substrate 10 in the common configuration example described above.

[0033] 2.1 Pixel Configuration Example Figure 5 is a top view showing a schematic example of the pixel configuration according to this embodiment. Figure 6 is a vertical cross-sectional view showing an example of the structure of the A-A' section in Figure 5. Figure 7 is a vertical cross-sectional view showing an example of the structure of the B-B' section in Figure 5. Figure 8 is a horizontal cross-sectional view showing an example of the structure of the C-C' section in Figure 5. Figure 9 is a horizontal cross-sectional view showing an example of the structure of the D-D' section in Figure 5.

[0034] As shown in Figures 5 to 9, in this embodiment, one pixel 100 is provided in each pixel region that is divided in a two-dimensional grid shape by a pixel separation section 109 that divides the semiconductor substrate 101.

[0035] Each pixel 100 includes a photoelectric conversion unit 102 positioned off-center on, for example, the back side (bottom side in the drawing) of the semiconductor substrate 101; an embedded gate electrode 103 positioned close to the photoelectric conversion unit 102 in the substrate thickness direction; a transfer gate electrode 108 provided on the upper surface of the semiconductor substrate 101 so as to be in contact with the embedded gate electrode 103; an embedded insulating film 107 provided on at least a portion of the upper part of the embedded gate electrode 103; a floating diffusion region 105 provided at one of the four corners of the pixel region in the upper layer of the semiconductor substrate 101; a diffusion region 104 provided in the upper layer of the semiconductor substrate 101 so as to connect approximately the center of the pixel region to the floating diffusion region 105; and a ground contact 106 provided at the corner diagonally opposite to the corner where the floating diffusion region 105 is located in the upper layer of the semiconductor substrate 101.

[0036] In the above configuration, the embedded gate electrode 103 is positioned to approach from at least one direction the region below the diffusion region 104 (also called the first region) that protrudes toward the center of the pixel region from, for example, a floating diffusion region 105 provided at one corner of the pixel region. In this embodiment, the embedded gate electrode 103 has a U-shape (see Figures 5, 8, and 9 in particular) so that it is positioned to surround the region below the diffusion region 104 from three directions.

[0037] In this way, by arranging the photoelectric conversion unit 102, the embedded gate electrode 103, and the diffusion region 104 along the vertical direction (substrate thickness direction), when a voltage is applied to the embedded gate electrode 103 via the transfer gate electrode 108, a channel is formed along the substrate thickness direction that linearly connects the photoelectric conversion unit 102 located below the embedded gate electrode 103 to the diffusion region 104 located above it. This makes it possible to increase the efficiency of charge transfer from the photoelectric conversion unit 102 to the diffusion region 104 and the floating diffusion region 105 connected thereto.

[0038] Furthermore, in the above configuration, an embedded insulating film 107 is provided on the embedded gate electrode 103.

[0039] In this way, by replacing the upper part of the embedded gate electrode 103 with an insulator such as the embedded insulating film 107, it becomes possible to secure the distance from the floating diffusion region 105 to the embedded gate electrode 103. As a result, it is possible to suppress the occurrence of electron avalanches caused by the concentration of the electric field between the embedded gate electrode 103 and the floating diffusion region 105, and thus suppress the occurrence of image quality degradation such as white spots caused by the saturation of the amplitude of the pixel signal.

[0040] Similarly, by replacing the upper part of the embedded gate electrode 103 with an insulator such as the embedded insulating film 107, it becomes possible to secure the distance from the ground contact 106 to the embedded gate electrode 103, thereby suppressing the occurrence of electron avalanches and preventing image quality degradation such as white spots.

[0041] 2.2 Manufacturing process example Next, an example of the manufacturing process for the pixel 100 according to this embodiment will be described in detail with reference to the drawings. Figures 10 to 16 are process cross-sectional views showing an example of the manufacturing process for the pixel according to this embodiment. Note that Figure 10 shows a process cross-sectional view corresponding to both the A-A' and B-B' sections in Figure 5, Figures 11, 13, and 15 show process cross-sectional views corresponding to the A-A' section in Figure 5, and Figures 12, 14, and 16 show process cross-sectional views corresponding to the B-B' section in Figure 5.

[0042] In this manufacturing process example, first, as shown in Figure 10, an N-type dopant is ion-implanted into a semiconductor substrate 101, such as a silicon substrate, from the top side with a predetermined implantation energy. By thermally diffusing the implanted dopant, a photoelectric conversion region 102, which is an N-type diffusion region, is formed in a region concentrated on the back side of the semiconductor substrate 101. For example, a P-type semiconductor substrate may be used for the semiconductor substrate 101, or a P-type dopant may be thinly diffused. In this explanation, N-type refers to an N-type with a small amount of free electrons, and N+ type refers to an N-type with a large amount of free electrons. Similarly, P-type refers to a P-type with a small amount of holes, and P+ type refers to a P-type with a large amount of holes.

[0043] Next, a trench extending from the top surface to the back surface is formed in the region where the pixel separation section 109 for dividing the semiconductor substrate 101 into individual pixel regions is formed. The trench formed in this way is then filled with an insulator such as silicon oxide (SiO2) or silicon nitride (SiN), thereby forming the pixel separation section 109 that divides the semiconductor substrate 101 into individual pixel regions.

[0044] In this example, the pixel isolation section 109 is exemplified as a so-called FFTI (Front Full Trench Isolation) type pixel isolation section that extends from the top surface to the back surface of the semiconductor substrate 101. However, it is not limited to this, and it is also possible to use an FTI (Full Trench Isolation) type pixel isolation section that penetrates the semiconductor substrate 101 from the back side, or a DTI (Deep Trench Isolation) type or RDTI (Reverse Deep Trench Isolation) type pixel isolation section formed from the surface or back surface to the middle of the semiconductor substrate 101.

[0045] Furthermore, if the pixel separation section 109 is to have a light confinement effect, a reflective material such as tungsten (W) may be embedded in the trench formed in the semiconductor substrate 101. In this case, if a conductive reflective material is embedded, it is preferable to provide an insulating layer between it and the semiconductor substrate 101.

[0046] Next, as shown in Figures 11 and 12, a U-shaped trench 103a for forming the embedded gate electrode 103 is formed by etching the semiconductor substrate 101 from the surface side to an extent that does not reach the photoelectric conversion section 102. For the formation of the trench 103a, for example, photolithography and dry etching can be used, and for dry etching, for example, anisotropic dry etching such as RIE (Reactive Ion Etching) can be used. However, it is not limited to this, and the trench 103a may be formed by various methods.

[0047] Next, a gate insulating film (not shown) is formed on the surface of the semiconductor substrate 101 inside the trench 103a. Annealing under oxygen-rich conditions can be used to form the gate insulating film. However, it is not limited to this, and the gate insulating film may also be formed using sputtering or CVD (Chemical Vapor Deposition) methods. Furthermore, insulating films formed on the upper surface of the semiconductor substrate 101 outside the inside of the trench 103a may be removed by CMP (Chemical Mechanical Polishing) or wet etching.

[0048] Next, as shown in Figures 13 and 14, an embedded gate electrode 103 is formed inside the trench 103a. The height of the embedded gate electrode 103 within the trench 103a may be such that the distance from the floating diffusion region 105 and / or ground contact 106 formed in a later step is kept at a distance that reduces the concentration of the electric field. For example, the height of the embedded gate electrode 103 within the trench 103a may be about half the depth of the trench 103a.

[0049] Furthermore, the material used for the embedded gate electrode 103 may be polysilicon or amorphous silicon, which have conductivity due to the presence of impurities. However, it is not limited to these, and other conductive materials such as metals or alloys may be used.

[0050] For example, sputtering or CVD may be used to form the embedded gate electrode 103. Specifically, a conductive material may be deposited from the top surface of the semiconductor substrate 101 so as to fill the trench 103a, the conductive material deposited on the top surface of the semiconductor substrate 101 may be removed by CMP or wet etching, and then a trench for forming the embedded insulating film 107 may be formed in the trench 103a using, for example, photolithography and dry etching, thereby forming the embedded gate electrode 103 at the bottom of the trench 103a. In this case, in order to bring the embedded gate electrode 103 at the bottom of the trench 103a into contact with the transfer gate electrode 108 on the semiconductor substrate 101, a portion of the embedded gate electrode 103 in the trench 103a may be left open up to the opening of the trench 103a (i.e., the top surface of the semiconductor substrate 101).

[0051] Next, as shown in Figures 15 and 16, an embedded insulating film 107 is formed in the trench 103a where the embedded gate electrode 103 is formed. For example, sputtering or CVD may be used to form the embedded insulating film 107. Specifically, an insulating material may be deposited from the upper surface of the semiconductor substrate 101 to fill the remaining cavity in the trench 103a, and the embedded insulating film 107 may be formed on the upper side of the trench 103a by removing the insulating material deposited on the upper surface of the semiconductor substrate 101 by CMP or wet etching. The insulating material for the embedded insulating film 107 may be silicon oxide (SiO2) or silicon nitride (SiN).

[0052] Next, a transfer gate electrode 108 that contacts the embedded gate electrode 103 is formed on the semiconductor substrate 101. The material of the transfer gate electrode 108 may be polysilicon or amorphous silicon, which have conductivity due to the presence of impurities. However, it is not limited to these, and other conductive materials such as metals or alloys may be used. Furthermore, in the formation of the transfer gate electrode 108, a film deposition process such as sputtering or CVD and a patterning process by photolithography and etching may be performed.

[0053] Next, a diffusion region 104 is formed in the region surrounded by the embedded insulating film 107 in the upper part of the semiconductor substrate 101. In forming the diffusion region 104, a mask is formed on the upper surface of the semiconductor substrate 101, with an opening extending from the central part of the pixel region to one of the four corners (the corner where the floating diffusion region 105 is formed). An N-type dopant is ion-implanted into the region opened by this mask with a predetermined implantation energy to form the diffusion region 104, which is an N-type diffusion region.

[0054] Next, a floating diffusion region 105, which is an N+ type diffusion region, is formed at one of the four corners of the pixel region in the upper part of the semiconductor substrate 101, and a ground contact 106, which is a P+ type diffusion region, is formed at the corner diagonally opposite to this corner, thereby forming the pixel structure shown in Figures 5 to 9. The same process as described above for the diffusion region 104 may be used to form the floating diffusion region 105 and the ground contact 106. However, after ion implantation into the floating diffusion region 105 and the ground contact 106, the implanted dopant may be stabilized by performing annealing on the upper surface of the semiconductor substrate 101.

[0055] 2.3 Summary As described above, according to this embodiment, since the photoelectric conversion unit 102, the embedded gate electrode 103, and the diffusion region 104 are arranged along the vertical direction (substrate thickness direction), it is possible to linearly draw the charge from the photoelectric conversion unit 102 into the diffusion region 104. This makes it possible to increase the charge transfer efficiency from the photoelectric conversion unit 102.

[0056] Furthermore, according to this embodiment, since the embedded insulating film 107 is interposed between the embedded gate electrode 103 and the floating diffusion region 105 / ground contact 106, it is possible to suppress the occurrence of electron avalanches caused by the concentration of electric fields between the embedded gate electrode 103 and the floating diffusion region 105 / ground contact 106. As a result, it is possible to suppress the occurrence of image quality degradation such as white spots caused by the saturation of the amplitude of the pixel signal.

[0057] 3. Second Embodiment Next, the imaging apparatus and electronic equipment according to the second embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 200 may correspond to the pixel 2 provided on the first substrate 10 in the common configuration example described above. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the above embodiments will be described by reference, and redundant explanations will be omitted.

[0058] Figure 17 is a top view showing a schematic example of the pixel configuration according to this embodiment. Figure 18 is a vertical cross-sectional view showing an example of the structure of the A-A' section in Figure 17. Figure 19 is a vertical cross-sectional view showing an example of the structure of the B-B' section in Figure 17.

[0059] As shown in Figures 17 to 19, the pixel 200 according to this embodiment has a structure similar to the pixel 100 described with reference to Figures 5 to 9 in the first embodiment, but the diffusion region 104 is omitted and the floating diffusion region 105 is replaced by a floating diffusion region 205 located approximately in the center of the pixel region.

[0060] Thus, even when the floating diffusion region 105 is located approximately in the center of the pixel region, the photoelectric conversion unit 102, the embedded gate electrode 103, and the floating diffusion region 205 are arranged along the vertical direction (substrate thickness direction), making it possible to linearly draw the charge from the photoelectric conversion unit 102 to the floating diffusion region 205. This makes it possible to increase the charge transfer efficiency from the photoelectric conversion unit 102.

[0061] Furthermore, in the structure according to this embodiment, since the embedded insulating film 107 is interposed between the embedded gate electrode 103 and the floating diffusion region 205 / ground contact 106, it is possible to suppress the occurrence of electron avalanches caused by the concentration of the electric field between the embedded gate electrode 103 and the floating diffusion region 205 / ground contact 106. As a result, it is possible to suppress the occurrence of image quality degradation such as white spots caused by the saturation of the amplitude of the pixel signal.

[0062] Other configurations, operations, manufacturing processes, and effects may be the same as those of the embodiments described above, and therefore, a detailed explanation is omitted here.

[0063] 4. Third Embodiment Next, the imaging apparatus and electronic equipment according to the third embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 300 may correspond to the pixel 2 provided on the first substrate 10 in the common configuration example described above. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the embodiments described above will be referenced, and redundant explanations will be omitted.

[0064] Figure 20 is a top view showing a schematic example of the pixel configuration according to this embodiment. Figure 21 is a vertical cross-sectional view showing an example of the structure of the A-A' section in Figure 20. Figure 22 is a vertical cross-sectional view showing an example of the structure of the B-B' section in Figure 20.

[0065] As shown in Figures 20 to 21, the pixel 300 according to this embodiment has a structure similar to the pixel 100 described with reference to Figures 5 to 9 in the first embodiment, but in which the embedded gate electrode 103 and embedded insulating film 107 are replaced by an embedded gate electrode 303 and embedded insulating film 307.

[0066] The embedded gate electrode 303 has a structure in which the portion located in the extension direction of the diffusion region 104 extending from the floating diffusion region 105 and the portion on the side where the transfer gate electrode 108 is not provided are omitted from the U-shaped structure of the embedded gate electrode 103 shown in Figures 5 to 9. In other words, the embedded gate electrode 303 has a structure that is provided only on one side of the region below the diffusion region 104 (the side where the transfer gate electrode 108 is provided). Accordingly, in this embodiment, the embedded insulating film 307 is provided only on one side of the region below the diffusion region 104 (the side where the transfer gate electrode 108 is provided).

[0067] In this way, by arranging the embedded gate electrode 303 on only one side of the region below the diffusion region 104, it becomes possible to reduce the pixel area. This makes it possible to achieve effects such as improved resolution and miniaturization of the imaging device 1.

[0068] Furthermore, even when the embedded gate electrode 303 is positioned on one side of the region below the diffusion region 104, the photoelectric conversion unit 102, the embedded gate electrode 303, and the diffusion region 104 are arranged along the vertical direction (substrate thickness direction), making it possible to linearly draw the charge from the photoelectric conversion unit 102 into the diffusion region 104. This makes it possible to improve the charge transfer efficiency from the photoelectric conversion unit 102.

[0069] Furthermore, in the structure according to this embodiment, since the embedded insulating film 307 is interposed between the embedded gate electrode 303 and the floating diffusion region 105 / ground contact 106, it is possible to suppress the occurrence of electron avalanches caused by the concentration of the electric field between the embedded gate electrode 303 and the floating diffusion region 105 / ground contact 106. As a result, it is possible to suppress the occurrence of image quality degradation such as white spots caused by the saturation of the amplitude of the pixel signal.

[0070] In this embodiment, the first embodiment is used as an example, but the invention is not limited to this, and other embodiments, such as the second embodiment, can also be used as a basis. Furthermore, other configurations, operations, manufacturing processes, and effects may be the same as those in the embodiments described above, so a detailed explanation is omitted here.

[0071] 5. Fourth Embodiment Next, the imaging apparatus and electronic equipment according to the fourth embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 400 may correspond to the pixel 2 provided on the first substrate 10 in the common configuration example described above. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the embodiments described above will be referenced, and redundant explanations will be omitted.

[0072] Figure 23 is a top view showing a schematic example of the pixel configuration according to this embodiment. Figure 24 is a vertical cross-sectional view showing an example of the structure of the A-A' section in Figure 23. Figure 25 is a vertical cross-sectional view showing an example of the structure of the B-B' section in Figure 23.

[0073] As shown in Figures 23 to 25, the pixel 400 according to this embodiment has a similar configuration to the pixel 100 described with reference to Figures 5 to 9 in the first embodiment, but the transfer gate electrode 108, the embedded gate electrode 103, and the embedded insulating film 107 are replaced with two transfer gate electrodes 408a and 408b, two separate embedded gate electrodes 403a and 403b, and two separate embedded insulating films 407a and 407b.

[0074] The embedded gate electrodes 403a and 403b have a structure in which the portion of the U-shaped structure of the embedded gate electrode 103 shown in Figures 5 to 9 that is located in the direction of extension of the diffusion region 104 extending from the floating diffusion region 105 is omitted. In other words, the embedded gate electrodes 403a and 403b have a structure that sandwiches the region below the diffusion region 104 from both sides. Accordingly, in this embodiment, the embedded insulating films 407a and 407b are arranged so as to sandwich the region below the diffusion region 104 from both sides.

[0075] Furthermore, of the two embedded gate electrodes 403a and 403b, the embedded gate electrode 403a is connected to the transfer gate electrode 408a, and the embedded gate electrode 403b is connected to the transfer gate electrode 408b which is located diagonally opposite to the transfer gate electrode 408a.

[0076] Thus, even when the embedded gate electrodes 403a and 403b are arranged to sandwich the region below the diffusion region 104 from both sides, the photoelectric conversion unit 102, the embedded gate electrodes 403a and 403b, and the diffusion region 104 are aligned along the vertical direction (substrate thickness direction), making it possible to linearly draw the charge from the photoelectric conversion unit 102 into the diffusion region 104. This makes it possible to increase the charge transfer efficiency from the photoelectric conversion unit 102.

[0077] Furthermore, in the structure according to this embodiment, since the embedded insulating films 407a and 407b are interposed between the embedded gate electrodes 403a and 403b and the floating diffusion region 105 / ground contact 106, it is possible to suppress the occurrence of electron avalanches caused by the concentration of the electric field between the embedded gate electrodes 403a and 403b and the floating diffusion region 105 / ground contact 106. As a result, it is possible to suppress the occurrence of image quality degradation such as white spots caused by the saturation of the amplitude of the pixel signal.

[0078] In this embodiment, the first embodiment is used as an example, but the invention is not limited to this, and other embodiments, such as the second embodiment, can also be used as a basis. Furthermore, other configurations, operations, manufacturing processes, and effects may be the same as those in the embodiments described above, so a detailed explanation is omitted here.

[0079] 6. Fifth Embodiment Next, the imaging apparatus and electronic equipment according to the fifth embodiment will be described in detail with reference to the drawings. In this embodiment, the pixel 500 may correspond to the pixel 2 provided on the first substrate 10 in the common configuration example described above. Furthermore, the same configurations, operations, manufacturing processes, and effects as those of the embodiments described above will be referenced, and redundant explanations will be omitted.

[0080] Figure 26 is a top view showing a schematic example of the pixel configuration according to this embodiment. Figure 27 is a vertical cross-sectional view showing an example of the structure of the A-A' section in Figure 26. Figure 28 is a vertical cross-sectional view showing an example of the structure of the B-B' section in Figure 26.

[0081] As shown in Figures 26 to 28, the pixel 500 according to this embodiment has a structure similar to the pixel 100 described with reference to Figures 5 to 9 in the first embodiment, but the embedded gate electrode 103 and embedded insulating film 107 are replaced with an L-shaped embedded gate electrode 503 and an L-shaped embedded insulating film 507.

[0082] The embedded gate electrode 503 has a structure in which the portion of the U-shaped structure of the embedded gate electrode 103 shown in Figures 5 to 9 that is not provided on the side where the transfer gate electrode 108 is provided is omitted. In other words, the embedded gate electrode 503 has a structure that surrounds the region below the diffusion region 104 from the side where the transfer gate electrode 108 is provided and the side where the ground contact 106 is provided. Accordingly, in this embodiment, the embedded insulating film 507 is arranged to surround the region below the diffusion region 104 from the side where the transfer gate electrode 108 is provided and the side where the ground contact 106 is provided.

[0083] Thus, even when the embedded gate electrode 503 is structured to surround the region below the diffusion region 104 from both the side where the transfer gate electrode 108 is provided and the side where the ground contact 106 is provided, the photoelectric conversion unit 102, the embedded gate electrode 503, and the diffusion region 104 are arranged along the vertical direction (substrate thickness direction), making it possible to linearly draw the charge from the photoelectric conversion unit 102 into the diffusion region 104. This makes it possible to increase the charge transfer efficiency from the photoelectric conversion unit 102.

[0084] Furthermore, in the structure according to this embodiment, since the embedded insulating film 507 is interposed between the embedded gate electrode 503 and the floating diffusion region 105 / ground contact 106, it is possible to suppress the occurrence of electron avalanches caused by the concentration of the electric field between the embedded gate electrode 503 and the floating diffusion region 105 / ground contact 106. As a result, it is possible to suppress the occurrence of image quality degradation such as white spots caused by the saturation of the amplitude of the pixel signal.

[0085] In this embodiment, the first embodiment is used as an example, but the invention is not limited to this, and other embodiments, such as the second embodiment, can also be used as a basis. Furthermore, other configurations, operations, manufacturing processes, and effects may be the same as those in the embodiments described above, so a detailed explanation is omitted here.

[0086] 7. Examples of applications to mobile devices The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be implemented as a device mounted on any type of mobile vehicle, such as an automobile, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0087] Figure 29 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0088] The vehicle control system 12000 comprises multiple electronic control units connected via a communication network 12001. In the example shown in Figure 29, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0089] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0090] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0091] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0092] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0093] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0094] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking system based on information from inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0095] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0096] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0097] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example in Figure 29, the output devices are exemplified as an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0098] Figure 30 shows an example of the installation position of the imaging unit 12031.

[0099] In Figure 30, the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0100] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by imaging units 12101 and 12105 are mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0101] Figure 30 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0102] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0103] For example, the microcomputer 12051, based on distance information obtained from imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to vehicle 12100). In particular, it can extract the nearest object on the vehicle 12100's path that is traveling in approximately the same direction as vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0104] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, heavy vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0105] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0106] The above describes an example of a vehicle control system to which the technology described herein may be applied. The technology described herein can be applied to the imaging unit 12031 of the configuration described above. By applying the technology described herein to the imaging unit 12031, it becomes possible to acquire images with good image quality, which can lead to various effects such as improving the accuracy of various detection processes.

[0107] 8. Examples of applications to endoscopic surgical systems The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be applied to an endoscopic surgical system.

[0108] Figure 31 is a diagram showing an example of a schematic configuration of an endoscopic surgical system to which the technology described herein (the technology) may be applied.

[0109] Figure 31 illustrates a surgeon (physician) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgical system 11000. As shown in the figure, the endoscopic surgical system 11000 consists of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment device 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 equipped with various devices for endoscopic surgery.

[0110] The endoscope 11100 consists of a barrel 11101, the tip of which is inserted into the body cavity of the patient 11132 for a predetermined length, and a camera head 11102 connected to the base end of the barrel 11101. In the illustrated example, the endoscope 11100 is shown as a so-called rigid endoscope having a rigid barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible endoscope having a flexible barrel.

[0111] An opening into which an objective lens is fitted is provided at the tip of the endoscope tube 11101. A light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the tip of the endoscope tube by a light guide extending inside the endoscope tube 11101, and is irradiated through the objective lens towards the object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a straight-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0112] The camera head 11102 contains an optical system and an image sensor. Reflected light from the object being observed (observation light) is focused onto the image sensor by the optical system. The image sensor converts the observation light into electrical signals, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. This image signal is transmitted as RAW data to the camera control unit (CCU) 11201.

[0113] The CCU11201 consists of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and other components, and comprehensively controls the operation of the endoscope 11100 and the display device 11202. Furthermore, the CCU11201 receives image signals from the camera head 11102 and performs various image processing operations on these image signals, such as development processing (demosaic processing), to display the image based on those image signals.

[0114] The display device 11202 displays an image based on an image signal that has been processed by the CCU 11201, under control from the CCU 11201.

[0115] The light source device 11203 consists of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 11100 when photographing the surgical area, etc.

[0116] The input device 11204 is an input interface for the endoscopic surgical system 11000. The user can input various information and instructions to the endoscopic surgical system 11000 via the input device 11204. For example, the user can input instructions to change the imaging conditions (type of light, magnification, focal length, etc.) of the endoscope 11100.

[0117] The treatment instrument control device 11205 controls the drive of the energy treatment instrument 11112 for purposes such as tissue cauterization, incision, or vascular sealing. The insufflation device 11206 delivers gas into the patient's body cavity via the insufflation tube 11111 to inflate the body cavity of the patient 11132 for the purpose of securing a field of view by the endoscope 11100 and securing the operator's working space. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, images, or graphs.

[0118] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical area, can be configured as a white light source consisting of, for example, an LED, a laser light source, or a combination thereof. When the white light source is configured as a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to time-divisionally capture images corresponding to each of the RGB light sources by irradiating the observation target with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0119] Furthermore, the light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0120] Furthermore, the light source device 11203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue and irradiating with narrow-band light compared to the irradiation light used during normal observation (i.e., white light), so-called narrow-band imaging is performed to image predetermined tissues such as blood vessels on the surface of mucosa with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light is irradiated onto body tissue and fluorescence from the body tissue is observed (autofluorescence observation), or a reagent such as indocyanine green (ICG) is injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent is irradiated onto the body tissue to obtain a fluorescence image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0121] Figure 32 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Figure 31.

[0122] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with one another.

[0123] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and then incident on the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses, including a zoom lens and a focus lens.

[0124] The imaging unit 11402 is composed of image sensors. The imaging unit 11402 may consist of one image sensor (a so-called single-chip type) or multiple image sensors (a so-called multi-chip type). If the imaging unit 11402 is composed of multiple chips, for example, each image sensor may generate an image signal corresponding to RGB, and these signals may be combined to obtain a color image. Alternatively, the imaging unit 11402 may be configured to have a pair of image sensors for acquiring image signals for the right eye and the left eye, respectively, corresponding to 3D (dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. In addition, if the imaging unit 11402 is composed of multiple chips, multiple lens units 11401 may be provided corresponding to each image sensor.

[0125] Furthermore, the imaging unit 11402 does not necessarily have to be located in the camera head 11102. For example, the imaging unit 11402 may be located inside the lens barrel 11101, directly behind the objective lens.

[0126] The drive unit 11403 is composed of actuators and, under control from the camera head control unit 11405, moves the zoom lens and focus lens of the lens unit 11401 along the optical axis by a predetermined distance. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.

[0127] The communication unit 11404 consists of communication devices for sending and receiving various types of information with the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

[0128] Furthermore, the communication unit 11404 receives control signals from the CCU 11201 to control the drive of the camera head 11102 and supplies them to the camera head control unit 11405. These control signals include information regarding imaging conditions, such as information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image.

[0129] The imaging conditions such as frame rate, exposure value, magnification, and focus may be specified by the user as appropriate, or they may be automatically set by the control unit 11413 of the CCU11201 based on the acquired image signal. In the latter case, the endoscope 11100 will be equipped with so-called AE (Auto Exposure), AF (Auto Focus), and AWB (Auto White Balance) functions.

[0130] The camera head control unit 11405 controls the drive of the camera head 11102 based on the control signal received from the CCU 11201 via the communication unit 11404.

[0131] The communication unit 11411 consists of a communication device for sending and receiving various types of information with the camera head 11102. The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.

[0132] Furthermore, the communication unit 11411 transmits control signals to the camera head 11102 to control the driving of the camera head 11102. Image signals and control signals can be transmitted via telecommunications, optical communications, etc.

[0133] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102.

[0134] The control unit 11413 performs various controls related to imaging the surgical area, etc., by the endoscope 11100, and the display of the images obtained from imaging the surgical area, etc. For example, the control unit 11413 generates control signals to control the driving of the camera head 11102.

[0135] Furthermore, the control unit 11413 displays the captured image showing the surgical area on the display device 11202 based on the image signal processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific biological sites, bleeding, mist when using the energy treatment device 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When the control unit 11413 displays the captured image on the display device 11202, it may use the recognition results to superimpose various surgical support information onto the image of the surgical area. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can proceed with the surgery with confidence.

[0136] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable compatible with electrical signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.

[0137] In the illustrated example, communication was performed via a wired connection using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

[0138] The above describes an example of an endoscopic surgical system to which the technology described herein can be applied. The technology described herein can be applied to the components described above, for example, the endoscope 11100, the camera head 11102 (imaging unit 11402), the CCU 11201 (image processing unit 11412), etc. By applying the technology described herein to these components, clearer images of the surgical site can be obtained, making it possible for the surgeon to reliably confirm the surgical site.

[0139] While an endoscopic surgical system has been described here as an example, the technology described herein may also be applied to other systems, such as microsurgical systems.

[0140] While embodiments of this disclosure have been described above, the technical scope of this disclosure is not limited to the embodiments described above, and various modifications are possible without departing from the gist of this disclosure. Furthermore, components from different embodiments and modifications may be combined as appropriate.

[0141] Furthermore, the effects described in each embodiment of this specification are merely illustrative and not limiting, and other effects may also occur.

[0142] Furthermore, this technology can also be configured as follows. (1) It comprises multiple pixels arranged in a two-dimensional grid, Each of the aforementioned pixels is, A photoelectric conversion unit that converts incident light into photoelectric energy, A gate electrode that transfers the charge accumulated in the photoelectric conversion unit, A diffusion region which is the destination of the charge transferred from the photoelectric conversion unit, Equipped with, The photoelectric conversion unit, the gate electrode, and the diffusion region are arranged within the semiconductor substrate along the substrate thickness direction of the semiconductor substrate. Imaging device. (2) The semiconductor substrate further comprises a pixel separation unit that divides at least the upper surface into a plurality of pixel regions arranged in a two-dimensional grid, Each of the aforementioned pixels is provided in a one-to-one correspondence with each of the aforementioned pixel regions. The diffusion region is located approximately in the center of the pixel region on the upper surface of the semiconductor substrate. The gate electrode is positioned in the substrate thickness direction in close proximity to the first region below the diffusion region, The photoelectric conversion unit is positioned in a second region below the diffusion region in the substrate thickness direction and close to the back surface of the semiconductor substrate. The imaging device described in (1) above. (3) The gate electrode approaches the preceding region from at least one direction. The imaging device described in (2) above. (4) The gate electrode has an L-shape when viewed from the upper side and approaches the first region from two directions. The imaging device described in (2) above. (5) The aforementioned terminal is, A first gate electrode approaching the preceding region from a first direction, A second gate electrode approaches from a second direction opposite to the first direction, across the first region, The imaging apparatus described in (2) above, including the following: (6) The gate electrode has a U-shape when viewed from the upper side and approaches the first region from three directions. The imaging device described in (2) above. (7) The pixel region is further provided with a floating diffusion region located at one of the four corners of the pixel region, which stores the charge transferred from the photoelectric conversion unit. The diffusion region extends from approximately the center of the pixel region to the floating diffusion region. An imaging device as described in any one of (2) to (6) above. (8) The diffusion region is a floating diffusion region that accumulates the charge transferred from the photoelectric conversion unit. An imaging device as described in any one of (2) to (6) above. (9) Each of the aforementioned pixels further comprises an embedded insulating film disposed between the gate electrode and the diffusion region. An imaging device as described in any one of (1) to (8) above. (10) The semiconductor substrate further comprises a pixel separation unit that divides at least the upper surface into a plurality of pixel regions arranged in a two-dimensional grid, Each of the aforementioned pixels is provided in a one-to-one correspondence with each of the aforementioned pixel regions. Each of the aforementioned pixels is, A floating diffusion region is provided at one of the four corners of the pixel region and stores the charge transferred from the photoelectric conversion unit, An embedded insulating film disposed between the gate electrode and the floating diffusion region, Furthermore, it is equipped with An imaging device as described in any one of (1) to (8) above. (11) Each of the aforementioned pixels is further provided with a ground contact located at one of the four corners of the pixel region, which grounds the semiconductor substrate. The embedded insulating film is further positioned between the gate electrode and the ground contact. The imaging device described in (10) above. (12) The embedded insulating film is arranged from the upper surface of the semiconductor substrate to the upper surface of the gate electrode. The imaging device described in any one of (9) to (11) above. (13) An electronic device equipped with an imaging device as described in any one of (1) to (12) above. [Explanation of symbols]

[0143] 1.1003 Imaging device 2, 100, 200, 300, 400, 500 pixels 3 Pixel array section 4. Vertical drive circuit 5-column signal processing circuit 6. Horizontal drive circuit 7 Output Circuit 8 Control circuits 10. First board 11, 21, 31, 101 Semiconductor substrates 20 Second board 22 Readout Circuit 23 pixel drive lines 24 Vertical signal lines 30 Third board 32 Logic Circuits 102 Photoelectric conversion unit 103, 303, 403a, 403b, 503 embedded Gate 104 Diffusion region 105, 205, FD floating diffusion region 106 Ground Contact 107, 307, 407a, 407b, 507 Embedded insulating film 108, 408a, 408b Transfer gate electrode 109 Pixel separation section 1001 Electronic equipment 1002 Optical system 1004 DSP 1005 Display device 1006 Operation system 1007 Bus 1008 memory 1009 Recording device 1010 Power system AMP (amplifying transistor) PD photodiode RST Reset Transistor SEL Select Transistor TR Transfer Transistor

Claims

1. A plurality of pixels arranged in a two-dimensional grid on a semiconductor substrate, A pixel separation unit that divides at least the upper surface of the semiconductor substrate into a plurality of pixel regions arranged in a two-dimensional grid, Equipped with, Each of the aforementioned pixels is, Each of the aforementioned pixel regions is provided in a one-to-one correspondence, A photoelectric conversion unit provided on the back side of the semiconductor substrate, which converts incident light entering from the back side into photoelectric light, A diffusion region is provided on the upper surface side facing the back surface of the semiconductor substrate, which serves as the destination for the charge converted by the photoelectric conversion unit, On the upper surface side within the semiconductor substrate, a floating diffusion region is provided so as to be connected to the diffusion region and for accumulating the charge, A gate electrode and a gate electrode are provided on the upper surface of the semiconductor substrate. An embedded gate electrode is provided extending from the upper surface of the semiconductor substrate to the photoelectric conversion section, along the thickness direction of the semiconductor substrate, and is connected to the gate electrode, transferring the charge to the diffusion region. A ground contact is provided on the upper surface side within the semiconductor substrate and grounds the semiconductor substrate, It has, The diffusion region is located approximately in the center of the pixel region on the upper surface of the semiconductor substrate. The photoelectric conversion unit is positioned below the diffusion region in the substrate thickness direction, The floating diffusion region is located at one of the four corners of the pixel region. The ground contact is located in one of the four corners of the pixel region, on the same diagonal as the floating diffusion region. The gate electrode is positioned in one of the four corners of the pixel region, which is not located on the same diagonal as the floating diffusion region. The embedded gate electrode has an L-shape when viewed from the upper side, and is positioned to approach the back side region of the diffusion region from two directions: from the side on which the gate electrode is provided and from the side on which the ground contact is provided. The photoelectric conversion unit, the embedded gate electrode, and the diffusion region are arranged in that order within the semiconductor substrate along the substrate thickness direction of the semiconductor substrate. Imaging device.

2. Each of the aforementioned pixels further comprises an embedded insulating film disposed between the embedded gate electrode and the diffusion region. The imaging apparatus according to claim 1.

3. The embedded insulating film is further disposed between the embedded gate electrode and the floating diffusion region. The imaging apparatus according to claim 2.

4. The embedded insulating film is further disposed between the embedded gate electrode and the ground contact. The imaging device according to claim 3.

5. The embedded insulating film is arranged from the upper surface of the semiconductor substrate to the upper surface of the embedded gate electrode. The imaging apparatus according to claim 2.

6. An electronic device comprising an imaging device according to any one of claims 1 to 5.

Images