Phase-change memory cell spacer

Abstract

A phase change memory (PCM) cell includes an electrode, a heater electrically connected to the electrode, a PCM material electrically connected to the heater, a second electrode electrically connected to the PCM material, an electrical insulator surrounding the PCM material, and a shield positioned between the PCM material and the electrical insulator, the shield comprising a reactive ion etch resistant material.

Description

Technical Field

[0001] The present invention relates to computer memory, and more particularly to a phase change material memory device having a spacer.

Background Art

[0002] Phase change memory (PCM) can be utilized for both training and inference of artificial intelligence in analog computing. The PCM structure includes a phase change memory cell device having an overall high device resistance with adjustable conductivity and high retention, and can minimize energy consumption. The adjustment can be achieved by forming different structural states having various ratios of crystalline and amorphous phases of the PCM material. Thus, the current passing through the PCM structure can be affected by other materials surrounding the PCM structure, and the PCM material itself can be affected by the chemicals and processes used in the manufacture of the PCM structure.

Summary of the Invention

[0003] According to one embodiment of the present disclosure, a PCM cell includes an electrode, a heater electrically connected to the electrode, a PCM material electrically connected to the heater, a second electrode electrically connected to the PCM material, an electrical insulator surrounding the PCM material, and a shield positioned between the PCM material and the electrical insulator, the shield having a reactive ion etching resistant material.

[0004] According to one embodiment of the present disclosure, a method of manufacturing a PCM cell includes forming a first electrode, forming a heater on the first electrode, forming a PCM material on the heater, forming a second electrode on the PCM material, forming a first shield around the PCM material, the first shield comprising a first reactive ion etching resistant material, and forming an electrical insulator surrounding the first shield.

[0005] According to one embodiment of the present disclosure, a method for manufacturing a PCM cell includes the steps of: forming a first electrode; forming a heater on the first electrode; forming a PCM material on the heater; forming a second electrode on the PCM material; forming a first layer enclosing the PCM material and the second electrode, the first layer comprising a first reactive ion etching resistant material; and forming a second layer on the first layer, similarly enclosing the PCM material and the second electrode, the second layer comprising a reactive ion etching sensitive material. [Brief explanation of the drawing]

[0006] [Figure 1A] This is a cross-sectional view of a PCM cell including a spacer according to one embodiment of the present disclosure.

[0007] [Figure 1B] This is a cross-sectional view of the PCM cell of Figure 1A, which includes an amorphous region, according to one embodiment of the present disclosure.

[0008] [Figure 2] This is a flowchart of a method for manufacturing the PCM cell shown in Figure 1A, according to one embodiment of the present disclosure.

[0009] [Figure 3A] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3B] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3C] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3D] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure.

[0010] [Figure 3E]Figure 2 is a partially perspective cross-sectional view of the operation of the method for manufacturing a PCM cell according to one embodiment of the present disclosure.

[0011] [Figure 3F] This is a top view of the operation of the method for manufacturing a PCM cell shown in Figure 2, according to one embodiment of the present disclosure. [Figure 3G] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3H] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3I] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3J] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3K] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3L] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure. [Figure 3M] Figure 2 shows a series of cross-sectional views of a method for manufacturing a PCM cell according to one embodiment of the present disclosure.

[0012] [Figure 4A] This is a cross-sectional view of a PCM cell during manufacturing, which is an alternative embodiment according to one of the embodiments of this disclosure.

[0013] [Figure 4B] This is a cross-sectional view of a fully manufactured PCM cell, an alternative embodiment of Figure 4A, according to one embodiment of the present disclosure. [Modes for carrying out the invention]

[0014] Various embodiments of the present disclosure are described herein with reference to the accompanying drawings. Alternative embodiments may be devised without departing from the scope of the present disclosure. Note that various connections and positional relationships (e.g., above, below, adjacent, etc.) are described between elements within the following description and in the drawings. These connections and / or positional relationships may be direct or indirect, unless otherwise specified, and the present disclosure is not intended to be limited in this regard. Thus, the coupling of entities may refer to either direct or indirect coupling, and the positional relationship between entities may be a direct or indirect positional relationship. As an example of an indirect positional relationship, a reference in this description to forming layer "A" above layer "B" includes the situation where one or more intermediate layers (e.g., layers "C" and "D") are between layer "A" and layer "B", provided that the relevant characteristics and functions of layer "A" and layer "B" are not substantially changed by the intermediate layer.

[0015] The following definitions and abbreviations are used in the interpretation of the claims and the specification. As used herein, the terms "comprises", "comprising", "includes", "including", "has", "having", "contains", or "containing", or any other variation thereof, are intended to cover non-exclusive inclusion. For example, a composition, mixture, process, method, article, or apparatus that includes a list of elements is not necessarily limited to only those elements, and may include other elements not explicitly listed or inherent to such composition, mixture, process, method, article, or apparatus. Further, unless otherwise explicitly stated, any numerical range included in this specification includes its boundaries.

[0016] For the purposes of the following description, terms such as "upper", "lower", "right", "left", "vertical", "horizontal", "top", "bottom", and derivatives thereof shall relate to the structures and methods being described in the orientation of the drawings. The terms "overlying", "atop", "on top", "positioned on", or "positioned atop" mean that a first element, such as a first structure, is present over a second element, such as a second structure, where intervening elements, such as an interface structure, may be present between the first and second elements. The term "direct contact" means that a first element, such as a first structure, and a second element, such as a second structure, are connected without any intermediate conductive, insulating, or semiconductor layer at the interface of these two elements. It should be noted that terms such as "selective to", e.g., "a first element selective to a second element", mean that the first element can be etched and the second element can function as an etch stop.

[0017] For the sake of brevity, conventional techniques related to the fabrication of semiconductor devices and integrated circuits (ICs) may or may not be described in detail herein. Further, the various tasks and process steps described herein may be incorporated into more comprehensive procedures or processes having additional steps or functions not described in detail herein. Specifically, the various steps in the manufacture of semiconductor devices and semiconductor-based ICs are well known and, thus, for the sake of brevity, many conventional steps are only briefly mentioned herein or omitted without providing details of well-known processes.

[0018] Generally, the various processes used to form microchips that are packaged into ICs fall into four general categories, namely, film formation, removal / etching, semiconductor doping, and patterning / lithography.

[0019] Thin-film deposition can be any process of growing, coating, or otherwise transferring material onto a wafer. Available techniques include, among others, physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxial growth (MBE), and more recently, atomic layer deposition (ALD). Another deposition technique is plasma-excited chemical vapor deposition (PECVD), which is a process that uses energy in a plasma to induce reactions on the wafer surface that would otherwise require higher temperatures associated with conventional CVD. High-energy ion irradiation during PECVD deposition can also improve the electrical and mechanical properties of the film.

[0020] Removal / etching can be any process that removes material from a wafer. Examples include etching processes (either wet or dry), chemical mechanical planarization (CMP), and similar processes. One example of a removal process is ion beam etching (IBE). Generally, IBE (or milling) refers to a dry plasma etching method that utilizes a remote broad-beam ion / plasma source to remove substrate material by physically inert gases and / or chemically reactive gases. Like other dry plasma etching techniques, IBE offers advantages such as etching rate, anisotropy, selectivity, uniformity, aspect ratio, and minimization of substrate damage. Another example of a dry removal process is reactive ion etching (RIE). Generally, RIE uses chemically reactive plasma to remove material deposited on a wafer. With RIE, plasma is generated by an electromagnetic field under low pressure (vacuum). High-energy ions from the RIE plasma collide with the wafer surface and react with it to remove the material.

[0021] Semiconductor doping can generally involve modifying the electrical properties of a transistor by doping the source and drain, for example, by diffusion and / or ion implantation. Furnace annealing, or rapid thermal annealing ("RTA"), follows these doping processes. Annealing serves to activate the implanted dopants. Films of both conductors (e.g., polysilicon, aluminum, copper, etc.) and insulators (e.g., various forms of silicon dioxide, silicon nitride, etc.) are used to connect and insulate transistors and their components. Selective doping of various regions of a semiconductor substrate can affect the conductivity of the substrate. of Application of voltage in change ru This makes it possible. By creating the structure of these various components, millions of transistors can be used. Structure Built So and both They can be wired together to form the complex circuits of modern microelectronic devices.

[0022] Semiconductor lithography can be the formation of three-dimensional relief images or patterns on a semiconductor substrate for later transfer to the substrate. In semiconductor lithography, patterns are formed using a photosensitive polymer called a photoresist. The lithography and etching pattern transfer steps are repeated multiple times to construct complex structures that make up transistors and many wires connecting millions of transistors in a circuit. Each pattern printed on the wafer is aligned with a pre-formed pattern, and conductors, insulators, and selectively doped regions are layered in stages to form the final device.

[0023] Figures 1A and 1B are cross-sectional views of a PCM cell 100 for use in, for example, an integrated circuit (not shown). In the illustrated embodiment, the PCM cell 100 includes a bottom wire 102, a bottom electrode 104, an insulator 106, a heater 108, an insulator 110, a protruding liner 112, a PCM material 114, a shield 116, a guard 118, an insulator 120, a top electrode 122, and a top wire 124.

[0024] In the illustrated embodiment, the bottom of the bottom electrode 104 is in direct contact with and electrically connected to the top of the bottom wire 102, which can receive electrical signals from other components (not shown) of the integrated circuit. The bottom of the heater 108 is in direct contact with and electrically connected to the top of the bottom electrode 104. The bottom of the protruding liner 112 is in direct contact with and electrically and thermally connected to the top of the heater 108. The bottom of the PCM material 114 is in direct contact with and electrically and thermally connected to the top of the protruding liner 112. The bottom of the top electrode 122 is in direct contact with and electrically connected to the top of the PCM material 114. The bottom of the top wire 124 is in direct contact with and electrically connected to the top of the top electrode 122, which can transmit electrical signals from the PCM cell 100 to other components (not shown) of the integrated circuit.

[0025] In the illustrated embodiment, the shield 116 is in direct contact with and laterally surrounds the outer surface of the PCM material 114 and a portion of the top electrode 122. In this way, the shield 116 protects the PCM material 114 from all parallel directions in at least one direction. side A surface (for example, a vertically extending surface as shown in Figure 1A) surrounding In some embodiments, the shield 116 is positioned laterally relative to the top electrode 122. all hand side In other embodiments, the shield 116 surrounds the top of the PCM material 114. It is flush Furthermore, the guard 118 is in direct contact with at least a portion of the outer surface of the shield 116 and The part in question It surrounds it horizontally. The outer surface of Shield 116 remainder It is in direct contact with the top wire 124 and the insulator 120. , the top wire 124 and the insulator 120 Although enclosed, in some embodiments, the entire outer surface of the shield 116 is in direct contact with the top wire 124 or the insulator 120 and Top wire 124 or insulator 120It is surrounded by. Similarly, a portion of the outer surface of the guard 118 is in direct contact with the top wire 124 and the insulator 120 and Top wire 124 and insulator 120 Although surrounded laterally by, in some embodiments, the entire outer surface of the guard 118 is in direct contact with the top wire 124 or the insulator 120 and Top wire 124 or insulator 120 It is surrounded by.

[0026] In the illustrated embodiment, the insulators 106, 110, and 120 selectively structurally support and electrically insulate other components of the PCM cell 100, filling the spaces between them as needed. Thus, the outer surface of the bottom electrode 104 is in direct contact with and thereby laterally surrounded by the insulator 106, and the outer surface of the heater 108 is in direct contact with and thereby laterally surrounded by the insulator 110. Furthermore, the bottom surfaces of the protruding liner 112, the PCM material 114, and the shield 116 are in direct contact with and axially adjacent to the insulator 110, and the top wire 124 is in direct contact with and axially adjacent to the insulator 120.

[0027] In the illustrated embodiment, the cross-sectional view of the PCM cell 100 (facing the page in Figure 1A or Figure 1B) may be circular, but in other embodiments, it may be rectangular, square, elliptical, or any other suitable shape. Furthermore, the widths of the PCM material 114 and the top electrode 122 are the same, while the width of the heater 108 is, in comparison, Significantly The noise level is reduced to (for example, 3 to 7 times smaller, or about 5 times smaller). As a result, the PCM cell 100 has a mushroom-shaped configuration through which electrical signals (i.e., current) can flow from the bottom electrode 104 through the heater 108, the protruding liner 112, and the PCM material 114 to the top electrode 122.

[0028] In the illustrated embodiment, the bottom electrode 104 and the top electrode 122 are made of a highly conductive material, such as a metal or metal compound, for example, titanium nitride (TiN) or tungsten (W). The heater 108 is an electrode made of TiN, or a metal with higher resistance, such as titanium-tungsten (TiW), tantalum nitride (TaN), or titanium-aluminide (TiAl), and has a relatively narrow cross-sectional area, which concentrates the current flowing through the PCM cell 100. This is because the heater 108 is electrically... Pa Rus's During application resistance Canada It is possible to generate heat by heat, and this heat can be used to selectively change the temperature of the PCM material 114, for example, to exceed the crystallization temperature and melting point of the PCM material 114. Furthermore, the heater 108 may consist of multiple different conductive materials that can be arranged in multiple layers.

[0029] In the illustrated embodiments, the insulators 106, 110, and 120 are composed of dielectric (electrically insulating) materials such as silicon nitride (SiN), silicon oxide (SiO2), silicon carbonitride (SiNC), or tetraethyl orthosilicate (TEOS). In some embodiments, all of the insulators 106, 110, and 120 are made of the same material, while in other embodiments, different materials are used for some or all of the insulators 106, 110, and 120. Furthermore, the shield 116 is made of, for example, aluminum nitride (AlN), aluminum oxide (Al2O3), or aluminum oxynitride (AlO2O3). x N yShield 116 is composed of a reactive ion etching resistant (RIER) material, such as silicon nitride (SiN). Guard 118 is composed of a reactive ion etching sensitive (RIES) material, such as silicon nitride (SiN). The difference in materials between Shield 116 and Guard 118 can be utilized during the manufacturing of the PCM cell 100. For example, there is significant selectivity with respect to the removal of AlN and SiN. More specifically, SiN can be removed using an RIE process, which is substantially less effective at removing AlN. On the other hand, certain wet etching processes and chemicals can remove AlN without substantially removing SiN. For example, Al2O3 can be removed with chlorine gas (Cl2), argon (Ar), and argon-boron-chlorine (Ar / B / Cl2) mixtures. In contrast It exhibits higher selectivity. Furthermore, the etching rate of SiN is related to tetrafluoromethane (CF4) and oxygen (O2), while the etching rate of Al2O3 is related to aluminum chloride (AlCl3) or a chlorine-boron trichloride (Cl2 / BCl3) mixture. Therefore, fluorine (F) and Cl2 can result in RIE selectivity between Al2O3 and SiN or SiO2.

[0030] In the illustrated embodiment, the PCM material 114 is essentially composed of a phase-change material such as germanium-antimony-tellurium (GST), gallium-antimony-tellurium (GaST), or silver-iridium-antimony-tellurium (AIST) material, but other materials may be used as needed. Other examples of PCM materials may include, but are not limited to, germanium-tellurium compound materials (GeTe), silicon-antimony-tellurium (Si-Sb-Te) alloys, gallium-antimony-tellurium (Ga-Sb-Te) alloys, germanium-bismuth-tellurium (Ge-Bi-Te) alloys, indium-tellurium (In-Te) alloys, arsenic-antimony-tellurium (As-Sb-Te) alloys, silver-indium-antimony-tellurium (Ag-In-Sb-Te) alloys, Ge-In-Sb-Te alloys, Ge-Sb alloys, Sb-Te alloys, Si-Sb alloys, Ge-Te alloys, and combinations thereof. PCM material 114 may be undoped or doped (e.g., doped with one or more of oxygen (O), nitrogen (N), silicon (Si), or Ti). When the terms “composed essentially” and “consist essentially” are used herein in reference to materials of different layers, they indicate that other materials, if present, do not substantially alter the fundamental properties of the enumerated materials. For example, PCM material 114, which is essentially composed of GST material, does not contain any other materials that substantially alter the fundamental properties of the GST material.

[0031] In the illustrated embodiment, the PCM cell 100 transmits current pulses from the bottom electrode 104 to the top electrode 122. By flushing The PCM cell 100 can be programmed to function as a memory cell. This can be done by reading or writing values ​​on the PCM cell 100 at various voltages and / or for various durations. For example, a high voltage (e.g., 1 volt (V) to 4V) may be used for a short duration to write, which may cause the heater 108 to locally heat the PCM material 114 above its melting point. When the current flow stops, the PCM material 114 cools rapidly. RejectedAs a result, an amorphous region 126 is formed in a process called "resetting". Region 126 is a dome-shaped region of the PCM material 114 having an amorphous structure, while the rest of the PCM material 114 still has a polycrystalline structure. Generally speaking, this amorphous structure does not have a clear structure. However, within region 126 teeth Localized, unconnected crystal nuclei (i.e., small crystallized regions of the phase-change material 114) may exist. The formation of regions 126 can cause the electrical resistance across the PCM cell 100 to increase compared to a polycrystalline-only configuration (as in the PCM cell 100 in Figure 1A). These resistance values ​​of the PCM cell 100 can be read out, for example, by sending a current pulse from the bottom electrode 104 to the top electrode 122 at a low voltage (e.g., 0.2V) without changing the state of the PCM material 114 (including that of regions 126) or the resistance value of the PCM cell 100.

[0032] Furthermore, the PCM material 114 can be rewritten and returned to a polycrystalline-only configuration by "setting" the PCM cell 100. One means of rewriting the PCM material 114 is to use a short-duration (e.g., 10 nanoseconds (ns)) high-voltage electrical pulse (e.g., 1V-4V) that can cause the PCM material 114 to heat above its crystallization point but not to its melting point. Since the crystallization temperature is lower than the melting point, once the current flow stops, the PCM material 114 can anneal and form crystals. Another means of rewriting the PCM material 114 is to use an electrical pulse with a relatively long trailing edge (e.g., 1 microsecond) that is strong enough to heat the PCM material 114 above its melting point (in contrast to a square pulse with a relatively short trailing edge of about nanoseconds), after which the PCM material 114 is allowed to cool slowly and crystals can form. Any of these processes causes the electrical resistance across the PCM cell 100 to decrease compared to having amorphous regions 126 (as in the PCM cell 100 in Figure 1B). This new resistance value can then be read using a low voltage (e.g., 0.2V) current without changing the state of the PCM material 114 or the resistance value of the PCM cell 100.

[0033] In some embodiments, the melting point of the PCM material 114 is approximately 600°C. In some embodiments, the crystallization temperature of the PCM material 114 is approximately 180°C. Furthermore, the process of setting and resetting the PCM cell 100 may be repeated, and in some embodiments, various regions 126 with varying resistances may be created within the PCM material 114 (for example, due to varying sizes of the regions 126 and / or varying amounts of crystallization nuclei within the regions 126). This allows the PCM cell 100 to have various distinct resistances that can be created by changing the reset parameter. Thus, if the PCM cell 100 is considered to represent an informational digit, these digits may be non-binary (as opposed to conventional bits). However, in some embodiments, the PCM cell 100 may be used as a bit by having or not having a uniform region 126 within the PCM material 114. In such embodiments, the PCM cell 100 may have high resistance (low voltage output or known as "0") or low resistance (high voltage output or known as "1").

[0034] Depending on the components and configuration of the PCM cell 100, Shield 116, PCM material 114 side Protect it from coming into contact with the top wire 124. of Possible vinegar This prevents the PCM material 114 from being contaminated by the material of the top wire 124, which also prevents a direct electrical path from the PCM material 114 to the top wire 124 (i.e., bypassing the top electrode 122). However, direct electrical contact is maintained between the PCM material 114 and the top electrode 122, and between the top electrode 122 and the top wire 124.

[0035] Figure 2 is a flowchart of method 200 for manufacturing PCM cell 100. Figures 3A to 3M are a series of drawings of method 200 for manufacturing PCM cell 100. Figures 2 and 3A to 3M are discussed here in relation to each other, and here each operation of method 200 is illustrated by one of Figures 3A to 3M. Furthermore, during this discussion, references may be made to the features of PCM cell 100 shown in Figure 1A and / or Figure 1B.

[0036] In the illustrated embodiment, method 200 begins in operation 202, where an insulating layer 328 and a mask 330 are formed on the bottom electrode 104 and the insulator 106. The mask 330 consists of an organic planarization layer (OPL) 332, a silicon-containing anti-reflective coating (SiARC) 334, and a photoresist layer 336. The photoresist layer 336 includes a gap 338 for the formation of vias 340 during operation 204. More specifically, the vias 340 are formed by etching the insulating layer 328 to form the insulator 110, after which the mask 330 is removed. In operation 206, tantalum nitride (TaN) layers 342, titanium nitride (TiN) layers 344, and TaN layers 346 are formed on the insulator 110, including within the vias 340 up to the bottom electrode 104. In operation 208, chemical mechanical polishing (CMP) is performed to remove excess metal and the insulator 110 and Flush A heater 108 is formed. In operation 210, a protruding liner 112 is formed on the heater 108 and the insulator 110. The protruding liner 112 may have a rectangular shape, even though the heater 108 has a circular shape (as shown in the partial perspective view in Figure 3E and the top view in Figure 3F), but in some embodiments, the protruding liner 112 is absent (i.e., the protruding liner 112 is not present at all or not created during the manufacturing process in these embodiments).

[0037] In the illustrated embodiment, in operation 212, the PCM layer 348, TiN layer 350, and SiN layer 352 are formed on the insulator 110 and protruding liner 112. In some embodiments, the PCM layer 348 is about 80 nanometers (nm) thick, the TiN layer 350 is about 75 nm thick, and the SiN layer 352 is about 220 nm thick. In operation 214, masking and etching are performed (as in operation 202) to form the laminate 354. The laminate 354 includes the PCM material 114, the top electrode 122, and the mask 356. In operation 216, the laminate 354 is formed by forming the RIER layer 358 and the RIES layer 360 on the insulator 110 and the laminate 354 (for example, using conventional processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD). Covered In some embodiments, the RIER layer 358 has a thickness between approximately 2 nm and 20 nm, or between approximately 6 nm and 8 nm, and the RIES layer 360 has a thickness between approximately 6 nm and 12 nm.

[0038] In the illustrated embodiment, in operation 218, the RIES layer 360 is etched using a process (e.g., an RIE process) that has the least effect on the RIER layer 358 to form the guard 118. In operation 220, the RIER layer 358 is etched using a process (e.g., a wet etching process) that has the least effect on the guard 118 to form the shield 116. Since operation 220 substantially does not affect the guard 118, the height of the shield 116 depends on the height of the guard 118. In some embodiments, to protect the PCM material 114, the shield 116 (and guard 118) is at least the same height as the PCM material 114. However, in order to allow full contact with the top electrode 122, the shield 116 (and guard 118) is not higher than the top electrode 122. Therefore, the shield 116 (and guard 118) extends upward and terminates between the bottom and top of the top electrode 122, which means that the shield 116 is between approximately 80 nm and approximately 135 nm in height.

[0039] In the illustrated embodiment, in operation 222, the shield 116, guard 118, and laminate 354 are sealed by forming an insulating layer 362 on the insulator 110, shield 116, guard 118, and laminate 354. In operation 224, the pores 364 are etched into the insulating layer 362 (e.g., using an RIE process), which forms the insulator 120, removes the mask 356 (shown in Figure 3L), and exposes the top electrode 122. Operation 224 is Officially, When the entire top surface of the top electrode 122 is exposed, etching is performed. stop Although this will eventually stop, as shown in Figure 3M, Operation 224 is slightly over-etched. Therefore, Part of Guard 118 but Removal So And, Guard 118 It has been shortened, Excess etchingThis does not significantly affect the shield 116 (in some embodiments, the guard 118 can be completely removed, for example in operation 224). Therefore, because the shield 116 surrounds the PCM material 114 laterally, the shield 116 、 PCM material 114 Occurring during Operation 224 Chemical substances and P It can be protected from exposure to the process. In operation 226, the top wire 124 is formed in the pore 364 and the top wire 124 is connected to the top electrode 122. top Part wire 124 Make it flush with the insulator 120. for Furthermore, the CMP process This can be used to complete the formation of the PCM cell 100 (shown in Figure 1A).

[0040] The components, configuration, and operation of the PCM cell 100 and method 200 are as follows: PCM material 114 Derived from the etching process in Operation 224 Removal of materials, contamination, and salt For leaching Yo This allows for protection from damage, even if the etching process exceeds its nominal target point.

[0041] Figure 4A is a cross-sectional view in the process of manufacturing of an alternative embodiment, PCM cell 100 (shown in Figure 4B), after encapsulation of the lamination 354 (as in operation 216). However, in the illustrated embodiment, the lamination 354 is formed by forming RIER layer 458A, RIER layer 458B, and RIES layer 460 on the insulator 110 and lamination 354 (for example, using conventional processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD)). Covered The RIER layer 458A differs from the RIER layer 458B in that, for example, the RIER layer 458A is composed of Al2O3, while the RIER layer 458B is composed of AlN. In some embodiments, the RIER layer 458A has a thickness between approximately 1 nm and 10 nm, the RIER layer 458B has a thickness between approximately 2 nm and 20 nm, and the RIES layer 460 has a thickness between approximately 4 nm and 40 nm.

[0042] The result of encapsulation in an alternative embodiment of Figure 4A is shown in Figure 4B, which is a cross-sectional view of the PCM cell 100. In the illustrated embodiment, the PCM cell 100 includes a shield 416A (made of Al2O3), a shield 416B (made of AlN), and a guard 418. Such a double shield arrangement by ,twist Coating material having good dielectric insulation properties (e.g., Al 2 O 3 ) while bringing it into direct contact with the laminate 354, To protect the laminate 354 and shield 416A The superior RIER material On the outside To arrange Possible Na ru.

[0043] The descriptions of various embodiments of the present invention are presented for illustrative purposes only and are not intended to be exhaustive or limit the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the embodiments described. The terminology used herein has been selected to best describe the principles, practical applications, or technical improvements to the technologies available on the market of the embodiments, or to enable other persons skilled in the art to understand the embodiments disclosed herein. (Other possible items) [Item 1] A phase-change memory (PCM) cell, 1st electrode; A heater electrically connected to the first electrode; A PCM material electrically connected to the heater; A second electrode electrically connected to the PCM material; An electrical insulator surrounding the aforementioned PCM material; and A first shield is located between the PCM material and the electrical insulator, the first shield having a first reactive ion etching resistant material. A PCM cell equipped with this feature. [Item 2] The first shield is located between the second electrode and the electrical insulator in the PCM cell described in item 1. [Item 3] Furthermore: A guard located between the first shield and the electrical insulator, the guard having a reactive ion etching-sensitive material, A PCM cell as described in item 1 or 2, comprising the features described in item 1 or 2. [Item 4] Furthermore: The top contact is electrically connected to the second electrode and is in contact with the first shield and the electrical insulator. A PCM cell comprising any one of items 1 to 3. [Item 5] Furthermore: A second shield is located between the first shield and the PCM material, the second shield having a second reactive ion etching resistant material different from the first reactive ion etching resistant material. A PCM cell comprising any one of items 1 to 4. [Item 6] The first reactive ion etching resistant material is: a PCM cell as described in any one of items 1 to 5, selected from the group consisting of aluminum nitride, aluminum oxide, and aluminum oxynitride. [Item 7] The PCM material is: essentially a PCM cell as described in any one of items 1 to 6, consisting of a material selected from the group consisting of germanium-antimony-tellurium (GST), gallium-antimony-tellurium (GaST), and silver-iridium-antimony-tellurium (AIST). [Item 8] A method for manufacturing a phase-change memory (PCM) cell, wherein the method is: Step of forming the first electrode; Steps include forming a heater on the first electrode; A step of forming a PCM material on the heater; A step of forming a second electrode on the PCM material; The step of forming a first shield around the PCM material, wherein the first shield comprises a first reactive ion etching resistant material; and Step of forming an electrical insulator surrounding the first shield. A method for providing this. [Item 9] The first shield is located between the second electrode and the electrical insulator, as described in item 8. [Item 10] The step of forming the first shield is: The steps include: encapsulating the PCM material and the top electrode using a layer of the first reactive ion etching resistant material; and The step of etching the layer of the first reactive ion etching resistant material such that the layer of the first reactive ion etching resistant material extends between the first surface of the second electrode and the second surface of the second electrode opposite to the first surface. The method described in item 8 or 9, having the characteristics of item 8 or 9. [Item 11] Furthermore: In the step of forming a guard located between the first shield and the electrical insulator, the guard comprises a reactive ion etching-sensitive material. The method according to any one of items 8 to 10, comprising: [Item 12] The reactive ion etching-sensitive material is the method according to item 11, wherein the reactive ion etching-sensitive material has silicon nitride. [Item 13] Furthermore: In the step of forming a second shield located between the first shield and the PCM material, the second shield comprises a second reactive ion etching resistant material different from the first reactive ion etching resistant material. The method according to item 11 or 12, comprising: [Item 14] The step of forming the guard is: The steps include: encapsulating the PCM material, the top electrode, and the layer of the first reactive ion etching resistant material using the layer of the reactive ion etching sensitive material; and The step of etching the layer of the reactive ion etching-sensitive material such that the layer of the reactive ion etching-sensitive material extends between the first surface of the second electrode and the second surface of the second electrode opposite to the first surface. The method described in any one of items 11 to 13, wherein the method is provided for. [Item 15] A method for manufacturing a phase-change memory (PCM) cell, wherein the method is: Step of forming the first electrode; Steps include forming a heater on the first electrode; A step of forming a PCM material on the heater; A step of forming a second electrode on the PCM material; The step of forming a first layer that encloses the PCM material and the second electrode, wherein the first layer comprises a first reactive ion etching resistant material; and The step of forming a second layer on the first layer, similarly encapsulating the PCM material and the second electrode, wherein the second layer comprises a reactive ion etching-sensitive material. A method for providing this. [Item 16] Furthermore: The step of forming a third layer that encloses the first layer, the PCM material, and the second electrode, wherein the third layer comprises a second reactive ion etching resistant material different from the first reactive ion etching resistant material. The method described in item 15, comprising: [Item 17] The third layer is located between the first and second layers, as described in item 16. [Item 18] The method according to any one of items 15 to 17, further comprising the step of forming a first electrical insulator surrounding the heater, wherein the first layer is extended along a portion of the first electrical insulator. [Item 19] The method according to item 18, further comprising the step of forming a second electrical insulator surrounding the PCM material. [Item 20] The method according to any one of items 15 to 19, further comprising the step of etching the first layer such that the first layer extends between the first surface of the second electrode and the second surface of the second electrode opposite to the first surface.

Claims

1. A phase-change memory (PCM) cell, first electrode; A heater electrically connected to the first electrode; A PCM material electrically connected to the heater; A second electrode electrically connected to the PCM material; An electrical insulator surrounding the aforementioned PCM material; and A first shield located between the PCM material and the electrical insulator, wherein the first shield comprises a first reactive ion etching resistant material, extends along the outer surfaces of the PCM material and the second electrode, and the height of the first shield is greater than or equal to the height of the PCM material and less than the height of the second electrode. A PCM cell equipped with the following features.

2. The PCM cell according to claim 1, wherein the first shield is located between the second electrode and the electrical insulator.

3. The PCM cell according to claim 1, further comprising a guard located between the first shield and the electrical insulator, wherein the guard comprises a reactive ion etching-sensitive material.

4. The PCM cell according to claim 1, further comprising a top contact electrically connected to the second electrode and in contact with the first shield and the electrical insulator.

5. The PCM cell according to claim 1, further comprising a second shield located between the first shield and the PCM material, wherein the second shield is made of a second reactive ion etching resistant material different from the first reactive ion etching resistant material.

6. A phase-change memory (PCM) cell, first electrode; A heater electrically connected to the first electrode; A PCM material electrically connected to the heater; A second electrode electrically connected to the PCM material; An electrical insulator surrounding the aforementioned PCM material; A first shield located between the PCM material and the electrical insulator, wherein the first shield comprises a first reactive ion etching resistant material; and A second shield located between the first shield and the PCM material, wherein the second shield comprises a second reactive ion etching resistant material different from the first reactive ion etching resistant material. A PCM cell equipped with this feature.

7. The PCM cell according to claim 1 or 6, wherein the first reactive ion etching resistant material is selected from the group consisting of aluminum nitride, aluminum oxide, and aluminum oxynitride.

8. The PCM cell according to claim 1 or 6, wherein the PCM material is essentially composed of a material selected from the group consisting of germanium-antimony-tellurium (GST), gallium-antimony-tellurium (GaST), and silver-iridium-antimony-tellurium (AIST).

9. A method for manufacturing a phase-change memory (PCM) cell, Step of forming the first electrode; Steps include forming a heater on the first electrode; A step of forming a PCM material on the heater; The step of forming a second electrode on the PCM material; A step of forming a first shield around the PCM material, wherein the first shield comprises a first reactive ion etching resistant material, the first shield extends along the outer surfaces of the PCM material and the second electrode, and the height of the first shield is greater than or equal to the height of the PCM material and less than the height of the second electrode; and Step of forming an electrical insulator surrounding the first shield. A method for providing this.

10. The method according to claim 9, wherein the first shield is located between the second electrode and the electrical insulator.

11. The step of forming the first shield is, The steps include covering the PCM material and the second electrode with a layer of the first reactive ion etching resistant material; and The step of etching the layer of the first reactive ion etching resistant material such that the layer of the first reactive ion etching resistant material extends from the first surface of the second electrode to the second surface of the second electrode opposite to the first surface. The method according to claim 9, having the following characteristics.

12. The method according to claim 9, further comprising the step of forming a guard located between the first shield and the electrical insulator, wherein the guard comprises a reactive ion etching-sensitive material.

13. The method according to claim 12, wherein the reactive ion etching-sensitive material includes silicon nitride.

14. The method according to claim 12, further comprising the step of forming a second shield located between the first shield and the PCM material, wherein the second shield comprises a second reactive ion etching resistant material different from the first reactive ion etching resistant material.

15. A method for manufacturing a phase-change memory (PCM) cell, Step of forming the first electrode; Steps include forming a heater on the first electrode; A step of forming a PCM material on the heater; The step of forming a second electrode on the PCM material; A step of forming a first shield around the PCM material, wherein the first shield includes a first reactive ion etching resistant material; Steps include forming an electrical insulator surrounding the first shield; Steps include: and forming a guard located between the first shield and the electrical insulator, wherein the guard comprises a reactive ion etching-sensitive material. A step of forming a second shield located between the first shield and the PCM material, wherein the second shield includes a second reactive ion etching resistant material different from the first reactive ion etching resistant material. A method for providing this.

16. The step of forming the guard is, A step of covering the PCM material, the second electrode, and the layer of the first reactive ion etching resistant material with the layer of the reactive ion etching sensitive material; and The step of etching the layer of the reactive ion etching-sensitive material such that the layer extends from the first surface of the second electrode to the second surface of the second electrode opposite to the first surface. The method according to claim 12 or 15, comprising:

17. A method for manufacturing a phase-change memory (PCM) cell, Step of forming the first electrode; Steps include forming a heater on the first electrode; A step of forming a PCM material on the heater; The step of forming a second electrode on the PCM material; A step of forming a first layer covering the PCM material and the second electrode, wherein the first layer includes a first reactive ion etching resistant material; and A step of forming a second layer on the first layer, similarly covering the PCM material and the second electrode, wherein the second layer includes a reactive ion etching-sensitive material, and A step of etching the first layer of the first reactive ion etching resistant material so that the first layer extends from the first surface of the second electrode to the second surface of the second electrode opposite to the first surface, thereby forming a first shield, wherein the first shield extends along the outer surfaces of the PCM material and the second electrode, and the height of the first shield is greater than or equal to the height of the PCM material and less than the height of the second electrode. A method for providing this.

18. The present invention further comprises the step of forming a third layer covering the first layer, the PCM material, and the second electrode, wherein the third layer includes a second reactive ion etching resistant material different from the first reactive ion etching resistant material. The method according to claim 17.

19. A method for manufacturing a phase-change memory (PCM) cell, Step of forming the first electrode; Steps include forming a heater on the first electrode; A step of forming a PCM material on the heater; The step of forming a second electrode on the PCM material; A step of forming a first layer covering the PCM material and the second electrode, wherein the first layer includes a first reactive ion etching resistant material; A step of forming a second layer on the first layer, similarly covering the PCM material and the second electrode, wherein the second layer comprises a reactive ion etching-sensitive material; and A step of forming a third layer that covers the first layer, the PCM material, and the second electrode, wherein the third layer includes a second reactive ion etching resistant material different from the first reactive ion etching resistant material. A method for providing this.

20. The method according to claim 18 or 19, wherein the third layer is located between the first and second layers.

21. The method according to claim 17 or 19, further comprising the step of forming a first electrical insulator surrounding the heater, wherein the first layer is extended along a portion of the first electrical insulator.

22. The method according to claim 21, further comprising the step of forming a second electrical insulator surrounding the PCM material.

23. The method according to claim 19, further comprising the step of etching the first layer such that the first layer extends from the first surface of the second electrode to the second surface of the second electrode opposite to the first surface.

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