Semiconductor module

Abstract

To suppress a crack of a front surface electrode in a semiconductor module.SOLUTION: A semiconductor module includes: a semiconductor substrate; a front surface electrode provided at a front surface of the semiconductor substrate; a metal block; and a solder layer connecting the front surface electrode to the metal block. In view of the semiconductor module in a lamination direction of the semiconductor substrate and the metal block, a first junction region with respect to the solder layer of the metal block is narrower than a second junction region with respect to the solder layer of the front surface electrode. In the first junction region, a plurality of grooves is provided.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The technology disclosed in this specification relates to a semiconductor module.

[0002] In the semiconductor module disclosed in Patent Document 1, a semiconductor chip, a metal block for heat dissipation, has a solder layer. The solder layer connects the semiconductor chip and the metal block.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When the semiconductor module is in use, the semiconductor module repeatedly generates heat. Since the linear expansion coefficients of the semiconductor chip and the metal block are different from each other, when the semiconductor module repeatedly generates heat, repeated thermal stress is applied to the solder layer. As a result, the solder layer flows due to plastic deformation, and high stress is applied to the surface electrode of the semiconductor chip (that is, the electrode provided on the surface of the semiconductor substrate) joined to the solder layer. As a result, cracks may occur in the surface electrode. In this specification, a technique for suppressing cracks in the surface electrode in a semiconductor module is proposed.

Means for Solving the Problems

[0005] A semiconductor module disclosed herein comprises a semiconductor substrate, electrodes provided on the surface of the semiconductor substrate, a metal block, and a solder layer connecting the electrodes to the metal block. When viewed along the stacking direction of the semiconductor substrate and the metal block, a first bonding region, which is the bonding region of the metal block to the solder layer, is narrower than a second bonding region, which is the bonding region of the electrodes to the solder layer. A plurality of grooves are provided within the first bonding region.

[0006] In this semiconductor module, multiple grooves are provided within the first bonding region of the metal block. The grooves suppress the flow of the solder layer, thereby reducing the stress applied to the surface electrodes of the semiconductor substrate. Therefore, this semiconductor module can suppress cracking of the surface electrodes. [Brief explanation of the drawing]

[0007] [Figure 1] Cross-sectional view of the semiconductor module of Example 1. [Figure 2] A top-down plan view of the semiconductor substrate and metal block. [Figure 3] Enlarged cross-sectional view of the outer edge of the upper main electrode and its surrounding area. [Figure 4] Cross-sectional view of the semiconductor module of Example 2. [Figure 5] Cross-sectional view of the semiconductor module of Example 3. [Figure 6] A plan view corresponding to Figure 2 of the semiconductor module of the first modified example. [Figure 7] A plan view corresponding to Figure 2 of the semiconductor module of the second modified example. [Modes for carrying out the invention]

[0008] In one example semiconductor module disclosed herein, the metal block may be rectangular when viewed along the stacking direction. The plurality of grooves may extend along the shorter side of the rectangle.

[0009] When a metal block is rectangular, stress is easily applied to the surface electrodes at its longitudinal ends (i.e., the ends along the longer sides of the rectangle). However, if multiple grooves extend along the shorter sides of the rectangle, the stress generated at the longitudinal ends of the metal block can be effectively suppressed. Therefore, cracks in the surface electrodes near these ends can be suppressed.

[0010] In one example semiconductor module disclosed herein, the plurality of grooves and the plurality of protrusions may be arranged alternately within the first bonding region. The height of the protrusions located in the center of the first bonding region may be lower than the height of the protrusions located on the outer periphery of the first bonding region. In this case, the coefficient of thermal expansion of the solder layer may be higher than that of the metal block.

[0011] This configuration makes it possible to suppress the flow of the solder layer toward its outer periphery.

[0012] In one example semiconductor module disclosed herein, the plurality of grooves and the plurality of protrusions may be arranged alternately within the first bonding region. The height of the protrusions located in the center of the first bonding region may be greater than the height of the protrusions located on the outer periphery of the first bonding region. In this case, the coefficient of thermal expansion of the solder layer may be lower than that of the metal block.

[0013] This configuration suppresses the flow of the solder layer toward its center. [Examples]

[0014] The semiconductor module 10 of Embodiment 1 shown in Figure 1 has a semiconductor substrate 12. The semiconductor substrate 12 is made of a semiconductor such as Si or SiC. Hereinafter, the direction parallel to the upper surface of the semiconductor substrate 12 will be called the x-direction, the direction parallel to the upper surface of the semiconductor substrate 12 and perpendicular to the x-direction will be called the y-direction, and the thickness direction of the semiconductor substrate 12 will be called the z-direction. As shown in Figures 1 and 2, two upper main electrodes 12a and a plurality of signal electrodes 12b are provided on the upper surface of the semiconductor substrate 12. The two upper main electrodes 12a are arranged with a gap between them in the x-direction. Each signal electrode 12b is positioned at a gap in the y-direction relative to the upper main electrodes 12a. As shown in Figure 1, a lower main electrode 12c is provided at the bottom of the semiconductor substrate 12. Switching elements such as MOSFETs (metal-oxide-semiconductor field effect transistors) and IGBTs (insulated gate bipolar transistors) are formed inside the semiconductor substrate 12. The upper main electrodes 12a and the lower main electrodes 12c are electrodes through which the main current of the switching elements flows. The main current flows from the lower main electrode 12c through the semiconductor substrate 12 to each upper main electrode 12a. Each signal electrode 12b is an electrode to which a signal for controlling the switching element is input or output.

[0015] As shown in Figure 1, a metal block 16 is positioned on top of the semiconductor substrate 12. Therefore, the z-direction is the stacking direction of the semiconductor substrate 12 and the metal block 16. As shown in Figure 2, the metal block 16 is rectangular when viewed along the z-direction. The metal block 16 is positioned such that the longer side of the rectangle extends along the x-direction and the shorter side of the rectangle extends along the y-direction. The metal block 16 is positioned to straddle the top of the two upper main electrodes 12a.

[0016] As shown in FIG. 1, a solder layer 14 is disposed between a metal block 16 and a semiconductor substrate 12. The metal block 16 is connected to two upper main electrodes 12a by the solder layer 14. The solder layer 14 is joined to the upper surfaces of the respective upper main electrodes 12a. That is, the upper surface of each upper main electrode 12a is a joining region for the solder layer 14. The solder layer 14 is joined to the lower surface of the metal block 16. That is, the lower surface of the metal block 16 is a joining region for the solder layer 14 of the metal block 16. When viewed along the z direction as shown in FIG. 2, the area of the lower surface of the metal block 16 (that is, the area of the region defined by the contour of the metal block 16 in FIG. 2) is smaller than the total value of the areas of the upper surfaces of the two upper main electrodes 12a. That is, when viewed along the z direction, the joining region of the metal block 16 for the solder layer 14 is narrower than the joining region of the upper main electrode 12a for the solder layer 14.

[0017] As shown in FIG. 1, a plurality of grooves 18 extending in parallel are provided on the lower surface of the metal block 16. The region of the lower surface of the metal block 16 other than the grooves 18 is a ridge 20 protruding below the bottom surface of the grooves 18. As shown in FIG. 2, each groove 18 and each ridge 20 extend along the y direction. That is, each groove 18 and each ridge 20 extend along the short side of the rectangle that is the contour of the metal block 16. The plurality of grooves 18 and the plurality of ridges 20 are alternately and repeatedly arranged along the x direction. As shown in FIG. 1, the solder layer 14 is joined to substantially the entire inner surface of each groove 18 and the surface of each ridge 20.

[0018] A lead frame 24 is disposed above the metal block 16. A solder layer 22 is disposed between the metal block 16 and the lead frame 24. The solder layer 22 connects the metal block 16 and the lead frame 24. The metal block 16 and the lead frame 24 function as wirings connected to the upper main electrode 12a and also function as heat radiating members that radiate heat from the semiconductor substrate 12.

[0019] A lead frame 28 is disposed below the semiconductor substrate 12. A solder layer 26 is disposed between the semiconductor substrate 12 and the lead frame 28. The solder layer 26 connects the lower main electrode 12c and the lead frame 28. The lead frame 28 functions as a wiring connected to the lower main electrode 12c and also functions as a heat radiating member that radiates heat from the semiconductor substrate 12.

[0020] An insulating resin 30 is disposed between the lead frame 24 and the lead frame 28. The insulating resin 30 covers the respective side surfaces of the solder layer 22, the metal block 16, the solder layer 14, the semiconductor substrate 12, and the solder layer 26.

[0021] FIG. 3 is an enlarged cross-sectional view of the outer peripheral end of the upper main electrode 12a and its periphery. As shown in FIG. 3, the upper main electrode 12a has a first electrode layer 31 and a second electrode layer 32. Also, an insulating polyimide layer 34 is provided on the upper portion of the semiconductor substrate 12. The first electrode layer 31 is made of AlSi (that is, an alloy of aluminum and silicon). The first electrode layer 31 covers the upper surface of the semiconductor substrate 12. The polyimide layer 34 covers the upper surface of the semiconductor substrate 12 around the first electrode layer 31. Also, the polyimide layer 34 covers a portion near the outer peripheral end of the upper surface of the first electrode layer 31. The second electrode layer 32 is made of nickel. The second electrode layer 32 covers the portion of the upper surface of the first electrode layer 31 that is not covered by the polyimide layer 34. The entire upper surface of the second electrode layer 32 is joined to the solder layer 14. As shown in FIG. 3, at the outer peripheral end of the upper main electrode 12a, a triple contact portion 36 where the first electrode layer 31, the second electrode layer 32, and the polyimide layer 34 contact each other is formed.

[0022] Next, we will explain the problems that arise when the metal block 16 does not have grooves 18. When the semiconductor module 10 is in use, the semiconductor substrate 12 repeatedly generates heat. Each component constituting the semiconductor module 10 expands thermally when the semiconductor substrate 12 generates heat (i.e., when power is applied) and contracts thermally when the semiconductor substrate 12 stops generating heat (i.e., when power is turned off). Since the coefficients of linear expansion of the semiconductor substrate 12 and the metal block 16 are different, repeated thermal stress is applied to the solder layer 14 when the semiconductor module 10 is in use. If grooves 18 are not provided, repeated thermal stress on the solder layer 14 causes the solder layer 14 to flow due to plastic deformation. When the solder layer 14 flows, stress is applied to the upper main electrode 12a. As a result, cracks may occur in the upper main electrode 12a. In particular, at the triple contact area 36 located at the outer peripheral edge of the upper main electrode 12a, the first electrode layer 31, the second electrode layer 32, and the polyimide layer 34, which are made of different materials, are in contact with each other, making it easy for high stress to occur. Therefore, cracks 40, as illustrated in Figure 3, are likely to occur at the outer peripheral edge of the upper main electrode 12a (especially in the first electrode layer 31). Also, as shown in Figure 2, the shape of the metal block 16 is a rectangle that is long in the x direction. Therefore, the amount of expansion of the metal block 16 is greater in the x direction than in the y direction. For this reason, higher stress is likely to occur around the x-side of the metal block 16 (i.e., around the short side of the metal block 16). For this reason, cracks are particularly likely to occur near the short side of the metal block 16 at the outer peripheral edge of the upper main electrode 12a.

[0023] In contrast, in the semiconductor module 10 of Embodiment 1, in which the metal block 16 has grooves 18, the flow of the solder layer 14 is suppressed by the grooves 18. This reduces the stress applied to the upper main electrode 12a, and suppresses the occurrence of cracks in the upper main electrode 12a. In particular, since the grooves 18 extend along the y-direction, the flow of the solder layer 14 in the x-direction can be effectively suppressed. Therefore, the stress applied to the outer peripheral edge of the upper main electrode 12a can be reduced around the x-direction end of the metal block 16 (i.e., around the short side of the metal block 16). Therefore, the occurrence of cracks at the outer peripheral edge of the upper main electrode 12a can be particularly effectively suppressed around the x-direction end of the metal block 16. [Examples]

[0024] Figure 4 shows the semiconductor module 200 of Example 2. In the semiconductor module 200 of Example 2, the coefficient of thermal expansion of the solder layer 14 is higher than that of the metal block 16. Also, in Example 2, the height of the protrusions 20 varies depending on the location. As shown in Figure 4, the height of the protrusions 20 located in the center of the lower surface of the metal block 16 (i.e., the bonding region to the solder layer 14) is lower than the height of the protrusions 20 located on the outer periphery of the bonding region. More specifically, the height of the protrusions 20 gradually increases from the center of the bonding region towards the outer edge. Except for these points, the configuration of the semiconductor module 200 of Example 2 is the same as that of the semiconductor module 10 of Example 1.

[0025] In the semiconductor module 200 of Example 2, the coefficient of thermal expansion of the solder layer 14 is higher than that of the metal block 16. Therefore, when the semiconductor substrate 12 heats up, the semiconductor substrate 12 deforms by bending downwards. When the semiconductor substrate 12 deforms in this way, the solder layer 14 tends to flow from the center to the outer periphery, as shown by the arrow 100 in Figure 4. However, in the semiconductor module 200 of Example 2, the height of the protrusions 20 is higher at the outer periphery and lower at the center, so the flow of the solder layer 14 from the center to the outer periphery can be effectively suppressed. Therefore, according to the semiconductor module 200 of Example 2, cracks in the upper main electrode 12a can be effectively suppressed.

[0026] In the above-described Example 2, the coefficient of thermal expansion of the solder layer 14 was higher than that of the metal block 16. However, even when the coefficient of thermal expansion of the solder layer 14 is lower than that of the metal block 16, the solder layer 14 may still easily flow from the center to the outer periphery. Therefore, when the coefficient of thermal expansion of the solder layer 14 is lower than that of the metal block 16, a structure may be adopted in which the height of the protrusion 20 located in the center of the joint area is lower than the height of the protrusion 20 located on the outer periphery of the joint area. [Examples]

[0027] Figure 5 shows the semiconductor module 300 of Example 3. In the semiconductor module 300 of Example 3, the coefficient of thermal expansion of the solder layer 14 is lower than that of the metal block 16. Also, in Example 3, the height of the protrusions 20 varies depending on the location. As shown in Figure 5, the height of the protrusions 20 located in the center of the lower surface of the metal block 16 (i.e., the bonding region to the solder layer 14) is higher than the height of the protrusions 20 located on the outer periphery of the bonding region. More specifically, the height of the protrusions 20 gradually decreases from the center of the bonding region towards the outer edge. Except for these points, the configuration of the semiconductor module 300 of Example 3 is the same as that of the semiconductor module 10 of Example 1.

[0028] In the semiconductor module 300 of Example 3, the coefficient of thermal expansion of the solder layer 14 is lower than that of the metal block 16. Therefore, when the semiconductor substrate 12 heats up, the semiconductor substrate 12 deforms by bending upwards. When the semiconductor substrate 12 deforms in this way, the solder layer 14 tends to flow from the outer periphery towards the center, as shown by the arrow 110 in Figure 5. However, in the semiconductor module 300 of Example 3, the height of the protrusions 20 is low at the outer periphery and high at the center, so the flow of the solder layer 14 from the outer periphery towards the center can be effectively suppressed. In addition, if the height of the protrusions 20 at the outer periphery is low, a wide gap can be provided between the protrusions 20 at the outer periphery and the outer edge of the upper main electrode 12a. Therefore, the stress applied from the protrusions 20 at the outer periphery to the outer edge of the upper main electrode 12a can be reduced. Thus, according to the semiconductor module 300 of Example 3, cracks in the upper main electrode 12a can be effectively suppressed.

[0029] In the above-described Example 3, the coefficient of thermal expansion of the solder layer 14 was lower than that of the metal block 16. However, even when the coefficient of thermal expansion of the solder layer 14 is higher than that of the metal block 16, the solder layer 14 may still easily flow from the outer periphery to the center. Therefore, when the coefficient of thermal expansion of the solder layer 14 is higher than that of the metal block 16, a structure may be adopted in which the height of the protrusion 20 located in the center of the joint area is higher than the height of the protrusion 20 located on the outer periphery of the joint area.

[0030] Furthermore, in the above-described embodiments 1 to 3, the groove 18 extended along the short side of the metal block 16. However, as shown in Figure 6, the groove 18 may extend along the long side of the metal block 16. Also, as shown in Figure 7, the groove 18 may extend concentrically. Note that the configuration in Figure 7 also has portions in which the groove 18 extends parallel to each other. In these cases as well, similar to Figures 4 and 5, the height of the protrusion 20 may differ between the central part and the outer periphery of the joining region.

[0031] Furthermore, in the above-described embodiments 1 to 3, the multiple grooves 18 extended in parallel. However, the multiple grooves 18 do not necessarily have to be parallel.

[0032] Furthermore, in the above-described embodiments 1 to 3, the width of the groove 18 was constant, but the width of the groove 18 may vary depending on the position. For example, the width may differ between the groove 18 on the outer periphery of the joining region and the groove 18 in the center. Also, in the above-described embodiments 1 to 3, the spacing between the grooves 18 (i.e., the width of the protrusions 20) was constant, but the spacing between the grooves 18 may vary depending on the position. For example, the spacing may differ between the groove 18 on the outer periphery of the joining region and the groove 18 in the center.

[0033] The lower surface of the metal block 16 is an example of a first bonding region. The upper surface of the upper main electrode 12a is an example of a second bonding region.

[0034] Although embodiments have been described in detail above, these are merely illustrative and do not limit the scope of the claims. The technologies described in the claims include various modifications and changes to the specific examples illustrated above. The technical elements described in this specification or drawings exhibit technical usefulness individually or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technologies illustrated in this specification or drawings achieve multiple objectives simultaneously, and achieving even one of these objectives constitutes technical usefulness. [Explanation of Symbols]

[0035] 10: Semiconductor module, 12: Semiconductor substrate, 12a: Upper main electrode, 14: Solder layer, 16: Metal block, 18: Groove, 20: Protrusion

Claims

1. It is a semiconductor module, A semiconductor substrate (12) and A surface electrode (12a) provided on the surface of the semiconductor substrate, Metal block (16) and The solder layer (14) connecting the surface electrode to the metal block, It has, When viewed along the stacking direction of the semiconductor substrate and the metal block, the first bonding region, which is the bonding region of the metal block to the solder layer, is narrower than the second bonding region, which is the bonding region of the surface electrode to the solder layer. Multiple grooves (18) are provided within the first joining region. Within the first joining region, the plurality of grooves and the plurality of protrusions (20) are arranged alternately. The height of the protrusion located in the center of the first joining region is lower than the height of the protrusion located on the outer periphery of the first joining region. Semiconductor module.

2. When viewed along the aforementioned stacking direction, the metal block is rectangular, The aforementioned multiple grooves extend along the shorter side of the rectangle. The semiconductor module according to claim 1.

3. The semiconductor module according to claim 1 or 2, wherein the coefficient of thermal expansion of the solder layer is higher than the coefficient of thermal expansion of the metal block.

4. A semiconductor module, A semiconductor substrate (12) and A surface electrode (12a) provided on the surface of the semiconductor substrate, Metal block (16) and The solder layer (14) connecting the surface electrode to the metal block, It has, When viewed along the stacking direction of the semiconductor substrate and the metal block, the first bonding region, which is the bonding region of the metal block to the solder layer, is narrower than the second bonding region, which is the bonding region of the surface electrode to the solder layer. Multiple grooves (18) are provided within the first joining region. Within the first joining region, the plurality of grooves and the plurality of protrusions (20) are arranged alternately. The height of the protrusion located in the center of the first joining region is greater than the height of the protrusion located on the outer periphery of the first joining region. Semiconductor module.

5. When viewed along the stacking direction, the metal block is rectangular, The aforementioned multiple grooves extend along the shorter side of the rectangle. The semiconductor module according to claim 4.

6. The semiconductor module according to claim 4 or 5, wherein the coefficient of thermal expansion of the solder layer is lower than the coefficient of thermal expansion of the metal block.

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