Semiconductor equipment
The semiconductor device optimizes IGBT and MOSFET connections through conductive plates to adjust conductive material without changing chip size, enhancing current flow and reducing power consumption.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- DAIKIN INDUSTRIES LTD
- Filing Date
- 2024-09-27
- Publication Date
- 2026-04-30
AI Technical Summary
Existing semiconductor devices require changing the chip size of IGBT and MOSFET to adjust the number and thickness of conductive materials connected between their electrodes, limiting flexibility and efficiency.
A semiconductor device configuration with IGBT and MOSFET electrodes connected via conductive plates and materials, allowing adjustment of the number and thickness without changing chip size, optimizing current flow and reducing power consumption.
Enhances current ratio and reduces total power consumption in high-load regions by adjusting conductive material connections without altering chip size, improving efficiency and heat dissipation.
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Abstract
Description
[Technical Field]
[0001] This disclosure relates to semiconductor devices. [Background technology]
[0002] Patent Document 1 discloses a semiconductor device in which the electrodes of an IGBT and a conductive plate, which is a control element, are connected by bonding wires, and the electrodes of a MOSFET and the conductive plate are also connected by bonding wires. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] International Publication No. 2023 / 223813 [Overview of the project] [Problems that the invention aims to solve]
[0004] By the way, in the above-mentioned Patent Document 1, wires are directly connected to the electrodes of the IGBT and MOSFET. Therefore, in order to adjust the number and thickness of conductive materials such as wires that can be connected between the electrodes of the IGBT and MOSFET and the conductive plate, it is necessary to change the chip size of the IGBT and MOSFET.
[0005] The purpose of this disclosure is to enable adjustment of the number and thickness of conductive materials that can be connected between the electrodes of IGBTs and MOSFETs and the conductive plate, without changing the chip size of the IGBTs and MOSFETs. [Means for solving the problem]
[0006] A first aspect of the technology disclosed herein is an IGBT (10) having a pair of electrode-forming surfaces (11, 12) facing opposite directions, with electrodes (11a, 12a) formed on each of the pair of electrode-forming surfaces (11, 12), and a MOSFET (20) having a pair of electrode-forming surfaces (21, 22) facing opposite directions, with electrodes (21a, 22a) formed on each of the pair of electrode-forming surfaces (21, 22), and an electrode on one of the electrode-forming surfaces (11) of the IGBT (10) The semiconductor device comprises 11a), a first conductive plate (31) that abuts against the electrode (21a) of one electrode forming surface (21) of the MOSFET (20), an electrode (12a) of the other electrode forming surface (12) of the IGBT (10), a second conductive plate (32) that abuts against the electrode (22a) of the other electrode forming surface (22) of the MOSFET (20), a third conductive plate (33), and a conductive material (34) connecting the second conductive plate (32) and the third conductive plate (33).
[0007] In the first embodiment, the number and thickness of conductive material (34) that can be connected between the electrodes (12a, 22a) of the IGBT (10) and MOSFET (20) and the third conductive plate (33) can be adjusted by changing the size of the second and third conductive plates (32, 33) without changing the chip size of the IGBT (10) and MOSFET (20).
[0008] A second aspect of the technology disclosed herein is a first aspect in which the chip temperature of the IGBT(10) and the MOSFET(20) is set to 25°C, the rated current is passed through the IGBT(10) and the MOSFET(20), and the distance between the center (C2) of the connection region (R1) of the IGBT(10) and the electrode (12a) of the IGBT(10) on the second conductive plate (32) and the center (C1) of the connection region (C1) of the conductive material (34) on the second conductive plate (32) is D1, the distance between the center (C3) of the connection region (R2) of the connection region (R2) of the MOSFET(20) and the electrode (22a) of the MOSFET(20) on the second conductive plate (32) and the center (C1) of the connection region (C1) of the conductive material (34) on the second conductive plate (32) is D2, and the maximum value of the collector-emitter saturation voltage of the IGBT(10) under the specified conditions is VCE(max) The standard value of the drain-source on-voltage of the MOSFET(20) under the specified conditions is multiplied by the rated current to obtain the standard value of the drain-source on-voltage. DS(typ) When this is the case, the following equation is satisfied.
[0009] D1 / D2 < V CE(max) / V DS(typ) In the second embodiment, compared to the case where the above equation is not satisfied, the ratio of current flowing through IGBT(10) can be increased in the high-load region where the collector-emitter resistance of IGBT(10) is smaller than the source-drain resistance of MOSFET(20), thereby reducing the total power consumption in IGBT(10) and MOSFET(20).
[0010] A third aspect of the technology disclosed herein is, in the second aspect, the standard value of the collector-emitter saturation voltage of the IGBT(10) under the specified conditions is V CE(typ) When this is the case, the following equation is satisfied.
[0011] D1 / D2 < V CE(typ) / V DS(typ) In the third embodiment, compared to the case where the above equation is not satisfied, the ratio of current flowing through IGBT(10) can be increased in the high-load region, and the total power consumption in IGBT(10) and MOSFET(20) can be reduced.
[0012] A fourth aspect of the technology disclosed herein satisfies the following equation in any one of the first to third aspects, where D1 is the distance between the center (C2) of the connection region (R1) between the second conductive plate (32) and the electrode (12a) of the IGBT (10) and the second conductive plate (32) and the center (C1) of the connection region (R2) between the second conductive plate (32) and the conductive material (34), and D2 is the distance between the center (C3) of the connection region (R2) between the second conductive plate (32) and the electrode (22a) of the MOSFET (20) and the second conductive plate (32) and the center (C1) of the connection region (C1) of the conductive material (34).
[0013] D1 / D2 < 1 In the fourth aspect, compared with the case where the above formula is not satisfied, the ratio of the current flowing through the IGBT (10) in the high load region can be increased, and the total power consumption in the IGBT (10) and the MOSFET (20) can be reduced.
[0014] In a fifth aspect of the technology disclosed herein, in any one of the first to fourth aspects, the conductive material (34) is a wire, a ribbon bonding, a plated wire, or a lead frame.
Brief Description of the Drawings
[0015] [Figure 1] FIG. 1 is a plan view of a semiconductor device according to Embodiment 1. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1. [Figure 3] FIG. 3 is a circuit diagram showing the connection relationship between the IGBT and the MOSFET. [Figure 4] FIG. 4 is a graph showing the current-voltage characteristics of the IGBT and the MOSFET. [Figure 5] FIG. 5 is a diagram corresponding to FIG. 2 of Embodiment 2.
Modes for Carrying Out the Invention
[0016] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the present disclosure is not limited to the embodiments shown below, and various modifications are possible without departing from the technical idea of the present disclosure. Each drawing is for conceptually explaining the present disclosure, and thus may exaggerate or simplify dimensions, ratios, or numbers as necessary for easy understanding.
[0017] (Embodiment 1) Figures 1 and 2 show a semiconductor device (1) according to Embodiment 1 of the present disclosure. The semiconductor device (1) comprises an IGBT (insulated-gate bipolar transistor) (10), a MOSFET (metal-oxide-semiconductor field-effect transistor) (20), a first conductive plate (31), a second conductive plate (32), a third conductive plate (33), a conductive material (34), and a substrate (40).
[0018] The IGBT (10) has first and second IGBT electrode forming surfaces (11, 12) facing in opposite directions. A first IGBT electrode (11a) is formed on the first IGBT electrode forming surface (11). The first IGBT electrode (11a) is the collector electrode. A second IGBT electrode (12a) is formed on the second IGBT electrode forming surface (12). The second IGBT electrode (12a) is the emitter electrode.
[0019] The MOSFET (20) has first and second MOSFET electrode formation surfaces (21, 22) facing in opposite directions. A first MOSFET electrode (21a) is formed on the first MOSFET electrode formation surface (21). The first MOSFET electrode (21a) is the drain electrode. A second MOSFET electrode (22a) is formed on the second MOSFET electrode formation surface (22). The second MOSFET electrode (22a) is the source electrode.
[0020] The first to third conductive plates (31 to 33) are made of a conductive material. The first and third conductive plates (31, 33) are provided on the mounting surface of the substrate (40) with a gap between them. The first and third conductive plates (31, 33) are made, for example, by attaching a copper plate to a resin substrate and partially removing the copper plate. The substrate (40) is made of an insulating material such as ceramics or aluminum nitride.
[0021] The surface of the first conductive plate (31) that is not on the substrate (40) is in contact with the first IGBT electrode (11a) of the first IGBT electrode forming surface (11) of the IGBT (10) and the first MOSFET electrode (21a) of the first MOSFET electrode forming surface (21) of the MOSFET (20).
[0022] One surface of the second conductive plate (32) is in contact with the second IGBT electrode (12a) on the second IGBT electrode forming surface (12) of the IGBT (10) and the second MOSFET electrode (22a) on the second MOSFET electrode forming surface (22) of the MOSFET (20). The second conductive plate (32) is a lead frame. The second conductive plate (32) can be made of, for example, copper, aluminum, or gold.
[0023] The second conductive plate (32) and the third conductive plate (33) are connected by a conductive material (34). The conductive material (34) is a wire. The conductive material (34) is made of aluminum. The conductive material (34) is connected to the other side of the second conductive plate (32) (the side opposite to the IGBT (10) and MOSFET (20)) and to the side of the third conductive plate (33) that is not on the substrate (40) by wire bonding. The conductive material (34) is connected to the second and third conductive plates (32, 33) by ultrasonic welding. The conductive material (34) connecting the second conductive plate (32) and the third conductive plate (33) may be made of ribbon bonding, plated wire, or lead frame.
[0024] With the configuration described above, the IGBT(10) and MOSFET(20) are connected in parallel, as shown in Figure 3.
[0025] The IGBT(10) and MOSFET(20) have current-voltage characteristics as shown in Figure 4. In the high-load region, the collector-emitter resistance of the IGBT(10) is smaller than the source-drain resistance of the MOSFET(20). Therefore, it is preferable to set the connection position of the conductive material (34) to the second conductive plate (32) so that more current flows through the IGBT(10) than through the MOSFET(20).
[0026] Specifically, here, the chip temperatures of the IGBT (10) and the MOSFET (20) are set to 25°C, and the condition of flowing the rated current through the IGBT (10) and the MOSFET (20) is defined as the specified condition. The rated current is, for example, the current value described in the type name of a semiconductor device such as a power module. Also, the distance between the center (C2) of the connection region (R1) between the second IGBT electrode (12a) of the IGBT (10) and the second conductive plate (32) and the center (C1) of the connection region between the conductive material (34) and the second conductive plate (32) is D1, and the distance between the center (C3) of the connection region (R2) between the second MOSFET electrode (22a) of the MOSFET (20) and the second conductive plate (32) and the center (C1) of the connection region between the conductive material (34) and the second conductive plate (32) is D2. Further, the maximum value of the collector-emitter saturation voltage of the IGBT (10) under the specified condition is V CE(max) and the standard value of the drain-source voltage obtained by multiplying the standard value (typical value) of the drain-source on-voltage of the MOSFET (20) under the specified condition by the rated current is V DS(typ) is defined as such.
[0027] The connection position of the conductive material (34) with the second conductive plate (32) is preferably set to satisfy the following formula (1). Thereby, compared with the case where formula (1) is not satisfied, in a high-load region where the resistance value between the collector and emitter of the IGBT (10) is smaller than the resistance value between the source and drain of the MOSFET (20), the ratio of the current flowing through the IGBT (10) can be increased, and the total power consumption in the IGBT (10) and the MOSFET (20) can be reduced.
[0028] D1 / D2 < V CE(max) / V DS(typ) ···(1) Also, the connection position of the conductive material (34) with the second conductive plate (32) is preferably set to further satisfy the following formula (2). Thereby, compared with the case where formula (2) is not satisfied, in the above high-load region, the ratio of the current flowing through the IGBT (10) can be increased, and the total power consumption in the IGBT (10) and the MOSFET (20) can be reduced.
[0029] Here, V is the standard value of the collector-emitter saturation voltage of IGBT(10) under the specified conditions. CE(typ) Let's assume that.
[0030] D1 / D2 < V CE(typ) / V DS(typ) ...(2) The above V CE(max) , V CE(typ) and V DS(typ) This information is taken from the datasheets for IGBT(10) and MOSFET(20).
[0031] Furthermore, by setting the connection position of the conductive material (34) with the second conductive plate (32) to satisfy equation (3) below, the ratio of current flowing to the IGBT (10) in the high-load region can be increased compared to the case where equation (3) is not satisfied, thereby reducing the total power consumption in the IGBT (10) and MOSFET (20).
[0032] D1 / D2 < 1···(3) Therefore, according to this embodiment 1, even without changing the chip size of the IGBT(10) and MOSFET(20), the number and thickness of conductive material (34) that can be connected between the second IGBT electrode (12a) of the IGBT(10) and the second MOSFET electrode (22a) of the MOSFET(20) and the third conductive plate (33) can be adjusted by changing the size of the second and third conductive plates (32, 33).
[0033] Furthermore, since the second conductive plate (32) is a lead frame, it can carry a larger current than a wire. Also, because it has a large heat dissipation area, heat can be dissipated efficiently.
[0034] Furthermore, the inductance between the second IGBT electrode (12a) and the conductive material (34), and between the second MOSFET electrode (22a) and the conductive material (34), can be adjusted simply by changing the connection position of the conductive material (34) on the second conductive plate (32). For example, in the above-mentioned Patent Document 1, wires can only be placed in limited locations, so a change in layout is necessary to adjust the inductance. In this embodiment 1, the inductance can be adjusted simply by changing the connection position of the conductive material (34) without changing the layout.
[0035] Furthermore, since the IGBT(10) and MOSFET(20) are directly connected to the second conductive plate(32), the inductance between the IGBT(10) and MOSFET(20) and the second conductive plate(32) can be reduced compared to when they are connected via wires.
[0036] (Embodiment 2) Figure 5 is a diagram corresponding to Figure 2 of Embodiment 2. In Embodiment 2, the third conductive plate (33) is separated from the substrate (40). The IGBT (10), MOSFET (20), first conductive plate (31), second conductive plate (32), third conductive plate (33), and conductive material (34) are sealed with resin (50) so as to be isolated from the outside.
[0037] Since the other components are the same as in Embodiment 1, the same reference numerals are used for the same components, and their detailed descriptions are omitted.
[0038] While embodiments and modifications have been described above, it will be understood that a variety of changes in form and details are possible without departing from the spirit and scope of the claims. Furthermore, the embodiments, modifications, and other embodiments described above may be combined or substituted as appropriate, as long as they do not impair the functions covered by this disclosure. [Industrial applicability]
[0039] As described above, this disclosure is useful for semiconductor devices. [Explanation of Symbols]
[0040] 10 IGBT 11 First IGBT electrode formation surface 11a First IGBT electrode 12 Second IGBT electrode formation surface 12a Second IGBT electrode 20 MOSFET 21 First MOSFET electrode formation surface 21a First MOSFET electrode 22 Second MOSFET electrode formation surface 22a Second MOSFET electrode 31 First conductive plate 32 Second conductive plate 33 Third conductive plate 34 Conductive materials R1, R2 connection area C1,C2,C3 center
Claims
1. An IGBT (10) having a pair of electrode-forming surfaces (11, 12) facing in opposite directions, wherein electrodes (11a, 12a) are formed on the pair of electrode-forming surfaces (11, 12), A MOSFET (20) having a pair of electrode-forming surfaces (21, 22) facing opposite directions, with electrodes (21a, 22a) formed on each of the pair of electrode-forming surfaces (21, 22), The electrode (11a) of one electrode forming surface (11) of the IGBT (10) and the electrode (21a) of one electrode forming surface (21) of the MOSFET (20) are in contact with a first conductive plate (31), A second conductive plate (32) that contacts the electrode (12a) of the other electrode forming surface (12) of the IGBT (10) and the electrode (22a) of the other electrode forming surface (22) of the MOSFET (20), A third conductive plate (33) and The device comprises a conductive material (34) connecting the second conductive plate (32) and the third conductive plate (33), The specified conditions are that the chip temperature of the IGBT (10) and the MOSFET (20) is set to 25°C, and that the rated current is supplied to the IGBT (10) and the MOSFET (20), and D1 is the distance between the center (C2) of the connection region (R1) between the second conductive plate (32) and the electrode (12a) of the IGBT (10), and the center (C1) of the connection region between the second conductive plate (32) and the conductive material (34). D2 is the distance between the center (C3) of the connection region (R2) between the second conductive plate (32) and the electrode (22a) of the MOSFET (20), and the center (C1) of the connection region (C1) between the second conductive plate (32) and the conductive material (34). The maximum value of the collector-emitter saturation voltage of the IGBT (10) under the specified conditions is V CE(max) , V is the standard value of the drain-source on-voltage of the MOSFET (20) under the specified conditions, multiplied by the rated current. DS(typ) , A semiconductor device that satisfies the following equation. D1 / D2 < V CE(max) / V DS(typ)
2. In the semiconductor device described in claim 1, The standard value of the collector-emitter saturation voltage of the IGBT (10) under the specified conditions is V CE(typ) A semiconductor device that satisfies the following equation. D1 / D2 < V CE(typ) / V DS(typ)
3. An IGBT (10) having a pair of electrode-forming surfaces (11, 12) facing in opposite directions, wherein electrodes (11a, 12a) are formed on the pair of electrode-forming surfaces (11, 12), A MOSFET (20) having a pair of electrode-forming surfaces (21, 22) facing opposite directions, with electrodes (21a, 22a) formed on each of the pair of electrode-forming surfaces (21, 22), The electrode (11a) of one electrode forming surface (11) of the IGBT (10) and the electrode (21a) of one electrode forming surface (21) of the MOSFET (20) are in contact with a first conductive plate (31), A second conductive plate (32) that contacts the electrode (12a) of the other electrode forming surface (12) of the IGBT (10) and the electrode (22a) of the other electrode forming surface (22) of the MOSFET (20), A third conductive plate (33) and The device comprises a conductive material (34) connecting the second conductive plate (32) and the third conductive plate (33), D1 is the distance between the center (C2) of the connection region (R1) between the second conductive plate (32) and the electrode (12a) of the IGBT (10), and the center (C1) of the connection region between the second conductive plate (32) and the conductive material (34). D2 is the distance between the center (C3) of the connection region (R2) between the second conductive plate (32) and the electrode (22a) of the MOSFET (20), and the center (C1) of the connection region (C1) between the second conductive plate (32) and the conductive material (34). A semiconductor device that satisfies the following equation. D1 / D2 < 1
4. In the semiconductor device according to any one of claims 1 to 3, The conductive material (34) is a semiconductor device, which is a wire, ribbon bond, plated wire, or lead frame.
Citation Information
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