Solid-state image sensor and imaging device

Abstract

[Problem] The present disclosure provides a solid-state imaging element and an imaging device wherein arithmetic processing can be performed while preventing an increase in size of the solid-state imaging element. [Solution] In order to solve the above-mentioned problem, the present disclosure provides a solid-state imaging element comprising: a plurality of pixel areas each of which is composed of a plurality of pixels; and a plurality of first power storage units associated with respective ones of the pixel areas. A plurality of first pixels in the pixel area each include a photoelectric conversion unit, and a first element for bringing about a state of conduction or no-conduction with the photoelectric conversion unit of at least one of vertically and horizontally adjacent pixels. A second pixel in the pixel area includes a photoelectric conversion unit, a first element for bringing about a state of conduction or no-conduction with the photoelectric conversion unit of at least one of vertically and horizontally adjacent pixels, and a first power storage element for bringing about a state of conduction or no-conduction with the first power storage unit.

Description

Technical Field

[0001] The present disclosure relates to a solid-state imaging device and an imaging apparatus.

Background Art

[0002] Generally, processing of image data captured by a solid-state imaging device is performed by an external device of the solid-state imaging device. When basic operations of image processing such as convolution operations are performed by the solid-state imaging device of the imaging apparatus, the cooperation with external devices becomes faster and the convenience for the user is improved.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] On the other hand, if arithmetic processing such as convolution operations is to be performed by the solid-state imaging device of the imaging apparatus, there is a risk that the solid-state imaging device will become large.

[0005] Therefore, the present disclosure provides a solid-state imaging device and an imaging apparatus capable of arithmetic processing while suppressing the enlargement of the solid-state imaging device.

Means for Solving the Problems

[0006] In order to solve the above problems, according to the present disclosure, a plurality of pixel regions composed of a plurality of pixels, and a plurality of first charge storage parts corresponding to each of the pixel regions, are provided, the plurality of first pixels in the pixel region, have a photoelectric conversion part, and [[ID=5�]] The second pixel within the pixel region is a photoelectric conversion section, a first element that makes the photoelectric conversion section of a pixel adjacent to at least one of the vertical and horizontal directions conductive or non-conductive, a first charge storage element that makes the first charge storage section conductive or non-conductive, and a solid-state imaging device is provided.

[0007] The photoelectric conversion of the photoelectric conversion section may be started by setting the first element and the first charge storage element within the pixel region to a first non-conductive state.

[0008] After the end of the photoelectric conversion period of the photoelectric conversion section, the first element that makes the photoelectric conversion section of another pixel within the pixel region conductive or non-conductive may be set to a first conductive state.

[0009] After setting to the first conductive state, the first charge storage element may be set to a second conductive state.

[0010] After setting to the first conductive state, the first element that makes the photoelectric conversion section of another pixel within the pixel region conductive or non-conductive may be further set to a second non-conductive state, and the first charge storage element may be set to a third conductive state.

[0011] The charge accumulated by the photoelectric conversion for each pixel region may be transferred to the corresponding first charge storage section via each of the first elements.

[0012] The pixel has a potential adjustment element connected between the photoelectric conversion section and the first element, and the charge may be transferred by the potential adjustment element and the first element.

[0013] The photoelectric conversion period of the photoelectric conversion section may be controlled according to the weight value of the arithmetic processing.

[0014] The pixel further has a second element that discharges the charge accumulated in the photoelectric conversion section, and the non-discharge period of the charge accumulated by the second element may be controlled according to the weight value.

[0015] The aforementioned pixel region may be modified relative to the corresponding first energy storage unit.

[0016] The range of the pixel region for the first energy storage unit may be changed depending on the calculation range of the calculation process.

[0017] The aforementioned plurality of pixels are arranged in a matrix, The first element may either make the connection between adjacent photoelectric conversion units in the first direction conductive or non-conductive, or make the connection between adjacent photoelectric conversion units in a second direction different from the first direction conductive or non-conductive.

[0018] The first element may be a transfer transistor, one end of which is connected to the photoelectric conversion unit, and which is switched between a conductive and non-conductive state by a positive voltage control signal.

[0019] The photoelectric conversion unit and the first element may be formed in different layers.

[0020] The first energy storage unit may be a floating diffusion unit.

[0021] A third element electrically connected to a predetermined first element within the pixel region, A fourth element electrically connected to the first energy storage unit, A fifth element electrically connected to the third element, The system may further include a sixth element for resetting the charge stored in the first energy storage unit.

[0022] A second storage unit that stores the accumulated charge from photoelectric conversion for each pixel region, A seventh element electrically connects the first energy storage unit and the second energy storage unit, It may also be provided with the following:

[0023] An analog-to-digital conversion unit is electrically connected to the fifth element and converts the accumulated charge by photoelectric conversion for each pixel region into digital data, Further preparations may be necessary.

[0024] Each of the pixels constituting the aforementioned pixel region receives light through one of a plurality of color filters. Before transferring the stored charge corresponding to a predetermined color filter among the plurality of color filters to the first energy storage unit, stored charges corresponding to other color filters among the plurality of color filters may be discharged.

[0025] The photoelectric conversion unit may be composed of at least one of silicon, indium gallium arsenide, and germanium organic material.

[0026] The first to sixth elements may be composed of at least one of silicon, oxide semiconductors, and organic semiconductors.

[0027] The system may further include an accumulation control circuit that controls, in accordance with the calculation process, the resetting of the accumulated charge of each of the photoelectric conversion units, the generation of accumulated charge according to the weight value, and at least one of the pixel region and potential shape.

[0028] To solve the above problems, according to this disclosure, Solid-state image sensor, It comprises an arithmetic processing unit capable of performing convolution operations, An imaging device is provided, in which the weight values ​​and the information of the pixel region corresponding to the calculation range are supplied from the calculation processing unit.

[0029] In the aforementioned processing unit, The photoelectric conversion period of the photoelectric conversion unit is controlled according to the positive weight value of the calculation process, and the first digital data generated by the analog-to-digital conversion unit after being transferred to the first energy storage unit is used with respect to the first digital data generated by the analog-to-digital conversion unit. Depending on the absolute value of the negative weight value of the calculation process, the photoelectric conversion period of the photoelectric conversion unit may be controlled, and the difference between this and the second digital data generated by the analog-to-digital conversion unit after being transferred to the first energy storage unit may be calculated. [Brief explanation of the drawing]

[0030] [Figure 1] A block diagram showing one example configuration of the imaging device in an embodiment of this technology. [Figure 2] A diagram showing an example of a stacked structure for a solid-state image sensor. [Figure 3] A block diagram showing an example configuration of a solid-state image sensor. [Figure 4] A schematic diagram showing pixels arranged in a matrix in the pixel array. [Figure 5] A diagram showing one example configuration of the reading unit. [Figure 6] A diagram showing an example of the pixel array configuration. [Figure 7] A diagram showing the structure of pixels. [Figure 8] A circuit diagram showing an example of a pixel circuit configuration. [Figure 9] Figure 6 is a plan view of the light-receiving chip in the pixel array section, seen from the back. [Figure 10] Plan view of the pixel circuit in the detection chip. [Figure 11] A schematic diagram showing a cross-section of the main part of the pixel array. [Figure 12A] A schematic diagram showing the state when charge accumulation in the photoelectric conversion section is complete. [Figure 12B] A schematic diagram showing the state when the switching elements are connected. [Figure 12C] A schematic diagram showing the state before charge transfer to floating diffusion. [Figure 13] A diagram showing the addition range for each timing and the corresponding floating diffusion. [Figure 14] A diagram showing the addition range for each timing. [Figure 15] Figure 14 shows the addition range for each different timing. [Figure 16] (1) A diagram showing an example of 3 × 3 weight values ​​in equation (1). [Figure 17] A timing chart showing an example of processing within the addition range at timing t1 in Figure 13. [Figure 18] A timing chart showing an example of processing for addition range 1 at timing t5 in Figure 14. [Figure 19] A circuit diagram showing an example of the configuration of a pixel circuit according to a modified version of the first embodiment. [Figure 20] A diagram showing an example of the configuration of the pixel array section according to the second embodiment. [Figure 21] A timing chart showing an example of addition processing in the pixel array section of Figure 20. [Figure 22] A plan view of the detection chip in the pixel array section shown in Figure 20. [Figure 23] A schematic diagram illustrating an example of transferring the accumulated charge from each pixel to floating diffusion. [Figure 24] A diagram showing an example configuration of the pixel array section according to the third embodiment. [Figure 25] A diagram showing an example of the pixel configuration according to the third embodiment. [Figure 26A] A diagram showing the state of charge accumulation. [Figure 26B] A schematic diagram showing the case when the switching element is in a conductive state. [Figure 26C] A schematic diagram showing the case when the switching element is in a non-conductive state. [Figure 27] A timing chart showing an example of processing within the addition range at timing t1 in Figure 13. [Figure 28] A timing chart showing an example of processing the addition range at timing t5 in Figure 14. [Figure 29A] A schematic diagram illustrating the charge transfer operation of the adjacent photoelectric conversion section. [Figure 29B] A schematic diagram showing the case when the switching element is in a conductive state. [Figure 29C] A schematic diagram showing the case when the switching element is in a non-conductive state. [Figure 30A] A schematic diagram illustrating the charge transfer operation of the adjacent photoelectric conversion section. [Figure 30B] A schematic diagram showing the case when the switching element is in a conductive state. [Figure 30C]A schematic diagram showing the case when the switching element is in a non-conductive state. [Figure 30D] A schematic diagram showing the case when the switching element is in a non-conductive state. [Figure 31] A diagram showing an example configuration of the pixel array section according to the fourth embodiment. [Figure 32] A timing chart showing an example of addition processing in the pixel array section of Figure 31. [Figure 33] A schematic diagram showing an example of processing the weight values ​​of equation (1) according to the fourth embodiment. [Modes for carrying out the invention]

[0031] The embodiments of the solid-state image sensor and imaging device will be described below with reference to the drawings. While the main components of the image sensor and imaging device will be described below, the solid-state image sensor and imaging device may contain components and functions not shown or described. The following description does not exclude any components or functions not shown or described.

[0032] (First Embodiment) Figure 1 is a block diagram showing an example configuration of an imaging device 100 in an embodiment of this technology. This imaging device 100 comprises an imaging lens 110, a solid-state image sensor 200, a recording unit 120, a control unit 130, an analysis unit 140, a communication unit 150, and a speaker unit 160. The imaging device 100 is, for example, a smartphone, a mobile phone, or a PC (Personal Computer).

[0033] The imaging lens 110 collects incident light and guides it to the solid-state image sensor 200. The solid-state image sensor 200 has multiple tonal pixels. Each tonal pixel outputs a brightness signal corresponding to the amount of light received. The solid-state image sensor 200 can, for example, weight the brightness signals of multiple tonal pixels and add them together. In the following, tonal pixels may be referred to simply as pixels.

[0034] The solid-state image sensor 200 can perform predetermined signal processing, such as weighted addition, at the analog signal stage, and outputs the processed data to the recording unit 120 via the signal line 209.

[0035] The recording unit 120 records data from the solid-state image sensor 200. The control unit 130 controls the entire imaging device 100. For example, the control unit 130 controls the solid-state image sensor 200 to capture image data.

[0036] The analysis unit 140 has an arithmetic processing unit 142. The arithmetic processing unit 142 is capable of performing arithmetic operations such as convolution. The analysis unit 140 uses the calculation results of the arithmetic processing unit 142 to perform predetermined analysis processing, image processing, etc. For example, arithmetic operations such as convolution performed by the arithmetic processing unit 142 are performed by the solid-state image sensor 200 at the analog signal stage, and subsequent arithmetic processing is performed by the arithmetic processing unit 142.

[0037] The communication unit 150 communicates wirelessly with an external device. This allows it to receive content from an external server and record it in the recording unit 120 via the control unit 130. The control unit 130 then displays, for example, an image based on this content on the display unit 170.

[0038] The speaker unit 160 is equipped with a highly directional speaker and is capable of transmitting voice information only to the user. The direction in which the voice is transmitted can be changed in this speaker unit 160.

[0039] Figure 2 shows an example of a stacked structure of a solid-state image sensor 200 in an embodiment of this technology. This solid-state image sensor 200 comprises a detection chip 202 and a light-receiving chip 201 stacked on the detection chip 202. These substrates are electrically connected via connection points such as vias. In addition to vias, connections can also be made by Cu-Cu junctions or bumps.

[0040] Figure 3 is a block diagram showing an example configuration of a solid-state image sensor 200. As shown in Figure 3, the solid-state image sensor 200 according to this disclosure includes a pixel array unit 30, a storage control circuit 210, a first access control circuit 211a, a second access control circuit 211b, a third access control circuit 211c, a readout unit 212, a signal processing unit 213, a second signal processing unit 214, a timing control circuit 214, and an output interface 215.

[0041] Here, the configuration of the pixel array section 30 will be explained based on Figure 4. Figure 4 is a schematic diagram showing pixels Pix arranged in a matrix in the pixel array section 30. As shown in Figure 4, multiple pixels Pix are arranged in a matrix (array) in a two-dimensional array in the pixel array section 30. In addition, one floating diffusion FD is arranged for each processing area Afd corresponding to a predetermined number of pixels Pix. Details of the pixels Pix, processing area Afd, and floating diffusion FD will be described later. The pixels Pix are configured in the layers of the light receiving chip 201. On the other hand, elements such as switching elements TR1~T3, switching elements TRG, RST, switching element RST, AMP, SEL, FG, etc., which will be described later, are configured in the detection chip 202.

[0042] The pixel array unit 30 is, for example, a CMOS image sensor. For example, the processing area Afd corresponds to the summation range of the floating diffusion FD, which will be described later in Figures 12 to 14. This example configuration of the pixel array unit 30 is, for example, suitable for a 3x3 weighted filter, but is not limited to this.

[0043] As shown again in Figure 3, the storage control circuit 210 controls the photoelectric conversion section of the pixel Pix. Specifically, the storage control circuit 210 can control the resetting of the stored charge of each of the multiple photoelectric conversion sections, the generation of stored charge according to the weight value, and the potential shape of the photoelectric conversion section. Details of the photoelectric conversion section will be described later.

[0044] The first access control circuit 211a is capable of controlling the sequential movement of the accumulated charge stored in each of the multiple pixels Pix, row by row. The second access control circuit 211b is capable of controlling the sequential movement of the accumulated charge stored in each of the multiple pixels Pix, column by column.

[0045] The third access control circuit 211c controls the resetting of the accumulated charge of the floating diffusion FD, the accumulation of the floating diffusion FD, and the amplification of the luminance signal according to the accumulated charge of the floating diffusion FD. Details of control examples for the first access control circuit 211a, the second access control circuit 211b, and the third access control circuit 211c will be described later.

[0046] An example configuration of the reading unit 212 will be explained based on Figure 5. Figure 5 is a diagram showing one example configuration of the reading unit 212. The reading unit 212 has a plurality of constant current sources 220 and a plurality of analog-to-digital (ADC230) converters. The plurality of constant current sources 220 and the plurality of ADC230 converters are provided to correspond to a plurality of signal lines VSL.

[0047] One end of the constant current source 21 is connected to the corresponding signal line VSL, and the other end is grounded. The constant current source 21 generates an image luminance signal Sig to the corresponding signal line VSL, corresponding to the accumulated charge of the selected floating diffusion FD (see Figure 4).

[0048] The ADC230 AD converter is configured to perform AD conversion based on the signal Sig in the corresponding signal line VSL. Specifically, the ADC230 converts the analog gradation luminance signal Sig supplied via the vertical signal line VSL into a digital signal using time-division multiplexing. The ADC230 then supplies the generated digital signal to the signal processing unit 213.

[0049] As shown again in Figure 3, the signal processing unit 213 performs predetermined signal processing on the digital signal from the reading unit 212. This signal processing unit 213 supplies data indicating the processing result and a detection signal to the recording unit 120 via the signal line 209.

[0050] The timing control circuit 214 controls the timing of each component of the solid-state image sensor 200 based on timestamp information. For example, the timing control circuit 212d controls the processing timing of the storage control circuit 210, the first access control circuit 211a, the second access control circuit 211b, the third access control circuit 211c, the readout unit 212, and the signal processing unit 213. The output interface 215 outputs digital signals such as image data supplied from the signal processing unit 213 to the recording unit 120.

[0051] Here, a detailed example of the configuration of the pixel array section 30 will be described based on Figures 6 to 10. Figure 6 is a diagram showing an example of the configuration of the pixel array section 30. For example, it is an example of the configuration of a 3x3 pixel Pix in the upper left corner relative to the FD in Figure 4. Figure 7 is a diagram showing an example of the configuration of a pixel Pix. As shown in Figure 7, the pixel Pix has switching elements TR1 to TR3 and a photoelectric conversion unit PD. As described above, the photoelectric conversion unit PD, the floating diffusion FD, and the switching elements TR1 to T3 and TRG are formed in the layers of the light receiving chip 201. On the other hand, elements such as the switching elements TRST, AMP, SEL, FG (see Figures 10 and 18) are formed in the layers of the detection chip 202. Note that in this embodiment, the switching element TR2 of the 3rd row and 3rd column pixel Pix corresponds to the energy storage element.

[0052] As shown in Figure 6, the storage control lines OFG1 to 9 connect each pixel Pix to the storage control circuit 210 (see Figure 3). The horizontal control lines HSW1 to 3 connect each row of pixels Pix to the first access control circuit 211a (see Figure 3). Pulse-like control signals Hsw1 to 3 are supplied to the horizontal control lines HSW1 to 3 from the first access control circuit 211a (see Figure 3).

[0053] The vertical control lines VSW1-3 connect the pixels (Pix) of each row to the second access control circuit 211b (see Figure 3). Pulse-like control signals Vsw1-3 are supplied to the vertical control lines VSW1-3 from the second access control circuit 211b (see Figure 3).

[0054] Switching element TR1 of each row is connected in series to control lines VT1-3. Switching element TR2 of each column is connected in series to control lines VH1-VH3.

[0055] As shown in Figure 7, the switching elements TR1 to T3 are, for example, N-type MOS (Metal Oxide Semiconductor) transistors. One end of switching element TR1 is connected to the other end of the switching element TR1 to its left and to one end of the switching element TR2 to its left. The other end of switching element TR1 is connected to one end of the switching element TR1 to its right and to one end of switching element TR2. Furthermore, the gate of switching element TR1 is connected to the horizontal control line HSW. As a result, switching element TR1 is connected (on) when the control signals Hsw1 to Hsw3 supplied via the horizontal control lines HSW1 to HSW3 are high, and disconnected (off) when they are low. Note that switching element TR1 is sometimes referred to as a horizontal transfer transistor. In this embodiment, the connected state (on) of a switching element may be referred to as the conducting state, and the disconnected state (off) may be referred to as the non-conducting state.

[0056] One end of switching element TR2 is connected to the other end of the adjacent switching element TR2 above it and to the other end of switching element TR1. The other end of switching element TR2 is connected to one end of the adjacent switching element TR2 below it and to the other end of the adjacent switching element TR1 below it. Furthermore, the gate of switching element TR2 is connected to the vertical control line VSW. As a result, switching element TR2 is connected (on) when the control signals Vsw1-3, supplied via the horizontal control lines VSW1-3, are high, and disconnected (off) when they are low. Note that switching element TR2 is sometimes referred to as a vertical transfer transistor.

[0057] One end of the switching element TR3 is connected to the power supply VDD, and the other end is connected to one end of the photoelectric converter PD. The gate of the switching element TR3 is also connected to the storage control line OFG. As a result, the switching element TR3 is connected (on) when the control signal Ofg, supplied via the storage control line OFG, is high, and disconnected (off) when it is low. The switching element TR3 is sometimes referred to as the OFG transistor.

[0058] Figure 8 is a circuit diagram showing an example configuration of the pixel circuit AFD. The pixel circuit AFD has control lines TRGL, RSTL, and RSEL. One end of the control lines TRGL, RSTL, and RSEL is connected to the third access control circuit 211c (see Figure 3). The third access control circuit 211c supplies a pulsed control signal Trg to the control line TRGL. The third access control circuit 211c supplies a pulsed control signal Rst to the control line RSTL. The third access control circuit 211c supplies a pulsed control signal Sel to the control line SELL.

[0059] The pixel circuit AFD comprises four switching elements TRG, RST, AMP, and SEL, and a floating diffusion FD. The switching elements TRG, RST, AMP, and SEL are, for example, N-type MOS (Metal Oxide Semiconductor) transistors. The floating diffusion FD is constructed, for example, using a diffusion layer formed on the surface of a semiconductor substrate.

[0060] One end of the switching element TRG is connected to the signal line VH3, and the other end is connected to the floating diffusion FD. The gate of the switching element TRG is connected to the control line TRGL. As a result, the switching element TRG is connected (on) when the control signal Trg, supplied via the signal line TRGL, is high, and disconnected (off) when it is low. Note that the switching element TRG is sometimes referred to as a transfer transistor.

[0061] One end of the switching element RST is connected to the floating diffusion FD, and the other end is connected to the power supply voltage VDD. The gate of the switching element RST is connected to the control line RSTL. As a result, the switching element RST is connected (on) when the control signal Rst supplied via the RSTL is high, and disconnected (off) when it is low. The switching element RST is sometimes referred to as a reset transistor.

[0062] One end of the switching element AMP is connected to the power supply voltage VDD, and the other end is connected to one end of the switching element SEL. The gate of the switching element AMP is also connected to the floating diffusion FD. As a result, the switching element AMP supplies a voltage signal to one end of the switching element SEL corresponding to the accumulated charge in the floating diffusion FD. The switching element AMP is sometimes referred to as an amplifying transistor.

[0063] One end of the switching element SEL is connected to the other end of the switching element AMP, and the other end is connected to the signal line VSL. The gate of the switching element SEL is connected to the control line RSEL. As a result, the switching element SEL is connected (on) when the control signal Rsel, supplied via the RSEL, is high, and disconnected (off) when it is low. The switching element SEL is sometimes referred to as a path selection transistor.

[0064] In this configuration, for example, based on the control signal Rst, the switching element RST becomes conductive, thereby discharging the charge accumulated in the floating diffusion FD. Next, after the exposure period of each photoelectric conversion unit PD has ended, based on the control signal Trg, the switching element TRG becomes conductive, and the floating diffusion FD accumulates the charge transferred from the photoelectric conversion unit PD via the switching element TRG.

[0065] Next, based on the control signal Sel, the switching element SEL becomes conductive, electrically connecting the pixel circuit AFD to the signal line VSL. As a result, the switching element AMP is connected to the constant current source 220 (see Figure 5) of the readout unit 212 and operates as a so-called source follower. The voltage corresponding to the voltage of the floating diffusion FD at that time is output to the ADC230 as the image brightness signal Sig, as described above.

[0066] Figure 9 is a plan view of the light-receiving chip 201 of the pixel array section 30 shown in Figure 6, viewed from the back. As shown in Figure 9, the photoelectric conversion section PD of each pixel Pix is ​​arranged in a two-dimensional array. Switching elements TR1 to T3 are arranged around the photoelectric conversion section PD. The other end of switching element TR2 of the lower right pixel Pix in the 3x3 pixel Pix diagram in the upper left is connected to one end of switching element TRG. In other words, the accumulated charge stored in the photoelectric conversion section PD of the lower right pixel Pix in the 3x3 pixel Pix diagram is ultimately stored in the floating diffusion FD and read out as the image luminance signal Sig.

[0067] Figure 10 is a plan view of the detection chip 202 of the pixel circuit AFD. As shown in Figure 10, the detection chip 202 is configured with switching elements SEL, AMP, and RST.

[0068] Figure 11 is a schematic diagram showing a cross-section of the main part of the pixel array section 30. As shown in Figure 11, the light receiving chip 201 (see Figure 2) corresponds to the semiconductor layer 100S, and the detection chip 202 corresponds to the semiconductor layers 100T, 200T, and 200S. In Figure 11, the semiconductor layers 100S and 100T are shown on substrate 201a, and the semiconductor layers 200T and 200S are shown on substrate 201b. Substrates 201a and 201b are electrically connected, for example, by through electrodes 120E and 121E. The photoelectric conversion section PD, floating diffusion FD, and VSS contact region 118 have planar regions. The photoelectric conversion section PD is composed of, for example, a p-well layer 115 and an n-type semiconductor region 114.

[0069] The switching element TRG may be composed of a planar transistor. In this case, for example, a transfer gate TRG is provided on the surface of the semiconductor layer 100S. For example, the side surface of this transfer gate TG is covered by a sidewall SW. The sidewall SW contains, for example, silicon nitride (SiN). A gate insulating film is provided between the semiconductor layer 100S and the transfer gate TG. The transfer gate TG of each pixel Pix is ​​provided, for example, so as to surround the floating diffusion FD in a planar view.

[0070] The semiconductor layer 100S is provided with pixel isolation sections 117 that separate each pixel ix from one another. The pixel isolation sections 117 are formed extending in the direction normal to the semiconductor layer 100S (the direction perpendicular to the surface of the semiconductor layer 100S). The pixel isolation sections 117 are provided to partition the pixels Pix from each other and have, for example, a grid-like planar shape (see Figure 4). The pixel isolation sections 117 separate the pixels Pix from each other electrically and optically, for example. The pixel isolation sections 117 include, for example, a light-shielding film 117A and an insulating film 117B. For the light-shielding film 117A, for example, tungsten (W) is used. The insulating film 117B is provided between the light-shielding film 117A and the p-well layer 115 or n-type semiconductor region 114. The insulating film 117B is made of, for example, silicon oxide (SiO). The pixel isolation portion 117 has, for example, an FTI (Full Trench Isolation) structure and penetrates the semiconductor layer 100S. Although not shown, the pixel isolation portion 117 is not limited to an FTI structure that penetrates the semiconductor layer 100S. For example, it may have a DTI (Deep Trench Isolation) structure that does not penetrate the semiconductor layer 100S. The pixel isolation portion 117 extends in the direction normal to the semiconductor layer 100S and is formed in a part of the region of the semiconductor layer 100S.

[0071] The semiconductor layer 100S is provided with, for example, a pinning region 116. The pinning region 116 is provided on the side of the pixel separation portion 117, specifically between the pixel separation portion 117 and the p-well layer 115 or the n-type semiconductor region 114. The pinning region 116 is composed of, for example, a p-type semiconductor region.

[0072] Figures 12A to 12C schematically show examples of the operation of each photoelectric converter PD in a 3x3 pixel (see Figures 6 and 9). The photoelectric converters PD and PD33 are shown as some of the photoelectric converters PD and PD33 in a 3x3 pixel (see Figures 6 and 9). Photoelectric converter PD33 corresponds to the pixel in the 3rd row and 3rd column in Figure 9. That is, when photoelectric converters PD and P33 are adjacent horizontally, they are electrically connected via switching element TR1, and when they are adjacent vertically, they are electrically connected via switching element TR2.

[0073] As shown again in Figure 7, one end of the photoelectric conversion unit PD is connected to the other end of switching element TR3, the other end of switching element TR1, and one end of switching element TR2. As shown in Figure 7, in the photoelectric conversion unit PD, switching element TR3 is made conductive, i.e., the gate signal is set high, a predetermined positive potential VDD is applied, the stored charge is discharged, and an initial reset is performed. The photoelectric conversion unit may use materials such as silicon (Si), indium gallium arsenide (InGaAs), or germanium (Ge) organic semiconductors. Furthermore, the materials for elements such as switching elements TR1 to TR3, switching elements TRG, RST, AMP, SEL, and FG may be silicon (Si), oxide semiconductors, or organic semiconductors. When switching element TR3 is made non-conductive, i.e., the gate signal is set low, charge accumulation by photoelectric conversion begins in the photoelectric conversion unit PD.

[0074] Figure 12A schematically shows the state when charge accumulation in the photoelectric conversion unit PD, 33 is complete. As shown in Figure 12A, the switching elements TR1, TR2, and TRG are made non-conductive, that is, the gate signals are set to low. As a result, light transmitted through all the photoelectric conversion units PD of the 3x3 pixels Pix generates photocharge. This photocharge is accumulated by the well-shaped positive potential. As will be described later, the accumulation time of the 3x3 pixels Pix is ​​given by the weight value w in equation (1). ij Based on this, it is set based on the control signal from the arithmetic processing unit 142. That is, the weight value w ij As the value increases, the amount of accumulated charge increases further.

[0075] Figure 12B schematically shows the case when switching elements TR1 and TR2 are connected. Next, as shown in Figure 12B, switching elements TR1 and TR are made conductive, that is, the gate signals of switching elements TR1 and TR are set to high. As a result, the charge accumulated in the 3x3 pixels Pix is ​​averaged out to a value proportional to, for example, the image brightness signal Sigij in equation (1) described later.

[0076] Figure 12C schematically shows the state before charge transfer to the floating diffusion FD. As shown in Figure 12C, the switching elements TR1 and TR2 connected to the photoelectric conversion unit PD33 are made non-conductive, that is, the gate signals of switching elements TR1 and TR2 are set to low. As a result, the charge accumulated in the photoelectric conversion unit PD33 becomes a value proportional to the image brightness signal Sigij in equation (1) described later. Next, the gate signal of switching element TRG is set to low. As a result, the charge accumulated in the photoelectric conversion unit PD33 is transferred to the floating diffusion FD. At this time, since the photoelectric conversion unit PD33 is isolated by the non-conductive switching elements TR1 and TR, only one-ninth of the charge is transferred to the floating diffusion FD. This suppresses overflow of the floating diffusion FD.

[0077] In this embodiment, an example was described in which the switching elements TR1 and TR connected to the photoelectric conversion unit PD33 are made non-conductive before the transfer of charge to the floating diffusion FD, but the embodiment is not limited to this. For example, the switching elements TR1 and TR2 connected to the photoelectric conversion unit PD33 may be kept in a conductive state before the transfer of charge to the floating diffusion FD. In this case, all accumulated charge can be transferred to the floating diffusion FD.

[0078] Next, we will explain the operation examples in more detail based on Figures 13 to 17. Figures 13 to 15 are diagrams illustrating the range of the weighting calculation process. Figure 13 shows the addition ranges A11 to A22 and the corresponding floating diffusion FD11 to FD22 for each timing t1 to t3. Similarly, Figure 14 shows the addition ranges for each timing t4 to t6, and Figure 15 shows the addition ranges for each timing t7 to t9. In Figures 13 to 15, the addition ranges A11 to A22 and the corresponding floating diffusion FD11 to FD22 relatively represent any region of the pixel array 30.

[0079] The summation range for floating diffusion FD11 is summation range A11, the summation range for floating diffusion FD12 is summation range A12, the summation range for floating diffusion FD21 is summation range A21, and the summation range for floating diffusion FD22 is summation range A22. Other floating diffusion FDn also have a summation range An. In other words, in the 3x3 summation ranges A11 to A22, as shown in equation (1), the summation ranges overlap, so nine summation processes at timings t1 to t9 are performed within the image sensor 200. That is, nine images are taken at timings t1 to t9.

[0080] Figure 16 shows the 3×3 weight values ​​w in equation (1). ijThis is a diagram showing an example. For example, equation (1) is an example of an addition process used in the processing of the arithmetic processing unit 142 (see FIG. 1). The arithmetic processing unit 142 supplies information of the weight value w in equation (1), for example, to the accumulation control circuit 210 (see FIG. 3) via the control unit 130. In this embodiment, the weight value w may be referred to as a filter value, and the addition range may be referred to as a filter. ij The information of ij is supplied to the accumulation control circuit 210 (see FIG. 3) via the control unit 130. In this embodiment, the weight value w ij may be referred to as a filter value, and the addition range may be referred to as a filter. ij In some cases, the weight value w ij may be referred to as a filter value, and the addition range may be referred to as a filter.

[0081]

Number

[0082] At timing t1, the charge proportional to the charge accumulated in the 3x3 photoelectric conversion unit PD in summation range A11 is ultimately accumulated in the floating diffusion FD11. Similarly, the charge proportional to the charge accumulated in the 3x3 photoelectric conversion unit PD in summation range A12 is ultimately accumulated in the floating diffusion FD12. Similarly, the charge proportional to the charge accumulated in the 3x3 photoelectric conversion unit PD in summation range A21 is ultimately accumulated in the floating diffusion FD11. Similarly, the charge proportional to the charge accumulated in the 3x3 photoelectric conversion unit PD in summation range A22 is ultimately accumulated in the floating diffusion FD22.

[0083] Next, at timing t2, the addition range A11~A22 is shifted one pixel to the right, and at timing t3, the addition range A11~A22 is shifted another one pixel to the right. As shown in Figure 14, next, at timing t4, the addition range A11~A22 is shifted one pixel down from the position at timing t1, at timing t5, the addition range A11~A22 is shifted another one pixel to the right, and at timing t6, the addition range A11~A22 is shifted another one pixel to the right. As shown in Figure 15, next, at timing t5, the addition range A11~A22 is shifted one pixel down from the position at timing t4, at timing t5, the addition range A11~A22 is shifted another one pixel to the right, and at timing t6, the addition range A11~A22 is shifted another one pixel to the right. Thus, in the weighting calculation shown in equation (1), for example, the addition process is performed while changing the addition range A11 to A22 nine times.

[0084] More specifically, the storage control circuit 210 (see Figure 3) uses the weight value w ij A signal Ofg1~OfgH*V containing time information proportional to the time is supplied to each pixel Pix. Then, the photoelectric converter PD of each pixel Pix calculates a weight value w based on the signal Ofg1~OfgH*V. ij Photoelectric conversion is performed for a time proportional to w, and charge is accumulated. That is, in this embodiment, the weight value w ij By performing photoelectric conversion for a time proportional to the weight value w ijThis performs a calculation equivalent to the above. Finally, it transfers one-ninth of the accumulated charge for each pixel (Pix) to the floating diffusion FD.

[0085] Figure 17 is a timing chart showing an example of processing of the addition range A11 at timing t1 in Figure 13. The example of processing of the addition range A11 will be explained based on Figure 17, with reference to Figures 6 through 8.

[0086] As shown in Figure 17, the vertical axis represents any two signals of Ofg * The signals Vsw1, Vsw2, Hsw1, Hsw2, Rst, and Trg are shown from top to bottom. The horizontal axis represents time. Signal Ofg * Due to the high-level signal, the pixels * The switching element TR3 becomes conductive, the charge in the photoelectric conversion unit PD is discharged to the power supply VDD, and it is initialized. Subsequently, the signal Ofg * When the signal transitions to a low level, the photoelectric converter PD uses the weight value w ij For a time proportional to the amount of light received, it accumulates charge. Other pixels Pix * Similarly, the weight value w ij For a time proportional to the amount of light received, it accumulates an electric charge.

[0087] Next, when signals Vsw1, Vsw2, Hsw1, and Hsw2 go high, the switching element TR2 between the first and second row pixels becomes conductive. Similarly, the switching element TR2 between the second and third row pixels becomes conductive. Similarly, the switching element TR1 between the first and second column pixels becomes conductive. Similarly, the switching element TR1 between the second and third column pixels becomes conductive. Then, when signals Vsw1, Vsw2, Hsw1, and Hsw2 go low, a charge corresponding to the result of the addition process in equation (1) is accumulated in the photoelectric conversion unit PD in the third row and third column.

[0088] Next, when the signal Rst goes high, the switching element RST becomes conductive, and the charge in the floating diffusion FD is discharged. Then, when the signal Rst goes low, the switching element RST becomes non-conductive.

[0089] Next, when the signal Trg goes high, the switching element TRG becomes conductive, and simultaneously, the switching element TR2 of the pixel Pix in the 3rd row and 3rd column becomes conductive. As a result, all the charge accumulated in the photoelectric conversion unit PD in the 3rd row and 3rd column is transferred to the floating diffusion FD. The same drive is performed simultaneously in the other summing ranges A12 to An, and the charge corresponding to the summing range A12 to An is accumulated in each floating diffusion FD. Then, as described above, each charge in the floating diffusion FD connected to the same VSL line is amplified sequentially and converted into a digital luminance signal in a time-division multiplexing manner.

[0090] Figure 18 is a timing chart showing an example of processing in the summation range A11 at timing t5 in Figure 14. In the example at timing t5, the processing differs from the example of processing in the summation range A11 at timing t1 due to the difference in the relative positions of the floating diffusion FD within the summation range A11. Specifically, at the timing when signals Vsw2, Vsw3, Hsw2, and Hsw3 are high, the switching element TR2 between the pixels Pix of the second and third rows becomes conductive. Similarly, the switching element TR2 between the pixels Pix of the third and fourth rows becomes conductive. Similarly, the switching element TR1 between the pixels Pix of the second and third columns becomes conductive. Similarly, the switching element TR1 between the pixels Pix of the third and fourth columns becomes conductive. Then, at the timing when signals Vsw2, Vsw3, Hsw2, and Hsw3 are low, a charge corresponding to the processing result equivalent to the summation process in equation (1) is accumulated in the photoelectric conversion unit PD of the third row and third column. The rest is equivalent to the processing example for the addition range A11 at timing t1. Then, the arithmetic processing unit 142 can acquire the image brightness signal Sigij of equation (1), for example, calculated over the entire pixel range of the pixel array unit 30, and perform subsequent image processing. Since iterative calculations such as weighted addition, which have a relatively large computational load, are performed in the solid-state image sensor 200 by the transfer process of accumulated charge, the processing of the arithmetic processing unit 142 can be made faster.

[0091] As explained above, according to this embodiment, the weight value w of the weighting operation (for example, equation (1)), which is an example of iterative addition, ij The photoelectric converter PD of each pixel Pix performs photoelectric conversion and accumulates charge over a time period proportional to the time. As a result, the accumulated charge of each pixel Pix is ​​added together, making it possible to perform weighting calculations using analog signals (for example, equation (1)).

[0092] Furthermore, since accumulated charge can be transferred between each pixel Pix, it is possible to change the position of the summation range A11 by providing only one floating diffusion FD corresponding to the summation range A11. This allows the brightness value p ijWhen adding the image luminance signals Sigij (in≦i≦i+n, jm≦j≦j+m), different weight values ​​w ij Even when addition is performed, it can be handled without increasing the number of floating diffusion FDs. This suppresses the need to increase the size of the arithmetic element 200.

[0093] (Modification of the first embodiment) The imaging device 100 according to a modification of the first embodiment differs from the imaging device 100 according to the first embodiment in that the pixel circuit AFD further includes a floating diffusion FD2, and the capacitance of the floating diffusion FD can be switched. The differences from the imaging device 100 according to the first embodiment will be explained below.

[0094] Figure 19 is a circuit diagram showing an example configuration of a pixel circuit AFD according to a modification of the first embodiment. The pixel circuit AFD further includes a floating diffusion FD2, a control line FGL, and a switching element FG. One end of the control line FGL is connected to the third access control circuit 211c (see Figure 3). A control signal Fg is supplied to this control line TRGL by the third access control circuit 211c. The switching element FG is, for example, an N-type MOS (Metal Oxide Semiconductor) transistor.

[0095] One end of switching element RST is connected to floating diffusion FD2, and the other end is connected to the power supply voltage VDD. Similarly, one end of switching element FG is connected to floating diffusion FD, and the other end is connected to floating diffusion FD2. The gate of switching element FG is connected to the control line FGL.

[0096] This configuration allows the floating diffusion FD and floating diffusion FD2 to be connected in parallel by making the switching element FG conductive, thereby increasing the capacitance. Therefore, it is possible to switch between using the floating diffusion FD and using both the floating diffusion FD and floating diffusion FD2 depending on the amount of light being captured by the image sensor 200.

[0097] When using floating diffusion FD and floating diffusion FD2, switching elements FG and RST are made conductive based on control signals Fg and Rst. This discharges the charge accumulated in floating diffusion FD and floating diffusion FD2. Next, switching element RST is made non-conductive based on control signal Rst. As a result, after the exposure period T ends, switching element TRG becomes conductive based on control signal Trg, causing floating diffusion FD and floating diffusion FD2 to accumulate the charge transferred from the photoelectric conversion unit PD via switching element TRG.

[0098] Next, based on the control signal Sel, the switching element SEL becomes conductive, electrically connecting the pixel circuit AFD to the signal line VSL. As a result, the switching element AMP is connected to the constant current source 220 (see Figure 5) of the readout unit 212 and operates as a so-called source follower. At that time, a voltage corresponding to the voltages of the floating diffusion FD and floating diffusion FD2 is output to the ADC230 as the image brightness signal Sig, as described above.

[0099] When using only the floating diffusion FD, the switching elements FG and RST are made conductive based on the control signals Fg and Rst. This discharges the charge accumulated in the floating diffusion FD and floating diffusion FD2. Next, the switching element FG is made non-conductive based on the control signal Fgt. As a result, after the exposure period T ends, the switching element TRG becomes conductive based on the control signal Trg, and the floating diffusion FD accumulates the charge transferred from the photoelectric conversion unit PD via the switching element TRG. After that, the same processing as described above is performed.

[0100] As described above, the imaging device 100 according to a modification of the first embodiment further includes a floating diffusion FD2 in the pixel circuit AFD. This makes it possible to switch the capacitance of the floating diffusion FD according to the amount of light received by the solid-state image sensor 200, thereby enabling adjustment of imaging sensitivity and accumulated charge capacitance.

[0101] (Second Embodiment) The imaging device 100 according to the second embodiment differs from the imaging device 100 according to the first embodiment in that the initialization process of the pixels Pix connected to the pixel circuit AFD is performed by the pixel circuit AFD. The differences from the imaging device 100 according to the first embodiment will be explained below.

[0102] Figure 20 shows an example configuration of the pixel array unit 30 according to the second embodiment. As shown in Figure 19, the photoelectric conversion unit PD33 in the 3rd row and 3rd column does not have a reset switching element TR3, which differs from the example configuration of the pixel array unit 30 shown in Figure 6.

[0103] Figure 21 is a timing chart showing an example of addition processing in the pixel array section 30 of Figure 20. The accumulation and charge transfer of the photoelectric conversion section PD are performed in the same way as in Figures 17 and 17. In this case, the reset drive of the photoelectric conversion section PD33 differs from the processing in Figures 17 and 17.

[0104] The photoelectric converter PD33 is reset by making the switching element TR2 of the 3rd row, 3rd column pixel Pix conductive, and simultaneously setting the control signals Rst and Trg to high levels, making the switching elements RST and TRG conductive. As a result, the accumulated charge in the photoelectric converter PD33 is discharged through the switching elements RST and TRG. Then, the switching elements RST and TRG are made non-conductive, and at the same time, the switching element TR2 is also made non-conductive. In this way, the charge in the 3rd row, 3rd column photoelectric converter PD33 is discharged by the pixel circuit AFD, making it possible to initialize it.

[0105] Figure 22 is a plan view of the detection chip 202 of the pixel array section 30 shown in Figure 20. As shown in Figure 22, the photoelectric conversion section PD33 in the 3rd row and 3rd column does not have a reset switching element TR3, so the switching element TRG of the pixel circuit AFD and the floating diffusion FD can be placed on the side of the switching element TR3. This makes it possible to widen the aperture of the photoelectric conversion section PD33 in the 3rd row and 3rd column.

[0106] As described above, in this embodiment, the imaging device 100 performs the initialization process of pixels Pix connected to the pixel circuit AFD using the pixel circuit AFD. This makes it possible to configure the pixel array section 30 without providing the switching element TR3 for the pixels Pix, allowing the image sensor 200 to be made smaller and the aperture of the 3rd row, 3rd column photoelectric conversion section PD33 to be made wider.

[0107] (Third embodiment) The imaging device 100 according to the first embodiment connects the switching elements TR1 and TR2, averages the charge accumulated in the 3x3 pixels Pix, and transfers it to the floating diffusion FD. However, the imaging device 100 according to the first embodiment differs in that it sequentially adds the charge accumulated in the 3x3 pixels Pix row by row or column by column. The differences from the imaging device 100 according to the first embodiment will be explained below.

[0108] Figure 23 schematically shows an example of the process of transferring the accumulated charge for each pixel Pix to the floating diffusion FD according to the third embodiment. Figure 23 shows an example of imaging with an addition range H*V at timing tn. More specifically, the accumulation control circuit 210 (see Figure 3) uses a weight value w ij A signal Ofg1~OfgH*V containing time information proportional to the time is supplied to each pixel Pix. Then, the photoelectric converter PD of each pixel Pix calculates a weight value w based on the signal Ofg1~OfgH*V. ij Photoelectric conversion is performed for a time proportional to w, and charge is accumulated. That is, in this embodiment, the weight value w ij By performing photoelectric conversion for a time proportional to the weight value w ij This performs the equivalent calculation. Then, according to the control of the storage control circuit 210, the first access control circuit 211a, the second access control circuit 211b, and the third access control circuit 211c, the stored charge is sequentially transferred between the photoelectric conversion units PD of each pixel Pix. As a result, the stored charge of each pixel Pix is ​​finally transferred to the floating diffusion FD.

[0109] Figure 24 shows an example of the configuration of the pixel array section 30 according to the third embodiment. For example, it is an example of the configuration of the 3x3 pixel Pix in the upper left of the FD in Figure 4. Figure 25 shows an example of the configuration of the pixel Pix according to the third embodiment. As shown in Figure 25, the pixel Pix has switching elements TR1 to TR3 and a photoelectric conversion section PD. A potential control line CONT (sometimes referred to as COT below) is connected to the photoelectric conversion section PD.

[0110] As shown in Figure 24, the storage control lines OFG1 to 9 connect each pixel Pix to the storage control circuit 210 (see Figure 3). Similarly, the potential control lines COT1 to 3 connect each pixel Pix to the storage control circuit 210 (see Figure 3). The subsequent connection relationships are the same as in Figure 6, so the explanation is omitted.

[0111] Figures 26A to C schematically show examples of the configuration and operation of the photoelectric conversion unit PD in chronological order. As shown in Figures 26A to C, the photoelectric conversion unit PD according to this embodiment is a photoelectric conversion unit capable of changing the positive potential shape.

[0112] Figure 26A shows the charge accumulation state. Figure 26A schematically shows adjacent pixels PD11 and PD12. As shown in Figure 26A, switching elements TR1 and TR2 are made non-conductive, that is, the gate signal is set to low. Then, a voltage corresponding to the transfer order is pre-applied to terminal PDT from the potential control line COT. This creates a step in the well-shaped positive potential. In the example of Figure 26A, since the control is performed to transfer charge from pixel PD11 to pixel PD12, the potential on the pixel PD12 side is deeper on the positive potential side than on the pixel PD11 side. Then, light transmitted through the photoelectric conversion unit PD generates photocharge. This photocharge is accumulated by the well-shaped positive potential.

[0113] Figure 26B schematically shows the case when switching elements TR1 and TR2 are in a conductive state. As shown in Figure 26B, switching elements TR1 and TR2 are made conductive, that is, the gate signal is set to high. As a result, the charge accumulated in the photoelectric conversion unit PD11 is transferred to the photoelectric conversion unit PD12 on the deeper (larger) side of the positive potential.

[0114] Figure 26C schematically shows the case when switching elements TR1 and TR2 are in a non-conductive state. Next, as shown in Figure 26C, switching elements TR1 and TR2 are made non-conductive, and the charge transfer is terminated. By repeating the process as shown in Figures 26B and 26C, the charge is transferred between pixels.

[0115] Figure 27 is a timing chart showing an example of processing of the addition range A11 at timing t1 in Figure 13. The example of processing of the addition range A11 will be explained based on Figure 27, with reference to Figures 24, 25, and 10.

[0116] As shown in Figure 27, the vertical axis represents any two signals of Ofg * The signals Vsw1, Vsw2, Hsw1, Hsw2, Rst, and Trg are shown from top to bottom. The horizontal axis represents time. Signal Ofg * Due to the high-level signal, the pixels * The switching element TR3 becomes conductive, the charge in the photoelectric conversion unit PD is discharged to the power supply VDD, and it is initialized. Subsequently, the signal Ofg * When the signal transitions to a low level signal, a predetermined bias voltage is applied to the photoelectric conversion unit PD via the signal line CONT, and the weight value w ij For a time proportional to the amount of light received, it accumulates charge. Other pixels Pix * Similarly, the weight value w ij For a time proportional to the amount of light received, it accumulates an electric charge.

[0117] Next, when the signal Vsw1 goes high, the switching element TR2 between the first and second row pixels (Pix) becomes conductive. At this time, the bias voltage of the photoelectric converter PD in the second row is made higher than the bias voltage of the photoelectric converter PD in the first row. As a result, the accumulated charge in the photoelectric converter PD in the first row pixel (Pix) is transferred to the photoelectric converter PD in the second row pixel (Pix). Then, when the signal Vsw1 goes low, the switching element TR2 becomes non-conductive again.

[0118] Next, when the signal Vsw2 goes high, the switching element TR2 between the second and third row pixels (Pix) becomes conductive. At this time, the bias voltage of the photoelectric converter PD in the third row is made higher than the bias voltage of the photoelectric converter PD in the second row. As a result, the accumulated charge in the photoelectric converter PD in the second row pixel (Pix) is transferred to the photoelectric converter PD in the third row pixel (Pix). Then, when the signal Vsw1 goes low, the switching element TR2 becomes non-conductive again.

[0119] Next, when the signal Hsw1 goes high, the switching element TR1 between the first and second row pixels (Pix) becomes conductive. At this time, the bias voltage of the photoelectric converter PD in the second row is made higher than the bias voltage of the photoelectric converter PD in the first row. As a result, the accumulated charge in the photoelectric converter PD in the first row pixels (Pix) is transferred to the photoelectric converter PD in the second row pixels (Pix). Then, when the signal Vsw1 goes low, the switching element TR1 becomes non-conductive again.

[0120] Next, when the signal Hsw2 goes high, the switching element TR1 between the second and third row pixels (Pix) becomes conductive. At this time, the bias voltage of the photoelectric converter PD in the third row is made higher than the bias voltage of the photoelectric converter PD in the second row. As a result, the accumulated charge in the photoelectric converter PD in the second row pixels (Pix) is transferred to the photoelectric converter PD in the third row pixels (Pix). Then, when the signal Vsw1 goes low, the switching element TR1 becomes non-conductive again.

[0121] Next, when the signal Rst goes high, the switching element RST becomes conductive, and the charge in the floating diffusion FD is discharged. Then, when the signal Rst goes low, the switching element RST becomes non-conductive.

[0122] Next, at the moment the signal Trg goes high, the switching element TRG becomes conductive, and simultaneously, the switching element TR2 of the pixel Pix in the 3rd row and 3rd column becomes conductive. At this time, the bias voltage of the floating diffusion FD is made higher than the bias voltage of the photoelectric converter PD in the pixel Pix in the 3rd row and 3rd column. As a result, the charge of the photoelectric converter PD in the pixel Pix in the 3rd row and 3rd column is transferred into the floating diffusion FD. The same drive is performed simultaneously in the other summation ranges A12 to An, and the charge corresponding to the summation range A12 to An is accumulated in each floating diffusion FD. Then, as described above, each charge in the floating diffusion FD connected to the same VSL line is amplified sequentially and converted into a digital luminance signal in a time-division multiplexing manner.

[0123] Figure 28 is a timing chart showing an example of processing in the summation range A11 at timing t5 in Figure 13. In the example at timing t5, the processing differs from the example of summation range A11 at timing t1 due to the difference in the relative positions of the floating diffusion FD within the summation range A11. Specifically, the accumulated charge of the photoelectric converter PD in the second row of pixels Pix in the summation range A11 is transferred to the photoelectric converter PD in the third row of pixels Pix, and then the accumulated charge of the photoelectric converter PD in the third row of pixels Pix in the summation range A11 is transferred to the photoelectric converter PD in the second row of pixels Pix. Then, the accumulated charge of the photoelectric converter PD in the second column of pixels Pix in the summation range A11 is transferred to the photoelectric converter PD in the third column of pixels Pix, and then the accumulated charge of the photoelectric converter PD in the third column of pixels Pix in the summation range A11 is transferred to the photoelectric converter PD in the second column of pixels Pix. The rest is equivalent to the processing example for the addition range A11 at timing t1. Then, the arithmetic processing unit 142 can acquire the image brightness signal Sigij of equation (1), for example, calculated over the entire pixel range of the pixel array unit 30, and perform subsequent image processing. Since iterative calculations such as weighted addition, which have a relatively large computational load, are performed in the solid-state image sensor 200 by the transfer process of accumulated charge, the processing of the arithmetic processing unit 142 can be made faster.

[0124] As described above, this embodiment provides the same effects as the first embodiment, but also makes it possible to transfer the accumulated charge of all pixels (Pix) to the floating diffusion FD. This makes it possible to further increase the ratio of the image signal to the offset noise of the pixels (Pix), resulting in a higher signal-to-noise ratio (SNR).

[0125] (Modification 1 of the third embodiment) While the imaging device 100 according to the third embodiment directly controls the potential of the photoelectric conversion unit PD using a potential control line CONT, the imaging device 100 according to Modification 1 of the third embodiment differs in that it controls the potential of the photogate using a potential control line CONT. The differences from the imaging device 100 according to the third embodiment will be explained below.

[0126] Figure 29A schematically shows the charge transfer operation of adjacent photoelectric conversion units PD11 and PD12. Photogate 11 and Photogate 12 are located in photoelectric conversion units PD11 and PD12. A signal potential is supplied to Photogate 11 and Photogate 12 by a potential control line CONT. First, the switching element TR3 is made conductive to discharge the charge stored in photoelectric conversion units PD1 and PD2, performing an initial reset. Next, the switching elements TR1, TR2, and TR3 are made non-conductive, and charge corresponding to the amount of light received is accumulated in each. During accumulation, the potentials applied to Photogate 11 and Photogate 12 are equivalent.

[0127] Figure 29B schematically shows the case when switching elements TR1 and TR2 are in a conductive state. Next, as shown in Figure 29B, switching elements TR1 and TR2 are made conductive, that is, the gate signal is set to high. At this time, the signal potential of photogate 11 is made lower than the signal potential of photogate 12 by the potential control line CONT. As a result, the charge accumulated in photoelectric conversion unit PD11 is transferred to photoelectric conversion unit PD12, which is on the deeper (larger) side of the positive potential.

[0128] Figure 29C schematically shows the case when switching elements TR1 and TR2 are in a non-conductive state. Next, as shown in Figure 29C, switching elements TR1 and TR2 are made non-conductive, and the charge transfer is terminated. At the end of accumulation, the potentials applied to photogate 11 and photogate 12 are equivalent. By repeating the process as shown in Figures 29B and 29C, the charge is transferred between pixels. Subsequent processing is the same as in the imaging device 100 according to the third embodiment.

[0129] As described above, according to this embodiment, in addition to the same effects as the modified version of the third embodiment, charge transfer is possible by the photogate 11 and photogate 12. This makes it possible to control the bias potential of the photoelectric conversion unit PD more accurately, and thus to control the transfer more accurately.

[0130] (Modification 2 of the third embodiment) While the imaging device 100 according to the third embodiment directly controls the potential of the photoelectric conversion unit PD using a potential control line CONT, the imaging device 100 according to modification 2 of the third embodiment differs in that it controls the switching elements SW-11 and SW-12 using a potential control line CONT. The differences from the imaging device 100 according to the third embodiment will be explained below.

[0131] Figure 30A schematically shows the charge transfer operation of adjacent photoelectric conversion units PD11 and PD12. Switching elements SW-11 and SW-12 are arranged adjacent to switching elements TR1 and TR2. Switching elements SW-11 and SW-12 are, for example, transistors. That is, they can form a potential potential equivalent to that of switching elements TR1 and TR2.

[0132] A signal potential is supplied to switching elements SW-11 and SW-12 via the potential control line CONT. First, switching element TR3 is made conductive to discharge the charge stored in photoelectric conversion units PD1 and PD2, performing an initial reset. Next, switching elements SW-11, SW-12, TR1, TR2, and TR3 are made non-conductive, and charge corresponding to the amount of light received is accumulated in each.

[0133] Figure 30B schematically shows the case when the switching elements SW-11, SW-12, TR1, and TR2 are in a conductive state. Next, as shown in Figure 30B, the switching elements SW-11, SW-12, TR1, and TR2 are made conductive, that is, the gate signal is set high. As a result, the charge accumulated in the photoelectric conversion units PD11 and PD12 is transferred to the side of the switching elements SW-11, SW-12, TR1, and TR2, which is the deeper (larger) side of the positive potential.

[0134] Figure 30C schematically shows the case when the switching element SW-11 is in a non-conductive state. Next, as shown in Figure 30C, when the switching element SW-11 is made non-conductive, the charge is concentrated on the side of the switching elements SW-12, TR1, and TR2.

[0135] Figure 30D schematically shows the case when the switching elements SW-11, SW-12, TR1, TR2, and TR3 are in a non-conductive state. When the switching elements SW-11, SW-12, TR1, TR2, and TR are made non-conductive, the charge that had been accumulated on the side of the switching elements SW-12, TR1, and TR2 is transferred to the side of the photoelectric conversion unit PD12, and the charge transfer ends. By repeating the process shown in Figures 30B, 30C, and 30D, the charge is transferred between pixels. Subsequent processing is the same as in the imaging device 100 according to the third embodiment.

[0136] As described above, according to this embodiment, in addition to the same effects as the modified version of the third embodiment, charge transfer is possible by the switching elements SW-11 and SW-12. This makes it possible to control the bias potential of the photoelectric conversion unit PD more accurately, and thus to control the transfer more accurately. (Fourth Embodiment) The imaging device 100 according to the fourth embodiment differs from the imaging device 100 according to the first embodiment in that the pixel array section 30 is composed of color pixels and is capable of driving color pixels. The differences from the imaging device 100 according to the first embodiment will be explained below.

[0137] Figure 31 shows an example of the configuration of the pixel array section 30 according to the fourth embodiment. As shown in Figure 31, each pixel Pix has, for example, a Baze-arranged color filter, red (R), green (G), and blue (B). As a result, each pixel Pix receives light through one of the multiple color filters red (R), green (G), and blue (B).

[0138] Figure 32 is a timing chart showing an example of addition processing in the pixel array section 30 of Figure 31. In this case, the accumulation drive for red (R) pixels, the accumulation drive for green (G) pixels, and the accumulation drive for blue (B) pixels are performed at different time intervals, which differs from the drive shown in Figures 26 and 27.

[0139] As shown in Figure 32, in the accumulation drive for red (R) pixels, according to the control of the accumulation control circuit 210, the first access control circuit 211a, the second access control circuit 211b, and the third access control circuit 211c, the accumulation of each pixel Pix is ​​equal to the weight value w ij It starts with a length proportional to the length. Then, before the transfer of charge between the photoelectric conversion units PD of each pixel Pix, the green (G) and blue (B) pixels are reset by reset signals Gr2 and Br2. The subsequent transfer process is equivalent to that shown in Figures 16 and 17. In this way, in the storage drive for the red (R) pixel, the stored charge of the green (G) and blue (B) pixels is reset and discharged before the transfer process of the stored charge. As a result, the stored charge for the red (R) pixel is transferred to the floating diffusion FD.

[0140] Similarly, in the accumulation drive for green (G) pixels, the accumulation of each pixel Pix is ​​a weight value w ij It starts with a length proportional to the length. Then, before the transfer of charge between the photoelectric conversion units PD of each pixel Pix, the red (R) and blue (B) pixels are reset by reset signals Rr2 and Br2. The subsequent transfer process is equivalent to that shown in Figures 26 and 27. In this way, in the accumulation drive for the green (G) pixel, the accumulated charge of the red (R) and blue (B) pixels is reset and discharged before the transfer process of the accumulated charge. As a result, the accumulated charge for the green (G) pixel is transferred to the floating diffusion FD.

[0141] Similarly, in the accumulation-driven approach for blue (B) pixels, the accumulation of each pixel Pix is ​​a weight value w ij It starts with a length proportional to the length. Then, before the transfer of charge between the photoelectric conversion units PD of each pixel Pix, the red (R) and green (G) pixels are reset by reset signals Rr2 and Gr2. The subsequent transfer process is equivalent to that shown in Figures 16 and 17. In this way, in the storage drive for the blue (B) pixel, the stored charge of the red (R) and green (G) pixels is reset and discharged before the transfer process of the stored charge. As a result, the stored charge for the blue (B) pixel is transferred to the floating diffusion FD.

[0142] As described above, the imaging device 100 according to the third embodiment has a pixel array section 30 composed of color pixels and has a drive for the color pixels. This makes it possible to transfer the accumulated charge for red (R) color pixels, the accumulated charge for green (G) color pixels, and the accumulated charge for blue (B) pixels to the floating diffusion FD, respectively, thereby suppressing color mixing.

[0143] (Fifth embodiment) The imaging device 100 according to the fifth embodiment uses the weight value w of equation (1). ij This differs from the imaging device 100 according to the first embodiment in that it can also be driven when (F104) has a negative value. The differences from the imaging device 100 according to the first embodiment will be explained below.

[0144] Figure 33 shows the weight values ​​w of equation (1) according to the fourth embodiment. ijj This figure schematically shows an example of processing for (F104). As shown in Figure 33, according to the control of the storage control circuit 210, the first access control circuit 211a, the second access control circuit 211b, and the third access control circuit 211c, in the first frame F100, a weight value w with a positive value is processed. ij Each photoelectric conversion element PD accumulates charge for a storage time corresponding to the length of the charge. Then, the charge between the photoelectric conversion units PD of each pixel Pix is ​​transferred to the floating diffusion FD. After this, it is converted into a first digital signal by the AD conversion unit ADC230 (see Figure 5) and recorded in the recording unit 120 (see Figure 1). Note that the weight value w has a negative value. ij The accumulation time for a given length is set to 0.

[0145] In the second frame F102, according to the control of the storage control circuit 210, the first access control circuit 211a, the second access control circuit 211b, and the third access control circuit 211c, a weight value w with a negative value is generated. ijEach photoelectric conversion element PD accumulates charge for an accumulation time corresponding to the absolute value of (F104). Then, the charge between the photoelectric conversion units PD of each pixel Pix is ​​transferred to the floating diffusion FD. After this, it is converted into a second digital signal by the AD conversion unit ADC230 (see Figure 5) and recorded in the recording unit 120 (see Figure 1). Note that the weight value w has a positive value. ij The accumulation time for a given length is set to 0.

[0146] Then, the arithmetic processing unit 142 calculates the difference between the first digital signal in the first frame F100 and the second digital signal in the second frame F102, which are recorded in the recording unit 120 (see Figure 1), and calculates the weight value w in equation (1). ij Generate a digital signal corresponding to (F104). In this case, the weight value w of equation (1) ij The calculation result corresponding to (F104) is generated as a numerical value.

[0147] As described above, the imaging device 100 according to the fifth embodiment has a weight value w with a positive value. ij Each photoelectric conversion element PD stores data for a storage time corresponding to the length of the data, and converts it into a first digital signal. Subsequently, a weight value w with a negative value is used. ij Each photoelectric conversion element PD stores data for a storage time corresponding to the absolute value of w, and converts it into a second digital signal. Subsequently, the arithmetic processing unit 142 subtracts the second digital signal from the first digital signal. This results in the weight value w in equation (1). ij This also enables arithmetic processing when (F104) has a negative value.

[0148] Furthermore, this technology can take the following configuration.

[0149] (1) Multiple pixel regions composed of multiple pixels, It comprises a plurality of first energy storage units corresponding to each of the aforementioned pixel regions, The plurality of first pixels within the aforementioned pixel region are Photoelectric conversion unit, It has a first element that makes a photoelectric conversion unit adjacent to at least one of the vertical and horizontal pixels conductive or non-conductive, The second pixel within the aforementioned pixel region is Photoelectric conversion unit, A first element that makes a photoelectric conversion unit adjacent to at least one of the vertical and horizontal pixels conductive or non-conductive, A solid-state image sensor having a first energy storage element that is in a conductive or non-conductive state with the first energy storage unit.

[0150] (2) The solid-state image sensor according to (1), wherein the first element and the first energy storage element within the pixel region are put into a first non-conductive state and the photoelectric conversion of the photoelectric conversion unit is started.

[0151] (3) The solid-state image sensor according to (2), wherein, after the end of the photoelectric conversion period of the photoelectric conversion unit, the first element which is connected to or disconnected from other photoelectric conversion units in the pixel area is set to a first conductive state.

[0152] (4) The solid-state image sensor according to (3), wherein the first energy storage element is brought into a second conduction state after being brought into a first conduction state.

[0153] (5) The solid-state image sensor according to (3), wherein, after being in the first conductive state, the first element which is in a conductive or non-conductive state with other photoelectric conversion units in the pixel region is further put into a second non-conductive state to put the first energy storage element into a third conductive state.

[0154] (6) The solid-state image sensor according to (1), wherein the accumulated charge from the photoelectric conversion of each pixel region is transferred to the corresponding first energy storage unit via each of the first elements.

[0155] (7) The solid-state image sensor according to (6), wherein the positive potential of the photoelectric conversion unit on the side to which the accumulated charge is transferred is formed to be greater than the positive potential of the photoelectric conversion unit on the side to which the accumulated charge is transferred.

[0156] (8) The photoelectric conversion unit has a photogate, and the magnitude of the positive potential of the photoelectric conversion unit is changed by the photogate, the solid-state image sensor according to (7).

[0157] (9) The solid-state image sensor according to (6), wherein the pixel has a potential adjustment element connected between the photoelectric conversion unit and the first element, and the stored charge is transferred by the potential adjustment element and the first element.

[0158] (10) The solid-state image sensor according to (2), wherein the photoelectric conversion period of the photoelectric conversion unit is controlled according to the weight value of the calculation process.

[0159] (11) The aforementioned pixel further includes a second element that discharges the accumulated charge of the photoelectric conversion unit, The solid-state image sensor according to (10), wherein the non-discharge period of the accumulated charge by the second element is controlled according to the weight value.

[0160] (12) The pixel region is changeable relative to the corresponding first energy storage unit, as described in (1).

[0161] (13) The solid-state image sensor according to (12), wherein the range of the pixel area for the first energy storage unit is changed according to the calculation range of the calculation process.

[0162] (14) The aforementioned plurality of pixels are arranged in a matrix, The solid-state image sensor according to (1), wherein the first element either makes the connection between adjacent photoelectric conversion units in a first direction conductive or non-conductive, or makes the connection between adjacent photoelectric conversion units in a second direction different from the first direction conductive or non-conductive.

[0163] (15) The solid-state image sensor according to (14), wherein the first element is a transfer transistor, one end of which is connected to the photoelectric conversion unit, and which is set to a conductive or non-conductive state by a positive voltage control signal.

[0164] (16) The solid-state image sensor according to (1), wherein the photoelectric conversion unit and the first element are formed in different layers.

[0165] (17) The first energy storage unit is a floating diffusion unit, the solid-state image sensor as described in (1).

[0166] (18) A third element electrically connected to a predetermined first element within the pixel region, A fourth element electrically connected to the first energy storage unit, A fifth element electrically connected to the third element, The solid-state image sensor according to (17), further comprising a sixth element for resetting the charge stored in the first energy storage unit.

[0167] (19) A second storage unit that stores the accumulated charge from photoelectric conversion for each pixel region, A seventh element electrically connects the first energy storage unit and the second energy storage unit, The solid-state image sensor described in (18) further comprises the following:

[0168] (20) An analog-to-digital conversion unit is electrically connected to the fifth element and converts the accumulated charge by photoelectric conversion for each pixel region into digital data, The solid-state image sensor described in (19) is further provided.

[0169] (twenty one) Each of the pixels constituting the aforementioned pixel region receives light through one of a plurality of color filters. The solid-state image sensor according to (20), wherein, before transferring the stored charge corresponding to a predetermined color filter among the plurality of color filters to the first energy storage unit, stored charges corresponding to other color filters among the plurality of color filters are discharged.

[0170] (twenty two) The photoelectric conversion unit is composed of at least one of silicon, indium gallium arsenide, and germanium organic material, as described in (21).

[0171] (twenty three) The solid-state image sensor according to (22), wherein the first to sixth elements are composed of at least one of silicon, an oxide semiconductor, and an organic semiconductor.

[0172] (twenty four) The solid-state image sensor according to (23), further comprising an accumulation control circuit that controls, in accordance with the calculation process, the resetting of the accumulated charge of each of the photoelectric conversion units, the generation of accumulated charge according to the weight value, and at least one of the pixel region and the potential shape.

[0173] (twenty five) (24) The solid-state image sensor described above, It comprises an arithmetic processing unit capable of performing convolution operations, An imaging device in which the weight values ​​and the information of the pixel region corresponding to the calculation range are supplied from the calculation processing unit.

[0174] (26) In the aforementioned processing unit, The photoelectric conversion period of the photoelectric conversion unit is controlled according to the positive weight value of the calculation process, and the first digital data generated by the analog-to-digital conversion unit after being transferred to the first energy storage unit is used with respect to the first digital data generated by the analog-to-digital conversion unit. The imaging apparatus according to (25), wherein the photoelectric conversion period of the photoelectric conversion unit is controlled according to the absolute value of the negative weight value of the calculation process, and the difference between the second digital data generated by the analog-to-digital conversion unit after being transferred to the first energy storage unit is calculated.

[0175] The aspects of this disclosure are not limited to the individual embodiments described above, but include various modifications that a person skilled in the art could conceive, and the effects of this disclosure are not limited to those described above. In other words, various additions, modifications, and partial deletions are possible, as long as they do not depart from the conceptual idea and spirit of this disclosure derived from the claims and their equivalents. [Explanation of symbols]

[0176] 100: Imaging device, 142: Processing unit, 200: Image sensor, 210: Storage control circuit, A11~A22: Addition range (pixel range) AMP: Switching element (fourth element), FD: Floating Diffusion (First Energy Storage Unit) FD2 Floating Diffusion (Second Energy Storage Unit), FG: Switching element (7th element) PD: Photoelectric conversion unit, PD11: Photoelectric conversion unit, PD12: Photoelectric conversion unit, PD13: Photoelectric conversion unit of the second pixel, PD33: Photoelectric conversion unit of the second pixel, Photo Gate 11: Photo Gate 11 Photo Gate 12: Photo Gate 12 RST: Switching element (6th element) SEL: Switching element (5th element), SW-11: Switching element, SW-12: Switching element, TR1: Switching element (first element) TR2: Switching element (first element) TR3: Switching element (second element) TRG: Switching element (third element).

Claims

1. Multiple pixel regions composed of multiple pixels, It comprises a plurality of first energy storage units corresponding to each of the aforementioned pixel regions, The plurality of first pixels within the aforementioned pixel region are: Photoelectric conversion unit, It has a first element that makes a photoelectric conversion unit adjacent to at least one of the vertical and horizontal pixels conductive or non-conductive, The second pixel within the aforementioned pixel region is Photoelectric conversion unit, A first element that makes a photoelectric conversion unit adjacent to at least one of the vertical and horizontal pixels conductive or non-conductive, The first energy storage unit comprises a first energy storage element that is in a conductive or non-conductive state, The aforementioned plurality of pixels are arranged in a matrix, The first element is a solid-state image sensor that either makes the connection between adjacent photoelectric conversion units in a first direction conductive or non-conductive, or makes the connection between adjacent photoelectric conversion units in a second direction different from the first direction conductive or non-conductive.

2. The solid-state image sensor according to claim 1, wherein the first element and the first energy storage element within the pixel region are put into a first non-conductive state and the photoelectric conversion of the photoelectric conversion unit is started.

3. The solid-state image sensor according to claim 2, wherein, after the end of the photoelectric conversion period of the photoelectric conversion unit, the first element which is connected to or disconnected from other photoelectric conversion units in the pixel region is set to a first conductive state.

4. The solid-state image sensor according to claim 3, wherein the first energy storage element is brought into a second energy storage state after being brought into a first energy storage state.

5. The solid-state image sensor according to claim 3, wherein, after being in the first conductive state, the first element of the second pixel is made non-conductive, and the first energy storage element is made to a third conductive state.

6. The solid-state image sensor according to claim 1, wherein the accumulated charge by photoelectric conversion for each pixel region is transferred to the corresponding first energy storage unit via each of the first elements.

7. The solid-state image sensor according to claim 6, wherein the positive potential of the photoelectric conversion unit on the side to which the accumulated charge is transferred is formed to be greater than the positive potential of the photoelectric conversion unit on the side to which the accumulated charge is transferred.

8. The photoelectric conversion unit has a photogate, and the magnitude of the positive potential of the photoelectric conversion unit is changed by the photogate, as described in claim 7.

9. The solid-state image sensor according to claim 6, wherein the pixel has a potential adjustment element connected between the photoelectric conversion unit and the first element, and the stored charge is transferred by the potential adjustment element and the first element.

10. The solid-state image sensor according to claim 2, wherein the photoelectric conversion period of the photoelectric conversion unit is controlled according to the weight value of the calculation process.

11. The aforementioned pixel further includes a second element that discharges the accumulated charge of the photoelectric conversion unit, The solid-state image sensor according to claim 10, wherein the non-discharge period of the accumulated charge by the second element is controlled according to the weight value.

12. The solid-state image sensor according to claim 1, wherein the pixel region is changeable relative to the corresponding first energy storage unit.

13. The solid-state image sensor according to claim 12, wherein the range of the pixel area with respect to the first energy storage unit is changed according to the calculation range of the calculation process.

14. The solid-state image sensor according to claim 1, wherein the first element is a transfer transistor, one end of which is connected to the photoelectric conversion unit, and which is set to a conductive or non-conductive state by a positive voltage control signal.

15. The solid-state image sensor according to claim 1, wherein the photoelectric conversion unit and the first element are formed in different layers.

16. The solid-state image sensor according to claim 1, wherein the first energy storage unit is a floating diffusion unit.

17. A third element electrically connected to a predetermined first element within the pixel region, A fourth element electrically connected to the first energy storage unit, A fifth element electrically connected to the third element, The solid-state image sensor according to claim 11, further comprising a sixth element for resetting the charge stored in the first energy storage unit.

18. A second storage unit that stores the accumulated charge from photoelectric conversion for each pixel region, A seventh element electrically connects the first energy storage unit and the second energy storage unit, The solid-state image sensor according to claim 17, further comprising the above.

19. An analog-to-digital conversion unit is electrically connected to the fifth element and converts the accumulated charge by photoelectric conversion for each pixel region into digital data, The solid-state image sensor according to claim 18, further comprising:

20. Each of the pixels constituting the aforementioned pixel region receives light through one of a plurality of color filters. The solid-state image sensor according to claim 19, wherein, before transferring the stored charge corresponding to a predetermined color filter among the plurality of color filters to the first energy storage unit, stored charges corresponding to other color filters among the plurality of color filters are discharged.

21. The solid-state image sensor according to claim 20, wherein the photoelectric conversion unit is composed of at least one of silicon, indium gallium arsenide, and germanium organic.

22. The solid-state image sensor according to claim 21, wherein the first to sixth elements are composed of at least one of silicon, an oxide semiconductor, and an organic semiconductor.

23. The photoelectric conversion unit stores the photocharge generated in response to transmitted light as stored charge by a well-shaped positive potential, The solid-state image sensor according to claim 22, further comprising an accumulation control circuit that controls, in accordance with the calculation process, at least one of the following: resetting the accumulated charge of the photoelectric conversion unit, generating accumulated charge according to the weight value, the pixel region, and the shape of the potential.

24. A solid-state image sensor according to claim 23, It comprises an arithmetic processing unit capable of performing convolution operations, An imaging device in which the weight values ​​and the information of the pixel region corresponding to the calculation range are supplied from the calculation processing unit.

25. In the aforementioned processing unit, The photoelectric conversion period of the photoelectric conversion unit is controlled according to the positive weight value of the calculation process, and the first digital data generated by the analog-to-digital conversion unit after being transferred to the first energy storage unit is used with respect to the first digital data generated by the analog-to-digital conversion unit. The imaging apparatus according to claim 24, wherein the photoelectric conversion period of the photoelectric conversion unit is controlled according to the absolute value of the negative weight value of the calculation process, and the difference between the second digital data generated by the analog-to-digital conversion unit after being transferred to the first energy storage unit is calculated.

Images