Semiconductor equipment

Abstract

To preferably improve reliability in a semiconductor device.SOLUTION: There is provided a semiconductor device comprising: a lead frame including an upper surface provided with a recess and a lower surface provided with a salient; a semiconductor chip fixed to the upper surface of the lead frame; a solder layer provided in the recess and fixing the semiconductor chip to the upper surface of the lead frame; and a sealing resin for sealing the semiconductor chip and the lead frame. A thickness of the solder layer is greater than a depth of the recess. The sealing resin covers at least a part of the lower surface of the lead frame. At least a part of the salient of the lead frame is exposed from the sealing resin.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] Conventionally, in a semiconductor device, a structure in which a semiconductor chip is fixed with a fixing portion such as solder on a die pad of a lead frame or the like is known (see, for example, Patent Documents 1-3). The following are related prior art documents (see Patent Documents 4-6). Patent Document 1 JP 2018-174232 A Patent Document 2 JP 2015-43380 A Patent Document 3 JP 2017-135230 A Patent Document 4 JP 2008-34601 A Patent Document 5 JP 2014-232811 A Patent Document 6 JP 11-145363 A

Summary of the Invention

Problems to be Solved by the Invention

[0003] It is preferable to improve the reliability in a semiconductor device.

Means for Solving the Problems

[0004] A first embodiment of the present invention provides a semiconductor device. The semiconductor device may include a lead frame. The lead frame may have an upper surface with a recess and a lower surface with a protrusion. The semiconductor device may include a semiconductor chip. The semiconductor chip may be fixed to the upper surface of the lead frame. The semiconductor device may include a solder layer. The solder layer may be provided in the recess. The solder layer may fix the semiconductor chip to the upper surface of the lead frame. The semiconductor device may include a sealing resin. The sealing resin may seal the semiconductor chip and the lead frame. The thickness of the solder layer may be greater than the depth of the recess. The sealing resin may cover at least a portion of the lower surface of the lead frame. At least a portion of the protrusion of the lead frame may be exposed from the sealing resin.

[0005] The depth of the recess directly below the edge of the semiconductor chip in a top view may be greater than the depth of the recess directly below the center of the semiconductor chip in a top view.

[0006] The depth of the recess directly below the corner of the semiconductor chip in a top view may be greater than the depth of the recess directly below the center of the semiconductor chip in a top view.

[0007] The corners of the recess may have a curved shape when viewed from above.

[0008] The edges of the protrusion may have irregularities when viewed from above. The edges of the protrusion may protrude toward the semiconductor chip at positions opposite to the corners of the semiconductor chip.

[0009] The semiconductor device may be provided with external terminals. The external terminals may be electrically connected to a semiconductor chip. The end edge of the protrusion may protrude toward the semiconductor chip at a position opposite the external terminal.

[0010] External terminals may have protrusions. These protrusions may be visible when viewed from above. External terminals may be positioned lower than the semiconductor chip in the height direction.

[0011] The height of the protrusion may be less than or equal to the depth of the recess.

[0012] The sealing resin may contain a filler. The filler may be provided in the area below the lead frame where no protrusions are provided.

[0013] The above summary of the invention does not enumerate all of its features. Subcombinations of these features may also constitute an invention. [Brief explanation of the drawing]

[0014] [Figure 1] This is a top view showing an example of a semiconductor device 100 according to one embodiment of the present invention. [Figure 2] This figure shows an example of a semiconductor device 100 in cross-section aa. [Figure 3] This is a bottom view showing an example of a semiconductor device 100. [Figure 4] This is a side view showing an example of an external terminal 22. [Figure 5] This is a top view showing an example of a semiconductor device 200 according to another embodiment of the present invention. [Figure 6] This figure shows an example of a semiconductor device 200 in cross-section bb. [Figure 7] This is a top view showing an example of a semiconductor device 300 according to another embodiment of the present invention. [Figure 8] This is a top view showing an example of a semiconductor device 400 according to another embodiment of the present invention. [Figure 9] This is a bottom view showing an example of a semiconductor device 400. [Figure 10] This is a top view showing an example of a semiconductor device 500 according to another embodiment of the present invention. [Figure 11] This is a bottom view showing an example of a semiconductor device 500. [Figure 12] This is a top view showing an example of a semiconductor device 600 according to another embodiment of the present invention. [Figure 13] This is a bottom view showing an example of a semiconductor device 600. [Figure 14] This is a diagram illustrating the sealing resin 10 in detail.

Best Mode for Carrying Out the Invention

[0015] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution of the invention.

[0016] In this specification, one side in the direction parallel to the thickness direction of the semiconductor chip is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of the substrate, lead frame or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction during mounting of the semiconductor device.

[0017] In this specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without indicating positive or negative, it means directions parallel to the +Z-axis and -Z-axis. In this specification, the thickness direction of the semiconductor chip is taken as the Z-axis direction, and the plane parallel to the upper surface of the semiconductor chip is taken as the XY plane. Note that the X-axis direction and the Y-axis direction are directions parallel to any end side of the upper surface of the semiconductor chip.

[0018] Figure 1 is a top view showing an example of a semiconductor device 100 according to one embodiment of the present invention. The semiconductor device 100 includes a semiconductor chip 80. The semiconductor chip 80 is a chip on which semiconductor elements such as transistors and diodes are formed on a semiconductor substrate such as silicon. The semiconductor elements may be insulated-gate bipolar transistors (IGBTs) or power semiconductor elements such as power MOSFETs. Figure 1 shows an example of the arrangement of each component in the XY plane parallel to the top surface 79 of the semiconductor chip 80. The semiconductor device 100 in this example includes one semiconductor chip 80, but the number of semiconductor chips 80 included in the semiconductor device 100 may be two or more. The semiconductor device 100 is, as an example, an intelligent power switch.

[0019] The semiconductor device 100 includes a lead frame on which a semiconductor chip 80 is fixed. In this example, the semiconductor device 100 includes a lead frame 12 on which one semiconductor chip 80 is fixed.

[0020] The lead frame 12 is made of aluminum, copper, or other metallic material. The lead frame 12 may have a plate shape. A plate shape refers to a shape in which the area of ​​each of the two opposing main surfaces (upper surface 11 and lower surface 13 (see Figure 2)) is larger than the area of ​​each side surface sandwiched between the two main surfaces.

[0021] In this example, the lead frame 12 has a protrusion 14. The protrusion 14 protrudes in the Y-axis direction when viewed from above. The protrusion 14 may be provided so as not to face the external terminal 22. The lead frame 12 does not have to have a protrusion 14.

[0022] The lead frame 12 may be electrically connected to the corresponding semiconductor chip 80. For example, the lower surface 81 (see Figure 2) of the semiconductor chip 80 and the lead frame 12 are electrically connected by a solder layer 20. Alternatively, the lead frame 12 may be electrically connected to the upper surface 79 of the corresponding semiconductor chip 80 by wires 26 or the like. Pads such as an emitter pad, collector pad, and gate pad are provided on the upper surface 79 and lower surface 81 of the semiconductor chip 80.

[0023] The external terminals 22 are terminals to which the semiconductor chip 80 is not fixed. Each external terminal 22 is provided separately from other external terminals 22. The external terminals 22 may be electrically connected to the upper surface 79 of the semiconductor chip 80. The external terminals 22 may be electrically connected to the upper surface 79 of the semiconductor chip 80 by wires 26 or the like. In this example, the external terminals 22 have protrusions 24. The protrusions 24 protrude in the Y-axis direction when viewed from above.

[0024] The semiconductor device 100 in this example includes a sealing resin 10 that seals the semiconductor chip 80 and the lead frame 12. The sealing resin 10 is, for example, an insulating material such as epoxy resin. The ends of each external terminal 22 may be exposed to the outside of the sealing resin 10. The sealing resin 10 is formed, for example, by transfer molding. By providing the sealing resin 10, the semiconductor chip 80 and the lead frame 12 can be protected. In this specification, the boundary between the sealing resin 10 and the outside is shown by a dotted line, and the inside of the sealing resin 10 is shown as transparent.

[0025] The semiconductor chip 80 is fixed to the upper surface 11 of the lead frame 12. The semiconductor chip 80 is fixed to the upper surface 11 of the lead frame 12 by a solder layer 20. The solder layer 20 may be made of a known material such as lead solder or lead-free solder. A recess 18 is provided on the upper surface 11 of the lead frame 12. The recess 18 is a region that is recessed from the upper surface 11 of the lead frame 12 toward the lower surface 13.

[0026] In a top view of the lead frame 12, taken from a direction perpendicular to the upper surface 11, the recess 18 and semiconductor chip 80 in this example have a rectangular shape. One side of the recess 18 and semiconductor chip 80 is parallel to the X-axis, and the other side is parallel to the Y-axis.

[0027] Figure 2 shows an example of a semiconductor device 100 in cross-section aa. Cross-section aa is a cross-section in the XZ plane. In this cross-section, the semiconductor device 100 comprises a sealing resin 10, a lead frame 12, a solder layer 20, external terminals 22, wires 26, and a semiconductor chip 80. Note that the entire wire 26 is shown projected onto the XZ plane.

[0028] The lead frame 12 has a recess 18 and a protrusion 30. The recess 18 is a region recessed on the upper surface 11 of the lead frame 12 toward the lower surface 13. The protrusion 30 is provided on the lower surface 13 of the lead frame 12 opposite to the upper surface 11, at a position opposite to the recess 18. The protrusion 30 protrudes below the lower surface 13 of the lead frame 12 on the lower surface 13 opposite to the upper surface 11. The recess 18 and the protrusion 30 are provided by half-cutting the lead frame 12.

[0029] When the lead frame 12 is half-punched, the shape of the recess 18 can be controlled by the shape of the pressing member. Furthermore, the shape of the protrusion 30 can also be controlled by placing a die corresponding to the shape of the protrusion 30 to be formed on the lower surface 13 side of the lead frame 12. If no die is placed on the lower surface 13 side of the lead frame 12, the shape of the protrusion 30 will be substantially the same as the shape of the recess 18. In this specification, since the recess 18 and the protrusion 30 are provided without placing a die on the lower surface 13 side of the lead frame 12, the shape of the protrusion 30 and the shape of the recess 18 are substantially the same.

[0030] The statement that the recess 18 and the protrusion 30 are facing each other means that, in a top view taken from a direction perpendicular to the upper surface 11 of the lead frame 12, at least a part of the area where the recess 18 is provided and at least a part of the area where the protrusion 30 is provided overlap. More than half of the area where the protrusion 30 is provided may overlap with the area where the recess 18 is provided, or the entire area where the protrusion 30 is provided may overlap with the area where the recess 18 is provided. Alternatively, more than half of the area where the recess 18 is provided may overlap with the area where the protrusion 30 is provided, or the entire area where the recess 18 is provided may overlap with the area where the protrusion 30 is provided. Furthermore, the area where the recess 18 is provided and the area where the protrusion 30 is provided may coincide. In this specification, the area where the recess 18 is provided and the area where the protrusion 30 is provided substantially coincide in a top view.

[0031] A solder layer 20 is provided in the recess 18. In Figure 2, the solder layer 20 is provided on the bottom surface of the recess 18. The solder layer 20 may be provided over the entire bottom surface of the recess 18. The bottom surface of the recess 18 may refer to the inner surface of the recess 18 that is parallel to the bottom surface 81 of the semiconductor chip 80. The bottom surface 81 of the semiconductor chip 80 is fixed to the bottom surface of the recess 18 by the solder layer 20.

[0032] By providing a solder layer 20 inside the recess 18, the spread of the solder layer 20 can be stopped inside the recess 18. Therefore, the thickness of the solder layer 20 can be increased in the semiconductor device 100. Increasing the thickness of the solder layer 20 does not require increasing the size of the lead frame 12, making it possible to miniaturize the semiconductor device 100. In this specification, thickness refers to the difference in height between the top surface and the bottom surface in the Z-axis direction.

[0033] Furthermore, by providing a solder layer 20 inside the recess 18, it is possible to reduce variations in the thickness of the solder layer 20. Reducing variations in the thickness of the solder layer 20 reduces the tilt of the semiconductor chip 80, thereby reducing connection failures with the wire 26. As a result, the reliability of the semiconductor device 100 can be improved.

[0034] By providing a recess 18 in the lead frame 12, the sealing resin 10 is filled into the recess 18. Therefore, deformation of the sealing resin 10 during changes in temperature can be suppressed. Consequently, reliability during changes in temperature can be improved. Thus, the semiconductor device 100 can improve its reliability resistance to changes in temperature.

[0035] In this example, the thickness T1 of the solder layer 20 is greater than the depth D1 of the recess 18. The thickness T1 of the solder layer 20 may be the maximum thickness of the solder layer 20. The depth D1 of the recess 18 may be the maximum depth of the recess 18. Therefore, at least a portion of the solder layer 20 is provided above the lead frame 12 in the height direction (Z-axis direction). As a result, the entire semiconductor chip 80 can be provided above the lead frame 12 in the height direction, making the entire semiconductor chip 80 easier to see. This makes visual inspection easier, and makes it easier to detect defects in appearance through visual inspection.

[0036] Let T2 be the thickness of the lead frame 12 in the area where the protrusion 30 is not provided. For example, the thickness T2 of the lead frame 12 is 0.25 mm or less. Also, let T2 be the thickness of the lead frame 12 in the area where the protrusion 30 is provided. For example, the thickness T3 of the lead frame 12 is 0.25 mm or less. The thickness T2 and the thickness T3 of the lead frame 12 may be the same. Having the same depth and height includes cases where there is an error of 10% or less. The depth D1 of the recess 18 may be 0.125 mm or less. The thickness T1 of the solder layer 20 may be 0.15 mm or more. The thickness T1 of the solder layer 20 may be 0.20 mm or less.

[0037] In this example, the sealing resin 10 covers at least a portion of the lower surface 13 of the lead frame 12. The sealing resin 10 covers the lower surface 13 of the lead frame 12 where the protrusions 30 are not provided. In Figure 2, the sealing resin 10 covers the outer periphery of the lower surface 13 of the lead frame 12. The outer periphery of the lower surface 13 of the lead frame 12 is the outermost part of the lower surface 13 of the lead frame 12 when viewed from above. Therefore, the sealing resin 10 can be provided near the outer periphery of the lower surface 13 of the lead frame 12, preventing the sealing resin 10 from peeling off from the semiconductor chip 80 or solder layer 20 due to mold lock. The sealing resin 10 can be provided near the outer periphery of the lower surface 13 of the lead frame 12, reducing defects such as cracks caused by stress concentration near the outer periphery of the lower surface 13 of the lead frame 12.

[0038] In this example, at least a portion of the lower surface 13 of the lead frame 12 is exposed from the sealing resin 10. In Figure 2, at least a portion of the protrusion 30 of the lead frame 12 is exposed from the sealing resin 10. Because at least a portion is exposed from the sealing resin 10, heat can be efficiently dissipated from the semiconductor chip 80. Therefore, the semiconductor device 100 can improve its reliability resistance to changes in temperature.

[0039] Furthermore, the external terminals 22 are positioned lower than the semiconductor chip 80 in the height direction. This allows for a larger solder layer thickness, enabling the semiconductor chip 80 to be positioned higher than the external terminals 22. Consequently, the semiconductor chip 80 becomes easier to inspect visually, and defects can be more easily detected through visual inspection. In other words, the height T4 of the external terminals 22 can be less than the sum of the thickness T3 of the lead frame 12 and the thickness T1 of the solder layer 20.

[0040] The height H1 of the protrusion 30 may be less than or equal to the depth D1 of the recess 18. The height H1 of the protrusion 30 refers to the height in the height direction (Z-axis direction) from the lower surface 13 of the lead frame 12 to the lower end of the protrusion 30. Therefore, the height H1 of the protrusion 30 may be 0.125 mm or less. Alternatively, the height H1 of the protrusion 30 may be greater than or equal to the depth D1 of the recess 18. The height H1 of the protrusion 30 may also be the same as the depth D1 of the recess 18. Since the recess 18 and the protrusion 30 are formed by half-cutting, the height H1 of the protrusion 30 and the depth D1 of the recess 18 can be controlled by appropriately changing the pressing member and the mold corresponding to the shape of the protrusion 30 to be formed.

[0041] Figure 3 is a bottom view showing an example of a semiconductor device 100. Figure 3 shows an example of the arrangement of each component in the XY plane. Unlike Figure 1, Figure 3 shows the arrangement of the protrusions 30. In this example, the shape of the protrusions 30 is the same as the shape of the recesses 18 in Figure 1.

[0042] Figure 4 is a side view showing an example of an external terminal 22. As shown in Figure 4, a sealing resin 10 can be provided below the protruding portion 24 of the external terminal 22. Therefore, deformation of the external terminal 22 can be suppressed. As a result, defects such as cracks caused by stress concentration in the external terminal 22 can be reduced.

[0043] Figure 5 is a top view showing an example of a semiconductor device 200 according to another embodiment of the present invention. Figure 6 is a diagram showing an example of a semiconductor device 200 in cross-section bb. The semiconductor device 200 differs from the semiconductor device 100 in that the recess 18 has a groove 32. The other configurations of the semiconductor device 200 may be the same as those of the semiconductor device 100. In Figure 5, the groove 32 is shown by a dotted line.

[0044] The recess 18 has a groove 32. The groove 32 is the deeper part of the recess 18. In Figure 6, the groove 32 is located directly below the ends 82 and 83 of the semiconductor chip 80. The end 82 of the semiconductor chip 80 is the end in the X-axis direction. The end 83 of the semiconductor chip 80 is the end in the Y-axis direction. Stress tends to concentrate in the solder layer 20 at the ends 82 and 83 of the semiconductor chip 80. By providing the groove 32 directly below the ends 82 and 83 of the semiconductor chip 80, the thickness of the solder layer 20 near the ends 82 and 83 of the semiconductor chip 80 can be increased, and defects such as cracks in the solder layer 20 due to stress concentration can be reduced.

[0045] In the example shown in Figure 5, the groove 32 is provided near the ends 82 and 83 of the semiconductor chip 80. In this example, the groove 32 overlaps with the ends 82 and 83 of the semiconductor chip 80 in a top view. The groove 32 is not provided near the center 84 of the semiconductor chip 80. The center 84 of the semiconductor chip 80 is the center of the semiconductor chip 80 in the XY plane. In other words, the depth of the recess 18 directly below the end 82 (or end 83) of the semiconductor chip 80 in a top view is greater than the depth of the recess 18 directly below the center 84 of the semiconductor chip 80 in a top view.

[0046] Figure 7 is a top view showing an example of a semiconductor device 300 according to another embodiment of the present invention. The semiconductor device 300 in Figure 7 differs from the semiconductor device 200 in Figure 5 in the configuration of the groove 32. The other configurations of the semiconductor device 300 may be the same as those of the semiconductor device 200. In Figure 7, the groove 32 is shown by a dotted line.

[0047] In the example shown in Figure 7, the groove 32 is provided only near the corner 86 of the semiconductor chip 80. The corner 86 of the semiconductor chip 80 is the part where the end 82 in the X-axis direction of the semiconductor chip 80 and the end 83 in the Y-axis direction of the semiconductor chip 80 connect. In Figure 7 as well, the groove 32 is not provided near the center 84 of the semiconductor chip 80. In other words, the depth of the recess 18 directly below the corner 86 of the semiconductor chip 80 in a top view is greater than the depth of the recess 18 directly below the center 84 of the semiconductor chip 80 in a top view. By providing the groove 32 only near the corner 86, the lead frame 12 can be easily processed, and defects in the solder layer 20 due to stress concentration can be reduced.

[0048] Figure 8 is a top view showing an example of a semiconductor device 400 according to another embodiment of the present invention. The semiconductor device 400 in Figure 8 differs from the semiconductor device 100 in Figure 1 in that the corner 66 of the recess 18 has a curve when viewed from above. The other configurations of the semiconductor device 400 in Figure 8 may be the same as those of the semiconductor device 100 in Figure 1. The corner 66 of the recess 18 is the part where the edge 62 in the X-axis direction of the recess 18 and the edge 63 in the Y-axis direction of the recess 18 connect. Although not shown in Figure 8, the edges 72, 73, and corner 76 of the protrusion 30 may substantially coincide with the edges 62, 63, and corner 66 of the recess 18.

[0049] Figure 9 is a bottom view showing an example of a semiconductor device 400. The semiconductor device 400 in Figure 9 differs from the semiconductor device 100 in Figure 3 in that the corner 76 of the protrusion 30 has a curve when viewed from below. The other configurations of the semiconductor device 400 in Figure 9 may be the same as those of the semiconductor device 100 in Figure 3. The corner 76 of the protrusion 30 is the part where the end 72 in the X-axis direction of the protrusion 30 and the end 73 in the Y-axis direction of the protrusion 30 connect. Although not shown in Figure 9, the ends 62, 63, and corner 66 of the recess 18 may be approximately the same as the ends 72, 73, and corner 76 of the protrusion 30.

[0050] Because the corner 66 of the recess 18 is curved, the corner 76 of the protrusion 30 is also curved. Since the corner 76 of the protrusion 30 is curved, more sealing resin 10 can be provided near the corner 76 of the protrusion 30, which can suppress deformation of the lead frame 12. Therefore, defects due to stress concentration in the lead frame 12 can be reduced.

[0051] In Figure 8, the lines extending from the ends 82 and 83 of the semiconductor chip 80 are shown as dotted lines. To efficiently dissipate heat from the semiconductor chip 80, it is preferable that the semiconductor chip 80 and the sealing resin 10 on the lower surface 13 of the lead frame 12 be as far apart as possible when viewed from above. Therefore, it is preferable that the corners 66 of the recess 18 are not provided on the lines extending from the ends 82 and 83 of the semiconductor chip 80.

[0052] Figure 10 is a top view showing an example of a semiconductor device 500 according to another embodiment of the present invention. The semiconductor device 500 in Figure 10 differs from the semiconductor device 100 in Figure 1 in that the edge 62 of the recess 18 has an uneven surface when viewed from above. The other configurations of the semiconductor device 500 in Figure 10 may be the same as those of the semiconductor device 100 in Figure 1. Although not shown in Figure 10, the edges 72 and 73 of the protrusion 30 may substantially coincide with the edges 62 and 63 of the recess 18.

[0053] Figure 11 is a bottom view showing an example of a semiconductor device 500. The semiconductor device 500 in Figure 11 differs from the semiconductor device 100 in Figure 3 in that the edge 72 of the protrusion 30 has an uneven surface when viewed from below. The other configurations of the semiconductor device 500 in Figure 11 may be the same as those of the semiconductor device 100 in Figure 3. Although not shown in Figure 11, the edges 62 and 63 of the recess 18 may be approximately the same as the edges 72 and 73 of the protrusion 30. In Figure 11, the arrangement of the semiconductor chip 80 is shown by a dotted line.

[0054] In this example, the edges 62 of the recess 18 and 72 of the protrusion 30 have an uneven surface. In Figures 10 and 11, the edges 62 of the recess 18 and 72 of the protrusion 30 have a wave-like shape. That is, the edges 62 of the recess 18 and 72 of the protrusion 30 have a portion that protrudes in the X-axis direction and a portion that is recessed in the X-axis direction. The uneven surface of the edges 62 of the recess 18 and 72 of the protrusion 30 allows for adjustment of the amount of sealing resin 10 near the edges 62 of the recess 18 and 72 of the protrusion 30.

[0055] In this example, the edges 62 of the recess 18 and 72 of the protrusion 30 protrude toward the semiconductor chip 80 at a position opposite to the corner 86 of the semiconductor chip 80. Opposite to the corner 86 of the semiconductor chip 80 means that it is located at the same position as the corner 86 of the semiconductor chip 80 in the Y-axis direction. By making the edges 62 of the recess 18 and 72 of the protrusion 30 protrude toward the semiconductor chip 80 near the corner 86 of the semiconductor chip 80, a larger amount of sealing resin 10 can be provided near the corner 86 of the semiconductor chip 80.

[0056] Figure 12 is a top view showing an example of a semiconductor device 600 according to another embodiment of the present invention. The semiconductor device 600 in Figure 12 differs from the semiconductor device 100 in Figure 1 in that the edge 62 of the recess 18 has irregularities when viewed from above. The other configurations of the semiconductor device 600 in Figure 12 may be the same as those of the semiconductor device 100 in Figure 1. Although not shown in Figure 12, the edges 72 and 73 of the protrusion 30 may substantially coincide with the edges 62 and 63 of the recess 18.

[0057] Figure 13 is a bottom view showing an example of a semiconductor device 600. The semiconductor device 600 in Figure 13 differs from the semiconductor device 100 in Figure 3 in that the edges 72 of the protrusion 30 have irregularities when viewed from below. The other configurations of the semiconductor device 600 in Figure 13 may be the same as those of the semiconductor device 100 in Figure 3. Although not shown in Figure 13, the edges 62 and 63 of the recess 18 may substantially coincide with the edges 72 and 73 of the protrusion 30. In Figure 13, the arrangement of semiconductor chips 80 is shown by dotted lines.

[0058] In this example as well, the edges 62 of the recess 18 and 72 of the protrusion 30 have irregularities. In Figures 12 and 13, the edges 62 of the recess 18 and 72 of the protrusion 30 protrude toward the semiconductor chip 80 at a position facing the external terminal 22. Facing the external terminal 22 means that in the Y-axis direction, they are located at the same position as at least a part of the external terminal 22. By making the edges 62 of the recess 18 and 72 of the protrusion 30 protrude toward the semiconductor chip 80 at a position facing the external terminal 22, a larger amount of sealing resin 10 can be provided near the position facing the external terminal 22.

[0059] Figure 14 is a diagram illustrating the sealing resin 10 in detail. In Figure 14, the semiconductor device 100 comprises the sealing resin 10, a lead frame 12, and a solder layer 20.

[0060] The sealing resin 10 contains a filler 70. The filler is a so-called filler. By containing the filler 70, the thermal properties of the sealing resin 10 can be controlled. For example, by containing a predetermined amount or more of the filler 70 in the sealing resin 10, the glass transition temperature of the entire sealing resin 10 can be increased, thereby improving its heat resistance. The filler 70 is, as an example, an inorganic filler such as silica filler containing SiO2. The filler 70 may occupy more than half of the total volume of the sealing resin 10.

[0061] As shown in Figure 14, the filler 70 has various particle sizes d1. The particle size d1 of the filler 70 is, for example, 75 μm or less. The maximum particle size of the filler 70 may be 75 μm or less. The maximum particle size of the filler 70 being 75 μm or less means that when the particle size d1 of the filler 70 is measured, the mean value of the measured values ​​is μ and the standard deviation is σ, and μ + 3σ is 75 μm or less.

[0062] Furthermore, in Figure 14, filler 70 is provided in the area below the lead frame 12 where the protrusions 30 are not provided. By providing filler 70 in the area where the protrusions 30 are not provided, the filler 70 can be uniformly distributed throughout the entire sealing resin 10. Therefore, the properties of the sealing resin 10, such as its thermal properties, can be made uniform. The height H1 of the protrusions 30 may be greater than the particle size d1 of the filler 70. The height H1 of the protrusions 30 being greater than the particle size d1 of the filler 70 means that when the average value of the measured values ​​of the particle size d1 of the filler 70 is taken as μ and the standard deviation as σ, μ + 3σ may be less than the height H1 of the protrusions 30.

[0063] Furthermore, it is preferable that the filler 70 is provided below the protruding portion 24 as described in Figure 4. By providing the filler 70 below the protruding portion 24, the filler 70 can be uniformly distributed throughout the entire sealing resin 10. As a result, the properties of the sealing resin 10, such as its thermal properties, can be made uniform.

[0064] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications or improvements can be made to the above embodiments. It will be clear from the claims that such modified or improved forms may also be included in the technical scope of the present invention. [Explanation of Symbols]

[0065] 10...Sealing resin, 11...Top surface, 12...Lead frame, 13...Bottom surface, 14...Protrusion, 18...Recess, 20...Solder layer, 22...External terminal, 24...Protrusion, 26...Wire, 30...Convex part, 32...Groove part, 62...Edge, 63...Edge, 66...Corner, 70...Filler, 72...Edge, 73...Edge, 76...Corner, 79...Top surface, 80...Semiconductor chip, 81...Bottom surface, 82...End, 83...End, 84...Center, 86...Corner, 100...Semiconductor device, 200...Semiconductor device, 300...Semiconductor device, 400...Semiconductor device, 500...Semiconductor device, 600...Semiconductor device

Claims

1. A lead frame having an upper surface with a recess and a lower surface with a protrusion, A semiconductor chip fixed to the upper surface of the lead frame, A solder layer provided in the recess, in contact with the bottom surface of the recess, and fixing the semiconductor chip to the upper surface of the lead frame, A sealing resin that seals the semiconductor chip and the lead frame Equipped with, The thickness of the solder layer is greater than the depth of the recess. The sealing resin covers at least a portion of the lower surface of the lead frame, At least a portion of the protrusion of the lead frame is exposed from the sealing resin. In a top view, the entire semiconductor chip is positioned overlapping the recess. The depth of the recess directly below the edge of the semiconductor chip in a top view is greater than the depth of the recess directly below the center of the semiconductor chip in a top view. Semiconductor equipment.

2. The depth of the recess directly below the corner of the semiconductor chip in a top view is greater than the depth of the recess directly below the center of the semiconductor chip in a top view. The semiconductor device according to claim 1.

3. The corners of the recess have curves when viewed from above. The semiconductor device according to claim 1 or 2.

4. The edges of the convex portion, when viewed from above, have an uneven surface. The semiconductor device according to claim 1.

5. The end edge of the convex portion protrudes toward the semiconductor chip at a position opposite to the corner of the semiconductor chip. The semiconductor device according to claim 4.

6. The semiconductor chip is further equipped with an external terminal that is electrically connected to the aforementioned semiconductor chip. The end edge of the aforementioned protrusion protrudes toward the semiconductor chip at a position opposite to the external terminal. The semiconductor device according to claim 4 or 5.

7. The semiconductor chip is further provided with an external terminal for connection, The external terminal has a protruding portion that protrudes when viewed from above. The semiconductor device according to any one of claims 1 to 6.

8. The external terminal is located at a lower position than the semiconductor chip in the height direction. The semiconductor device according to claim 7.

9. The height of the protrusion is less than or equal to the depth of the recess. The semiconductor device according to any one of claims 1 to 8.

10. A lead frame having an upper surface with a recess and a lower surface with a protrusion, A semiconductor chip fixed to the upper surface of the lead frame, A solder layer provided in the recess, in contact with the bottom surface of the recess, and fixing the semiconductor chip to the upper surface of the lead frame, A sealing resin that seals the semiconductor chip and the lead frame Equipped with, The thickness of the solder layer is greater than the depth of the recess. The sealing resin covers at least a portion of the lower surface of the lead frame, At least a portion of the protrusion of the lead frame is exposed from the sealing resin. In a top view, the entire semiconductor chip is positioned overlapping the recess. The sealing resin has a filler, The filler is provided in a region below the lead frame where the protrusion is not provided. Semiconductor equipment.

11. The solder layer is in contact with the side surface of the recess. The semiconductor device according to any one of claims 1 to 10.

12. The solder layer is provided over the entire bottom surface of the recess. The semiconductor device according to any one of claims 1 to 11.

13. A lead frame having an upper surface with a recess and a lower surface with a protrusion, A semiconductor chip fixed to the upper surface of the lead frame, A solder layer provided in the recess, in contact with the bottom surface of the recess, and fixing the semiconductor chip to the upper surface of the lead frame, A sealing resin that seals the semiconductor chip and the lead frame Equipped with, The thickness of the solder layer is greater than the depth of the recess. The sealing resin covers at least a portion of the lower surface of the lead frame, At least a portion of the protrusion of the lead frame is exposed from the sealing resin. In a top view, the entire semiconductor chip is positioned overlapping the recess. In a top view, the entire region where the protrusion is provided overlaps with the region where the recess is provided. Semiconductor equipment.

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