Semiconductor device and method for manufacturing the same

Abstract

An SiC substrate (10) is doped with vanadium. A high electron mobility transistor (20) is formed on the SiC substrate (10). The SiC substrate (10) includes a first substrate (1) and a second substrate (2) formed on the first substrate (1). The vanadium concentration of the first substrate (1) is 1×1018cm-3 or more. The vanadium concentration of the second substrate (2) at an interface between the second substrate (2) and the high electron mobility transistor (20) is 1×1017cm-3 or less.

Description

[Technical Field]

[0001] This disclosure relates to semiconductor devices and methods for manufacturing the same. [Background technology]

[0002] In high-electron-mobility transistors (HEMTs), SiC substrates are used that have defects introduced by doping with dopants such as vanadium to provide semi-insulating properties (see, for example, Patent Document 1). [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japan Special Publication No. 2022-519825 [Overview of the project] [Problems that the invention aims to solve]

[0004] In the HEMT manufacturing process, after depositing a semiconductor layer on a substrate, the amount of substrate warping is small when the substrate thickness is large. However, when the substrate is thinned, the amount of substrate warping increases to an unsuitable level. Doping the SiC substrate with vanadium improves the elastic modulus, thus reducing the amount of substrate warping. However, there was a problem that increasing the vanadium concentration would create a current collapse source.

[0005] This disclosure was made to solve the problems described above, and its purpose is to obtain a semiconductor device and a method for manufacturing the same that can suppress current collapse while reducing the amount of warping of the substrate. [Means for solving the problem]

[0006] The semiconductor device according to the present disclosure includes a vanadium-doped SiC substrate and a high electron mobility transistor formed on the SiC substrate. The SiC substrate has a first substrate and a second substrate formed on the first substrate. The vanadium concentration of the first substrate is 1×10 18 cm -3 or more, and the vanadium concentration of the second substrate at the interface between the second substrate and the high electron mobility transistor is 1×10 17 cm -3 or less, which is characterized.

Effects of the Invention

[0007] In the present disclosure, the vanadium concentration of the second substrate at the interface between the second substrate and the high electron mobility transistor is set to 1×10 17 cm -3 or less. Thereby, current collapse can be suppressed. Further, although the vanadium concentration of the second substrate on the high electron mobility transistor side is decreased, the vanadium concentration of the first substrate is set to 1×10 18 cm -3 or more, whereby the amount of warping of the substrate can be reduced.

Brief Description of the Drawings

[0008] [Figure 1] It is a cross-sectional view showing a semiconductor device according to Embodiment 1. [Figure 2] It is a diagram showing the vanadium concentration of the SiC substrate according to Embodiment 1. [Figure 3] It is a diagram showing the vanadium concentration of the SiC substrate according to Embodiment 2. [Figure 4] It is a diagram comparing the substrate warping and current collapse between Embodiment 1 and Embodiment 2.

Modes for Carrying Out the Invention

[0009] A semiconductor device according to an embodiment and a method for manufacturing the same will be described with reference to the drawings. The same or corresponding components may be denoted by the same reference numerals, and the repeated description may be omitted.

[0010] Embodiment 1. FIG. 1 is a cross-sectional view showing a semiconductor device according to Embodiment 1. The SiC substrate 10 is doped with vanadium. A GaN-HEMT 20, which is a high electron mobility transistor, is formed on the SiC substrate 10. The SiC substrate 10 has a first substrate 1 and a second substrate 2 formed on the first substrate 1.

[0011] The GaN-HEMT 20 has a nucleation layer 3, a high-resistance layer 4, a channel layer 5, and an electron supply layer 6 stacked in order on the second substrate 2. The nucleation layer 3 is made of Al x1 Ga y1 In 1-x1-y1 N (0 ≤ x1, y1 ≤ 1) and has a thickness of 5 to 100 nm. The high-resistance layer 4 is made of Al x2 Ga y2 In 1-x2-y2 N (0 ≤ x2, y2 ≤ 1) and has a thickness of 100 to 1000 nm. Fe, C, Mn, etc. are added to the high-resistance layer 4. The impurity concentration of the high-resistance layer 4 is 1E+17 to 1E+19 cm -3 . The channel layer 5 is made of Al x3 fGa y3 In 1-x3-y3 N (0 ≤ x3, y3 ≤ 1) and has a thickness of 100 to 1000 nm. The electron supply layer 6 is made of Al x4 Ga y4 In 1-x4-y4 N (0 ≤ x4, y4 ≤ 1) and has a thickness of 1 to 50 nm. A gate electrode 7, a source electrode 8, and a drain electrode 9 are formed on the electron supply layer 6.

[0012] Next, a method for manufacturing a semiconductor device according to Embodiment 1 will be described. A first substrate 1 is manufactured by sublimation. Next, a second substrate 2 is manufactured on the first substrate 1 by CVD. In the CVD method, SiCl4, SiH4, SiH3Cl, SiH2Cl2, SiHCl3, Si2H6, Si3H8, SiH3(CH3), SiCl3(CH3), etc. are used as silicon sources, CH4, C3H8, etc. are used as carbon sources, VCl3, V[N(CH3)2]4, etc. are used as vanadium sources, and N2, H2, Ar, He, etc. are used as carrier gases. The pressure is 5 to 100 kPa and the temperature is 1000 to 1800°C.

[0013] Next, a nucleation layer 3, a channel layer 5, and an electron supply layer 6 are stacked in order on the second substrate 2, and a gate electrode 7, a source electrode 8, and a drain electrode 9 are formed on the electron supply layer 6 to form a GaN-HEMT 20. After forming the GaN-HEMT 20, the first substrate 1 in wafer form is ground and polished from the back side to thin it. Then the wafer is divided into chips.

[0014] The thickness of the first substrate 1 is 300-500 μm before thinning and 10-50 μm after thinning. The thickness of the second substrate 2 is 10-50 μm. Therefore, the total film thickness of the SiC substrate 10 before thinning is 310-550 μm; thinner than this is prone to warping during the process, and thicker is costly. The total film thickness of the SiC substrate 10 after thinning is 20-100 μm.

[0015] Figure 2 shows the vanadium concentration of the SiC substrate according to Embodiment 1. The vanadium concentration of the first substrate 1 is 1 × 10⁻⁶. 18 cm -3 From 1 x 10 19 cm -3 It remains constant. On the other hand, the vanadium concentration of the second substrate 2 ranges from 0 to 1 × 10⁻⁶. 17 cm -3 It remains constant. Thus, although the vanadium concentration of the SiC substrate 10 changes in the thickness direction, the average vanadium concentration of the SiC substrate 10 is 1 × 10⁻⁶. 17 ~1 × 10 19 cm -3 That is the case.

[0016] The amount of warpage h of a wafer in which a semiconductor layer has been epitaxially grown on a substrate is given by the following formula.

number

[0017] Since the bond strength between vanadium and carbon is stronger than that between silicon and carbon, doping with vanadium increases the elastic modulus of the SiC substrate 10. Table 1 shows the results of theoretical calculations of the vanadium concentration and warpage of the semiconductor device substrate according to Embodiment 1 after thinning. The vanadium concentration of the first substrate 1 is 1 × 10⁻⁶. 18 cm -3 As a result of the above, it can be seen that the amount of warping of the substrate is reduced. [Table 1]

[0018] As described above, in this embodiment, the vanadium concentration of the second substrate 2 at the interface between the second substrate 2 and the GaN-HEMT20 is set to 1 × 10⁻⁶. 17 cm -3 The following is done. This will suppress current collapse. The vanadium concentration of the second substrate 2 at the interface is set to 1 × 10⁻⁶. 16 cm -3 The following steps can further suppress current collapse.

[0019] Furthermore, the vanadium concentration of the second substrate 2 on the GaN-HEMT20 side is reduced, but the vanadium concentration of the first substrate 1 is reduced to 1 × 10⁻⁶. 18 cm -3 By doing so, the average vanadium concentration of the entire SiC substrate 10 is 1 × 10⁻⁶. 17 ~1 × 10 19 cm -3This can be done. This reduces the amount of warping of the substrate.

[0020] Furthermore, by manufacturing the second substrate 2 on the GaN-HEMT20 side using the CVD method, defects such as through-dislocations in the epitaxial layer of the second substrate 2 and the GaN-HEMT20 formed thereon can be suppressed.

[0021] Embodiment 2. The semiconductor device according to Embodiment 2 differs from Embodiment 1 in how the vanadium concentration of the SiC substrate 10 changes in the thickness direction. Figure 3 is a diagram showing the vanadium concentration of the SiC substrate according to Embodiment 2. The vanadium concentration of the first substrate 1 is 1 × 10⁻¹⁶, similar to Embodiment 1. 18 cm -3 From 1 x 10 19 cm -3 It remains constant. On the other hand, the vanadium concentration of the second substrate 2 is equivalent to that of the first substrate 1 at the interface between the first substrate 1 and the second substrate 2, and decreases continuously toward GaN-HEMT20. The change in the vanadium concentration of the second substrate 2 is not limited to a linear change like pattern A, but may also change curvilinearly like patterns B and C. Pattern B shows improved substrate warping compared to pattern A, and pattern C shows improved current collapse compared to pattern A. The second substrate 2 is manufactured by the CVD method while reducing the vanadium source gas.

[0022] Table 2 shows the results of theoretical calculations regarding the vanadium concentration and warpage of the semiconductor device substrate according to Embodiment 2 after thinning. [Table 2]

[0023] Similar to Embodiment 1, the vanadium concentration of the second substrate 2 at the interface between the second substrate 2 and the GaN-HEMT20 is set to 1 × 10⁻⁶. 17 cm -3 The following will be done. This will suppress current collapse. Also, the vanadium concentration of the first substrate 1 will be 1 × 10 18 cm-3 By doing so, the average vanadium concentration of the SiC substrate 10 is 1 × 10⁻⁶. 17 ~1 × 10 19 cm -3 This can be done. This reduces the amount of warping of the substrate.

[0024] Figure 4 compares the substrate warpage and current collapse of Embodiment 1 and Embodiment 2. When attempting to obtain the same current collapse, the average vanadium concentration of the Si substrate is higher in Embodiment 2 than in Embodiment 1. Therefore, substrate warpage can be reduced in Embodiment 2.

[0025] Furthermore, in Embodiment 2, since the vanadium concentration of the second substrate 2 is continuously changed, defects in the epitaxial layer of the second substrate 2 and the GaN-HEMT 20 can be reduced compared to Embodiment 1.

[0026] Since the polytypes of commonly used SiC substrates are 4H-SiC or 6H-SiC, in Embodiments 1 and 2, considering cost, the polytype of the first substrate 1 is set to 4H-SiC or 6H-SiC. On the other hand, it is preferable to set the polytype of the second substrate 2 on the GaN-HEMT side to 3C-SiC, which has high thermal conductivity. This improves heat dissipation. 3C-SiC can be manufactured by changing CVD conditions such as adjusting the carrier gas flow rate or lowering the growth temperature. [Explanation of Symbols]

[0027] 1. First substrate, 2. Second substrate, 3. Nucleation layer, 4. Resistivity layer, 5. Channel layer, 6. Electron supply layer, 7. Guard electrode, 8. Source electrode, 9. Drain electrode, 10. SiC substrate, 20. GaN-HEMT (High Electron Mobility Transistor)

Claims

1. A vanadium-doped SiC substrate, The system comprises a high electron mobility transistor formed on the SiC substrate, The SiC substrate comprises a first substrate and a second substrate formed on the first substrate. The vanadium concentration of the first substrate is 1 × 10⁻⁶. １８ cm －３ That's all. The vanadium concentration of the second substrate at the interface between the second substrate and the high electron mobility transistor is 1 × 10⁻⁶ １７ cm －３ A semiconductor device characterized by the following:

2. The vanadium concentration of the second substrate at the interface between the second substrate and the high electron mobility transistor is 1 × 10⁻⁶ １６ cm －３ The semiconductor device according to claim 1, characterized in that it is as follows.

3. The average vanadium concentration of the SiC substrate is 1×10 １７ to 1×10 １９ cm －３ The semiconductor device according to claim 1 or 2, characterized in that it is such.

4. The vanadium concentration of the first substrate is 1 × 10⁻⁶. １８ ~1 x 10 １９ cm －３ The semiconductor device according to claim 1 or 2, characterized in that it is the same as the semiconductor device according to claim 1 or 2.

5. The semiconductor device according to claim 1 or 2, characterized in that the vanadium concentration of the second substrate is equivalent to that of the first substrate at the interface between the first substrate and the second substrate, and decreases continuously toward the high electron mobility transistor.

6. The polytype of the first substrate is 4H-SiC or 6H-SiC. The semiconductor device according to claim 1 or 2, characterized in that the polytype of the second substrate is 3C-SiC.

7. A method for manufacturing a semiconductor device according to claim 1 or 2, A method for manufacturing a semiconductor device, characterized in that the second substrate is manufactured by a CVD method.

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