Imaging device and electronic equipment

Abstract

An imaging device according to one embodiment of the present disclosure comprises: a semiconductor substrate that has opposing first and second surfaces, and that has a plurality of photoelectric conversion units in which a plurality of pixels are arranged in matrix form, and a charge corresponding to the amount of received light is generated by photoelectric conversion for each pixel; a first separation unit that is provided between adjacent pixels, and that electrically and optically separates the adjacent pixels; a second separation unit that is provided between adjacent photoelectric conversion units within a pixel, and that electrically separates adjacent photoelectric conversion units; and an electrode layer provided straddling adjacent photoelectric conversion units at the first surface side of the semiconductor substrate.

Description

[Technical Field]

[0001] This disclosure relates, for example, to an imaging device capable of acquiring imaging information and parallax information, and to an electronic device equipped therewith. [Background technology]

[0002] For example, Patent Document 1 discloses a solid-state imaging device comprising a pixel array section in which multiple pixels, including pixels on which multiple photoelectric conversion elements are formed on a single on-chip lens, are arranged in a two-dimensional array, wherein at least one of the inter-pixel separation section and the inter-pixel light-shielding section formed between the pixels has a portion that protrudes toward the center of the pixel, forming a projection. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2018-201015 [Overview of the project]

[0004] By the way, there is a need to improve the imaging performance of imaging devices that can acquire imaging information and parallax information.

[0005] It is desirable to provide imaging devices and electronic equipment capable of improving imaging performance.

[0006] As one embodiment of the present disclosure First The imaging device comprises a semiconductor substrate having a first and second opposing surface, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate a charge corresponding to the amount of light received by each pixel through photoelectric conversion; a first separation unit provided between adjacent pixels to electrically and optically separate adjacent pixels; a second separation unit provided between adjacent photoelectric conversion units within a pixel to electrically separate adjacent photoelectric conversion units; and an electrode layer provided on the first surface side of the semiconductor substrate, straddling adjacent photoelectric conversion units. The electrode layer has a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first isolation section penetrates between the first and second surfaces of the semiconductor substrate. The impurity layer is provided along the side surface of the second isolation section and includes a first impurity layer provided near the first surface of the semiconductor substrate on the side surface of the second isolation section, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, with a lower impurity concentration than the first impurity layer. . A second imaging apparatus as one embodiment of the present disclosure comprises a semiconductor substrate having a first surface and a second surface facing each other, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate a charge corresponding to the amount of light received by each pixel through photoelectric conversion; a first separation unit provided between adjacent pixels to electrically and optically separate adjacent pixels; a second separation unit provided between adjacent photoelectric conversion units within a pixel to electrically separate adjacent photoelectric conversion units; and an electrode layer provided on the first surface side of the semiconductor substrate, straddling adjacent photoelectric conversion units, wherein the electrode layer straddling adjacent photoelectric conversion units The semiconductor substrate has a first electrode layer and a second electrode layer that spans adjacent pixels, and the first surface is electrically connected to the second electrode layer and further has an impurity layer whose potential is controlled via the second electrode layer, the first isolation portion extends from the second surface of the semiconductor substrate toward the first surface and has a bottom surface inside the semiconductor substrate, the impurity layer includes a first impurity layer provided between the first surface of the semiconductor substrate and the bottom surface of the first isolation portion and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer and having a lower impurity concentration than the first impurity layer.

[0007] As one embodiment of the present disclosure, First the electronic device includes the imaging device according to one embodiment of the present disclosure above. First It is provided with an imaging device. A second electronic device as an embodiment of the present disclosure comprises the second imaging device as described above.

[0008] As one embodiment of the present disclosure, First, second in the imaging device and as one embodiment, First, second in the electronic device, a plurality of pixels each having a plurality of photoelectric conversion units are arranged in a matrix, and further, a first separation part and a second separation part are provided between adjacent pixels and between adjacent photoelectric conversion units within a pixel, respectively. An electrode layer straddling adjacent photoelectric conversion units is provided on the light incident surface (first surface) side of the semiconductor substrate. Thereby, an inversion region (or weak inversion region) is formed near the first surface of the semiconductor substrate between adjacent photoelectric conversion units within a pixel as necessary.

Brief Description of the Drawings

[0009] [Figure 1] It is a cross-sectional schematic view showing an example of the configuration of an imaging device according to an embodiment of the present disclosure. [Figure 2] It is a plan schematic view showing the configuration on the first surface side of the semiconductor substrate of the imaging device shown in FIG. 1. [Figure 3] It is a plan schematic view showing the configuration on the second surface side of the semiconductor substrate of the imaging device shown in FIG. 1. [Figure 4] It is a block diagram showing the overall configuration of the imaging device shown in FIG. 1. [Figure 5] It is an equivalent circuit diagram of a unit pixel shown in FIG. 1. [Figure 6] It is an example of a timing chart of biases applied to the transfer gate and the electrode layer during normal imaging of the imaging device shown in FIG. 1. [Figure 7] It is a schematic view showing an example of the cross-sectional configuration on the II-II line of the imaging device according to Modification 1 of the present disclosure. [Figure 8] It is a schematic view showing an example of the cross-sectional configuration on the III-III line of the imaging device according to Modification 1 of the present disclosure. [Figure 9] This is a schematic plan view showing the configuration of the imaging device, as shown in Figure 7, etc. [Figure 10] This is a schematic diagram showing an example of the cross-sectional configuration of the imaging device in the IV-IV line according to Modification 2 of this disclosure. [Figure 11] This is a schematic diagram showing an example of the cross-sectional configuration of the imaging device in the VV line according to Modification 2 of this disclosure. [Figure 12] This is a schematic plan view showing the configuration of the imaging device, as shown in Figure 10, etc. [Figure 13] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 3 of this disclosure. [Figure 14] Figure 13 is a schematic plan view illustrating the configuration of the imaging device shown. [Figure 15] Figure 13 shows an example of a timing chart for the transfer gate and the bias applied to the two electrode layers during normal imaging of the imaging device. [Figure 16] This is a schematic plan view showing an example of the configuration of an imaging device according to Modification 4 of this disclosure. [Figure 17] This is a schematic plan view showing an example of the configuration of an imaging device according to Modification 5 of this disclosure. [Figure 18] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 6 of this disclosure. [Figure 19] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 7 of this disclosure. [Figure 20] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 8 of this disclosure. [Figure 21] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 9 of this disclosure. [Figure 22] Figure 21 is a schematic plan view showing the configuration of the second side of the semiconductor substrate of the imaging device. [Figure 23] Figure 21 shows an example of a timing chart for the transfer gate and the bias applied to the two electrode layers during normal imaging of the imaging device. [Figure 24] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 10 of this disclosure. [Figure 25] Figure 24 is a schematic plan view illustrating an example of the configuration of the second side of the semiconductor substrate of the imaging device shown. [Figure 26] This is a schematic plan view illustrating another example of the configuration of the second side of the semiconductor substrate of the imaging device shown in Figure 24. [Figure 27] Figure 24 shows an example of a timing chart for the transfer gate and the bias applied to the two electrode layers during normal imaging of the imaging device. [Figure 28] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 11 of this disclosure. [Figure 29] Figure 28 is a schematic plan view showing the configuration of the second side of the semiconductor substrate of the imaging device. [Figure 30] This is a schematic cross-sectional view showing an example of the configuration of an imaging device according to Modification 12 of this disclosure. [Figure 31] Figure 4 is a block diagram showing an example configuration of an electronic device having an imaging device. [Figure 32] This block diagram shows an example of a schematic configuration of a vehicle control system. [Figure 33] This is an explanatory diagram showing an example of the installation location of the external information detection unit and the imaging unit. [Figure 34] This figure shows an example of a schematic configuration of an endoscopic surgical system. [Figure 35] This block diagram shows an example of the functional configuration of a camera head and CCU. [Modes for carrying out the invention]

[0010] Hereinafter, one embodiment of the present disclosure will be described in detail with reference to the drawings. The following description is a specific example of the present disclosure, and the present disclosure is not limited to the following embodiment. Furthermore, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, etc., of each component shown in each figure. The order of description is as follows. 1. Embodiment (Example of an imaging device having an electrode layer over the entire surface of the pixel area on the light incidence side) 2. Variations 2-1. Variation 1 (Another example of electrode layer layout) 2-2. Variation 2 (Another example of electrode layer layout) 2-3. Modification 3 (Another example of electrode layer layout) 2-4. Modification 4 (Another example of electrode layer layout) 2-5. Modification 5 (Another example of electrode layer layout) 2-6. Modification 6 (Another example of the configuration of the pixel separation area) 2-7. Modification 7 (Another example of electrode layer layout) 2-8. Modification 8 (Another example of electrode layer layout) 2-9. Modification 9 (Another example of electrode layer layout) 2-10. Modification 10 (Another example of electrode layer layout) 2-11. Variation 11 (Another example of electrode layer layout) 2-12. Variation 12 (Another example of electrode layer layout) 3. Examples of application 4. Application Examples

[0011] <1. Embodiment> Figure 1 schematically shows an example of a cross-sectional configuration of an imaging device (imaging device 1) according to one embodiment of the present disclosure. Figure 2 schematically shows a planar configuration of the light incident side S1 of the imaging device 1 shown in Figure 1. Figure 3 schematically shows a planar configuration of the imaging device 1 on the opposite side from the light incident side S1 shown in Figure 1. Note that Figure 1 represents a cross-section along line II shown in Figures 2 and 3. Figure 4 shows an example of the overall configuration of the imaging device 1 shown in Figure 1. The imaging device 1 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel section (pixel section 100A) in which a plurality of pixels are arranged in a matrix in two dimensions as an imaging area. The imaging device 1 is, for example, a so-called back-illuminated imaging device in this CMOS image sensor.

[0012] The imaging device 1 of this embodiment has pixels (unit pixels P) capable of simultaneously acquiring imaging information and parallax information. In the imaging device 1 of this embodiment, an electrode layer 22 is provided over the entire surface of a pixel section 100A in which a plurality of unit pixels P, each having a plurality of photoelectric conversion units 12, are arranged in a matrix.

[0013] [Overall configuration of the imaging device] The imaging device 1 captures incident light (image light) from a subject through an optical lens system (not shown), converts the amount of light of the incident light formed on the imaging surface into an electrical signal on a pixel-by-pixel basis, and outputs it as a pixel signal. The imaging device 1 has a pixel section 100A as an imaging area on a semiconductor substrate 11, and in the area surrounding this pixel section 100A (peripheral area 100B), it has, for example, a vertical drive circuit 111, a column signal processing circuit 112, a horizontal drive circuit 113, an output circuit 114, a control circuit 115, and input / output terminals 116.

[0014] In the pixel section 100A, for example, multiple unit pixels P are arranged in a matrix in a two-dimensional manner. The multiple unit pixels P serve as both imaging pixels and image plane phase-difference pixels. The imaging pixels generate signals for image generation by photoelectric conversion of the subject image formed by the imaging lens using a photodiode PD. The image plane phase-difference pixels divide the pupil region of the imaging lens and generate signals for phase difference detection by photoelectric conversion of the subject image from the divided pupil region.

[0015] Each unit pixel P is wired with, for example, a pixel drive line Lread (specifically, a row selection line and a reset control line) for each pixel row, and a vertical signal line Lsig for each pixel column. The pixel drive line Lread transmits drive signals for reading signals from the pixel. One end of the pixel drive line Lread is connected to the output terminal corresponding to each row of the vertical drive circuit 111.

[0016] The vertical drive circuit 111 is a pixel drive unit composed of a shift register, an address decoder, etc., which drives each unit pixel P of the pixel unit 100A, for example, in row units. The signals output from each unit pixel P of the pixel row selected and scanned by the vertical drive circuit 111 are supplied to the column signal processing circuit 112 through each of the vertical signal lines Lsig. The column signal processing circuit 112 is composed of amplifiers, horizontal selection switches, etc., provided for each vertical signal line Lsig.

[0017] The horizontal drive circuit 113 is composed of a shift register, an address decoder, etc., and sequentially drives each horizontal selection switch of the column signal processing circuit 112 while scanning it. Through this selection scanning by the horizontal drive circuit 113, the signals of each pixel transmitted through each of the vertical signal lines Lsig are sequentially output to the horizontal signal line 121 and transmitted to the outside of the semiconductor substrate 11 through the horizontal signal line 121.

[0018] The output circuit 114 processes the signals sequentially supplied from each of the column signal processing circuits 112 via the horizontal signal line 121 and outputs them. The output circuit 114 may, for example, only perform buffering, or it may perform black level adjustment, column variation correction, and various digital signal processing.

[0019] The circuit portion consisting of the vertical drive circuit 111, column signal processing circuit 112, horizontal drive circuit 113, horizontal signal line 121, and output circuit 114 may be formed directly on the semiconductor substrate 11, or it may be arranged on an external control IC. Alternatively, these circuit portions may be formed on other substrates connected by cables or the like.

[0020] The control circuit 115 receives a clock signal and data commanding the operating mode from outside the semiconductor substrate 11, and outputs data such as internal information of the imaging device 1. The control circuit 115 also has a timing generator that generates various timing signals, and controls the drive of peripheral circuits such as the vertical drive circuit 111, the column signal processing circuit 112, and the horizontal drive circuit 113 based on the various timing signals generated by the timing generator.

[0021] The input / output terminal 116 is used for exchanging signals with the outside world.

[0022] [Circuit configuration of a unit pixel] Figure 5 shows an example of the readout circuit for a unit pixel P of the imaging device 1 shown in Figure 4. The unit pixel P includes, for example, two photoelectric conversion units 12A and 12B, transfer transistors TR1 and TR2, a floating diffusion FD, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL, as shown in Figure 5.

[0023] The photoelectric conversion units 12A and 12B are each photodiodes (PDs). Photoelectric conversion unit 12A has its anode connected to the ground voltage line and its cathode connected to the source of the transfer transistor TR1. Photoelectric conversion unit 12 is similar to photoelectric conversion unit 12A, with its anode connected to the ground voltage line and its cathode connected to the source of the transfer transistor TR2.

[0024] Transfer transistor TR1 is connected between the photoelectric conversion unit 12A and the floating diffusion FD. Transfer transistor TR2 is connected between the photoelectric conversion unit 12B and the floating diffusion FD. A drive signal TRsig is applied to the gate electrodes of transfer transistors TR1 and TR2, respectively. When this drive signal TRsig becomes active, the transfer gates of transfer transistors TR1 and TR2 become conductive, and the signal charge accumulated in the photoelectric conversion units 12A and 12B is transferred to the floating diffusion FD via transfer transistors TR1 and TR2.

[0025] The floating diffusion FD is connected between the transfer transistors TR1 and TR2 and the amplification transistor AMP. The floating diffusion FD converts the signal charge transferred by the transfer transistors TR1 and TR2 into a voltage signal and outputs it to the amplification transistor AMP.

[0026] The reset transistor RST is connected between the floating diffusion FD and the power supply. A drive signal RSTsig is applied to the gate electrode of the reset transistor RST. When this drive signal RSTsig becomes active, the reset gate of the reset transistor RST becomes conductive, and the potential of the floating diffusion FD is reset to the power supply level.

[0027] The amplification transistor AMP has its gate electrode connected to the floating diffusion diode FD and its drain electrode connected to the power supply, and it serves as the input to the readout circuit for the voltage signal held by the floating diffusion diode FD, a so-called source follower circuit. In other words, the amplification transistor AMP has its source electrode connected to the vertical signal line Lsig via a selection transistor SEL, thereby forming a source follower circuit with a constant current source connected to one end of the vertical signal line Lsig.

[0028] The selection transistor SEL is connected between the source electrode of the amplification transistor AMP and the vertical signal line Lsig. A drive signal SELsig is applied to the gate electrode of the selection transistor SEL. When this drive signal SELsig becomes active, the selection transistor SEL becomes conductive, and the unit pixel P becomes selected. As a result, the readout signal (pixel signal) output from the amplification transistor AMP is output to the vertical signal line Lsig via the selection transistor SEL.

[0029] At a single pixel P, for example, the signal charge generated in the photoelectric conversion unit 12A and the signal charge generated in the photoelectric conversion unit 12B are read out, respectively. By outputting the signal charges read out from the photoelectric conversion unit 12A and the photoelectric conversion unit 12B to, for example, the phase difference calculation block of an external signal processing unit, a signal for phase difference autofocus can be obtained. Furthermore, by adding the signal charges read out from the photoelectric conversion unit 12A and the photoelectric conversion unit 12B in a floating diffusion FD and outputting it to, for example, the imaging block of an external signal processing unit, a pixel signal based on the total charge of the photoelectric conversion unit 12A and the photoelectric conversion unit 12B can be obtained.

[0030] [Unit pixel composition] As described above, the imaging device 1 is, for example, a back-illuminated imaging device. A unit pixel P has a configuration in which a light-receiving unit 10, a light-collecting unit 20 provided on the light-incident side S1 of the light-receiving unit 10, and a multilayer wiring layer 30 provided on the side opposite to the light-incident side S1 of the light-receiving unit 10 are stacked.

[0031] The light-receiving unit 10 includes a semiconductor substrate 11 having opposing first surfaces 11S1 and second surfaces 11S2, and a plurality of photoelectric conversion units 12 embedded in the semiconductor substrate 11. The semiconductor substrate 11 is made of, for example, a silicon substrate. The photoelectric conversion unit 12 is, for example, a PIN (Positive Intrinsic Negative) type photodiode (PD) and has a pn junction in a predetermined region of the semiconductor substrate 11. As described above, a plurality of photoelectric conversion units 12 (for example, two (photoelectric conversion units 12A, 12B)) are embedded for each unit pixel P.

[0032] The light-receiving unit 10 further includes an inter-pixel separation unit 13 and an intra-pixel separation unit 14.

[0033] The inter-pixel separation section 13 is provided between adjacent unit pixels P. In other words, the inter-pixel separation section 13 is provided around the unit pixels P, and in the pixel section 100A, it is provided, for example, in a grid pattern. The inter-pixel separation section 13 is for electrically and optically separating adjacent unit pixels P, and for example, it extends from the second surface 11S2 side of the semiconductor substrate 11 toward the first surface 11S1 side, and penetrates, for example, between the second surface 11S2 and the first surface 11S1 of the semiconductor substrate 11.

[0034] The inter-pixel separation section 13 is composed of, for example, a conductive light-shielding film 13A and an insulating film 13B provided around the light-shielding film 13A. Examples of the light-shielding film 13A include a single-layer or multilayer film of tungsten (W), silver (Ag), copper (Cu), aluminum (Al), or an alloy of Al and copper (Cu). Alternatively, it may be formed using polysilicon (Poly-Si) or amorphous silicon. Examples of the insulating film 13B include silicon oxide (SiO₂). x Examples include membranes, etc.

[0035] The in-pixel isolation part 14 is provided between adjacent photoelectric conversion parts 12 (for example, photoelectric conversion part 12A and photoelectric conversion part 12B) within the unit pixel P. The in-pixel isolation part 14 is for electrically isolating adjacent photoelectric conversion parts 12. For example, it extends from the second surface 11S2 of the semiconductor substrate 11 toward the first surface 11S1 and has an end surface 14S1 inside the semiconductor substrate 11, for example. In other words, the in-pixel isolation part 14 has a semiconductor substrate 11 of, for example, several hundred nm between its end surface 14S1 and the first surface 11S1 of the semiconductor substrate 11.

[0036] Similar to the inter-pixel isolation part 13, the in-pixel isolation part 14 is formed of, for example, a light-shielding film 14A having conductivity and an insulating film 14B provided between the light-shielding film 14A and the semiconductor substrate 11. Examples of the light-shielding film 14A include single-layer films or laminated films such as tungsten (W), silver (Ag), copper (Cu), aluminum (Al), or an alloy of Al and copper (Cu). Additionally, it may be formed using polysilicon (Poly-Si) or amorphous silicon. Examples of the insulating film 14B include, for example, silicon oxide (SiO x ) film and the like.

[0037] A fixed charge layer 15 is provided on the first surface 11S1 of the semiconductor substrate 11, the side surface of the inter-pixel isolation part 13, the side surface and end surface 14S1 of the in-pixel isolation part 14. The fixed charge layer 15 may be a film having positive fixed charges or a film having negative fixed charges. Examples of the constituent material of the fixed charge layer 15 include semiconductor materials or conductive materials having a bandgap wider than that of the semiconductor substrate 11. Specifically, for example, for example, hafnium oxide (HfO x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), tantalum oxide (TaO x ), titanium oxide (TiO x ), lanthanum oxide (LaO x ), praseodymium oxide (PrO x ), cerium oxide (CeO x ), neodymium oxide (NdO x ), promethium oxide (PmOx ), samarium oxide (SmO x ), Europium oxide (EuO x ), gadolinium oxide (GdO x ), terbium oxide (TbO x ), dysprosium oxide (DyO x ), holmium oxide (HoO x ), thulium oxide (TmO x ), Ytterbium oxide (YbO x ), Lutetium oxide (LuO x ), yttrium oxide (YO x ), hafnium nitride (HfN x ), aluminum nitride (AlN x ), hafnium oxynitride (HfO x N y ) and aluminum oxynitride (AlO x N y Examples include the following. The fixed charge layer 15 may be a single layer or a multilayer film made of different materials.

[0038] The second surface 1S2 of the semiconductor substrate 11 is provided with transfer transistors TR1 and TR2, a floating diffusion FD, and the like, which constitute the readout circuit for the unit pixel P described above.

[0039] The light-collecting section 20 is provided on the light-incident side S1 of the light-receiving section 10 and includes, for example, a protective layer 21 covering the first surface 11S1 of the semiconductor substrate 11, a light-transmitting electrode layer 22, a planarization layer 23, and a lens layer 24, which are stacked in this order from the light-receiving section 10 side.

[0040] The protective layer 21 is for protecting the first surface 11S1 of the semiconductor substrate 11. The protective layer 21 is made of, for example, silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y It is formed using ) etc.

[0041] The electrode layer 22 is provided over the entire surface of a pixel section 100A, for example, where multiple unit pixels P, each having multiple photoelectric conversion units 12, are arranged in a matrix, so as to cover the entire surface of each unit pixel P. The electrode layer 22 further extends to the periphery of the pixel section 100A, and is electrically connected to a control circuit 115 in the peripheral region 100B, for example, so that its potential can be freely controlled.

[0042] The electrode layer 22 is formed of, for example, a light-transmitting metal oxide. Examples of metal atoms constituting such a metal oxide include tin (Sn), zinc (Zn), indium (In), silicon (Si), zirconium (Zr), aluminum (Al), gallium (Ga), tungsten (W), chromium (Cr), cobalt (Co), nickel (Ni), tantalum (Ta), niobium (Nb), and molybdenum (Mo). An example of a metal oxide containing one or more of the above metal atoms is ITO (indium tin oxide). However, in addition to ITO, dopant-added tin oxide (SnO2)-based materials or zinc oxide-based materials obtained by adding dopants to aluminum zinc oxide may also be used as the constituent material of the electrode layer 22. Examples of zinc oxide-based materials include aluminum zinc oxide (AZO) with aluminum (Al) dopant added, gallium zinc oxide (GZO) with gallium (Ga) dopant added, and indium zinc oxide (IZO) with indium (In) dopant added. In addition, other materials such as CuI, InSbO4, ZnMgO, CuInO2, MgIn2O4, CdO, and ZnSnO3 may also be used.

[0043] The planarization layer 23 is for planarizing the surface S1 on the light incident side. The planarization layer 23 is made of, for example, silicon oxide (SiO2). x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y It is formed using ) etc.

[0044] The lens layer 24 is provided to cover the entire surface of the pixel section 100A, and its surface has, for example, a plurality of on-chip lenses 24L provided gaplessly. The on-chip lenses 24L are for focusing light incident from above onto the photoelectric conversion section 12, and are provided for each unit pixel P, for example, as shown in Figure 2. That is, the on-chip lenses 24L are provided across a plurality of photoelectric conversion sections 12 within the unit pixel P. The lens layer 24 is made of, for example, silicon oxide (SiO₂). x ) and silicon nitride (SiN x It is formed from inorganic materials such as ). In addition, the lens layer 24 may be formed using organic materials with a high refractive index such as episulfide resins, thietan compounds or their resins. The shape of the on-chip lens 24L is not particularly limited, and various lens shapes such as hemispherical or semi-cylindrical shapes can be adopted.

[0045] The multilayer wiring layer 30 is provided on the side opposite to the light incident side S1 of the light receiving unit 10. The multilayer wiring layer 30 has a configuration in which, for example, multiple wiring layers 31, 32, 33 are laminated with an interlayer insulating layer 34 in between. In addition to the readout circuit described above, the multilayer wiring layer 30 has, for example, a vertical drive circuit 111, a column signal processing circuit 112, a horizontal drive circuit 113, an output circuit 114, a control circuit 115, and input / output terminals 116 formed on it.

[0046] The wiring layers 31, 32, and 33 are formed using, for example, aluminum (Al), copper (Cu), or tungsten (W). Alternatively, the wiring layers 31, 32, and 33 may be formed using polysilicon.

[0047] The interlayer insulating layer 34 is, for example, silicon oxide (SiO x ), TEOS, silicon nitride (SiN x ) and silicon oxynitride (SiO x N y It is formed by a single layer film consisting of one of the following, or a laminated film consisting of two or more of these.

[0048] [Effects / Effects] In the imaging device 1 of this embodiment, a plurality of unit pixels P are arranged in a matrix in the pixel section 100A of the semiconductor substrate 11. Each unit pixel P has a plurality of photoelectric conversion units 12 that generate an electric charge corresponding to the amount of light received by photoelectric conversion. The semiconductor substrate 11 further has an inter-pixel separation unit 13 and an intra-pixel separation unit 14 between adjacent unit pixels P and between adjacent photoelectric conversion units 12 within a unit pixel P, respectively. In this embodiment, an electrode layer 22 is provided over the entire surface of the pixel section 100A on the first surface 11S1 side of the semiconductor substrate 11, where the plurality of unit pixels P are arranged in a matrix. This makes it possible to form an inversion region X near the first surface 11S1 as needed. This will be explained below.

[0049] In recent years, semiconductor imaging devices (imaging systems) with focus detection capabilities using phase difference detection have become widespread. In such imaging systems, each pixel has multiple photodiodes (PDs), and by sharing a single on-chip lens among these multiple PDs, it is possible to acquire imaging information and disparity information simultaneously.

[0050] In such an imaging device, when light is shone perpendicularly onto an on-chip lens shared by multiple photodiodes (PDs), the same amount of charge (e.g., electrons) generated by photoelectric conversion is collected and stored in each of the PDs, for example, which are split left and right. However, when light is shone obliquely onto the on-chip lens, the number of electrons collected and stored in the left PD and the right PD will differ. This difference in the number of electrons depends on the angle of the illuminated light. This property is used to detect the phase difference of the light and perform autofocus at each unit pixel.

[0051] On the other hand, imaging devices require high integration of unit pixels to improve imaging image quality. One way to meet this requirement is to miniaturize the unit pixels. When unit pixels are miniaturized, it becomes difficult to separate PDs (photodiodes) from each other, including the multiple PDs provided within the unit pixel that detect the phase difference (phase difference detection pixels). For example, when the distance between adjacent PDs is close, the electrons accumulated in each become more likely to mix, causing color mixing and degrading imaging performance. To avoid this, methods have been developed to electrically suppress color mixing by providing an isolation structure such as FTI (Full Trench Isolation) between adjacent PDs.

[0052] A unit pixel with an FTI between adjacent PDs exhibits excellent phase difference detection characteristics because the left and right PDs are separated by the FTI. However, when high-intensity obliquely incident light is received during normal imaging, the number of electrons accumulated in either the left or right PD may exceed the saturation electron number. In this case, the excess electrons are discharged into the floating diffusion (FD), so the total number of electrons in the unit pixel, which is the sum of the electrons accumulated in the left and right PDs, becomes smaller than the original saturation electron number, resulting in a decrease in dynamic range. Here, "original saturation electron number" refers to the sum of the saturation electron numbers of the left and right PDs. For example, for light incident perpendicularly, the number of electrons accumulated in the left and right PDs is the same, so in that case, it is possible to accumulate up to the original saturation electron number.

[0053] One way to solve this problem is to use impurity doping to separate the left and right photodiodes (PDs). The conductivity type of the impurity used to separate the left and right PDs will be p-type if the PD is an n-type impurity. When separating the left and right PDs by impurity doping, by creating a concentration difference in the impurity profile, if the number of electrons in one of the PDs increases, electrons can be transferred (overflowed) to the other PD through a region of low impurity concentration. This prevents excess electrons from being discharged into the floppy disk (FD), making it possible to accumulate electrons in the PD up to the original saturation electron number of the unit pixel.

[0054] However, when creating the density of impurity profiles by impurity injection as described above, there is a challenge in adjusting the injection energy and injection amount (dose) because multiple types of injections are performed. In addition, because the concentration of separated impurities in the region that serves as the migration path for excess electrons is low, there is a challenge in that the potential of that region tends to change depending on the conditions within the unit pixel. For example, during phase difference detection, electrons accumulated in the left and right PDs are read out respectively, but if the left PD is read out first, the potential of the left PD becomes high, and the potential of the migration path also becomes high. As a result, some of the electrons accumulated in the right PD move to the left PD and are read out, which degrades the phase difference detection characteristics.

[0055] In contrast, in this embodiment, an electrode layer 22 is provided over the entire surface of a pixel section 100A in which multiple unit pixels P, each having multiple photoelectric conversion units 12, are arranged in a matrix, and an inversion region X is formed near the first surface 11S1 as needed.

[0056] The imaging device 1 shown in Figure 1 represents a state in which, for example, a positive bias is applied to the electrode layer 22. In the imaging device 1 of this embodiment, the electrode layer 22 is electrically connected to the control circuit 115 in the peripheral region 100B as described above, so that its potential can be freely controlled. Above the pixel isolation portion 14, a semiconductor substrate 11, a protective layer 21 made of, for example, an oxide film, and the electrode layer 22 are stacked to form a so-called MOS (Metal-Oxide-Semiconductor) capacitor (MOSCAP). Therefore, when, for example, a positive bias is applied to the electrode layer 22, a (weak) inversion region X is formed in the semiconductor substrate 11. This inversion region X becomes an overflow region of charge (for example, electrons) between adjacent photoelectric conversion units 12 within a unit pixel P. On the other hand, when a negative bias is applied to the electrode layer 22, the inversion region X disappears, and the electrons accumulated in the inversion region X and its vicinity move to or are pushed out to the photoelectric conversion unit 12.

[0057] FIG. 6 shows an example of a timing chart of biases applied to the gates (transfer gates) TG(A) of transfer transistors TR1 and TR2 and the electrode layer 22(B) during normal imaging. V_high1 is a positive bias applied to the transfer gate TG, and V_high2 is a positive bias applied to the electrode layer 22. V_low1 is a negative bias applied to the transfer gate TG, and V_low2 is a negative bias applied to the electrode layer 22. During the time (t) corresponding to the readout operation, from ti1 to tf1, a positive bias V_high1 is applied to the transfer gate TG. In conjunction with the readout operation of the transfer gate TG, during the time (t) from ti2 to tf2, a negative bias V_low2 is applied to the electrode layer 22. ti2 is later than ti1 (ti1 < ti2), and it is desirable that the delay time be several nsec to several tens of nsec. tf2 may be at the same time as tf1, earlier than tf1, or later than tf1, but it is desirable that the difference time between them be 0 to several tens of nsec. Although not shown, during phase difference detection, a negative bias V_low2 is always applied to the electrode layer 22 regardless of the operation of the transfer gate TG.

[0058] In the imaging device 1, the transfer gate TG and the floating diffusion FD are formed on the second surface 11S2 side of the semiconductor substrate 11. Therefore, regardless of the bias conditions of the transfer gate TG and the floating diffusion FD, the potential of the overflow portion can be freely controlled only by the bias conditions of the electrode layer 22. As a result, even if the distance between the first surface 11S1 of the semiconductor substrate 11 and the in-pixel isolation portion 14, or the thickness of the oxide film of the MOSCAP formed by the electrode layer 22 varies during manufacturing and is different from the design, it is possible to make the pixel characteristics the same as those at the design stage after manufacturing by adjusting V_high2 and V_low2. Therefore, it is possible to improve the imaging performance.

[0059] Furthermore, in the imaging device 1 of this embodiment, since the electrode layer 22 is provided over the entire surface of the pixel portion 100A, the inversion region X is formed over the entire surface of the first surface 11S1 of the semiconductor substrate 11. Therefore, it is possible to increase the saturation electron count of the unit pixel P without increasing the area of ​​the unit pixel P.

[0060] Furthermore, in the imaging device 1 of this embodiment, for example, even if the fixed charge of the fixed charge layer 15 decreases due to deterioration over time, it is possible to restore the fixed charge by applying a positive bias of several volts to 10 volts to the electrode layer 22, thereby utilizing the tunnel electrode with respect to the fixed charge layer 15 via the protective layer 21.

[0061] Next, Modifications 1 to 8 of the present disclosure, as well as examples of applications and applications, will be described. In the following, components similar to those in the above embodiments will be denoted by the same reference numerals, and their descriptions will be omitted as appropriate.

[0062] <2. Variant> (2-1. Variation 1) Figures 7 and 8 schematically represent an example of the cross-sectional configuration of the imaging device (imaging device 1A) according to Modification 1 of the present disclosure, respectively. Figure 9 schematically represents the planar configuration of the imaging device 1A according to Modification 1 of the present disclosure. Note that Figure 7 represents the cross-section along line II-II shown in Figure 9, and Figure 8 represents the cross-section along line III-III shown in Figure 9. The imaging device 1A is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, similar to the imaging device 1 in the above embodiment, for example, a so-called back-illuminated imaging device.

[0063] In the above embodiment, an example was shown in which the electrode layer 22 is provided over the entire surface of the pixel portion 100A. However, the electrode layer 22 may be provided for each unit pixel P, for example. In that case, as shown in Figure 8, for example, a part of the light-shielding film 13A constituting the inter-pixel separation portion 13 is made to protrude from the first surface 11S1 of the semiconductor substrate 11 to the electrode layer 22, and the electrode layer 22 and the light-shielding film 13A are electrically connected. As a result, the potential of the electrode layer 22 provided for each unit pixel P can be independently controlled for each unit pixel P from the second surface 11S2 side of the semiconductor substrate 11, for example, via the contact electrode 35 and the light-shielding film 13A, and the same effects as in the above embodiment can be obtained.

[0064] (2-2. Variation 2) Figures 10 and 11 schematically represent an example of the cross-sectional configuration of the imaging device (imaging device 1B) according to Modification 2 of the present disclosure, respectively. Figure 12 schematically represents the planar configuration of the imaging device 1B according to Modification 2 of the present disclosure. Note that Figure 10 represents the cross-section along line IV-IV shown in Figure 12, and Figure 11 represents the cross-section along line VV shown in Figure 12. The imaging device 1B is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0065] In the above embodiment and Modification 1, examples were shown in which the electrode layer 22 is provided over the entire surface of the pixel portion 100A or for each unit pixel P, but the invention is not limited to these. For example, the electrode layer 22 may be provided for every four unit pixels P arranged in a 2x2 grid as shown in Figure 12. In this case, similar to Modification 1, a part of the light-shielding film 13A constituting the inter-pixel separation portion 13 is made to protrude from the first surface 11S1 of the semiconductor substrate 11 to the electrode layer 22, and the electrode layer 22 and the light-shielding film 13A are electrically connected. As a result, the potential of the electrode layer 22 provided for each unit pixel P can be independently controlled for each unit pixel P from the second surface 11S2 side of the semiconductor substrate 11, for example, via the contact electrode 35 and the light-shielding film 13A, and the same effects as in the above embodiment can be obtained.

[0066] Furthermore, compared to the case where the electrode layer 22 is formed for each unit pixel P, as in the modified example 1 above, this method offers the advantage of enabling stable manufacturing against misalignment when patterning the electrode layer 22.

[0067] Furthermore, in the case where the electrode layer 22 is provided for every four unit pixels P arranged in a 2x2 grid, as in this modified example, for example, two green pixels (Pg) that selectively detect green light (G) are arranged diagonally, and one green pixel (Pr) that selectively detects red light (R) and one green pixel (Pb) that selectively detects blue light (B) are arranged diagonally opposite each other, forming a so-called Bayer-like arrangement of four unit pixels P, which can be used as the unit unit on which each electrode layer 22 is arranged.

[0068] (2-3. Variation 3) Figure 13 schematically shows an example of the cross-sectional configuration of an imaging device (imaging device 1C) according to Modification 3 of this disclosure. Figure 14 schematically shows the planar configuration of the imaging device 1C shown in Figure 13. Note that Figure 13 represents the cross-section along line VI-VI shown in Figure 14. The imaging device 1C is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0069] The electrode layer 22 may be composed of electrode layers 22A and 22B, respectively, provided above adjacent photoelectric conversion units 12 within a unit pixel P, as shown in Figures 13 and 14. The electrode layer 22A, which spans across adjacent photoelectric conversion units 12 within a unit pixel P, is for controlling the potential of the overflow portion between adjacent photoelectric conversion units 12 within a unit pixel P. The electrode layer 22B, which spans across adjacent unit pixels P, is for controlling the potential of the MOSCAP and making the saturation electron number in each unit pixel P variable. The electrode layers 22A and 22B each extend, for example, in the Y-axis direction and, although not shown, are electrically connected to the control circuit 115 in the peripheral region 100B, allowing their potentials to be controlled independently and freely.

[0070] Figure 15 shows an example of a timing chart for the biases applied to the transfer gates TG (A), electrode layers 22A (B), and electrode layers 22B (C) of the transfer transistors TR1 and TR2 during normal imaging. V_high1 is a positive bias applied to the transfer gate TG, V_high2 to the electrode layer 22A, and V_high3 to the electrode layer 22B. V_low1 is a negative bias applied to the transfer gate TG, V_low2 to the electrode layer 22A, and V_low3 to the electrode layer 22B. Between time (t) ti1 and tf1, corresponding to the readout operation, a positive bias V_high1 is applied to the transfer gate TG. In conjunction with the readout operation of the transfer gate TG, between time (t) ti2 and tf2, a negative bias V_low2 is applied to the electrode layer 22A. Similarly, in conjunction with the read operation of the transfer gate TG, a negative bias V_low3 is applied to the electrode layer 22B between time (t) ti3 and tf3.

[0071] ti2 and ti3 are later than ti1 (ti1 < ti2 = ti3), and it is desirable that the delay time is several nsec to several tens of nsec. tf2 and tf3 may be at the same time as tf1, earlier than tf1, or later than tf1, but it is desirable that the difference time between them is 0 to several tens of nsec. Although not shown, when detecting the phase difference, a negative bias V_low2 is always applied to the electrode layers 22A and 22B regardless of the operation of the transfer gate TG.

[0072] As described above, in the imaging device 1C of this modification example, electrode layers 22A and 22B capable of independently controlling the potential are provided above between adjacent photoelectric conversion units 12 within the unit pixel P and above between adjacent unit pixels P, respectively. Thereby, it becomes possible to independently form inversion regions XA and XB between adjacent photoelectric conversion units 12 within the unit pixel P and between adjacent unit pixels P, respectively. In other words, the potential of the overflow portion between adjacent photoelectric conversion units 12 within the unit pixel P and the potential of the MOSCAP between adjacent unit pixels P can be freely controlled independently.

[0073] Thereby, in addition to the effects of the above embodiment, the following effects can be obtained. For example, at the time of phase difference detection, by applying a negative bias to the electrode layer 22A and a positive bias to the electrode layer 22B, the saturation electron number of each of the adjacent photoelectric conversion units increases. Thereby, compared with a general imaging device, it becomes possible to detect an accurate phase difference even when receiving high-intensity light, and it becomes possible to improve the autofocus characteristics.

[0074] (2-4. Modification Example 4) FIG. 16 schematically shows an example of the planar configuration of an imaging device (imaging device 1D) according to Modification Example 4 of the present disclosure. The imaging device 1D is, for example, a CMOS image sensor used in electronic devices such as a digital still camera and a video camera, and is a so-called back-illuminated type imaging device similar to the imaging device 1 of the above embodiment.

[0075] In the above modified example 3, an example is shown in which the electrode layers 22A and 22B are formed extending, for example, in the Y-axis direction, but the layout of the electrode layers 22A and 22B is not limited to this. For example, as shown in Figure 16, the electrode layers 22A and 22B may be shifted by one unit pixel in the Y-axis direction and provided for every two adjacent unit pixels P in the Y-axis direction, and adjacent electrode layers 22A or electrode layers 22B in the X-axis direction may be connected to each other above the inter-pixel separation section 13. In this modified example, the electrode layers 22A and 22B, although not shown, are electrically connected to the control circuit 115 in the peripheral region 100B, similar to modified example 3, so that their potentials can be controlled independently and freely.

[0076] Even with this configuration, it is possible to independently form inversion regions XA and XB between adjacent photoelectric conversion units 12 and between adjacent unit pixels P within a unit pixel P, respectively, thereby obtaining the same effect as in the modified example 3 described above.

[0077] (2-5. Modification 5) Figure 17 schematically shows an example of the planar configuration of an imaging device (imaging device 1E) according to Modification 5 of the present disclosure. The imaging device 1E is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0078] In the above modified examples 3 and 4, an example was shown in which a potential is applied to the peripheral region 100B of each of the electrode layers 22A and 22B, but the invention is not limited to this. For example, the electrode layer 22A may be electrically connected to a light-shielding film 13A protruding from the first surface 11S1 of the semiconductor substrate 11, similar to modified example 1, and a potential may be applied from the second surface 11S2 side of the semiconductor substrate 11, for example, via the contact electrode 35 and the light-shielding film 13A. This makes it possible to independently control the potential A of the electrode layer 22 for each of two adjacent unit pixels P in the Y-axis direction.

[0079] (2-6. Variation 6) Figure 18 schematically shows an example of the cross-sectional configuration of an imaging device (imaging device 1F) according to Modification 6 of the present disclosure. The imaging device 1F is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0080] In the above embodiment, an example was shown in which the pixel isolation portion 14 is composed of, for example, a conductive light-shielding film 14A and an insulating film 14B, but it is not limited to this. The pixel isolation portion 44 may be formed in part or all using an impurity diffusion layer containing impurities with a conductivity type opposite to that of the photoelectric conversion portion 12.

[0081] Even with this configuration, the same effects as in the above embodiment can be obtained.

[0082] (2-7. Variation 7) Figure 19 schematically shows an example of the cross-sectional configuration of an imaging device (imaging device 1G) according to Modification 7 of the present disclosure. The imaging device 1G is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0083] In the embodiments described above, an example was shown in which an electrode layer 22 is provided that covers almost the entire area of ​​the unit pixel P (for example, 80% or more of the area of ​​the unit pixel P). However, the electrode layer 22 may be selectively provided, for example, above adjacent photoelectric conversion units 12 within the unit pixel P.

[0084] Thus, by selectively providing the in-pixel separation portion 14 above, in other words, at a position that straddles adjacent photoelectric conversion portions 12 within a unit pixel P, the area of ​​the inversion region X, which normally becomes an overflow portion during imaging, can be reduced. This makes it possible to reduce the generation of dark current that may occur in the inversion region X.

[0085] (2-8. Variation 8) Figure 20 schematically shows an example of the cross-sectional configuration of an imaging device (imaging device 1H) according to Modification 8 of the present disclosure. The imaging device 1H is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0086] In this modified example, the electrode layer 22 is provided over the entire surface of the pixel portion 100A, and a recess 21X is provided in the protective layer 21 at a position that spans adjacent photoelectric conversion portions 12 within a unit pixel P, and the electrode layer 22 is embedded in this recess 21X. As a result, an electrode layer 22 is formed on the protective layer 21 that protrudes towards the first surface 11S1 of the semiconductor substrate 11 above the pixel isolation portion 14.

[0087] As a result, without patterning the electrode layer 22 as in Embodiment 7 above, the formation area of ​​the inversion region X can be reduced, thereby reducing the generation of dark current that may occur in the inversion region X.

[0088] (2-9. Variation 9) Figure 21 schematically shows an example of the cross-sectional configuration of the imaging device (imaging device 1I) according to Modification 9 of this disclosure. Figure 22 schematically shows the planar configuration of the imaging device 1I according to Modification 9 of this disclosure. Note that Figure 21 represents the cross-section along line VII-VII shown in Figure 22. The imaging device 1I is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, similar to the imaging device 1 in the above embodiment, for example, a so-called back-illuminated imaging device.

[0089] When the light-shielding film 14A is formed using a conductive material such as tungsten (W) as in the above embodiment, a contact electrode 36 for electrically connecting the light-shielding film 14A and the wiring may be provided on the second surface 11S2 side of the semiconductor substrate 11.

[0090] Note that FIG. 21 shows a state where a positive bias is applied to the electrode layer 22. When a negative bias is applied to the electrode layer 22, the inversion region X disappears.

[0091] FIG. 23 shows an example of a timing chart of biases applied to the transfer gates TG(A) of transfer transistors TR1 and TR2, the electrode layer 22, and the light shielding film 14A during normal imaging. V_high1 is the positive bias applied to the transfer gate TG, V_high2 is the positive bias applied to the electrode layer 22, and V_high3 is the positive bias applied to the electrode layer 22B. V_low1 is the negative bias applied to the transfer gate TG, and V_low2 is the negative bias applied to the electrode layer 22. During the time (t) corresponding to the readout operation, from ti1 to tf1, a positive bias V_high1 is applied to the transfer gate TG. In conjunction with the readout operation of the transfer gate TG, during the time (t) from ti2 to tf2, a negative bias V_low2 is applied to the electrode layer 22. ti2 is later than ti1 (ti1 < ti2), and the delay time is desirably several nsec to several tens of nsec. tf2 may be at the same time as tf1, earlier than tf1, or later than tf1, but the difference time between them is desirably 0 to several tens of nsec. Although not shown, during phase difference detection, a negative bias V_low2 is always applied to the electrode layer 22 regardless of the operation of the transfer gate TG.

[0092] V_low3 and V_low4 are the biases applied to the conductive light shielding film 14A. V_low3 has a value smaller than the substrate potential. During the time from ti3 to tf3 in conjunction with the readout operation of the transfer gate TG, a bias V_low4 lower than V_low3 is applied to the light shielding film 14A. ti3 is later than ti1 (ti1 < ti3), and the delay time is desirably several nsec to several tens of nsec. tf3 may be at the same time as tf1, earlier than tf1, or later than tf1, but the difference time between them is desirably 0 to several tens of nsec.

[0093] In this way, by applying a negative bias lower than the substrate potential to the light-shielding film 14A, in addition to the effects of the above embodiment, holes are induced on the side surface of the inter-pixel separation section 13, thereby reducing the generation of noise such as white scratches during imaging. Furthermore, by applying a negative bias lower than the substrate potential to the light-shielding film 14A during imaging, it becomes possible to improve the electron transfer characteristics of the electrons accumulated in the photoelectric conversion section 12.

[0094] (2-10. Variation 10) Figure 24 schematically shows an example of the cross-sectional configuration of the imaging device (imaging device 1J) according to Modification 10 of the present disclosure. Figure 25 schematically shows an example of the planar configuration of the imaging device 1J according to Modification 10 of the present disclosure. Note that Figure 24 represents the cross-section along line VIII-VIII shown in Figure 25. The imaging device 1J is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, similar to the imaging device 1 in the above embodiment, for example, a so-called back-illuminated imaging device.

[0095] In this modified image capture device 1J, an electrode layer 22 is provided above the space between adjacent photoelectric conversion units 12 within a unit pixel P, and an electrode layer 25 is provided on an inter-pixel separation unit 13 that penetrates between the first surface 11S1 and the second surface 11S2 of the semiconductor substrate 11. Furthermore, in the image capture device 1J, a P-type impurity layer (P+) 16 is formed on the side surface of the inter-pixel separation unit 13 facing the first surface 11S1 of the semiconductor substrate 11, and a P-type impurity layer (P) 17 is formed on the side surface of the inter-pixel separation unit 13 from the second surface 11S2 of the semiconductor substrate 11 to the P-type impurity layer (P+) 16.

[0096] Note that Figure 24 shows the state when a positive bias is applied to the electrode layer 22; when a negative bias is applied to the electrode layer 22, the inversion region X disappears.

[0097] Examples of P-type impurity layers connected to the P-type impurity layer (P) 17 include a floating diffusion FD and a P-well formed at the bottom of the transfer gate TG. In this case, the P-type impurity layer (P+) 16 and the electrode layer 25 form a so-called P-well tap. The impurity concentration of the P-type impurity layer (P+) 16 is, for example, 1 e18 cm³. -3 It is desirable that the above conditions are met. Alternatively, when forming the P-type impurity layer (P+) 16 by ion implantation, the dose should be 1e13cm³. -2 It is desirable that the above conditions are met. The impurity concentration of the P-type impurity layer (P) 17 is, for example, 1 e 18 cm³. -3 The following is preferable:

[0098] The p-type impurity layer (P+) 16 and the p-type impurity layer (P) 17 can be formed, for example, by forming trenches from the second surface 11S2 side of the semiconductor substrate 11 by Si etching in the FEOL process, then applying a resist or the like to the second surface 11S2 of the semiconductor substrate 11, and performing ion implantation after patterning the resist.

[0099] The electrode layer 25, like the electrode layer 22, is formed of, for example, a light-transmitting metal oxide. Examples of metal atoms constituting such a metal oxide include tin (Sn), zinc (Zn), indium (In), silicon (Si), zirconium (Zr), aluminum (Al), gallium (Ga), tungsten (W), chromium (Cr), cobalt (Co), nickel (Ni), tantalum (Ta), niobium (Nb), and molybdenum (Mo). An example of a metal oxide containing one or more of the above metal atoms is ITO (indium tin oxide). However, in addition to ITO, dopant-added tin oxide (SnO2)-based materials or zinc oxide-based materials obtained by adding dopants to aluminum zinc oxide may also be used as the constituent material of the electrode layer 25. Examples of zinc oxide-based materials include aluminum zinc oxide (AZO) with aluminum (Al) dopant added, gallium zinc oxide (GZO) with gallium (Ga) dopant added, and indium zinc oxide (IZO) with indium (In) dopant added. In addition, other materials such as CuI, InSbO4, ZnMgO, CuInO2, MgIn2O4, CdO, and ZnSnO3 may also be used.

[0100] As shown in Figure 25, the electrode layer 25 is provided so as to span adjacent unit pixels P. The electrode layer 22 and the electrode layer 25 are electrically connected to the control circuit 115, for example, in the peripheral region 100B, so that their potentials can be freely controlled. The P-type impurity layer (P+) 16 and the P-type impurity layer (P) 17, as well as the P-type impurity layer (not shown) connected to the P-type impurity layer (P) 17, have their potentials controlled via the electrode layer 25.

[0101] In FIG. 25, an example is shown where the electrode layer 22 and the electrode layer 25 each extend in the Y-axis direction. However, the layout of the electrode layer 22 and the electrode layer 25 is not limited to this. As shown in FIG. 26, for example, the electrode layer 22 and the electrode layer 25 may be provided for every two adjacent unit pixels P in the Y-axis direction with a shift of one unit pixel in the Y-axis direction, and may be connected to each other for the electrode layer 22 or the electrode layer 25 adjacent in the X-axis direction above the pixel separation portion 13.

[0102] FIG. 27 shows an example of a timing chart of the transfer gates TG(A) of the transfer transistors TR1 and TR2 during normal imaging, and the biases applied to the electrode layer 22 and the electrode layer 25. V_high1 is the positive bias applied to the transfer gate TG, V_high2 is the positive bias applied to the electrode layer 22, and V_high3 is the positive bias applied to the electrode layer 22B. V_low1 is the negative bias applied to the transfer gate TG, and V_low2 is the negative bias applied to the electrode layer 22. V_low3 and V_low4 are the positive bias and the negative bias applied to the electrode layer 25, respectively. V_low3 may be the same GND as the substrate potential.

[0103] During the time (t) corresponding to the read operation between ti1 and tf1, a positive bias V_high1 is applied to the transfer gate TG. In conjunction with the read operation of the transfer gate TG, during the time (t) between ti2 and tf2, a negative bias V_low2 is applied to the electrode layer 22. ti2 is later than ti1 (ti1 < ti2), and it is desirable that the delay time is several nsec to several tens of nsec. tf2 may be at the same time as tf1, earlier than tf1, or later than tf1, but it is desirable that the difference time between them is 0 to several tens of nsec. ti3 is at the same time as ti2, and it is desirable that tf3 is earlier than tf1 and tf2. Although not shown in the figure, during phase difference detection, the bias applied to the electrode layer 22 is always a negative bias V_low2 regardless of the operations of the transfer gate TG and the electrode layer 25.

[0104] Thus, in the imaging device 1J of this modified example, the bias timing chart shown in Figure 27 allows electrons accumulated in the photoelectric conversion unit 12 during readout to be quickly transferred to the floating diffusion FD between time tf3 and tf1. In other words, in addition to the effects of the above embodiment, it is possible to improve the transfer characteristics of electrons accumulated in the photoelectric conversion unit 12.

[0105] Furthermore, in the imaging device 1J, by forming a P-well tap on the first surface 11S1 side, the distance between the floating diffusion FD and transfer gate TG formed on the second surface 11S2 side can be increased. This reduces the electric field generated between the P-type impurity layer (P+) 16 and the N+-type impurity layer, thereby reducing the generation of leakage current.

[0106] Furthermore, by forming P-well taps on the first surface 11S1, the number of holes induced on the first surface 11S1 increases, reducing the generation of noise such as white scratches during imaging. Also, even as pixel miniaturization progresses with the high integration of the image sensor, the distance between the P-well taps and the floating diffusion FD and transfer gate TG formed on the second surface 11S2 remains almost the same, so the above effect is maintained regardless of miniaturization. Moreover, by forming P-well taps on the first surface 11S1, the degree of freedom in the arrangement of the floating diffusion FD and transfer gate TG formed on the second surface 11S2 can be improved.

[0107] (2-11. Variation 11) Figure 28 schematically shows an example of the cross-sectional configuration of the imaging device (imaging device 1K) according to Modification 11 of the present disclosure. Figure 29 schematically shows an example of the planar configuration of the imaging device 1K according to Modification 11 of the present disclosure. Note that Figure 28 represents the cross-section along the line IX-IX shown in Figure 29. The imaging device 1K is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, similar to the imaging device 1 in the above embodiment, for example, a so-called back-illuminated imaging device.

[0108] In the above modified example 10, a P-type impurity layer (P+) 16 is shown on the side surface of the inter-pixel isolation portion 13 that penetrates between the first surface 11S1 and the second surface 11S2 of the semiconductor substrate 11 on the first surface 11S1 of the semiconductor substrate 11, but the invention is not limited to this. The imaging device 1K extends the inter-pixel isolation portion 13 from the second surface 11S2 of the semiconductor substrate 11 toward the first surface 11S1, forming a DTI (Deep Trench Isolation) structure with a bottom surface within the semiconductor substrate 11, and a P-type impurity layer (P+) 16 is provided between the bottom surface of the inter-pixel isolation portion 13 and the first surface 11S1 of the semiconductor substrate 11 so as to span adjacent unit pixels P.

[0109] Thus, in this modified imaging device 1K, the inter-pixel separation section 13 has a DTI structure, and a P-type impurity layer (P+) 16 is provided between the bottom surface of the inter-pixel separation section 13 and the first surface 11S1 of the semiconductor substrate 11, straddling adjacent unit pixels P. The P-type impurity layer (P+) 16, provided straddling adjacent unit pixels P, can optically separate adjacent unit pixels P, similar to the inter-pixel separation section 13. Therefore, the same effects as in the modified imaging device 1K described above can be obtained.

[0110] (2-12. Variation 12) Figure 30 schematically shows an example of the cross-sectional configuration of an imaging device (imaging device 1L) according to Modification 12 of this disclosure. The imaging device 1L is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and is, like the imaging device 1 of the above embodiment, for example, a so-called back-illuminated imaging device.

[0111] In this modified imager 1L, similar to the modified imager 11 described above, the inter-pixel separation section 13 has a DTI structure, and a P-type impurity layer (P+) 16 is provided between the bottom surface of the inter-pixel separation section 13 and the first surface 11S1 of the semiconductor substrate 11, straddling adjacent unit pixels P. Furthermore, in this modified imager, instead of omitting the electrode layer 25, the light-shielding film 14A embedded in the inter-pixel separation section 13 is extended toward the first surface 11S1 and connected to the P-type impurity layer (P+) 16, and the light-shielding film 14A is used as a through electrode to control the potential of the P-type impurity layer (P+) 16, the P-type impurity layer (P) 17, and the P-type impurity layer (not shown) connected to the P-type impurity layer (P) 17 from the second surface 11S2 side. Even with this configuration, the same effects as in the modified imager 10 described above can be obtained.

[0112] <3. Application Examples> The above-mentioned imaging device 1 can be applied to any type of electronic device equipped with an imaging function, such as camera systems like digital still cameras and video cameras, or mobile phones with imaging capabilities. Figure 31 shows a schematic configuration of the electronic device 1000.

[0113] The electronic device 1000 includes, for example, a lens group 1001, an imaging device 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a recording unit 1005, an operation unit 1006, and a power supply unit 1007, all of which are interconnected via a bus line 1008.

[0114] The lens group 1001 captures incident light (image light) from the subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies it as a pixel signal to the DSP circuit 1002.

[0115] The DSP circuit 1002 is a signal processing circuit that processes signals supplied from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing the signals from the imaging device 1. The frame memory 1003 temporarily holds the image data processed by the DSP circuit 1002 for up to a certain number of frames.

[0116] The display unit 1004 consists of a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and records the video or still image data captured by the imaging device 1 onto a recording medium such as a semiconductor memory or a hard disk.

[0117] The operation unit 1006 outputs operation signals for various functions possessed by the electronic device 1000 in accordance with user operations. The power supply unit 1007 appropriately supplies various power sources to the DSP circuit 1002, frame memory 1003, display unit 1004, recording unit 1005, and operation unit 1006.

[0118] <4. Application Examples> (Examples of applications to mobile devices) The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be implemented as a device mounted on any type of mobile vehicle, such as an automobile, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0119] Figure 32 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0120] The vehicle control system 12000 comprises multiple electronic control units connected via a communication network 12001. In the example shown in Figure 32, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0121] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0122] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0123] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0124] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0125] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0126] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking system based on information from inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0127] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0128] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0129] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 57, the output devices include an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0130] Figure 33 shows an example of the installation position of the imaging unit 12031.

[0131] In Figure 33, the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0132] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by imaging units 12101 and 12105 are mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0133] Figure 33 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0134] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0135] For example, the microcomputer 12051, based on distance information obtained from imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to vehicle 12100). In particular, it can extract the nearest object on the vehicle 12100's path that is traveling in approximately the same direction as vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0136] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, heavy vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0137] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0138] The above describes an example of a mobile object control system to which the technology described herein can be applied. The technology described herein can be applied to the imaging unit 12031 of the configuration described above. Specifically, the imaging device 100 can be applied to the imaging unit 12031. By applying the technology described herein to the imaging unit 12031, high-definition images with low noise can be obtained, so that high-precision control using the captured images can be performed in the mobile object control system.

[0139] (Examples of application to endoscopic surgical systems) The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be applied to an endoscopic surgical system.

[0140] Figure 34 is a diagram showing an example of a schematic configuration of an endoscopic surgical system to which the technology described herein (the technology) may be applied.

[0141] Figure 34 illustrates a surgeon (physician) 11131 performing surgery on a patient 11132 on a patient bed 11153 using an endoscopic surgical system 11000. As shown in the figure, the endoscopic surgical system 11000 consists of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment device 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 equipped with various devices for endoscopic surgery.

[0142] The endoscope 11100 consists of a barrel 11101, the tip of which is inserted into the body cavity of the patient 11132 for a predetermined length, and a camera head 11102 connected to the base end of the barrel 11101. In the illustrated example, the endoscope 11100 is shown as a so-called rigid endoscope having a rigid barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible endoscope having a flexible barrel.

[0143] An opening into which an objective lens is fitted is provided at the tip of the endoscope tube 11101. A light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the tip of the endoscope tube by a light guide extending inside the endoscope tube 11101, and is irradiated through the objective lens towards the object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a straight-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0144] The camera head 11102 contains an optical system and an image sensor. Reflected light from the object being observed (observation light) is focused onto the image sensor by the optical system. The image sensor converts the observation light into electrical signals, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. This image signal is transmitted as RAW data to the camera control unit (CCU) 11201.

[0145] The CCU11201 consists of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and other components, and comprehensively controls the operation of the endoscope 11100 and the display device 11202. Furthermore, the CCU11201 receives image signals from the camera head 11102 and performs various image processing operations on these image signals, such as development processing (demosaic processing), to display the image based on those image signals.

[0146] The display device 11202 displays an image based on an image signal that has been processed by the CCU 11201, under control from the CCU 11201.

[0147] The light source device 11203 consists of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 11100 when photographing the surgical area, etc.

[0148] The input device 11204 is an input interface for the endoscopic surgical system 11000. The user can input various information and instructions to the endoscopic surgical system 11000 via the input device 11204. For example, the user can input instructions to change the imaging conditions (type of light, magnification, focal length, etc.) of the endoscope 11100.

[0149] The treatment instrument control device 11205 controls the drive of the energy treatment instrument 11112 for purposes such as tissue cauterization, incision, or vascular sealing. The insufflation device 11206 delivers gas into the patient's body cavity via the insufflation tube 11111 to inflate the body cavity of the patient 11132 for the purpose of securing a field of view by the endoscope 11100 and securing the operator's working space. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, images, or graphs.

[0150] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical area, can be configured as a white light source consisting of, for example, an LED, a laser light source, or a combination thereof. When the white light source is configured as a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to time-divisionally capture images corresponding to each of the RGB light sources by irradiating the observation target with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0151] Furthermore, the light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0152] Furthermore, the light source device 11203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue and irradiating with narrow-band light compared to the irradiation light used during normal observation (i.e., white light), so-called narrow-band imaging is performed to image predetermined tissues such as blood vessels on the surface of mucosa with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light is irradiated onto body tissue and fluorescence from the body tissue is observed (autofluorescence observation), or a reagent such as indocyanine green (ICG) is injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent is irradiated onto the body tissue to obtain a fluorescence image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0153] Figure 35 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Figure 34.

[0154] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with one another.

[0155] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and then incident on the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses, including a zoom lens and a focus lens.

[0156] The imaging unit 11402 is composed of image sensors. The imaging unit 11402 may consist of one image sensor (a so-called single-chip type) or multiple image sensors (a so-called multi-chip type). If the imaging unit 11402 is composed of multiple chips, for example, each image sensor may generate an image signal corresponding to RGB, and these signals may be combined to obtain a color image. Alternatively, the imaging unit 11402 may be configured to have a pair of image sensors for acquiring image signals for the right eye and the left eye, respectively, corresponding to 3D (dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. In addition, if the imaging unit 11402 is composed of multiple chips, multiple lens units 11401 may be provided corresponding to each image sensor.

[0157] Furthermore, the imaging unit 11402 does not necessarily have to be located in the camera head 11102. For example, the imaging unit 11402 may be located inside the lens barrel 11101, directly behind the objective lens.

[0158] The drive unit 11403 is composed of actuators and, under control from the camera head control unit 11405, moves the zoom lens and focus lens of the lens unit 11401 along the optical axis by a predetermined distance. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.

[0159] The communication unit 11404 consists of communication devices for sending and receiving various types of information with the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

[0160] Furthermore, the communication unit 11404 receives control signals from the CCU 11201 to control the drive of the camera head 11102 and supplies them to the camera head control unit 11405. These control signals include information regarding imaging conditions, such as information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image.

[0161] The imaging conditions such as frame rate, exposure value, magnification, and focus may be specified by the user as appropriate, or they may be automatically set by the control unit 11413 of the CCU11201 based on the acquired image signal. In the latter case, the endoscope 11100 will be equipped with so-called AE (Auto Exposure), AF (Auto Focus), and AWB (Auto White Balance) functions.

[0162] The camera head control unit 11405 controls the drive of the camera head 11102 based on the control signal received from the CCU 11201 via the communication unit 11404.

[0163] The communication unit 11411 consists of a communication device for sending and receiving various types of information with the camera head 11102. The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.

[0164] Furthermore, the communication unit 11411 transmits control signals to the camera head 11102 to control the driving of the camera head 11102. Image signals and control signals can be transmitted by telecommunications, optical communications, etc.

[0165] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102.

[0166] The control unit 11413 performs various controls related to imaging the surgical area, etc., by the endoscope 11100, and the display of the images obtained from imaging the surgical area, etc. For example, the control unit 11413 generates control signals to control the driving of the camera head 11102.

[0167] Furthermore, the control unit 11413 displays the captured image showing the surgical area on the display device 11202 based on the image signal processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific biological sites, bleeding, mist when using the energy treatment device 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information onto the image of the surgical area. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can proceed with the surgery with confidence.

[0168] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable compatible with electrical signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.

[0169] In the illustrated example, communication was performed via a wired connection using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

[0170] The above describes an example of an endoscopic surgical system to which the technology described herein can be applied. The technology described herein can be suitably applied to the imaging unit 11402 provided on the camera head 11102 of the endoscope 11100, among the configurations described above. By applying the technology described herein to the imaging unit 11402, the imaging unit 11402 can be miniaturized or made higher resolution, thereby providing a small or high-resolution endoscope 11100.

[0171] The present disclosure has been described above with reference to embodiments, modifications 1 to 8, application examples, and application examples. However, the present technology is not limited to the above embodiments, and various modifications are possible. For example, the above embodiments show an example in which a unit pixel P has two photoelectric conversion units 12 (12A, 12B), but the number of photoelectric conversion units 12 in a unit pixel P is not limited to this. A unit pixel P may be provided with three or four or more photoelectric conversion units 12.

[0172] Furthermore, while the above embodiments show an example in which adjacent intra-pixel separation portions 14 extend between a pair of opposing sides of the inter-pixel separation portion 13 surrounding the unit pixel P, the invention is not limited to this. For example, the intra-pixel separation portion 14 may have a gap between it and the inter-pixel separation portion 13 surrounding the unit pixel P. Moreover, the intra-pixel separation portion 14 may be composed of two intra-pixel separation portions having a so-called plug-in structure, extending from each of the pair of opposing sides of the inter-pixel separation portion 13 surrounding the unit pixel P toward the center of the unit pixel P, with a gap between them.

[0173] Furthermore, although the above embodiments have described the case where electrons are read out as signal charges, the invention is not limited to this, and holes can also be used as signal charges. In that case, the conductivity type of impurities in the photoelectric conversion unit 12 and the pixel separation unit 44, as well as the bias applied to the electrode layer 22 during normal imaging and phase difference detection, will be reversed.

[0174] Furthermore, the effects described herein are merely examples and are not limited to those described; other effects may also occur.

[0175] Furthermore, this disclosure can also take the following configuration. According to the technology with the following configuration, a plurality of pixels are arranged in a matrix, and each pixel has a plurality of photoelectric conversion units that generate a charge corresponding to the amount of light received by photoelectric conversion, and further, an electrode layer spanning adjacent photoelectric conversion units is provided on the light incident surface (first surface) side of a semiconductor substrate, where a first separation unit and a second separation unit are provided between adjacent pixels and between adjacent photoelectric conversion units, respectively. This makes it possible to form an inversion region (or weak inversion region) between adjacent photoelectric conversion units near the first surface as needed. Thus, it is possible to improve imaging performance. (1) A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. An electrode layer provided on the first surface side of the semiconductor substrate, spanning adjacent photoelectric conversion sections, and Equipped with, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion penetrates between the first surface and the second surface of the semiconductor substrate, The impurity layer is provided along the side surface of the second separation portion and includes a first impurity layer provided near the first surface of the semiconductor substrate on the side surface of the second separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, with a lower impurity concentration than the first impurity layer. Imaging device. (2) The imaging apparatus according to (1), wherein the electrode layer is provided over the entire surface of the pixel. (3 ) before The semiconductor substrate has a pixel section in which the plurality of pixels are arranged in a matrix, The electrode layer is provided over the entire surface of the pixel portion. (1) or (2) above An imaging device as described in any one of the following. (4) The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, The electrode layer is provided for each of the plurality of pixels, (1) or (2) above The imaging device described above. (5) The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, The electrode layer is provided for each pixel, (1) or (2) above The imaging device described above. (6) The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, A potential is applied to the electrode layer in the peripheral region surrounding the pixel portion. Any one of the above (1) to (5) The imaging device described above. (7) The first separation portion and the second separation portion extend from the second surface of the semiconductor substrate toward the first surface. Any one of the above (1) to (6) The imaging device described above. (8) The first separation portion penetrates between the first surface and the second surface of the semiconductor substrate. (7) The imaging device described above. (9) The second separation portion has an end face inside the semiconductor substrate, and the semiconductor substrate is located between the end face and the first surface. (7) or (8) above The imaging device described above. (10) The electrode layer is electrically connected to the first separation portion. (8) or (9) above The imaging device described above. (11) A potential is applied to the electrode layer via the electrically connected first separation portion. (10) The imaging device described above. (12) The above-mentioned second separation section is formed by an impurity diffusion layer. Any one of the above (1) through (11) The imaging device described above. (13) A first bias is applied to the electrode layer during charge accumulation, and a second bias in the opposite direction to the first bias is applied during readout. Any one of the above (1) to (12) The imaging device described above. (14) The semiconductor substrate further has a multilayer wiring layer on the second surface side, Any one of the above (1) through (13) The imaging device described above. (15) The first separation portion and the second separation portion are formed including a light-shielding conductive film. The conductive film provided in the first separation portion is electrically connected to the wiring provided on the second surface side of the semiconductor substrate. Any one of the above (1) to (14) The imaging device described above. (16) A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. The semiconductor substrate comprises an electrode layer provided on the first surface side, spanning adjacent photoelectric conversion sections, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion extends from the second surface of the semiconductor substrate toward the first surface and has a bottom surface inside the semiconductor substrate. The impurity layer includes a first impurity layer provided between the first surface of the semiconductor substrate and the bottom surface of the first separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, and having a lower impurity concentration than the first impurity layer. Imaging device. (17) Equipped with an imaging device, The imaging device is A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. An electrode layer provided on the first surface side of the semiconductor substrate, spanning adjacent photoelectric conversion sections, and It has, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion penetrates between the first surface and the second surface of the semiconductor substrate, The impurity layer is provided along the side surface of the second separation portion and includes a first impurity layer provided near the first surface of the semiconductor substrate on the side surface of the second separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, with a lower impurity concentration than the first impurity layer. electronic equipment. (18) Equipped with an imaging device, The imaging device is A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. The semiconductor substrate comprises an electrode layer provided on the first surface side, spanning adjacent photoelectric conversion sections, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion extends from the second surface of the semiconductor substrate toward the first surface and has a bottom surface inside the semiconductor substrate. The impurity layer includes a first impurity layer provided between the first surface of the semiconductor substrate and the bottom surface of the first separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, and having a lower impurity concentration than the first impurity layer. electronic equipment.

[0176] This application claims priority based on Japanese Patent Application No. 2021-039261, filed with the Japan Patent Office on March 11, 2021, and all contents of that application are incorporated herein by reference.

[0177] Those skilled in the art will understand that various modifications, combinations, subcombinations, and changes can be conceived depending on design requirements and other factors, and that these fall within the scope of the attached claims and their equivalents.

Claims

1. A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. The semiconductor substrate comprises an electrode layer provided on the first surface side, spanning adjacent photoelectric conversion sections, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion penetrates between the first surface and the second surface of the semiconductor substrate, The impurity layer is provided along the side surface of the second separation portion and includes a first impurity layer provided near the first surface of the semiconductor substrate on the side surface of the second separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, with a lower impurity concentration than the first impurity layer. Imaging device.

2. The imaging apparatus according to claim 1, wherein the electrode layer is provided over the entire surface of the pixel.

3. The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, The imaging apparatus according to claim 1, wherein the electrode layer is provided over the entire surface of the pixel portion.

4. The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, The imaging apparatus according to claim 1, wherein the electrode layer is provided for each of the plurality of pixels.

5. The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, The imaging apparatus according to claim 1, wherein the electrode layer is provided for each pixel.

6. The semiconductor substrate has a pixel portion in which the plurality of pixels are arranged in a matrix, The imaging apparatus according to claim 1, wherein a potential is applied to the electrode layer in the peripheral region surrounding the pixel portion.

7. The imaging apparatus according to claim 1, wherein the first separation portion and the second separation portion extend from the second surface of the semiconductor substrate toward the first surface.

8. The imaging apparatus according to claim 7, wherein the first separation portion penetrates between the first surface and the second surface of the semiconductor substrate.

9. The imaging apparatus according to claim 7, wherein the second separation portion has an end face inside the semiconductor substrate, and the semiconductor substrate is located between the end face and the first surface.

10. The imaging apparatus according to claim 8, wherein the electrode layer is electrically connected to the first separation portion.

11. The imaging apparatus according to claim 10, wherein a potential is applied to the electrode layer via the electrically connected first separation portion.

12. The imaging apparatus according to claim 1, wherein the second separation section is formed by an impurity diffusion layer.

13. The imaging apparatus according to claim 1, wherein a first bias is applied to the electrode layer during charge accumulation, and a second bias in the opposite direction to the first bias is applied during readout.

14. The imaging apparatus according to claim 1, further comprising a multilayer wiring layer on the second surface side of the semiconductor substrate.

15. The first separation portion and the second separation portion are formed including a light-shielding conductive film. The imaging apparatus according to claim 1, wherein the conductive film provided in the first separation portion is electrically connected to wiring provided on the second surface side of the semiconductor substrate.

16. A semiconductor substrate having a first surface and a second surface facing each other, wherein a plurality of pixels are arranged in a matrix, and each of the pixels has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. The semiconductor substrate comprises an electrode layer provided on the first surface side, spanning adjacent photoelectric conversion sections, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion extends from the second surface of the semiconductor substrate toward the first surface and has a bottom surface inside the semiconductor substrate. The impurity layer includes a first impurity layer provided between the first surface of the semiconductor substrate and the bottom surface of the first separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, and having a lower impurity concentration than the first impurity layer. Imaging device.

17. comprising an imaging device, The imaging device is A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. The semiconductor substrate has an electrode layer provided on the first surface side that spans adjacent photoelectric conversion sections, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion penetrates between the first surface and the second surface of the semiconductor substrate, The impurity layer is provided along the side surface of the second separation portion and includes a first impurity layer provided near the first surface of the semiconductor substrate on the side surface of the second separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, with a lower impurity concentration than the first impurity layer. electronic equipment.

18. comprising an imaging device, The imaging device is A semiconductor substrate having opposing first and second surfaces, on which a plurality of pixels are arranged in a matrix, and which has a plurality of photoelectric conversion units that generate an electric charge corresponding to the amount of light received for each pixel by photoelectric conversion, A first separation unit is provided between adjacent pixels to electrically and optically separate the adjacent pixels, A second isolation unit is provided between adjacent photoelectric conversion units within the pixel, which electrically isolates the adjacent photoelectric conversion units. The semiconductor substrate comprises an electrode layer provided on the first surface side, spanning adjacent photoelectric conversion sections, The electrode layer comprises a first electrode layer provided across adjacent photoelectric conversion sections and a second electrode layer provided across adjacent pixels. The semiconductor substrate further has an impurity layer on the first surface that is electrically connected to the second electrode layer and whose potential is controlled via the second electrode layer. The first separation portion extends from the second surface of the semiconductor substrate toward the first surface and has a bottom surface inside the semiconductor substrate. The impurity layer includes a first impurity layer provided between the first surface of the semiconductor substrate and the bottom surface of the first separation portion, and a second impurity layer provided between the second surface of the semiconductor substrate and the first impurity layer, and having a lower impurity concentration than the first impurity layer. electronic equipment.

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