Image processing methods, apparatus, electronic devices, media, and display devices

Abstract

This disclosure discloses image processing methods, apparatus, electronic devices, media, and display devices. [Solution] The image processing device includes at least one input module, an image processing module, a synchronization module, and a plurality of output modules. Each input module is used to collect a display image signal. The image processing module is used to determine the number of output modules and, based on the number of output modules, to determine each display sub-image signal corresponding to the display image signal. The synchronization module is used to determine a synchronization signal corresponding to each display sub-image signal. The plurality of output modules are used to transmit each display sub-image signal to a display terminal based on the synchronization signal. Thus, this disclosure realizes the division of a display image signal and the display of multiple display sub-image signals in different display sub-areas of a display terminal using multiple synchronization signals.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to an image processing method, apparatus, electronic device, medium, and display device.

Background Art

[0002] In order to provide consumers with a comfortable viewing experience, ultra-wide screens have emerged. For example, in a smart cabin display system, there are ultra-wide screens with a display width exceeding 4096 or 8192 pixels. However, limited by factors such as the cost of chips, the display width supported by the chip for driving the screen is limited. When displaying content on an ultra-wide screen, problems such as image distortion, incomplete display, or performance degradation occur, restricting the expansion of the width of the ultra-wide screen.

[0003] Therefore, how to satisfy the display demand of ultra-wide screens has become an urgent technical problem to be solved for popularizing the application of ultra-wide screens.

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of the present disclosure provide an image processing method, apparatus, electronic device, medium, and display device.

Means for Solving the Problems

[0005] An image processing apparatus provided according to one aspect of embodiments of the present disclosure includes at least one input module, an image processing module, a synchronization module, and a plurality of output modules. Each input module is used to collect an image signal (for display) that is a display target. The image processing module determines the number of output modules and, based on the number of output modules, is used to determine each sub-image signal that is a display target and corresponds to the image signal that is a display target. The synchronization module is used to determine a synchronization signal corresponding to each sub-image signal that is a display target. The plurality of output modules are used to respectively transmit each sub-image signal that is a display target to a display terminal based on the synchronization signal.

[0006] A display device provided in another embodiment of the present disclosure includes a display terminal and the image processing device described above, wherein the display terminal includes a plurality of sequence controllers and a screen, the number of sequence controllers being the same as the number of output modules in the image processing device, and each sequence controller of the display terminal acquires a sub-image signal to be displayed and drives the screen to display the sub-image signal to be displayed.

[0007] An image processing method provided in another embodiment of the present disclosure includes the steps of: at least one input module collecting an image signal to be displayed; an image processing module determining the number of output modules and, based on the number of output modules, determining each sub-image signal to be displayed that corresponds to the image signal to be displayed; a synchronization module determining a synchronization signal corresponding to each sub-image signal to be displayed; and a plurality of output modules transmitting each sub-image signal to be displayed to a display terminal based on the synchronization signals.

[0008] A computer-readable storage medium provided in another embodiment of the embodiments of this disclosure stores a computer program for performing the image processing method described above.

[0009] An electronic device provided in another embodiment of the present disclosure includes a processor and a memory for storing executable instructions of the processor, the processor being used to read executable instructions from the memory and execute the instructions to implement the image processing method. [Effects of the Invention]

[0010] Based on the image processing method, apparatus, electronic device, medium, and display device provided by the above embodiments of the present disclosure, the image processing apparatus includes at least one input module, an image processing module, a synchronization module, and a plurality of output modules, where each input module is used to collect an image signal to be displayed, the image processing module is used to determine the number of output modules and, based on the number of output modules, to determine each sub-image signal to be displayed that corresponds to the image signal to be displayed, the synchronization module is used to determine a synchronization signal corresponding to each sub-image signal to be displayed, and the plurality of output modules are used to transmit each sub-image signal to be displayed to a display terminal based on the synchronization signals. Thus, the present disclosure realizes the division of an image signal to be displayed and the synchronous display of the divided sub-image signals to be displayed in different display sub-areas of a display terminal using a plurality of synchronization signals, thereby achieving the effect of displaying the image signal to be displayed on a single ultra-wide screen, and since there is no need to adjust the hardware, the cost of the display terminal can be reduced.

[0011] The technical solutions of this disclosure will be described in more detail below with reference to drawings and embodiments. [Brief explanation of the drawing]

[0012] [Figure 1] This is a diagram of the display system to which this disclosure applies. [Figure 2] This is a schematic diagram of an image processing apparatus provided by one exemplary embodiment of the present disclosure. [Figure 3] This is a schematic diagram of a display device provided by one exemplary embodiment of the present disclosure. [Figure 4] This is a schematic flowchart of an image processing method provided by another exemplary embodiment of the present disclosure. [Figure 5] A structural diagram of an electronic device provided by an exemplary embodiment of this disclosure. [Modes for carrying out the invention]

[0013] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the drawings. Clearly, the embodiments described are only a selection of embodiments of the present disclosure, not all embodiments of the present disclosure, and it should be understood that the present disclosure is not limited to the exemplary embodiments described herein.

[0014] It should be noted that the relative arrangement of components and steps, numerical expressions, and numerical values ​​described in these embodiments do not limit the scope of this disclosure unless specifically stated otherwise.

[0015] The embodiments of this disclosure can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate with many other general-purpose or dedicated computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, large computer systems, and distributed cloud computing technology environments including any of the above systems.

[0016] Electronic devices such as terminals, computer systems, and servers can be described in the general context of executable instructions (e.g., program modules) of a computer system that are executed by that computer system. Typically, program modules include routines, programs, object programs, components, logic, and data structures, which perform specific tasks or realize specific abstract data types. Computer systems / servers are implemented in a distributed cloud computing environment, where tasks are executed by remote processing devices linked by communication networks. In a distributed cloud computing environment, program modules reside on storage media of local or remote computing systems, including storage devices. (Summary of this disclosure)

[0017] In smart cabin display systems and other liquid crystal display systems, ultra-wide screens with a display width exceeding 4096 or 8192 pixels exist. However, the display width supported by the chip driving the screen display is limited, for example, it can only support a display width smaller than 4096 pixels. When displaying content on an ultra-wide screen, problems such as image distortion, incomplete display, or performance degradation occur, limiting the expansion of the ultra-wide screen width.

[0018] To be understood, the ultra-wide screen referred to in this disclosure is a screen whose display width exceeds the display width supported by a single sequence controller.

[0019] The technical solution of the present disclosure is to install an image processing device in a SOC system. The image processing module in the image processing device divides an image signal that needs to be displayed on an ultra-wide screen and is a display target into a plurality of sub-image signals that are display targets. A plurality of output modules synchronously transmit the plurality of sub-image signals that are display targets to a display terminal based on a plurality of synchronization signals respectively, and synchronously display the plurality of sub-image signals that are display targets in different display sub-regions of the display terminal respectively. The plurality of display sub-regions form a completed display region, thereby realizing the display of a complete image signal that is a display target on an ultra-wide screen. (Exemplary System)

[0020] FIG. 1 shows a display system 100 applied to an image processing method to which an embodiment of the present disclosure is applied.

[0021] As shown in FIG. 1, the display system 100 includes a system-on-chip SOC 101 and a display terminal 102. Here, the SOC 101 includes an image processing device 11. The image processing device 11 acquires an image signal that is a display target and needs to be displayed on the display terminal 102, and processes the image signal that is the display target to obtain a plurality of sub-image signals that are display targets. A plurality of output modules 111 transmit the sub-image signals that are display targets to each sequence controller 12 of the display terminal 102 respectively based on a plurality of synchronization signals, and each sequence controller 12 drives different display sub-regions of the display terminal 102 to display each sub-image signal that is the display target.

[0022] Here, the number of output modules 111 included in the image processing device 11 is the same as the number of sequence controllers 12 in the display terminal. For example, if the display terminal 102 is driven by two sequence controllers 12, the number of output modules 111 in the image processing device 11 is also two. A data channel for data communication for transmitting each sub-image signal that is the display target is established between each output module 111 and each sequence controller 12.

[0023] In order to ensure that the sub-image signals to be displayed can be simultaneously displayed in different display sub-areas of the display terminal 102, in the image processing apparatus 11, a plurality of clock generators of the same source clock are used to respectively generate synchronization signals for the display of the sub-image signals to be displayed, and based on the synchronization signals, the sub-image signals to be displayed are transmitted to the display terminal 102. Each sequence controller of the display terminal 102 drives the corresponding display sub-areas based on the synchronization signals to synchronously display the sub-image signals to be displayed, and realizes the complete display of the image signal to be displayed through each display sub-area.

[0024] The number of the output modules 111 and sequence controllers 12 provided by the embodiments of the present disclosure is merely exemplary. According to actual requirements, two or more output modules 111 and sequence controllers 12 are installed. (Exemplary device 1)

[0025] FIG. 2 is a schematic diagram of an image processing apparatus provided by an exemplary embodiment of the present disclosure. As shown in FIG. 2, the image processing apparatus 11 is located in the SOC. The image processing apparatus 11 includes at least one input module 21, an image processing module 22, a synchronization module 23, and a plurality of output modules 24. Each module can be connected by internal connection lines.

[0026] Each input module 21 is used to collect the image signal to be displayed. The image processing module 22 determines the number of the output modules 24 and is used to determine each sub-image signal to be displayed corresponding to the image signal to be displayed based on the number of the output modules 24. The synchronization module 23 is used to determine the synchronization signal corresponding to each sub-image signal to be displayed. The plurality of output modules 24 are used to respectively transmit each sub-image signal to be displayed to the display terminal based on the synchronization signal.

[0027] Hereinafter, the input module 21, the image processing module 22, the synchronization module 23, and the output module 24 will be described in detail.

[0028] The input module 21 is used to instruct a function module to acquire the image signal to be displayed, and the input module 21 can read the image signal to be displayed from the SOC's memory (e.g., internal storage or cache memory). The input module 21 can access the setting storage address in the memory and read the image signal to be displayed from the setting storage address.

[0029] Here, the input module 21 includes a data bus, such as a direct memory access bus (DMA), and collects and reads the image signal to be displayed from memory via the data bus. Each input module 21 includes a corresponding data bus and collects data from different memory storage spaces via the corresponding data bus. When it is necessary to collect the image signal to be displayed, the central processing unit (CPU) drives the input module 21 by computer instructions to collect the image signal to be displayed from memory via the corresponding data bus.

[0030] To be understood, image data in the SOC's memory (e.g., internal memory or cache memory) is data that is transmitted to the SOC in various ways and stored in the SOC's memory. For example, it may be image data transmitted from a camera and received via a Mobile Industry Processor Interface (MIPI), or image data from an external USB device received via a Universal Serial Bus (USB), or image data acquired from a network via a wireless interface connected to a network server.

[0031] In one selectable embodiment, the number of input modules 21 is one or more. When there is one input module, the single input module acquires the complete image signal to be displayed. When there are multiple input modules, each input module acquires a portion of the image signal to be displayed. The portion of the image signal to be displayed acquired by the multiple input modules is combined into the image signal to be displayed in this embodiment. The image signal to be displayed here is used to indicate the pixel values ​​of the image to be displayed on the screen. For example, the image signal to be displayed includes at least one of the following: image information of the vehicle's external environment collected by the camera, video information to be played back, and navigation information during driving. When there are multiple input modules, the image signals to be displayed collected by each input module are used to realize signals of different functional types, or they are used to realize signals of the same functional type.

[0032] In one selectable embodiment, the input module 21 collects the image signal to be displayed and then transmits the image signal to be displayed to the image processing module 22.

[0033] The image processing module 22 is used to determine the number of output modules and, based on the number of output modules, to determine each sub-image signal that corresponds to the image signal to be displayed.

[0034] The image processing module 22 includes a graphics processing unit (GPU), and a connection is established between the image processing module 22 and the input module 21 by a connecting line. In this disclosure, there may be one or more image processing modules.

[0035] In a specific embodiment, the image processing module 22 is further used to process the image signal to be displayed, for example, performing operations such as enhancement processing and brightness adjustment on the image signal to be displayed in order to improve the image quality and display effect.

[0036] In this embodiment, the image processing module 22 is used to determine the number of output modules 24 and, based on the number of output modules 24, to determine each sub-image signal that corresponds to the image signal to be displayed. For example, if the number of input modules 21 and the number of output modules 24 do not match, the image processing module 22 can divide the image signal to be displayed, one or more of which have been collected by the multiple input modules 21, based on the number of output modules, and obtain each sub-image signal that matches the number of output modules 24.

[0037] The synchronization module 23 is used to determine the synchronization signal corresponding to each sub-image signal to be displayed. Here, the synchronization signal is used to match the display on the display terminal screen with the sequence and to ensure that display errors or data loss are avoided.

[0038] In this embodiment, the synchronization module 23 includes multiple clock generators of the same source, each generating the same synchronization signal for the display of different sub-image signals to be displayed, so that each sub-image signal to be displayed is displayed synchronously in different display sub-areas at different locations on the display terminal.

[0039] Here, the synchronization signal includes a horizontal synchronization signal H-Sync and a vertical synchronization signal V-Sync. The vertical synchronization signal is used to ensure that the image frame and the screen refresh rate are synchronized, and can be used to solve the problem of screen tearing. The horizontal synchronization signal is used to synchronize the start of each row of the screen, ensuring that the image is displayed accurately and continuously from one side of the screen to the other, and enabling the drawing of the image row by row on the screen.

[0040] There are multiple output modules 24, and each of the multiple output modules 24 transmits a sub-image signal to be displayed to the display terminal based on a synchronization signal. Here, the number of output modules is the same as the number of sub-image signals to be displayed, and each output module transmits one sub-image signal to be displayed to the display terminal.

[0041] Here, the output module 24 is an output interface that communicates and exchanges data with the display terminal, and the output interface transmits data and controls the display terminal via a wired or wireless connection. Here, the wired connection includes HDMI connection, USB connection, Ethernet connection, etc., and the wireless connection includes Bluetooth connection, Wireless Fidelity (abbreviated as WIFI) connection, etc.

[0042] In the image processing apparatus provided by the embodiment of this disclosure, each input module is used to collect the image signal to be displayed, an image processing module is used to determine the number of output modules and, based on the number of output modules, to determine each sub-image signal to be displayed that corresponds to the image signal to be displayed, a synchronization module is used to determine a synchronization signal corresponding to each sub-image signal to be displayed, and a plurality of output modules are used to transmit each sub-image signal to be displayed to a display terminal based on the synchronization signal. As a result, this disclosure realizes the division of the image signal to be displayed and the synchronous display of the divided sub-image signals to be displayed in different display sub-areas of the display terminal via a plurality of synchronization signals, thereby achieving the effect of displaying the image signal to be displayed on a single ultra-wide screen, and since there is no need to adjust the hardware, the cost of the display terminal can be reduced.

[0043] In the embodiment shown in Figure 2 above, in several selectable implementations, the image processing module 22 is used to determine each sub-image signal to be displayed that corresponds to the image signal to be displayed, based on the number of output modules. This includes the image processing module 22 determining the number of output modules 24, and, if the image processing module 22 determines that the number of output modules 24 does not match the number of input modules 21, dividing the image signal to be displayed collected by the multiple input modules 21 based on the number of output modules 24 and obtaining each sub-image signal to be displayed that matches the number of output modules 24.

[0044] In some implementations, the number of input modules 21 is smaller than the number of output modules 24. For example, if there is one input module and two output modules, the image signal acquired by the input module can be divided to obtain two sub-image signals that are also to be displayed.

[0045] Furthermore, the image processing module 22 can perform preprocessing such as augmentation and brightness adjustment on the image signal to be processed, and then further divide the image signal to be displayed based on the above method, thereby contributing to improving the efficiency of image preprocessing.

[0046] In this implementation, the image processing module 22 divides the image signals to be displayed, collected by multiple input modules, to obtain sub-image signals to be displayed that match the number of output modules, and further transmits and displays the image signals to be processed using different data channels.

[0047] In the embodiment shown in Figure 2 above, the image processing module 22 is used to determine each sub-image signal to be displayed, which corresponds to the image signal to be displayed, based on the number of output modules 24. This includes the image processing module 22 determining the number of input modules 21, and, when the image processing module 22 determines that the number of output modules 24 matches the number of input modules 21, each image signal to be displayed collected by each input module 21 is designated as a sub-image signal to be displayed.

[0048] Preferably, when the number of input modules and the number of output modules match, a corresponding number of image processing modules 22 can be installed in the SOC, each image processing module 22 corresponds to one GPU, and each GPU simultaneously processes the image subsignals to be displayed acquired by each input module, and transmits the processed image subsignals to be displayed to the display terminal via the corresponding output module 24. Alternatively, one image processing module 22 is installed in the SOC, but this image processing module 22 includes multiple GPUs, each GPU simultaneously processes the image subsignals to be displayed acquired by each input module, and transmits the processed image subsignals to be displayed to the display terminal via the corresponding output module 24.

[0049] For example, if the input module includes input module 1 and input module 2, the image processing module 22 includes image processing module 1 and image processing module 2, and the output module includes output module 1 and output module 2, then the SOC will have two image signal processing paths. One of these paths is input module 1 - image processing module 1 - output module 1, in which the image signal to be displayed, collected by input module 1, is processed by image processing module 1 and can be output to the display terminal by output module 1. The other path is input module 2 - image processing module 2 - output module 2, in which the image signal to be displayed, collected by input module 2, is processed by image processing module 2 and can be output to the display terminal by output module 2.

[0050] In this embodiment, by designing multiple processing paths in the SOC and simultaneously processing the image signals to be displayed through these multiple processing paths, image processing efficiency is improved, contributing to improved image rendering and display efficiency on the display terminal side.

[0051] In the embodiment shown in Figure 2 above, in several selectable implementations, the use of multiple output modules 24 to transmit each sub-image signal to be displayed to a display terminal based on a synchronization signal includes the multiple output modules 24 transmitting each sub-image signal to be displayed to multiple sequence controllers of the display terminal based on a synchronization signal, thereby driving the display terminal simultaneously to display each sub-image signal.

[0052] Here, the clock generator is a device that generates a synchronization signal and is used to drive the display terminal to display the image signal based on the synchronization signal.

[0053] In the embodiment shown in Figure 2 above, in several selectable implementations, the synchronization module 23 includes a plurality of clock generators based on a co-source clock supply, the number of clock generators being the same as the number of output modules, and the synchronization module 23 is used to determine the synchronization signal corresponding to each sub-image signal to be displayed, which includes each clock generator in the synchronization module 23 generating a corresponding synchronization signal for each sub-image signal to be displayed.

[0054] In this implementation, the number of clock generators based on the same clock source is the same as the number of output modules 24, each clock generator generates a corresponding synchronization signal for each sub-image signal to be displayed, and each output module 24 transmits the sub-image signal to be displayed to the display terminal via the corresponding data channel based on the synchronization signal, thereby enabling the display sub-areas at different locations on the display terminal to display each sub-image signal to be displayed in sync.

[0055] In this implementation, a clock generator based on a common clock source generates the same synchronization signal for each of the different sub-image signals to be displayed. Multiple output modules then transmit each of the sub-image signals to be displayed to the display terminal based on the synchronization signals generated by the common clock source. This enables the display of each sub-image signal to be displayed simultaneously in display sub-areas at different locations on the display terminal, thereby achieving the effect of displaying the complete image signal on an ultra-wide screen. (Example device 2)

[0056] Figure 3 is a schematic diagram of a display device provided by an exemplary embodiment of the present disclosure, which, as shown in Figure 3, includes an image processing device 31 and a display terminal 32.

[0057] Here, the image processing apparatus 31 is the apparatus in the embodiment shown in Figure 2, and includes at least one input module 311 (the number of input modules is one or the same as the number of output modules 314, with two input modules shown in Figure 3, namely input module 1 and input module 2, but not limited to two), an image processing module 312, a synchronization module 313, and a plurality of output modules 314 (the number of output modules is the same as the number of sequence controllers in the display terminal 32, with only two output modules shown in Figure 3, namely output module 1 and output module 2, but not limited to two), and the display terminal 32 includes a plurality of sequence controllers 321 (with only two sequence controllers shown in Figure 3, namely sequence controller 1 and sequence controller 2, but not limited to two), and a screen 322.

[0058] Here, the number of sequence controllers 321 is the same as the number of output modules 314. Each sequence controller 321 acquires the sub-image signal to be displayed from the corresponding output module 314 and drives the display sub-regions at different positions on the screen 322 to display each of the sub-image signals to be displayed.

[0059] As shown in Figure 3, a data channel, such as a High Definition Multimedia Interface (HDMI) channel, is established between each output module 314 of the image processing device 31 and each sequence controller 321 of the display terminal 32. Through the established data channel, each sequence controller 321 receives the sub-image signal to be displayed transmitted by the corresponding output module 314 and drives each display sub-area on the screen synchronously to display the corresponding image data.

[0060] In concrete terms, the sequence controller 321 converts the received sub-image signal to be displayed into a low-voltage differential signal, and uses this low-voltage differential signal to drive the display sub-area corresponding to the screen to display the sub-image signal.

[0061] For example, the display terminal 32 can perform scanning and data display by controlling the left and right display sub-regions of the screen, respectively, using two sequence controllers (sequence controller 1 and sequence controller 2). Sequence controller 1 can drive the left display sub-region of screen 322 to display it based on a synchronization signal after receiving the sub-image signal to be displayed transmitted by output module 1 via the data channel, and sequence controller 2 can drive the right display sub-region of screen 322 to display it based on a synchronization signal after receiving the sub-image signal to be displayed transmitted by output module 2 via the data channel. In this way, sequence controllers 1 and 2, having received the sub-image signal to be displayed, can drive the display sub-regions at different positions on the screen, respectively, to display the received sub-image signal.

[0062] As can be understood, the number of sequence controllers 321 is determined by the width of the screen 322 and the display width that each sequence controller 321 can support. For example, if the screen width is 12288 pixels and each sequence controller can support a display width of 4096 pixels, then at least three sequence controllers are required to support the display of the screen.

[0063] Here, the display sub-areas driven by each sequence controller are determined by the connection lines between the sequence controller and the screen. The sequence controller and the screen are connected using a network cable or a serial interface cable.

[0064] Here, when the image processing device 31 divides the image signal to be displayed, it can divide it based on the ratio of different display sub-regions on the screen. For example, if the sizes of the display sub-regions driven by the two sequence controllers are the same, the image signal to be displayed can be divided uniformly to obtain two sub-image signals to be displayed. If the sizes of the display sub-regions driven by the two sequence controllers are different, and sequence controller 1 drives the left 3 / 4 of the display sub-region on the screen, and sequence controller 2 drives the right 1 / 4 of the display sub-region on the screen, then the image signal to be displayed can be divided into two sub-image signals, left and right, with a size ratio of 3:1, based on this ratio.

[0065] Preferably, in embodiments of this disclosure, the size of the display sub-regions driven by each sequence controller is usually the same, and therefore, when the number of input modules is less than the number of output modules, the image signal to be displayed collected by each input module can be uniformly divided, and multiple sub-image signals of the same size can be obtained.

[0066] It should be noted that each module in this device can be disassembled and / or reassembled, and that these disassembly and / or reassembly should be considered equivalent solutions to this device.

[0067] The image processing apparatus in the exemplary embodiment of this device corresponds to the exemplary image processing apparatus described above, and related information can be referenced and applied to each other. The beneficial technical effects corresponding to the exemplary embodiment of this device are omitted here, as they are described by referring to the corresponding beneficial technical effects of the exemplary image processing apparatus described above. (Example method)

[0068] Figure 4 is a schematic flowchart of an image processing method provided by another exemplary embodiment of the present disclosure, which is applied to an image processing device in the SOC of a display device and includes the following steps, as shown in Figure 4.

[0069] In step 401, at least one input module collects the image signal to be displayed.

[0070] In this embodiment, each input module can read the image signal to be displayed from the memory of the SOC.

[0071] When implementing this specifically, if there are multiple input modules, corresponding address parameters, including memory addresses and the size of the storage space, can be pre-assigned to each input module, and each input module can read the image signal to be displayed from memory based on its address parameters.

[0072] In step 402, the image processing module determines the number of output modules and, based on the number of output modules, determines each sub-image signal to be displayed that corresponds to the image signal to be displayed.

[0073] In this embodiment, the number of output modules for each display device is predetermined, and the number of output modules matches the number of sub-image signals to be displayed and the number of display sub-areas on the display terminal side. The sub-image signals to be displayed, output by each output module, are displayed in different display sub-areas on the display terminal.

[0074] In this embodiment, the number of sub-image signals to be displayed is the same as the number of output modules. After determining the number of output modules, the image signal to be displayed can be divided into sub-image signals to be displayed that match the number of output modules.

[0075] In step 403, the synchronization module determines the synchronization signal corresponding to each sub-image signal to be displayed.

[0076] In this embodiment, the synchronization signal for each sub-image signal to be displayed can be generated by a clock generator of the same clock source, and the synchronization signals corresponding to each sub-image signal to be displayed are the same, which contributes to ensuring that the display of each sub-image signal to be displayed is synchronized.

[0077] In step 404, the multiple output modules transmit each sub-image signal to be displayed to the display terminal based on the synchronization signal.

[0078] In this embodiment, based on a synchronization signal, each output module can transmit each sub-image signal to be displayed to the sequence controller corresponding to the display terminal. Each output module transmits the corresponding sub-image signal to the sequence controller via a data channel with the corresponding sequence controller.

[0079] The method provided by the above embodiment of this disclosure realizes the generation of the same synchronization signal using a clock generator of the same clock source, and the simultaneous transmission of each sub-image signal to be displayed to the display terminal based on the same synchronization signal, thereby enabling multiple sequence controllers on the display terminal side to drive display sub-regions at different positions on the screen, and thereby achieving the effect of expanding the screen width.

[0080] In several selectable implementations, the step of an image processing module determining each sub-image signal to be displayed, corresponding to the image signal to be displayed, based on the number of output modules, includes the step of determining the number of input modules, and, if the number of output modules does not match the number of input modules, the step of dividing the image signal to be displayed, collected by multiple input modules, based on the number of output modules, to obtain each sub-image signal to be displayed that matches the number of output modules.

[0081] In this implementation, the number of input modules is smaller than the number of output modules. For example, if there is one input module and two output modules, the image signal acquired by the input module can be divided to obtain two sub-image signals that are also to be displayed.

[0082] In this implementation, by dividing the image signal to be displayed, which is collected by multiple input modules, a number of sub-image signals to be displayed, corresponding to the number of output modules, are obtained, and furthermore, the image signals to be processed are transmitted and displayed using different data channels.

[0083] In several other selectable implementations, the step of an image processing module determining each sub-image signal to be displayed, corresponding to the image signal to be displayed, based on the number of output modules, includes the step of determining the number of input modules, and, if the number of output modules matches the number of input modules, the step of making each image signal to be displayed, collected by each input module, a sub-image signal to be displayed.

[0084] In concrete implementation, when the number of input modules matches the number of output modules, a corresponding number of image processing modules can be installed in the SOC. Each image processing module simultaneously processes the image sub-signals to be displayed that each input module has acquired, and the processed image sub-signals to be displayed are transmitted to the display terminal by the corresponding output module.

[0085] In this embodiment, by designing multiple processing paths in the SOC and simultaneously processing the image signals to be displayed through these multiple processing paths, image processing efficiency is improved, contributing to improved image rendering and display efficiency on the display terminal side.

[0086] In several selectable implementations, the step of multiple output modules transmitting each sub-image signal to be displayed to a display terminal based on a synchronization signal includes the step of multiple output modules transmitting each sub-image signal to be displayed to multiple sequence controllers of the display terminal based on a synchronization signal, and the multiple sequence controllers simultaneously driving the display terminal to display each sub-image signal.

[0087] Here, when the synchronization module generates a synchronization signal, each clock generator based on the same clock source can generate a corresponding synchronization signal for each sub-image signal to be displayed. As a result, each output module transmits the sub-image signal to be displayed to the display terminal via the corresponding data channel based on the synchronization signal, enabling the display sub-areas at different locations on the display terminal to display each sub-image signal synchronously.

[0088] To ensure understanding, the exemplary embodiments of this method correspond to the image processing apparatus in the embodiment shown in Figure 2, and the relevant contents can be referenced and used in conjunction with each other. The beneficial technical effects corresponding to the exemplary embodiments of this method are omitted here, as they are described in reference to the corresponding beneficial technical effects of the exemplary image processing apparatus described above. (Example electronic device)

[0089] Figure 5 is a structural diagram of an electronic device provided by an embodiment of the present disclosure, which includes at least one processor 51 and memory 52.

[0090] The processor 51 may be a central processing unit (CPU) or another form of processing unit having data processing and / or instruction execution functions, and is used to control other components of the electronic device 5 to perform desired functions.

[0091] Memory 52 includes one or more computer program products, which include computer-readable storage media of various types, such as volatile memory and / or non-volatile memory. Volatile memory includes random access memory (RAM) and / or cache memory (cache). Non-volatile memory includes read-only memory (ROM), hard disks, flash memory, etc. One or more computer program instructions are stored in the computer-readable storage media, and the processor 51 executes the stored one or more computer program instructions to implement the image processing methods and / or other desired functions of each embodiment of the present disclosure.

[0092] In one example, the electronic device further includes an input device 53 and an output device 54, and these components are connected to each other by a bus system and / or other form of connection mechanism (not shown).

[0093] The input device 53 further includes, for example, a keyboard, mouse, touchscreen, sound collection equipment (for example, a microphone array), etc.

[0094] The output device 54 can output various types of information to the outside, including, for example, a display, speaker, printer, communication network, and remote output devices connected thereto.

[0095] Naturally, for the sake of simplification, Figure 5 shows only some of the components of the electronic device relevant to this disclosure, omitting components such as buses and input / output interfaces. Beyond this, the electronic device may include any other appropriate components depending on the specific application. (Example of a computer-readable storage medium)

[0096] Embodiments of the present disclosure further include, in addition to the above-described methods and apparatus, a computer-readable storage medium that stores computer program instructions which, when executed by a processor, cause the processor to perform steps in the image processing methods of the various embodiments of the present disclosure described in the “Exemplary Methods” section of this specification.

[0097] Computer-readable storage media employ any combination of one or more readable media. Readable media are used to indicate readable signal media or readable storage media. Readable storage media include, but are not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include electrical connections with one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above.

[0098] While the basic principles of this disclosure have been explained above with reference to specific examples, it should be noted that the advantages, advantages, and effects mentioned in this disclosure are merely illustrative and not limiting, and it is not considered necessary for each example of this disclosure to be provided. Furthermore, the specific details disclosed above are merely illustrative and intended to facilitate understanding, and are not limiting, and do not imply that this disclosure must be implemented in the specific details described above.

[0099] Those skilled in the art can make various modifications and variations to this disclosure without departing from the spirit and scope of the application. Thus, this disclosure is intended to include such modifications and variations if they fall within the scope of the claims of this disclosure and the equivalent art.

Claims

1. An image processing apparatus comprising at least one input module, an image processing module, a synchronization module, and a plurality of output modules, Each of the aforementioned input modules is used to collect an image signal, and the image signal is used to indicate the pixel values ​​of the image displayed on the screen. The image processing module is used to determine the number of output modules and, based on the number of output modules, to determine each sub-image signal corresponding to the image signal, wherein the number of output modules is the same as the number of sequence controllers in the display terminal. The synchronization module is used to determine the synchronization signal corresponding to each of the sub-image signals. An image processing apparatus used to display an image represented by the sub-image signal corresponding to each of the display sub-regions in each of the display sub-regions of the display terminal, by having the plurality of output modules transmit each of the sub-image signals to each of the plurality of sequence controllers based on the synchronization signal, thereby driving the display terminal simultaneously.

2. The image processing module is used to determine each of the sub-image signals corresponding to the image signal based on the number of output modules. The image processing module determines the number of input modules, The apparatus according to claim 1, wherein if the image processing module determines that the number of output modules does not match the number of input modules, it divides the image signals collected by the plurality of input modules based on the number of output modules and obtains each of the sub-image signals in a number that matches the number of output modules.

3. The image processing module is used to determine each of the sub-image signals corresponding to the image signal based on the number of output modules. The image processing module determines the number of input modules, The apparatus according to claim 1, wherein the image processing module determines that the number of output modules matches the number of input modules, and then determines that each of the image signals collected by each of the input modules is its respective sub-image signal.

4. The synchronization module includes multiple clock generators based on the same clock source, and the number of the multiple clock generators is the same as the number of the multiple output modules. The synchronization module is used to determine the synchronization signal corresponding to each of the sub-image signals. The apparatus according to any one of claims 1 to 3, wherein each clock generator in the synchronization module generates a synchronization signal corresponding to each of the sub-image signals.

5. A display device comprising a display terminal and an image processing apparatus according to any one of claims 1 to 3, The display terminal includes a plurality of sequence controllers and a screen, the number of sequence controllers being the same as the number of output modules in the image processing device, A display device comprising a sequence controller in the display terminal that acquires the sub-image signals and drives the display terminal to display the images represented by the sub-image signals corresponding to each of the display sub-regions.

6. The display device according to claim 5, wherein each sequence controller drives the display terminal to display the image represented by each sub-image signal in each of the display sub-regions at different positions on the screen.

7. A step in which at least one input module collects an image signal, wherein the image signal is used to indicate the pixel values ​​of an image displayed on a screen, A step in which an image processing module determines the number of output modules and, based on the number of output modules, determines each sub-image signal corresponding to the image signal, wherein the number of output modules is the same as the number of sequence controllers in the display terminal. The synchronization module determines a synchronization signal corresponding to each of the sub-image signals, An image processing method comprising the steps of: a plurality of output modules transmitting each of the sub-image signals to each of the plurality of sequence controllers based on the synchronization signal, thereby causing the plurality of sequence controllers to simultaneously drive the display terminal to display an image represented by the sub-image signal corresponding to each of the display sub-regions of the display terminal.

8. A computer-readable storage medium storing a computer program for performing the method described in Claim 7.

9. Processor and The processor includes a memory for storing executable instructions, The processor is an electronic device used to read the executable instructions from the memory and execute the instructions to realize the method according to claim 7.

Images