On-chip RC oscillator, integrated circuit chip equipped with the oscillator, and communication terminal

Abstract

The Company provides on-chip RC oscillators, chips and communication terminals. [Solution] The on-chip RC oscillator includes a voltage regulator module, an RC core oscillator module, a frequency sampling and conversion module, and a frequency modulation module. The oscillator's clock frequency is sampled and detected in real time via the frequency sampling and conversion module. The sampled clock frequency is converted into a voltage signal, which is then analog-to-digital converted into a corresponding digital code. When the clock frequency changes, the frequency modulation module circuit converts the digital code into a control signal. Therefore, to achieve temperature compensation for the clock frequency, the RC core oscillator module outputs a voltage with an appropriate temperature coefficient, so that the clock frequency output from the oscillator changes little with temperature. On the other hand, to perform precision calibration of the clock frequency, the RC core oscillator module outputs a zero-temperature coefficient current of an appropriate magnitude.

Description

Technical Field

[0004] , , ,

[0001] The present invention belongs to the field of analog integrated circuit technology, relates to an on-chip RC oscillator, and also relates to an integrated circuit chip provided with this on-chip RC oscillator and a corresponding communication terminal.

Background Art

[0002] With the continuous development of the integrated circuit process and the continuous improvement of the performance of the integrated circuit system, new challenges and opportunities for high-precision integrated circuits have been presented. The on-chip RC oscillator is widely applied in integrated circuit chips, especially in mixed-signal chips and high-end analog chips. By integrating a high-precision on-chip RC oscillator in an integrated circuit chip, not only can the accuracy and reliability of the system be improved, but also the system cost can be reduced. In a high-precision mixed-signal integrated circuit chip, the quality of the clock signal output from the on-chip RC oscillator affects the conversion accuracy of the analog-digital conversion circuit. In other integrated circuit chips with a communication interface, by integrating a high-precision on-chip RC oscillator, the bit error rate of the communication interface can be significantly reduced, and the stability and reliability of data transmission of the communication interface can be significantly improved.

[0003] Chinese Patent Application with Application Number 201710598686.2 discloses a high-frequency low-temperature drift RC oscillator. Although the oscillator performs frequency temperature adjustment and accuracy calibration to a certain extent, due to the existence of a certain temperature coefficient in the calibration current used, a large deviation occurs in the temperature characteristics of the frequency output from the oscillator as the temperature changes. In addition, since its temperature calibration is realized by active devices (such as NMOSFETs) and resistors, the resistance value of the resistor depends on obvious process dispersion and electrical parameters, and the accuracy of the frequency output from the oscillator is greatly limited.

[0004] Furthermore, a Chinese patent application with application number 201811430806.9 discloses an adjustable high-precision RC oscillator. This oscillator achieves low-temperature drift by adjusting the impedance output from the amplifier, introducing a portion of the input detuning voltage, and adjusting the absolute value of the comparator delay to change its temperature coefficient, thereby compensating for the temperature characteristics of the subsequent digital logic delay time. However, because the digital delay unit itself has certain temperature characteristics, there are limitations to the accuracy of its output frequency, and implementation becomes more difficult as the output frequency increases. [Overview of the Initiative]

[0005] The main technical problem that this invention aims to solve is to provide an on-chip RC oscillator.

[0006] Another technical problem that the present invention aims to solve is to provide a chip equipped with the on-chip RC oscillator and a corresponding communication terminal.

[0007] To achieve the above objective, the present invention employs the following technical approach. According to a first embodiment of the present invention, a voltage regulator module, an RC core oscillator module, a frequency sampling and conversion module, and frequency adjustment The present invention provides an on-chip RC oscillator comprising the RC core oscillator module, the frequency sampling and conversion module, and the frequency adjustment Each module is connected, and the output terminal of the RC core oscillator module is connected to the input terminal of the frequency sampling / conversion module, and the output terminal of the frequency sampling / conversion module is connected to the frequency adjustment It is connected to the input terminal of the module, and the frequency adjustment The output terminal of the module is connected to the RC core oscillator module.

[0008] The voltage regulator module provides a power supply voltage that does not change according to the power supply voltage. and zero temperature coefficient current It is used to generate.

[0009] The frequency sampling and conversion module converts the frequency of the clock signal output from the RC core oscillator module, which is sampled in real time, into a voltage signal, and then performs analog-to-digital conversion to obtain the corresponding digital code.

[0010] The frequency adjustment The module receives the digital code and generates a control signal in the digital code based on the preset voltage and zero temperature coefficient current of the standard temperature coefficient of the on-chip RC oscillator, and sends an appropriate voltage and temperature coefficient to the RC core oscillator module. Second The system is controlled to output a zero-temperature coefficient current, thereby achieving temperature compensation and accuracy calibration for the clock signal frequency output from the RC core oscillator module.

[0011] Preferably, the RC core oscillator module comprises a first switching tube, a second switching tube, a first capacitor, a first comparator, a second comparator, an RS flip-flop, and a buffer circuit. The gates of the first and second switching tubes are each connected to the output terminals of the RS flip-flop, and the drains of the first and second switching tubes are each connected to one end of a first bias current and a second bias current. The other ends of the first and second bias currents are connected to one end of the first capacitor, and the inverting input terminal of the first comparator is connected to the positive-sequence input terminal of the second comparator. The positive-sequence input terminal of the first comparator and the inverting input terminal of the second comparator are connected to the frequency adjustmentThe output terminals of the first and second comparators are connected to the corresponding input terminals of the RS flip-flops, with the output terminals of the first and second comparators connected to the corresponding input terminals of the RS flip-flops. The signal output terminal of the RS flip-flops is connected to the input terminal of the buffer circuit, and the first comparator, the second comparator, and the RS flip-flops each receive a reset signal. The source of the first switching tube is connected to the power supply voltage, and the source of the second switching tube and the other end of the first capacitor are grounded, respectively.

[0012] Preferably, the frequency sampling and conversion module comprises a frequency sampling module and an analog-to-digital conversion module, wherein the input terminal of the frequency sampling module is connected to the output terminal of the RC core oscillator module, the output terminal of the frequency sampling module is connected to the input terminal of the analog-to-digital conversion module, and the output terminal of the analog-to-digital conversion module is connected to the frequency adjustment It is connected to the input terminal of the module.

[0013] Preferably, the frequency sampling module includes a two-phase non-superimposed clock generation circuit, Switched Capacitor Resistance and , electric It comprises a pressure-equal-mode proportional amplifier. The input terminal of the two-phase non-superimposed clock generation circuit is connected to the output terminal of the RC core oscillator module, and the output terminal of the two-phase non-superimposed clock generation circuit is Switched Capacitor It is connected to the resistor. Switched Capacitor Resistance is zero temperature coefficient The current source and the input terminal of the voltage common-mode proportional amplifier are connected, respectively, and the output terminal of the voltage common-mode proportional amplifier is connected to the analog-to-digital conversion module.

[0014] Preferably, the above Switched Capacitor The resistor comprises a first NMOS tube, a second NMOS tube, and a second capacitor. The gates of the first and second NMOS tubes are connected to the output terminals of the two-phase non-superimposed clock generation circuit, and the source of the first NMOS tube is zero temperature coefficientIt is connected to a current source. The drain of the first NMOS tube and the source of the second NMOS tube are each connected to one end of the second capacitor, the other end of the second capacitor is grounded, and the drain of the second NMOS tube is connected to the input terminal of the voltage common-mode proportional amplifier.

[0015] Preferably, the voltage common-mode proportional amplifier comprises a first operational amplifier, a first resistor, and a second resistor. The common-mode input terminal of the first operational amplifier is connected to the drain of the second NMOS tube, the inverting input terminal of the first operational amplifier is connected to one end of the first resistor and the second resistor, the other end of the first resistor is grounded, and the other end of the second resistor is connected to the output terminal of the first operational amplifier and the analog-to-digital conversion module, respectively.

[0016] Preferably, the frequency adjustment The module includes decoding and logic control circuits, and clock temperature drift. adjustment Circuit and clock absolute precision adjustment The circuit is provided. The input terminal of the decoding and logic control circuit is In the frequency sampling / conversion module The output terminals of the analog-to-digital conversion module are connected to the output terminals of the decoding and logic control circuits, respectively, the clock temperature drift adjustment Circuit and absolute accuracy of the clock adjustment It is connected to the input terminal of the circuit. The clock temperature drift adjustment The circuit is connected to the positive-sequence input terminal of the first comparator and the inverting input terminal of the second comparator, and the clock absolute accuracy adjustment The output terminal of the circuit is connected to the first bias current and the second bias current.

[0017] Preferably, the clock temperature drift adjustmentThe circuit includes a second bandgap reference circuit, a first transmission gate switch group, and a second low dropout linear regulator. The second bandgap reference circuit is connected to the first transmission gate switch group. The first transmission gate switch group is connected to the output terminal of the decode and logic control circuit and the input terminal of the second low dropout linear regulator respectively. The output terminal of the second low dropout linear regulator is correspondingly connected to the positive phase input terminal of the first comparator and the inverted input terminal of the second comparator.

[0018] Preferably, the second bandgap reference circuit generates voltages with different values and different temperature coefficients through a first resistor voltage division network composed of a plurality of fourth resistors connected in series, and each voltage is correspondingly connected to one transmission gate switch of the first transmission gate switch group.

[0019] Preferably, the second low dropout linear regulator includes an error amplifier, a power tube, a second resistor voltage division network, and a third resistor voltage division network. The positive phase input terminal of the error amplifier is connected to the first transmission gate switch group. The inverted input terminal of the error amplifier is connected to one end of the second resistor voltage division network and the third resistor voltage division network. The other end of the second resistor voltage division network is connected to the drain of the power tube. The output terminal of the error amplifier is connected to the gate of the power tube.

[0020] Preferably, the clock absolute accuracy adjustment The circuit includes a first programmable current source, a second programmable current source, a second transmission gate switch group, and a third transmission gate switch group. The first programmable current source and the second programmable current source are connected to the voltage regulator module through a first current mirror circuit and a second current mirror circuit Voltage-current conversion circuit that outputs the zero-temperature coefficient current insideIt is connected corresponding to the output terminal of , and the first programmable current source is connected to the second transmission gate switch group. The second programmable current source is connected to the third transmission gate switch group, and the second transmission gate switch group and the third transmission gate switch group are respectively connected to the output terminal of the decoding and logic control circuit.

[0021] Preferably, the first programmable current source is composed of a plurality of third PMOS transistors, and the gate of each third PMOS transistor is respectively connected to the output terminal of the voltage-current conversion circuit through the first current mirror circuit. The drain of each third PMOS transistor is respectively connected to one of the second transmission gate switches in the second transmission gate switch group.

[0022] The second programmable current source is composed of a plurality of third NMOS transistors, and the gate of each third NMOS transistor is respectively connected to the output terminal of the voltage-current conversion circuit through the second current mirror circuit, and the drain of each third NMOS transistor is respectively connected to one of the third transmission gate switches in the third transmission gate switch group.

[0023] According to the second aspect of the embodiment of the present invention, an integrated circuit chip including the above on-chip RC oscillator is provided.

[0024] According to the third aspect of the embodiment of the present invention, a communication terminal including the above on-chip RC oscillator is provided.

[0025] The on-chip RC oscillator, chip and communication terminal provided by the embodiment of the present invention sample and detect the clock frequency of the oscillator in real time through the frequency sampling and conversion module, convert the sampled clock frequency into a voltage signal, and then perform analog-to-digital conversion on the corresponding digital code. When the clock frequency changes, the frequency adjustmentThe module circuit converts the digital code into a control signal. Therefore, on the one hand, to achieve temperature compensation with respect to the clock frequency, the RC core oscillator module outputs a voltage with an appropriate temperature coefficient. On the other hand, to perform accuracy calibration with respect to the clock frequency, the RC core oscillator module outputs a zero-temperature coefficient current of an appropriate magnitude. [Brief explanation of the drawing]

[0026] [Figure 1] This is a schematic circuit diagram of an on-chip RC oscillator according to an embodiment of the present invention. [Figure 2] This is a schematic circuit diagram of a voltage regulator module in an on-chip RC oscillator according to an embodiment of the present invention. [Figure 3] This is a schematic circuit diagram of an RC core oscillator module in an on-chip RC oscillator according to an embodiment of the present invention. [Figure 4] This is a schematic circuit diagram of a frequency sampling and conversion module in an on-chip RC oscillator according to an embodiment of the present invention. [Figure 5] This is a schematic circuit diagram of a frequency adjustment module in an on-chip RC oscillator according to an embodiment of the present invention. [Figure 6] This is a schematic diagram of a clock temperature drift adjustment circuit in an on-chip RC oscillator according to an embodiment of the present invention. [Figure 7] This is a schematic diagram of a clock absolute accuracy adjustment circuit in an on-chip RC oscillator according to an embodiment of the present invention. [Modes for carrying out the invention]

[0027] The technical details of the present invention will be described in more detail below with reference to the drawings and specific embodiments.

[0028] As a module widely used in high-performance integrated circuit chips, on-chip RC oscillators need to ensure that the frequency of the clock signal output from them can overcome the effects of process and power supply voltage, and can still output an accurate frequency even within a wide range of temperature changes, thereby providing a high-quality and reliable clock signal to the entire system. As shown in Figure 1, in an embodiment of the present invention, a voltage regulator module 101, an RC core oscillator module 102, a frequency sampling and conversion module 103, and frequency adjustment An on-chip RC oscillator is provided, comprising module 104. The voltage regulator module 101 includes an RC core oscillator module 102, a frequency sampling and conversion module 103, and frequency adjustment Each is connected to module 104, and the output terminal of the RC core oscillator module 102 is connected to the input terminal of the frequency sampling / conversion module 103. The output terminal of the frequency sampling / conversion module 103 is connected to the frequency adjustment It is connected to the input terminal of module 104, and the frequency adjustment The output terminal of module 104 is connected to RC core oscillator module 102.

[0029] Here, in order to supply power to other modules of this on-chip RC oscillator, the voltage regulator module 101 is used to generate one or more power supply voltages that do not change with the power supply voltage.

[0030] The frequency sampling and conversion module 103 converts the frequency of the clock signal output from the RC core oscillator module 102, which is sampled in real time, into a voltage signal, and then performs analog-to-digital conversion to obtain the corresponding digital code.

[0031] frequency adjustmentModule 104 receives a digital code output from the frequency sampling / conversion module 103, generates a control signal in the digital code based on a preset voltage and zero-temperature coefficient current of the standard temperature coefficient of the on-chip RC oscillator, controls the RC core oscillator module to output a voltage and zero-temperature coefficient current with an appropriate temperature coefficient, and performs temperature compensation and accuracy calibration for the clock frequency output from the RC core oscillator module.

[0032] The voltage regulator module 101 is used to isolate the external power supply voltage and generate an internal power supply voltage that does not change with the power supply voltage. By using the voltage output from the voltage regulator module 101 to power the RC core oscillator module 102, non-ideal elements such as disturbances and noise interference from the external power supply can be eliminated, and the influence of external power supply fluctuations on the frequency of the clock signal output from the on-chip RC oscillator can be effectively blocked. The voltage regulator module 101 can also be implemented using any voltage regulator circuit, such as a linear regulated power supply or a switching power supply circuit.

[0033] In one embodiment of the present invention, as shown in Figure 2, the linear regulated power supply used in the voltage regulator module 101 includes a first bandgap reference circuit 201 and a voltage / current regulator. conversion The circuit may also include a first low-dropout linear regulator 200. The first low-dropout linear regulator 200 comprises an error amplifier 202, a power tube 203, and a feedback resistor network 204. The output terminal of the first bandgap reference circuit 201 is connected to the common-mode input terminal of the error amplifier 202 and to the voltage and current conversionThe inverting input terminal of the error amplifier 202 is connected to the input terminal of circuit 205, and the output terminal of the error amplifier 202 is connected to the gate of power tube 203, and the drain of power tube 203 is connected to the feedback resistor network 204, forming the output terminal of the first low-dropout linear regulator 200 to connect to the output load. The power supply voltage VDD is connected to the first bandgap reference circuit 201, the error amplifier 202, and the power tube 203, respectively. The feedback resistor network 204 is grounded. The feedback resistor network 204 is composed of resistors Rf1 and Rf2 connected in series. Voltage / Current conversion Circuit 205 consists of an operational amplifier, a power tube, and a resistor, and the current output from it supplies a DC current bias to other modules. (Voltage / Current) conversion Circuit 205 is a conventional, mature circuit, and its specific structure and operating principle will not be explained here.

[0034] Here, the first bandgap reference circuit 201 functions to generate a reference voltage Vref and bias current, and the reference voltage Vref is used to supply an input reference voltage to the error amplifier 202. The error amplifier 202, power tube 203 and feedback resistor network 204 form a negative feedback loop to achieve voltage clamping, and as a result, the first low-dropout linear regulator 200 can generate an internal power supply voltage that does not change with the power supply voltage. Voltage / Current conversion Circuit 205 uses frequency sampling / conversion module 103 and frequency adjustment By providing each module 104 with a zero-temperature coefficient current, the influence of temperature on the clock frequency output from the RC core oscillator module 102 is reduced.

[0035] The RC core oscillator module 102 is used to generate a clock frequency that is voltage-controlled or current-controlled. This RC core oscillator module 102 can be implemented in various ways. The RC core oscillator module 102 may have the structure of a voltage-controlled oscillator or a current-controlled oscillator. The RC core oscillator module 102 may be a feedback self-oscillating circuit composed of resistors, capacitors and amplifiers, or it may be a ring oscillator consisting of an inverter.

[0036] The following description uses an RC core oscillator module 102, which generates a clock frequency controlled by current, as an example. As shown in Figure 3, the RC core oscillator module 102 includes a first switching tube 301, a second switching tube 304, a first capacitor C1, a first comparator 306, a second comparator 307, an RS flip-flop 308, and a buffer circuit 309. The gates of the first switching tube 301 and the second switching tube 304 are connected to the inverting output terminal of Q of the RS flip-flop 308, respectively, and the drains of the first switching tube 301 and the second switching tube 304 are connected to one end of the first bias current I1_302 and the second bias current I2_303, respectively. The other ends of the first bias current I1_302 and the second bias current I2_303 are connected to one end of the first capacitor C1, the inverting input terminal of the first comparator 306, and the positive-sequence input terminal of the second comparator 307. The positive-sequence input terminal of the first comparator 306 and the inverting input terminal of the second comparator 307 are frequency adjustment The corresponding voltage output terminal of module 104 (for example, the frequency shown in Figure 6) adjustmentThe voltage output terminals VH and VL of the second low-dropout linear regulator 605 of module 104 are connected. The output terminals of the first comparator 306 and the second comparator 307 are connected to the corresponding input terminals R and S of the RS flip-flop 308, and the signal output terminal Q of the RS flip-flop 308 is connected to the input terminal of the buffer circuit 309. The first comparator 306, the second comparator 307, and the RS flip-flop 308 each receive a reset signal. The source of the first switching tube 301 is connected to the power supply voltage, and the source of the second switching tube 304 and the other end of the first capacitor C1 are grounded. Here, the first switching tube 301 may be implemented using a PMOS tube, and the second switching tube 304 may be implemented using an NMOS tube.

[0037] The process by which the RC core oscillator module 102 generates a current-controlled clock frequency is as follows: First, it receives the initial first bias current I1 and second bias current I2 supplied from the first bandgap reference circuit 201 of the voltage regulator module 101, and controls the first bias current I1_302 and the second bias current I2_303, respectively, via the first switching tube 301 and the second switching tube 304 so that the first capacitor C1 is charged and discharged. The voltage VC1 generated at the first capacitor C1 passes through the first comparator 306 and the second comparator 307, respectively, and is compared with the corresponding first reference voltage VH and second reference voltage VL, continuously outputting alternating high and low levels to the RS flip-flop 308. Thus, the RS flip-flop 308 outputs logic high levels and logic low levels as 0 or 1, controlling the first switching tube 301 and the second switching tube 304 to alternately turn on and off. This controls the first bias current I1_302 and the second bias current I2_303 so that the first capacitor C1 continues to charge and discharge, and the generated voltage VC1 is compared with the corresponding reference voltages via the first comparator 306 and the second comparator 307, respectively, thus rounding over to obtain the clock signal. The buffer circuit 309 drives and shapes the clock signal so that the RC core oscillator module 102 can output a clock signal of a constant frequency. The reset signal controls the enabling of the first comparator 306, the second comparator 307, and the RS flip-flop.

[0038] Specifically, when the first switching tube 301 is conducting, the second switching tube 304 is in an interrupted state. At this time, the first capacitor C1 is charged by the first bias current I1_302, and the voltage VC1 at the capacitor's terminals is output to the first comparator 306 and the second comparator 307, respectively. If this voltage VC1 is greater than or less than the first reference voltage VH, the voltage output from the first comparator 306 jumps accordingly. Similarly, when the second switching tube 304 is conducting, the first switching tube 302 is in an interrupted state. At this time, the first capacitor C1 is discharged, and the voltage VC1 at the capacitor's terminals is output to the first comparator 306 and the second comparator 307, respectively. If this voltage VC1 is greater than or less than the second reference voltage VL, the voltage output from the second comparator 307 jumps accordingly. As a result, the voltages output from the first comparator 306 and the second comparator 307 alternate between high and low levels, generating a clock signal.

[0039] The period of the clock signal generated by the RC core oscillator module 102 is determined by the charge-discharge time of the first capacitor C1, which is determined by the impedances of the first switching tube 301 and the second switching tube 304, the first bias current I1_302, the second bias current I2_303, and the first capacitance value of the first capacitor C1. Therefore, the impedances of the first switching tube 301 and the second switching tube 304, and the first capacitance value of the first capacitor C1 are fixed values. Consequently, the frequency of the clock signal output from the RC core oscillator module can be accurately calibrated by adjusting the first bias current I1_302 and the second bias current I2_303.

[0040] The temperature coefficients corresponding to the first reference voltage VH and the second reference voltage VL determine the temperature characteristics of the frequency of the clock signal output from the RC core oscillator module. By adjusting the temperature coefficients corresponding to the first reference voltage VH and the second reference voltage VL, temperature compensation for the frequency of the clock signal output by the RC core oscillator module 102 can be achieved.

[0041] If the voltage regulator circuit used in the voltage regulator module 101 cannot supply the first bias current I1_302 and the second bias current I2_303 to the RC core oscillator module 102, the first bias current I1 and the second bias current I2 may be supplied to the RC core oscillator module 102 by adding a self-bias current generation circuit to the voltage regulator module 101.

[0042] As shown in Figure 1, the frequency sampling and conversion module 103 comprises a frequency sampler 105 and an analog-to-digital conversion module 106. The input terminal of the frequency sampler 105 is connected to the output terminal of the RC core oscillator module 102, and the output terminal of the frequency sampler 105 is connected to the input terminal of the analog-to-digital conversion module 106. The output terminal of the analog-to-digital conversion module 106 is connected to the frequency adjustment It is connected to the input terminal of module 104.

[0043] The frequency sampler 105 samples the frequency of the clock signal output from the RC core oscillator module 102 in real time and converts the sampled frequency into a voltage signal. As shown in Figure 4, the frequency sampler 105 is connected to a two-phase non-superimposed clock generation circuit 402. Switched Capacitor It comprises a resistor 403 and a voltage common-mode proportional amplifier 404. The input terminal of the two-phase non-superimposed clock generation circuit 402 is connected to the output terminal of the RC core oscillator module 102, and the output terminal of the two-phase non-superimposed clock generation circuit 402 is Switched Capacitor It is connected to resistor 403. Switched Capacitor Resistor 403 is zero temperature coefficientThe current source IZTC and the common-mode proportional voltage amplifier 404 are connected to the input terminals, respectively, and the output terminal of the common-mode proportional voltage amplifier 404 is connected to the analog-to-digital conversion module 405.

[0044] Specifically, as shown in Figure 4, Switched Capacitor The resistor 403 comprises a first NMOS tube 406, a second NMOS tube 407, and a second capacitor CR. Here, the gates of the first NMOS tube 406 and the second NMOS tube 407 are connected to the output terminals of the two-phase non-superimposed clock generation circuit 402, and the source of the first NMOS tube 406 is zero temperature coefficient It is connected to a current source IZTC. This zero-temperature coefficient current IZTC makes the clock signal frequency of the sampled RC core oscillator module 102 less susceptible to temperature influences, ensuring the accuracy of frequency sampling. The drain of the first NMOS tube 406 and the source of the second NMOS tube 407 are each connected to one end of the second capacitor CR, the other end of the second capacitor CR is grounded, and the drain of the second NMOS tube 407 is connected to the input terminal of the voltage common-mode amplifier 404.

[0045] As shown in Figure 4, the voltage common-mode proportional amplifier 404 comprises a first operational amplifier 408, a first resistor Rf, and a second resistor R1. The common-mode input terminal of the first operational amplifier 408 is Switched Capacitor The resistor 403 is connected to the drain of the second NMOS tube 407, and the inverting input terminal of the first operational amplifier 408 is connected to one end of the first resistor Rf and one end of the second resistor R1, respectively. The other end of the first resistor Rf is grounded, and the other end of the second resistor R1 is connected to the output terminal of the first operational amplifier 408 and the analog-to-digital conversion module 405, respectively.

[0046] The process by which the frequency sampler 105 converts the frequency of the clock signal output from the RC core oscillator module 102, which is sampled in real time, into a voltage signal is as follows: The clock signal Vosc output from the RC core oscillator module 102 passes through the two-phase non-superimposed clock generation circuit 402 to generate a series of high and low levels to control the on / off state of the first NMOS tube 406 and the second NMOS tube 407. This enables charging and discharging of the second capacitor CR and generates the equivalent resistance value R of the sampled clock signal. Assuming that the oscillation period of the clock signal Vosc output from the RC core oscillator module 102 is T, the equivalent resistance value of the clock signal is R = T / CR, and the corresponding voltage is VR = IZTC * R = IZTC * (T / CR). Here, CR is the capacitance value of the second capacitor CR, and IZTC is the zero-temperature coefficient current. This achieves the objective of converting the frequency of the clock signal output from the RC core oscillator module 102 into the magnitude of the voltage VR. Considering the range of change of the voltage VR and the accuracy of the analog-to-digital conversion module 405, the voltage VR is amplified to a amplification factor A = 1 + (Rf / R1) via the voltage common-mode proportional amplifier 404.

[0047] The analog-to-digital conversion module can be implemented using a conventional analog-to-digital conversion chip. This analog-to-digital conversion chip is used to convert the amplification voltage VR output from the frequency sampler 105 into digital codes D0, ..., Dn (consisting of high and low levels of 0 and 1). Here, the number of conversion bits and the conversion accuracy of the analog-to-digital conversion chip are determined by the frequency adjustment Module 104 allows for the selection of an appropriate analog-to-digital conversion chip based on the required clock signal temperature characteristics and frequency accuracy, in order to determine the accuracy of temperature compensation and calibration of the clock signal output from the RC core oscillator module.

[0048] As shown in Figure 5, frequency adjustment Module 104 includes a decode and logic control circuit 502, and a clock temperature drift control. adjustmentCircuit 503 and clock absolute accuracy adjustment The circuit includes circuit 504. The input terminal of the decode and logic control circuit 502 is connected to the output terminal of the analog-to-digital conversion module 405, and the output terminal of the decode and logic control circuit 502 is connected to the clock temperature drift adjustment Circuit 503 and clock absolute accuracy adjustment Connected to the input terminal of circuit 504. Clock temperature drift adjustment Circuit 503 is connected to the positive-sequence input terminal of the first comparator 306 and the inverting input terminal of the second comparator 307 of the RC core oscillator module 102.

[0049] absolute clock accuracy adjustment The output terminal of circuit 504 is connected to the first bias current I1_302 and the second bias current I2_303 of the RC core oscillator module 102.

[0050] The digital code output from the analog-to-digital conversion module 405 is decoded and controlled via the logic control circuit 502 to obtain high-level and low-level digital control bits. <n:0>and Bit <m:0>It is converted to the following, where m and n indicate the number of bits. Here, the control signal bit <n:0>Based on a preset voltage of the standard temperature coefficient of the on-chip RC oscillator, the clock temperature drift is supplied to the RC core oscillator module 102 to provide a first reference voltage VH and a second reference voltage VL corresponding to the required temperature coefficient. adjustment By controlling circuit 503, the temperature characteristics of the frequency of the clock signal output from the RC core oscillator module 102 are adjusted.

[0051] Control signal bit <m:0>Based on a preset reference zero-temperature coefficient current of the on-chip RC oscillator, the RC core oscillator module 102 is supplied with a first zero-temperature coefficient current I3 and a second zero-temperature coefficient current I4, with absolute clock accuracy. adjustment Circuit 504 is controlled to adjust the absolute accuracy of the frequency of the clock signal output from the RC core oscillator module 102.

[0052] As shown in Figure 6, clock temperature drift adjustment Circuit 503 comprises a second bandgap reference circuit 601, a first transmission gate switch group 604, and a second low-dropout linear regulator 605. The second bandgap reference circuit 601 is connected to the first transmission gate switch group 604, which in turn is connected to the output terminal of the decode and logic control circuit 502 and the input terminal of the second low-dropout linear regulator 605. The output terminal of the second low-dropout linear regulator 605 is connected to the positive-sequence input terminal of the first comparator 306 and the inverting input terminal of the second comparator 307 of the RC core oscillator module 102.

[0053] As shown in Figure 6, the second bandgap reference circuit 601 comprises a first PMOS tube 607, a second PMOS tube 608, a first triode 609, a second triode 610, a second operational amplifier 611, and a first resistive voltage divider network 606. The drain of the first PMOS tube 607 and the emitter of the first triode 609 are connected to the inverting input terminals of the second operational amplifier 611, respectively. The positive-sequence input terminal of the second operational amplifier 611 is connected on one end to the first resistive voltage divider network 606 and on the other end to the emitter of the second triode 610 via a third resistor R3. The other end of the first resistive voltage divider network 606 is connected to the drain of the second PMOS tube 608, and the output terminal of the second operational amplifier 611 is connected to the gates of the first PMOS tube 607 and the second PMOS tube 608, respectively. The first resistive voltage divider network 606 is connected to the first transmission gate switch group 604. The sources of the first PMOS tube 607 and the second PMOS tube 608 are connected to the power supply voltage, respectively, and the bases and collectors of the first triode 609 and the second triode 610 are grounded, respectively.

[0054] It should be noted that the first PMOS tube 607, the second PMOS tube 608, the first triode 609, the second triode 610, and the second operational amplifier 611 constitute the basic structure of a typical first bandgap reference circuit 201. Therefore, the second bandgap reference circuit 601 can be constructed by connecting the first bandgap reference circuit 201 and the first resistive voltage divider network 606.

[0055] Here, as shown in Figure 6, the first resistive voltage divider network 606 is composed of a plurality of fourth resistors connected in series to generate voltages Vbg1, ..., Vbgn of different values ​​with different temperature coefficients. The first transmission gate switch group 604 comprises a plurality of first transmission gate switches. The number of first transmission gate switches is the same as the number of voltages Vbg of different values ​​with different temperature coefficients generated by the first resistive voltage divider network 606, and there is a one-to-one correspondence.

[0056] Each of the fourth resistors is connected to correspond to one first transmission gate switch, that is, each fixed voltage with a fixed temperature coefficient output from the first resistor voltage divider network 606 corresponds to one first transmission gate switch. When the frequency of the clock signal output from the sampled RC core oscillator module 102 changes due to factors such as temperature and environment, the digital code corresponding to the frequency of the clock signal changes accordingly. Based on a preset voltage of the standard temperature coefficient of the on-chip RC oscillator, the digital code is decoded and converted through the logic control circuit 502 to obtain high-level and low-level digital control signals Bits. <n:0>Through this, the corresponding first transmission gate switch controls the second low-dropout linear regulator 605 to output a voltage Vref_TCF with an appropriate temperature coefficient. The voltage Vref_TCF is used as the reference voltage for the second low-dropout linear regulator 605, which outputs a first reference voltage VH and a second reference voltage VL with appropriate temperature coefficients to the RC core oscillator module 102, thereby adjusting the first reference voltage VH and the second reference voltage VL to adjust the temperature characteristics of the clock signal output from the RC core oscillator module 102.

[0057] As shown in Figure 6, the second low-dropout linear regulator 605 comprises an error amplifier 612, a power tube 613, a second resistive voltage divider network 614, and a third resistive voltage divider network 615. The positive-sequence input terminal of the error amplifier 612 is connected to the first transmission gate switch group 604, and the inverting input terminal of the error amplifier 612 is connected to one end of the second resistive voltage divider network 614 and the third resistive voltage divider network 615. The other end of the second resistive voltage divider network 614 is connected to the drain of the power tube 613, and the other end of the third resistive voltage divider network 615 is grounded. The output terminal of the error amplifier 612 is connected to the gate of the power tube 613, and the source of the power tube 613 is connected to the power supply voltage. The error amplifier 612 and the power tube 613 form a negative feedback loop with the second resistive voltage divider network 614 and the third resistive voltage divider network 615, respectively, to achieve voltage clamping. As a result, the second low-dropout linear regulator 605 outputs a first reference voltage VH and a second reference voltage VL with appropriate temperature coefficients to the RC core oscillator module 102, thereby adjusting the temperature characteristics of the clock signal output from the RC core oscillator module 102. Thus, the temperature variation of the frequency of the clock signal output from the RC core oscillator module 102 is compensated in real-time with a closed loop, so that the frequency of the clock signal output from the RC oscillator hardly changes with temperature. Here, the second resistor divider network 614 and the third resistor divider network 615 are each composed of resistors connected in series. The number of resistors in the second resistor divider network 614 and the third resistor divider network 615 is determined based on the temperature coefficients of the first reference voltage VH and the second reference voltage VL that are actually required.

[0058] As shown in Figure 7, clock absolute accuracy adjustment Circuit 504 includes a first programmable current source 702, a second programmable current source 703, a second transmission gate switch group 704, and a third transmission gate switch group 705. The first programmable current source 702 and the second programmable current source 703 control voltage and current via a first current mirror circuit 706 and a second current mirror circuit 707. conversion It is connected to the output terminal of circuit 205, and the voltage and current conversion It is used to receive the zero-temperature coefficient current ITCF output from circuit 205. The first programmable current source 702 is connected to the second transmission gate switch group 704, the second programmable current source 703 is connected to the third transmission gate switch group 705, and the second transmission gate switch group 704 and the third transmission gate switch group 705 are connected to the output terminals of the decode and logic control circuit 502, respectively.

[0059] As shown in Figure 7, the first programmable current source 702 consists of a plurality of third PMOS tubes for generating different first zero-temperature coefficient currents I3. The second transmission gate switch group 704 comprises a plurality of second transmission gate switches. The gates of each third PMOS tube are connected via the first current mirror circuit 706 to control voltage and current. conversion The output terminal of circuit 205 is connected, and the drain of each third PMOS tube is connected to the second transmission gate switch, that is, each first zero-temperature coefficient current I3 output from the first programmable current source 702 corresponds to the second transmission gate switch.

[0060] As shown in Figure 7, the second programmable current source 703 consists of multiple third NMOS tubes for generating different second zero-temperature coefficient currents I4. The third transmission gate switch group 705 comprises multiple third transmission gate switches. The gate of each third NMOS tube controls voltage and current via the second current mirror circuit 707. conversion Each of the third NMOS tubes is connected to the output terminal of circuit 205, and the drain of each third NMOS tube is connected to the third transmission gate switch, that is, each second zero-temperature coefficient current I4 output from the second programmable current source 703 corresponds to a third transmission gate switch. Here, the number of second transmission gate switches, the number of third transmission gate switches, the number of first zero-temperature coefficient currents I3 generated by the first programmable current source 702, and the number of second zero-temperature coefficient currents I4 generated by the second programmable current source 703 are the same and correspond one-to-one.

[0061] When the frequency of the clock signal output from the sampled RC core oscillator module 102 changes, the digital code corresponding to the frequency of the clock signal changes. Based on the preset first zero-temperature coefficient current I3 and second zero-temperature coefficient current I4 of the on-chip RC oscillator, the digital code is decoded and converted through the logic control circuit 502 to obtain high-level and low-level digital control signals Bits. <m:0>Through this, the corresponding second and third transmission gate switches are controlled to supply the RC core oscillator module 102 with a first zero-temperature coefficient current I3 and a second zero-temperature coefficient current I4 of appropriate magnitude. By adjusting the absolute values ​​of the first zero-temperature coefficient current I3 and the second zero-temperature coefficient current I4 as charge and discharge currents in the RC core oscillator module, the absolute accuracy of the frequency of the clock signal output from the RC core oscillator module 102 is adjusted, thereby achieving calibration for the absolute accuracy of the frequency of the clock signal output from the RC oscillator.

[0062] Furthermore, the on-chip RC oscillator according to the embodiment of the present invention may be used in an integrated circuit chip. The specific structure of the on-chip RC oscillator in the integrated circuit chip will not be described in detail here.

[0063] The above-described chip RC oscillator may be used in communication terminals as an important component of analog integrated circuits. The communication terminals referred to herein are computer devices used in mobile environments, such as mobile phones, laptops, tablet computers, and in-vehicle computers, that support various communication standards including GSM, EDGE, TD_SCDMA, TDD_LTE, and FDD_LTE. Furthermore, the technical solutions provided in this invention are applicable to other analog integrated circuit applications, such as communication base stations.

[0064] The on-chip RC oscillator, chip, and communication terminal provided in embodiments of the present invention sample and detect the oscillator's clock frequency in real time via a frequency sampling and conversion module, convert the sampled clock frequency into a voltage for analog-to-digital conversion to a corresponding digital code, and if the clock frequency changes, the frequency adjustment The module circuit converts the digital code into a control signal. Therefore, on the one hand, it outputs a voltage with an appropriate temperature coefficient to the RC core oscillator module to achieve temperature compensation for the clock frequency. On the other hand, it outputs a zero-temperature coefficient current of an appropriate magnitude to the RC core oscillator module to achieve calibration for the clock frequency accuracy. Thus, by performing closed-loop real-time calibration compensation for the temperature change of the oscillator's clock frequency, the frequency of the clock signal output from the oscillator hardly changes with temperature. At the same time, by using precise adjustment techniques, the accuracy of the clock frequency can be calibrated, and a high-precision on-chip RC oscillator can be realized.

[0065] The on-chip RC oscillator, chip, and communication terminal provided by embodiments of the present invention have been described in detail above. For those skilled in the art, any obvious modifications made thereto without departing from the substantial content of the present invention will fall within the scope of the patent protection of the present invention.

Claims

1. An on-chip RC oscillator, The system comprises a voltage regulator module, an RC core oscillator module, a frequency sampling / conversion module, and a frequency adjustment module, wherein the voltage regulator module is connected to the RC core oscillator module, the frequency sampling / conversion module, and the frequency adjustment module, respectively; the output terminal of the RC core oscillator module is connected to the input terminal of the frequency sampling / conversion module; the output terminal of the frequency sampling / conversion module is connected to the input terminal of the frequency adjustment module; and the output terminal of the frequency adjustment module is connected to the RC core oscillator module. The aforementioned voltage regulator module is used to generate a power supply voltage and a zero-temperature coefficient current that do not change with the power supply voltage. The frequency sampling and conversion module converts the frequency of the clock signal output from the RC core oscillator module, which is sampled in real time, into a voltage signal, and performs analog-to-digital conversion to obtain the corresponding digital code. The frequency adjustment module receives the digital code, generates a control signal in the digital code based on a preset voltage and zero-temperature coefficient current of the standard temperature coefficient of the on-chip RC oscillator, and controls the RC core oscillator module to output a voltage with an appropriate temperature coefficient and a second zero-temperature coefficient current, thereby achieving temperature compensation and accuracy calibration with respect to the clock signal frequency output from the RC core oscillator module.

2. The RC core oscillator module comprises a first switching tube, a second switching tube, a first capacitor, a first comparator, a second comparator, an RS flip-flop, and a buffer circuit. The gates of the first and second switching tubes are connected to the output terminals of the RS flip-flop, respectively. The drains of the first and second switching tubes are connected to one end of the first bias current and one end of the second bias current, respectively. The other ends of the first and second bias currents are connected to one end of the first capacitor, the inverting input terminal of the first comparator, and the positive-sequence input terminal of the second comparator. The on-chip RC oscillator according to claim 1, characterized in that the positive-sequence input terminal of the comparator and the inverting input terminal of the second comparator are connected to the corresponding voltage output terminals of the frequency adjustment module, the output terminals of the first comparator and the second comparator are connected to the corresponding input terminals of the RS flip-flop, the signal output terminal of the RS flip-flop is connected to the input terminal of the buffer circuit, the first comparator, the second comparator and the RS flip-flop each receive a reset signal, the source of the first switching tube is connected to the power supply voltage, and the source of the second switching tube and the other end of the first capacitor are each grounded.

3. The on-chip RC oscillator according to claim 1, wherein the frequency sampling and conversion module comprises a frequency sampling module and an analog-to-digital conversion module, the input terminal of the frequency sampling module is connected to the output terminal of the RC core oscillator module, the output terminal of the frequency sampling module is connected to the input terminal of the analog-to-digital conversion module, and the output terminal of the analog-to-digital conversion module is connected to the input terminal of the frequency adjustment module.

4. The on-chip RC oscillator according to claim 3, wherein the frequency sampling module comprises a two-phase non-superimposed clock generation circuit, a switched-capacitor resistor, and a voltage common-mode proportional amplifier, the input terminal of the two-phase non-superimposed clock generation circuit is connected to the output terminal of the RC core oscillator module, the output terminal of the two-phase non-superimposed clock generation circuit is connected to the switched-capacitor resistor, the switched-capacitor resistor is connected to the input terminals of the zero-temperature coefficient current source and the voltage common-mode proportional amplifier, respectively, and the output terminal of the voltage common-mode proportional amplifier is connected to the analog-to-digital conversion module.

5. The on-chip RC oscillator according to claim 4, characterized in that the switched capacitor resistor comprises a first NMOS tube, a second NMOS tube, and a second capacitance, the gates of the first NMOS tube and the second NMOS tube are each connected to the output terminals of the two-phase non-superimposed clock generation circuit, the source of the first NMOS tube is connected to a zero-temperature coefficient current source, the drain of the first NMOS tube and the source of the second NMOS tube are each connected to one end of the second capacitance, the other end of the second capacitance is grounded, and the drain of the second NMOS tube is connected to the input terminal of the voltage common-mode proportional amplifier.

6. The on-chip RC oscillator according to claim 5, characterized in that the voltage common-mode proportional amplifier comprises a first operational amplifier, a first resistor, and a second resistor, the common-mode input terminal of the first operational amplifier is connected to the drain of the second NMOS tube, the inverting input terminal of the first operational amplifier is connected to one end of the first resistor and the second resistor, the other end of the first resistor is grounded, and the other end of the second resistor is connected to the output terminal of the first operational amplifier and the analog-to-digital conversion module, respectively.

7. The on-chip RC oscillator according to claim 2, characterized in that the frequency adjustment module comprises a decode and logic control circuit, a clock temperature drift adjustment circuit, and a clock absolute accuracy adjustment circuit, wherein the input terminal of the decode and logic control circuit is connected to the output terminal of the analog-to-digital conversion module in the frequency sampling and conversion module, the output terminals of the decode and logic control circuit are connected to the input terminals of the clock temperature drift adjustment circuit and the clock absolute accuracy adjustment circuit, respectively, the clock temperature drift adjustment circuit is connected to the positive-sequence input terminal of the first comparator and the inverting input terminal of the second comparator, and the output terminal of the clock absolute accuracy adjustment circuit is connected to the first bias current and the second bias current.

8. The on-chip RC oscillator according to claim 7, wherein the clock temperature drift adjustment circuit comprises a second bandgap reference circuit, a first transmission gate switch group, and a second low-dropout linear regulator, the second bandgap reference circuit being connected to the first transmission gate switch group, the first transmission gate switch group being connected to the output terminal of the decode and logic control circuit and the input terminal of the second low-dropout linear regulator, and the output terminal of the second low-dropout linear regulator being connected corresponding to the positive-sequence input terminal of the first comparator and the inverting input terminal of the second comparator.

9. The on-chip RC oscillator according to claim 8, characterized in that the second bandgap reference circuit generates voltages of different values ​​with different temperature coefficients via a first resistor divider network composed of a plurality of fourth resistors connected in series, and each voltage is connected in correspondence to one of the first transmission gate switches.

10. The on-chip RC oscillator according to claim 9, characterized in that the second low-dropout linear regulator comprises an error amplifier, a power tube, a second resistive voltage divider network, and a third resistive voltage divider network, wherein the positive-sequence input terminal of the error amplifier is connected to the first transmission gate switch group, the inverting input terminal of the error amplifier is connected to one end of the second resistive voltage divider network and the third resistive voltage divider network, the other end of the second resistive voltage divider network is connected to the drain of the power tube, and the output terminal of the error amplifier is connected to the gate of the power tube.

11. The on-chip RC oscillator according to claim 7, wherein the clock absolute accuracy adjustment circuit comprises a first programmable current source, a second programmable current source, a second transmission gate switch group, and a third transmission gate switch group, the first programmable current source and the second programmable current source are connected via a first current mirror circuit and a second current mirror circuit to the output terminals of a voltage-current conversion circuit that outputs the zero-temperature coefficient current in the voltage regulator module, the first programmable current source is connected to the second transmission gate switch group, the second programmable current source is connected to the third transmission gate switch group, and the second transmission gate switch group and the third transmission gate switch group are each connected to the output terminals of the decode and logic control circuit.

12. The first programmable current source consists of a plurality of third PMOS tubes, the gate of each third PMOS tube is connected to the output terminal of the voltage-current conversion circuit via the first current mirror circuit, and the drain of each third PMOS tube is connected to one of the second transmission gate switches in the second group of transmission gate switches. The on-chip RC oscillator according to claim 11, characterized in that the second programmable current source consists of a plurality of third NMOS tubes, the gate of each third NMOS tube is connected to the output terminal of the voltage-current conversion circuit via the second current mirror circuit, and the drain of each third NMOS tube is connected to one of the third transmission gate switches in the third transmission gate switch group.

13. An integrated circuit chip characterized by comprising an on-chip RC oscillator according to any one of claims 1 to 12.

14. A communication terminal characterized by comprising an on-chip RC oscillator as described in any one of claims 1 to 12.

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