Semiconductor equipment
The semiconductor device addresses misalignment issues by using copper clips and solder bonding layers to ensure secure electrical connections, enhancing bonding strength and heat dissipation for high-current applications.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- ROHM CO LTD
- Filing Date
- 2022-05-12
- Publication Date
- 2026-05-22
AI Technical Summary
Existing semiconductor devices face misalignment issues between connection metal members and semiconductor element electrodes, which complicates wire joining to the gate electrode.
A semiconductor device design featuring a conductive member with specific surface orientations and bonding layers that restrict misalignment by ensuring secure electrical connections between leads and electrodes, using copper clips and solder bonding layers.
The design effectively suppresses misalignment, enhances bonding strength, and improves mounting and heat dissipation, suitable for high-current applications in power conversion circuits.
Smart Images

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Abstract
Description
Technical Field
[0001] This disclosure relates to a semiconductor device.
Background Art
[0002] Patent Document 1 discloses an example of a semiconductor device (power module) in which a plurality of semiconductor elements are joined to a conductor layer. The semiconductor device includes a plurality of connection metal members joined to the conductor layer and the plurality of semiconductor elements. Thereby, a large current can flow through the plurality of semiconductor elements.
[0003] However, in the semiconductor device disclosed in Patent Document 1, at least one of the plurality of connection metal members may be misaligned with respect to the electrode of the semiconductor element to be joined thereto. When the degree of misalignment becomes relatively large, the connection metal member may cover the gate electrode of the semiconductor element. In this case, when joining a wire to the gate electrode, it becomes difficult to join the wire due to the connection metal member. Therefore, a measure for suppressing the misalignment of the connection metal member with respect to the electrode of the semiconductor element is desired.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] In view of the above circumstances, one problem of this disclosure is to provide a semiconductor device capable of suppressing misalignment of a conductive member with respect to an electrode of a semiconductor element.
Means for Solving the Problems
[0006] A semiconductor device provided by this disclosure comprises a semiconductor element having a first lead and a first electrode, a conductive member for electrically connecting the first lead and the first electrode, a first conductive bonding layer for electrically bonding the first lead and the conductive member, and a second conductive bonding layer for electrically bonding the first electrode and the conductive member, wherein the conductive member has a first surface facing the first lead in the thickness direction of the semiconductor element and a second surface facing the first lead in a first direction perpendicular to the thickness direction, the first lead has a third surface facing the first surface and a fourth surface facing the second surface, and the first conductive bonding layer is in contact with the first surface and the third surface. [Effects of the Invention]
[0007] The semiconductor device described herein makes it possible to suppress misalignment of the conductive member with respect to the electrodes of the semiconductor element.
[0008] Other features and advantages of this disclosure will become more apparent from the detailed description below, based on the accompanying drawings. [Brief explanation of the drawing]
[0009] [Figure 1] Figure 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure, and shows a encapsulating resin. [Figure 2] Figure 2 is a plan view corresponding to Figure 1, and further shows the conductive member, the first conductive bonding layer, and the second conductive member. [Figure 3] Figure 3 is a bottom view of the semiconductor device shown in Figure 1. [Figure 4] Figure 4 is a right side view of the semiconductor device shown in Figure 1. [Figure 5] Figure 5 is a rear view of the semiconductor device shown in Figure 1. [Figure 6] Figure 6 is a cross-sectional view along the line VI-VI in Figure 1. [Figure 7] Figure 7 is a cross-sectional view along the line VII-VII in Figure 1. [Figure 8]FIG. 8 is a cross-sectional view taken along line VIII-VIII of FIG. 1. [Figure 9] FIG. 9 is a partially enlarged view of FIG. 6. [Figure 10] FIG. 10 is a partially enlarged view of FIG. 6. [Figure 11] FIG. 11 is a partially enlarged cross-sectional view of a modified example of the semiconductor device shown in FIG. 1. [Figure 12] FIG. 12 is a plan view of the semiconductor device according to the second embodiment of the present disclosure, showing through the encapsulating resin. [Figure 13] FIG. 13 is a cross-sectional view taken along line XIII-XIII of FIG. 12. [Figure 14] FIG. 14 is a cross-sectional view taken along line XIV-XIV of FIG. 12. [Figure 15] FIG. 15 is a partially enlarged view of FIG. 13. [Figure 16] FIG. 16 is a plan view of the semiconductor device according to the third embodiment of the present disclosure, showing through the encapsulating resin. [Figure 17] FIG. 17 is a cross-sectional view taken along line XVII-XVII of FIG. 16. [Figure 18] FIG. 18 is a partially enlarged view of FIG. 17. [Figure 19] FIG. 19 is a partially enlarged cross-sectional view of a modified example of the semiconductor device shown in FIG. 16. [Figure 20] FIG. 20 is a plan view of the semiconductor device according to the fourth embodiment of the present disclosure, showing through the encapsulating resin. [Figure 21] FIG. 21 is a cross-sectional view taken along line XXI-XXI of FIG. 20. [Figure 22] FIG. 22 is a partially enlarged view of FIG. 21.
MODE FOR CARRYING OUT THE INVENTION
[0010] A mode for carrying out the present disclosure will be described based on the accompanying drawings.
[0011] A semiconductor device A10 according to a first embodiment of this disclosure will be described based on Figures 1 to 10. The semiconductor device A10 is used in electronic devices equipped with power conversion circuits, such as DC-DC converters. The semiconductor device A10 comprises a semiconductor element 10, a conductive member 30, a first lead 21, a second lead 22, a die pad 23, a bonding layer 29, a first conductive bonding layer 31, a second conductive member 32, a wire 40, and a sealing resin 50. Here, for the sake of understanding, Figure 1 shows the sealing resin 50 through. For the sake of understanding, Figure 2 shows the conductive member 30, the first conductive bonding layer 31, and the second conductive member 32 through Figure 1. In Figures 1 and 2, the transparent sealing resin 50 is shown by dashed lines. In Figure 2, the transparent conductive member 30 is shown by dashed lines. In Figure 1, lines VII-VII and VIII-VIII are shown by dashed lines.
[0012] In describing semiconductor device A10, for convenience, the thickness direction of the semiconductor element 10 is referred to as the "thickness direction z". One direction perpendicular to the thickness direction z is called the "first direction x". The direction perpendicular to both the thickness direction z and the first direction x is called the "second direction y".
[0013] As shown in Figures 1, 2, 6, and 7, the semiconductor element 10 is mounted on a die pad 23. The semiconductor element 10 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). In addition, the semiconductor element 10 may be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a diode. In the description of the semiconductor device A10, the semiconductor element 10 is an n-channel type MOSFET with a vertical structure. The semiconductor element 10 includes a compound semiconductor substrate. The composition of the compound semiconductor substrate includes silicon carbide (SiC). That is, the semiconductor substrate contains silicon carbide. As shown in Figures 2 and 9, the semiconductor element 10 has a first electrode 11, a second electrode 12, and a third electrode (gate electrode in the illustrated example) 13.
[0014] As shown in Figure 9, the first electrode 11 and the second electrode 12 are spaced apart from each other in the thickness direction z, with the first electrode 11 located on one side of the second electrode 12 in the thickness direction z. A current corresponding to the power converted by the semiconductor element 10 flows through the first electrode 11. That is, the first electrode 11 corresponds to the source electrode of the semiconductor element 10. The first electrode 11 includes a plurality of metal plating layers. The first electrode 11 includes a nickel (Ni) plating layer and a gold (Au) plating layer laminated on the nickel plating layer. Alternatively, the first electrode 11 may include a nickel plating layer, a palladium (Pd) plating layer laminated on the nickel plating layer, and a gold plating layer laminated on the palladium plating layer.
[0015] As shown in Figure 9, the second electrode 12 is located on the opposite side of the first electrode 11 in the thickness direction z and faces the die pad 23. A current corresponding to the power before it is converted by the semiconductor element 10 flows through the second electrode 12. In other words, the second electrode 12 corresponds to the drain electrode of the semiconductor element 10.
[0016] As shown in Figure 2, the gate electrode 13 is located on the same side as the first electrode 11 in the thickness direction z. A gate voltage for driving the semiconductor device 10 is applied to the gate electrode 13. In the thickness direction z, the area of the gate electrode 13 is smaller than the area of the first electrode 11.
[0017] The conductive member 30 connects the first lead 21 to the first electrode 11 of the semiconductor element 10. Therefore, the conductive member 30 forms part of the conductive path of the semiconductor device A10. The conductive member 30 is composed of copper (Cu). The conductive member 30 is a metal clip. As shown in Figures 1 and 6, the conductive member 30 straddles the space between the first lead 21 and the die pad 23. As shown in Figures 6 and 10, the conductive member 30 has a first surface 301, a second surface 302, a bonding surface 303, and an inclined surface 304.
[0018] As shown in Figure 10, the first surface 301 faces the first lead 21 in the thickness direction z. The second surface 302 faces the first lead 21 in the first direction x. The second surface 302 faces the opposite side of the semiconductor element 10 in the first direction x. The second surface 302 is located further away from the semiconductor element 10 in the first direction x than the first surface 301. The second surface 302 is connected to the first surface 301.
[0019] As shown in Figure 9, the bonding surface 303 faces the first electrode 11 of the semiconductor element 10. The inclined surface 304 is located between the first surface 301 and the bonding surface 303 in the first direction x, and is connected to the bonding surface 303. The inclined surface 304 is inclined at an angle α with respect to the bonding surface 303, so that as it moves away from the bonding surface 303 in the first direction x, it moves away from the semiconductor element 10 in the thickness direction z. For example, the angle α is between 30° and 60°.
[0020] The first lead 21, the second lead 22, and the die pad 23, together with the conductive member 30, form a conductive path of the semiconductor device A10. The first lead 21, the second lead 22, and the die pad 23 are made from the same lead frame. This lead frame is made of copper or a copper alloy. Therefore, the composition of the first lead 21, the second lead 22, and the die pad 23 includes copper.
[0021] The first lead 21 is located on one side in the first direction x, as shown in Figures 1 and 2. The first lead 21 is electrically connected to the first electrode 11 of the semiconductor element 10 via the conductive member 30. Therefore, the first lead 21 forms the source terminal of the semiconductor device A 10. As shown in Figures 1 to 3, the first lead 21 has a first main surface 211, a first mounting surface 212, a plurality of first side surfaces 213, a third surface 214, a fourth surface 215, a fifth surface 216, and a plurality of recesses 217.
[0022] As shown in Figures 6 and 10, the third surface 214 faces one side in the thickness direction z (for example, the upper side in Figure 10). In this regard, as shown in Figure 9, the first electrode 11 has a surface that faces outward from the semiconductor element 10 (i.e., one side in the thickness direction z) and a surface that faces inward from the semiconductor element 10 (i.e., the other side in the thickness direction z). That is, in the thickness direction z, the side that the third surface 214 faces and the side that the outward surface of the first electrode 11 faces are the same. The third surface 214 faces the first surface 301 of the conductive member 30.
[0023] As shown in Figures 6 and 10, the fourth surface 215 faces the side where the semiconductor element 10 is located in the first direction x. The fourth surface 215 faces the second surface 302 of the conductive member 30. The fourth surface 215 is connected to the third surface 214. The first lead 21 has notches formed on the third surface 214 and the fourth surface 215.
[0024] As shown in Figures 6 and 10, the first main surface 211 faces the same side as the third surface 214 in the thickness direction z. The first main surface 211 is located on the opposite side from the first side surface 213, with the fourth surface 215 in between, in the thickness direction z. The first main surface 211 is located further away from the semiconductor device 10 in the first direction x than the third surface 214. The first main surface 211 is connected to the fourth surface 215. A plating layer containing nickel or silver (Ag) may be provided on the first main surface 211.
[0025] As shown in Figures 6 and 10, the first mounting surface 212 faces away from the third surface 214 in the thickness direction z. As shown in Figure 3, the first mounting surface 212 is exposed from the sealing resin 50. The third surface 214 is located between the first main surface 211 and the first mounting surface 212 in the thickness direction z. In the thickness direction z, the third surface 214 overlaps the first mounting surface 212 (see Figures 2 and 3). A plating layer containing tin (Sn) or the like may be provided on the first mounting surface 212.
[0026] As shown in Figures 6 and 10, the fifth surface 216 faces the same side as the fourth surface 215 in the first direction x. The fifth surface 216 is located between the first mounting surface 212 and the third surface 214 in the thickness direction z. The fifth surface 216 is connected to the first mounting surface 212 and the third surface 214. The fifth surface 216 is located on the opposite side of the fourth surface 215 in the first direction x, with the third surface 214 in between. The fifth surface 216 is located closer to the semiconductor element 10 in the first direction x than the fourth surface 215.
[0027] As shown in Figures 2 and 6, the multiple first sides 213 face away from the side on which the semiconductor element 10 is located in the first direction x. The multiple first sides 213 connect to the first main surface 211 and the first mounting surface 212. The multiple first sides 213 are arranged along the second direction y. As shown in Figure 5, the multiple first sides 213 are exposed from the encapsulating resin 50.
[0028] As shown in Figures 2 and 3, the multiple recesses 217 are recessed in the first direction x from between two adjacent first surfaces 213 in the second direction y. The multiple recesses 217 are filled with sealing resin 50.
[0029] As shown in Figures 1 and 2, the second lead 22 is located away from the first lead 21 in the second direction y. The second lead 22 is conductive to the gate electrode 13 of the semiconductor element 10. Therefore, the second lead 22 forms the gate terminal of the semiconductor device A10. As shown in Figures 1 to 3, the second lead 22 has a second main surface 221, a second mounting surface 222, a second side surface 223, and a thin-walled portion 224.
[0030] As shown in Figure 8, the second main surface 221 faces the same side as the third surface 214 of the first lead 21 in the thickness direction z. The position of the second main surface 221 in the thickness direction z is equal to the position of the first main surface 211 of the first lead 21 in the thickness direction z. A plating layer containing nickel or silver may be provided on the second main surface 221.
[0031] As shown in Figure 8, the second mounting surface 222 faces the opposite direction from the second main surface 221 in the thickness direction z. As shown in Figure 3, the second mounting surface 222 is exposed from the sealing resin 50. A plating layer containing tin or the like may be provided on the first mounting surface 212.
[0032] As shown in Figures 1 and 2, the second side surface 223 faces the same side as the multiple first side surfaces 213 of the first lead 21 in the first direction x. The second side surface 223 connects to the second main surface 221 and the second mounting surface 222. As shown in Figure 5, the second side surface 223 is exposed from the sealing resin 50.
[0033] As shown in Figure 3, the thin-walled portion 224 is shaped like an overhang that extends from the second mounting surface 222 in a direction perpendicular to the thickness direction z when viewed in the thickness direction z. A portion of the second main surface 221 is included in the thin-walled portion 224. As shown in Figure 8, the thin-walled portion 224 includes an intermediate surface 224A and an end surface 224B. The intermediate surface 224A faces away from the second main surface 221 in the thickness direction z. The intermediate surface 224A is located between the second main surface 221 and the second mounting surface 222 in the thickness direction z. The intermediate surface 224A is in contact with the sealing resin 50. The end surface 224B connects to the second main surface 221 and the intermediate surface 224A and faces the second direction y. As shown in Figure 5, the end surface 224B is exposed from the sealing resin 50. The area of the end surface 224B is smaller than the area of the second side surface 223.
[0034] As shown in Figures 1 and 2, the die pad 23 is positioned away from the first lead 21 and the second lead 22 in a first direction x. The die pad 23 is electrically connected to the second electrode 12 of the semiconductor element 10. Therefore, the die pad 23 forms the drain terminal of the semiconductor device A 10. As shown in Figures 1 to 3, the die pad 23 has a mounting surface 231, a back surface 232, a plurality of circumferential surfaces 233, and a thin-walled portion 234.
[0035] As shown in Figure 6, the mounting surface 231 faces the same side as the third surface 214 of the first lead 21 in the thickness direction z. The position of the mounting surface 231 in the thickness direction z is equal to the position of the first main surface 211 of the first lead 21 in the thickness direction z. The semiconductor element 10 is mounted on the mounting surface 231. A plating layer containing nickel or silver may be provided on the mounting surface 231.
[0036] As shown in Figures 6 and 7, the back surface 232 faces away from the side where the semiconductor element 10 is located in the thickness direction z. As shown in Figure 3, the back surface 232 is exposed from the sealing resin 50. Viewed in the thickness direction z, the back surface 232 overlaps the semiconductor element 10. A plating layer containing tin or the like may be provided on the back surface 232.
[0037] As shown in Figures 1 and 2, the multiple circumferential surfaces 233 face away from the first side surface 213 of the first lead 21 in the first direction x. The multiple circumferential surfaces 233 connect to the mounting surface 231 and the back surface 232. The multiple circumferential surfaces 233 are arranged along the second direction y. As shown in Figure 6, the multiple circumferential surfaces 233 are exposed from the sealing resin 50.
[0038] As shown in Figure 3, the thin-walled portion 234 is an overhang shape that protrudes from the back surface 232 in a direction perpendicular to the thickness direction z when viewed in the thickness direction z. A portion of the mounting surface 231 is included in the thin-walled portion 234. As shown in Figure 7, the thin-walled portion 234 includes an intermediate surface 234A and a pair of end surfaces 234B. The intermediate surface 234A faces away from the mounting surface 231 in the thickness direction z. The intermediate surface 234A is located between the mounting surface 231 and the back surface 232 in the thickness direction z. The intermediate surface 234A is in contact with the sealing resin 50. The pair of end surfaces 234B are connected to the mounting surface 231 and the intermediate surface 234A, and face away from each other in the second direction y. The pair of end surfaces 234B are located apart from each other in the second direction y. The pair of end surfaces 234B are exposed from the sealing resin 50. The area of each of the pair of end faces 234B is smaller than the area of each of the multiple circumferential faces 233.
[0039] As shown in Figure 9, the bonding layer 29 is interposed between the mounting surface 231 of the die pad 23 and the second electrode 12 of the semiconductor element 10. The bonding layer 29 is in contact with the mounting surface 231 and the second electrode 12. The bonding layer 29 electrically bonds the die pad 23 and the second electrode 12. As a result, the die pad 23 is electrically connected to the second electrode 12. The composition of the bonding layer 29 includes tin. The bonding layer 29 is solder.
[0040] The first conductive bonding layer 31 electrically bonds the first lead 21 and the conductive member 30. In Figure 1, the first conductive bonding layer 31 is shown as a region with multiple shaded areas. As shown in Figure 10, the first conductive bonding layer 31 includes a portion located between the first surface 301 of the conductive member 30 and the third surface 214 of the first lead 21. This portion is in contact with both the first surface 301 and the third surface 214. Furthermore, the first conductive bonding layer 31 includes a portion located between the second surface 302 of the conductive member 30 and the fourth surface 215 of the first lead 21. This portion is in contact with both the second surface 302 and the fourth surface 215. The composition of the first conductive bonding layer 31 includes tin. The first conductive bonding layer 31 is solder.
[0041] As shown in Figure 10, the maximum value of the first interval P1 from the first surface 301 of the conductive member 30 to the third surface 214 of the first lead 21 is smaller than the maximum value of the second interval P2 from the second surface 302 of the conductive member 30 to the fourth surface 215 of the first lead 21. As a result, the thickness of the portion of the first conductive bonding layer 31 located between the first surface 301 and the third surface 214 is thinner than the thickness of the portion of the first conductive bonding layer 31 located between the second surface 302 and the fourth surface 215.
[0042] The second conductive member 32 electrically connects the first electrode 11 of the semiconductor element 10 to the conductive member 30. In Figure 1, the second conductive member 32 is shown as a region with multiple shaded areas. As shown in Figure 9, the second conductive member 32 is interposed between the first electrode 11 and the bonding surface 303 of the conductive member 30. The second conductive member 32 is in contact with the first electrode 11 and the bonding surface 303. The composition of the second conductive member 32 includes tin. The second conductive member 32 is solder.
[0043] As shown in Figure 1, wire 40 is electrically connected to the gate electrode 13 of the semiconductor element 10 and to the second main surface 221 of the second lead 22. This ensures that the second lead 22 is electrically connected to the gate electrode 13. The composition of wire 40 includes gold. Alternatively, the composition of wire 40 may include aluminum (Al) or copper.
[0044] As shown in Figures 1 and 6, the encapsulating resin 50 covers the semiconductor element 10, the conductive member 30, and the wire 40, as well as a portion of each of the first lead 21, the second lead 22, and the die pad 23. The encapsulating resin 50 is electrically insulating. The encapsulating resin 50 is made of a material including, for example, a black epoxy resin. The encapsulating resin 50 has a top surface 51, a bottom surface 52, a pair of first side surfaces 53, and a pair of second side surfaces 54.
[0045] As shown in Figures 6 and 7, the top surface 51 faces the same side as the mounting surface 231 of the die pad 23 in the thickness direction z. As shown in Figures 6 and 7, the bottom surface 52 faces the opposite side from the top surface 51 in the thickness direction z. As shown in Figure 3, the first mounting surface 212 of the first lead 21, the second mounting surface 222 of the second lead 22, and the back surface 232 of the die pad 23 are exposed from the bottom surface 52.
[0046] As shown in Figures 3, 5, and 6, the pair of first sides 53 face opposite each other in a first direction x and are located apart from each other in a first direction x. The pair of first sides 53 are connected to the top surface 51 and the bottom surface 52. From one of the pair of first sides 53, a plurality of first sides 213 of the first lead 21 and a second side 223 of the second lead 22 are exposed. From the other of the pair of first sides 53, a plurality of circumferential surfaces 233 of the die pad 23 are exposed. The plurality of first sides 213, second sides 223, and circumferential surfaces 233 are flush with either of the pair of first sides 53.
[0047] As shown in Figures 3, 4, 7, and 8, the pair of second sides 54 face opposite each other in the second direction y and are located apart from each other in the second direction y. The pair of second sides 54 are connected to the top surface 51 and the bottom surface 52. A pair of end faces 234B of the die pad 23 are exposed from the pair of second sides 54. An end face 224B of the second lead 22 is exposed from one of the second sides 54 of the pair. The pair of end faces 234B and end face 224B are flush with either of the pair of second sides 54.
[0048] Next, a modified example of semiconductor device A10, semiconductor device A11, will be described based on Figure 11. Here, the positions in Figure 11 are the same as those in Figure 10.
[0049] As shown in Figure 11, the configuration of the first surface 301 of the conductive member 30 and the third surface 214 and fourth surface 215 of the first lead 21 in semiconductor device A11 differs from the configuration of semiconductor device A10. The first surface 301 and the third surface 214 are curved surfaces that are concave in opposite directions in the thickness direction z. The fourth surface 215 is a curved surface that is concave in the first direction x. The fourth surface 215 is smoothly connected to the third surface 214. The third surface 214 and the fourth surface 215 each form a part of a single curved surface provided on the first lead 21.
[0050] The first surface 301, third surface 214, and fourth surface 215 of semiconductor device A11 are obtained by etching the lead frame that forms the basis of the first lead 21 and the conductive member 30. On the other hand, the third surface 214 and fourth surface 215 of semiconductor device A10 are obtained by press working the lead frame that forms the basis of the first lead 21.
[0051] Next, we will explain the effects and benefits of semiconductor device A10.
[0052] The semiconductor device A10 includes a first lead 21, a conductive member 30 that connects the first lead 21 to the first electrode 11 of the semiconductor element 10, and a first conductive bonding layer 31 that electrically bonds the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z, and a second surface 302 facing the first lead 21 in the first direction x. The first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. With this configuration, when the conductive member 30 is electrically joined to the first lead 21 via the first conductive bonding layer 31, if the conductive member 30 attempts to shift in the first direction x, the second surface 302 will come into contact with the fourth surface 215, or the first conductive bonding layer 31 will be sandwiched between the second surface 302 and the fourth surface 215. As a result, the displacement of the conductive member 30 in the first direction x is restricted, and the misalignment of the conductive member 30 in the first direction x with respect to the first electrode 11 can be suppressed. Therefore, semiconductor device A10 makes it possible to suppress the misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10.
[0053] The first conductive bonding layer 31 is also in contact with the second surface 302 of the conductive member 30 and the fourth surface 215 of the first lead 21. This increases the bonding area of the conductive member 30 to the first lead 21. Therefore, the bonding strength of the conductive member 30 to the first lead 21 can be improved.
[0054] The maximum value of the first interval P1, from the first surface 301 of the conductive member 30 to the third surface 214 of the first lead 21, is smaller than the maximum value of the second interval P2, from the second surface 302 of the conductive member 30 to the fourth surface 215 of the first lead 21. This configuration is a manifestation of the fact that when the conductive member 30 is electrically joined to the first lead 21 via the first conductive joining layer 31, a relatively large compressive stress acts on the portion of the first conductive joining layer 31 located between the first surface 301 and the third surface 214. As a result, the bonding strength of the conductive member 30 to the first lead 21 is improved. Furthermore, this configuration is a manifestation of the fact that when the conductive member 30 attempts to shift in the first direction x during the electrically joining of the conductive member 30 to the first lead 21 via the first conductive joining layer 31, the second surface 302 receives a relatively large reaction force from the molten first conductive joining layer 31. This more effectively suppresses the misalignment of the conductive member 30 in the first direction x relative to the first electrode 11 of the semiconductor element 10.
[0055] In semiconductor device A11, the first surface 301 of the conductive member 30 is a curved surface that is concave in the thickness direction z. By adopting this configuration, the contact area of the conductive member 30 with the first conductive bonding layer 31 is increased. Furthermore, an anchoring effect is exhibited on the first conductive bonding layer 31 due to the first surface 301. As a result, the bonding strength of the conductive member 30 with respect to the first lead 21 can be further improved.
[0056] The first conductive bonding layer 31 is in contact with the first main surface 211 of the first lead 21. This configuration shows that the first conductive bonding layer 31 is filled in the gap between the first surface 301 and the second surface 302 of the conductive member 30 and the third surface 214 and the fourth surface 215 of the first lead 21. This ensures an improvement in the bonding strength of the conductive member 30 to the first lead 21.
[0057] The first lead 21 has a first mounting surface 212 that faces away from the third surface 214 in the thickness direction z. In the thickness direction z, the third surface 214 overlaps the first mounting surface 212. With this configuration, when the conductive member 30 is electrically bonded to the first lead 21 via the first conductive bonding layer 31, the entire first mounting surface 212 is supported by the workpiece. As a result, when a compressive force acts from the conductive member 30 to the third surface 214, a reaction force from the workpiece acts on the first mounting surface 212. This suppresses bending that occurs in the first lead 21.
[0058] The composition of the first conductive bonding layer 31, the second conductive member 32, and the bonding layer 29 includes tin. This allows the semiconductor element 10 to be bonded to the die pad 23 in the process of electrically bonding the conductive member 30 to the first lead 21 and the first electrode 11 of the semiconductor element 10.
[0059] The first lead 21 has a first side surface 213 that faces away from the side on which the semiconductor element 10 is located in the first direction x. The first side surface 213 is exposed from the sealing resin 50. With this configuration, when the semiconductor device A10 is mounted on the wiring board, solder adheres to the first mounting surface 212 and the first side surface 213 of the first lead 21. This forms a solder fillet that covers the first side surface 213. Therefore, the mounting strength of the semiconductor device A10 on the wiring board can be improved.
[0060] The back surface 232 of the die pad 23 is exposed from the sealing resin 50. This improves the heat dissipation of the semiconductor device A10.
[0061] The conductive member 30 contains copper. This reduces the electrical resistance of the conductive member 30 compared to a wire containing aluminum. This is suitable for passing a large current through the semiconductor element 10.
[0062] A semiconductor device A20 according to a second embodiment of this disclosure will be described based on Figures 12 to 15. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are denoted by the same reference numerals, and redundant explanations are omitted. Here, for the sake of understanding, Figure 12 shows the sealing resin 50 being transparent.
[0063] The configuration of the first lead 21 and the conductive member 30 of semiconductor device A20 differs from that of semiconductor device A10 described above.
[0064] As shown in Figures 12, 13, and 15, in semiconductor device A20, the first lead 21 does not have a first main surface 211. The third surface 214 of the first lead 21 is connected to a plurality of first side surfaces 213. The fourth surface 215 of the first lead 21 is located between the first mounting surface 212 and the third surface 214 in the thickness direction z. The fourth surface 215 is connected to the first mounting surface 212.
[0065] As shown in Figure 15, the first surface 301 of the conductive member 30 is located on the side facing the third surface 214 of the first lead 21 in the thickness direction z, compared to the second surface 302. The first surface 301 is located on the side away from the semiconductor element 10 in the first direction x, compared to the second surface 302. The conductive member 30 has a notch formed in it, defined by the first surface 301 and the second surface 302.
[0066] Next, we will explain the effects and benefits of semiconductor device A20.
[0067] The semiconductor device A20 comprises a first lead 21, a conductive member 30 that connects the first lead 21 to the first electrode 11 of the semiconductor element 10, and a first conductive bonding layer 31 that electrically bonds the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z, and a second surface 302 facing the first lead 21 in the first direction x. The first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. Therefore, the semiconductor device A20 can also suppress misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10. Furthermore, by having semiconductor device A20 have the same configuration as semiconductor device A10, the semiconductor device A20 also achieves the effects and benefits associated with that configuration.
[0068] By adopting the configuration of semiconductor device A20, the dimension of the first lead 21 in the first direction x can be reduced compared to the case of semiconductor device A10. This makes it possible to increase the distance between the first lead 21 and the die pad 23 in the first direction x. Therefore, when forming the sealing resin 50, it becomes possible to increase the density of the resin filled between the first lead 21 and the die pad 23 in the first direction x.
[0069] A semiconductor device A30 according to a third embodiment of this disclosure will be described based on Figures 16 to 18. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are denoted by the same reference numerals, and redundant explanations are omitted. Here, for the sake of understanding, Figure 16 shows the sealing resin 50 being transparent.
[0070] The configuration of the conductive member 30 and the first conductive bonding layer 31 of semiconductor device A20 differs from that of semiconductor device A10 described above.
[0071] As shown in Figures 16 and 18, the conductive member 30 has a restricting surface 305. The restricting surface 305 faces the same side as the second surface 302 in the first direction x. The restricting surface 305 is located on the opposite side of the second surface 302 in the thickness direction z, with the first surface 301 in between. The restricting surface 305 is located on the side of the first direction x that is closer to the semiconductor element 10 than the second surface 302. The conductive member 30 has a notch formed in it, defined by the first surface 301 and the restricting surface 305.
[0072] As shown in Figures 16 and 18, the restricting surface 305 of the conductive member 30 faces the fifth surface 216 of the first lead 21. A portion of the first conductive bonding layer 31 is located between the fifth surface 216 and the restricting surface 305. The first conductive bonding layer 31 is in contact with both the fifth surface 216 and the restricting surface 305.
[0073] Next, semiconductor device A31, a modified example of semiconductor device A30, will be described based on Figure 19. Here, the position in Figure 19 is the same as the position in Figure 18.
[0074] As shown in Figure 19, in the semiconductor device A31, the conductive member 30 has an opposing surface 306 instead of a restricting surface 305. The opposing surface 306 faces the same side as the first surface 301 in the thickness direction z. The opposing surface 306 is located on the opposite side of the first surface 301 in the thickness direction z, with the second surface 302 in between. The opposing surface 306 is located on the opposite side of the first surface 301 in the first direction x, with the second surface 302 in between. The opposing surface 306 is located on the side of the first surface 301 that is further away from the semiconductor element 10 in the first direction x. The conductive member 30 has a notch formed in it, defined by the second surface 302 and the opposing surface 306.
[0075] As shown in Figure 19, the opposing surface 306 of the conductive member 30 faces the first main surface 211 of the first lead 21. A portion of the first conductive bonding layer 31 is located between the first main surface 211 and the opposing surface 306. The first conductive bonding layer 31 is in contact with the opposing surface 306.
[0076] Next, we will explain the effects and benefits of semiconductor device A30.
[0077] The semiconductor device A30 comprises a first lead 21, a conductive member 30 that connects the first lead 21 to the first electrode 11 of the semiconductor element 10, and a first conductive bonding layer 31 that electrically bonds the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z, and a second surface 302 facing the first lead 21 in the first direction x. The first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. Therefore, the semiconductor device A30 can also suppress misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10. Furthermore, by having semiconductor device A30 have the same configuration as semiconductor device A10, semiconductor device A30 also achieves the effects and benefits associated with that configuration.
[0078] In the semiconductor device A30, the conductive member 30 has a restricting surface 305 facing the fifth surface 216 of the first lead 21. With this configuration, when the conductive member 30 is electrically bonded to the first lead 21 via the first conductive bonding layer 31, if the conductive member 30 attempts to shift in the first direction x, the restricting surface 305 comes into contact with the fifth surface 216, or the first conductive bonding layer 31 is sandwiched between the restricting surface 305 and the fifth surface 216. As a result, the displacement of the conductive member 30 in the first direction x is restricted by both the second surface 302 and the restricting surface 305, so that the displacement of the conductive member 30 in the first direction x relative to the first electrode 11 of the semiconductor element 10 can be effectively suppressed. In this case, if a portion of the first conductive bonding layer 31 is located between the fifth surface 216 and the regulating surface 305 and is in contact with both the fifth surface 216 and the regulating surface 305, the bonding area of the conductive member 30 to the first lead 21 is increased. This improves the bonding strength of the conductive member 30 to the first lead 21.
[0079] In semiconductor device A31, the conductive member 30 has a facing surface 306 that faces the first main surface 211 of the first lead 21. The first conductive bonding layer 31 is in contact with the first main surface 211 and the facing surface 306. With this configuration, when the conductive member 30 is electrically bonded to the first lead 21 via the first conductive bonding layer 31, the reaction force in the thickness direction z acting from the first lead 21 to the conductive member 30 via the first conductive bonding layer 31 increases. As a result, the bonding area of the conductive member 30 with respect to the first lead 21 is increased, and the compressive stress in the thickness direction z acting on the first conductive bonding layer 31 increases, thereby improving the bonding strength of the conductive member 30 with respect to the first lead 21.
[0080] A semiconductor device A40 according to the fourth embodiment of this disclosure will be described based on Figures 20 to 22. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are denoted by the same reference numerals, and redundant explanations are omitted. Here, for the sake of understanding, Figure 20 shows the sealing resin 50 being transparent.
[0081] The configuration of the first lead 21 and the conductive member 30 of semiconductor device A40 differs from that of semiconductor device A10 described above.
[0082] As shown in Figures 20 to 22, in semiconductor device A40, the first lead 21 does not have a fifth surface 216. The fourth surface 215 of the first lead 21 faces away from the side where the semiconductor element 10 is located in the first direction x. The third surface 214 of the first lead 21 is located between the fourth surface 215 and the multiple first surfaces 213 in the first direction x. The first main surface 211 of the first lead 21 is located closer to the semiconductor element 10 in the first direction x than the third surface 214.
[0083] As shown in Figures 20 and 21, the conductive member 30 straddles the first main surface 211 of the first lead 21.
[0084] Next, we will explain the effects and benefits of semiconductor device A40.
[0085] The semiconductor device A40 comprises a first lead 21, a conductive member 30 that connects the first lead 21 to the first electrode 11 of the semiconductor element 10, and a first conductive bonding layer 31 that electrically bonds the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z, and a second surface 302 facing the first lead 21 in the first direction x. The first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. Therefore, the semiconductor device A40 also makes it possible to suppress misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10. Furthermore, by having semiconductor device A40 have the same configuration as semiconductor device A10, semiconductor device A40 also achieves the effects and benefits associated with that configuration.
[0086] This disclosure is not limited to the embodiments described above. The specific configuration of each part of this disclosure can be modified in various ways.
[0087] This disclosure includes embodiments described in the following appendix. Note 1. First lead, A semiconductor device having a first electrode, A conductive member that connects the first lead and the first electrode, A first conductive bonding layer that electrically connects the first lead and the conductive member, The device comprises a second conductive bonding layer that electrically connects the first electrode and the conductive member, The conductive member has a first surface facing the first lead in the thickness direction of the semiconductor element, and a second surface facing the first lead in a first direction perpendicular to the thickness direction. The first lead has a third surface facing the first surface and a fourth surface facing the second surface, A semiconductor device in which the first conductive junction layer is in contact with the first surface and the third surface. Note 2. The semiconductor device according to Appendix 1, wherein the third surface faces the same side as the outer surface of the first electrode in the thickness direction. Note 3. The semiconductor device according to Appendix 2, wherein the first conductive junction layer is in contact with the second surface and the fourth surface. Note 4. The semiconductor device described in Appendix 3, wherein the first surface is a curved surface that is concave in the thickness direction. Note 5. The semiconductor device according to Appendix 3 or 4, wherein the maximum value of the first interval from the first surface to the third surface is smaller than the maximum value of the second interval from the second surface to the fourth surface. Note 6. The first lead has a first main surface that faces the same side as the third surface in the thickness direction, The semiconductor device according to any one of appendices 3 to 5, wherein the first main surface is located in the thickness direction on the opposite side from the third surface, with the fourth surface in between. Note 7. The semiconductor device according to Appendix 6, wherein the fourth surface faces the side on which the semiconductor element is located in the first direction. Note 8. The semiconductor device according to Appendix 7, wherein the first conductive junction layer is in contact with the first main surface. Note 9. The fourth surface faces the opposite side from the side on which the semiconductor element is located in the first direction. The conductive member spans the first main surface, as described in Appendix 6, for the semiconductor device. Note 10. The first lead has a first mounting surface facing the opposite side from the third surface in the thickness direction, and a fifth surface facing the same side as the fourth surface in the first direction. Viewed in the thickness direction, the third surface overlaps the first mounting surface. The semiconductor device according to Appendix 7 or 8, wherein the fifth surface is located between the first mounting surface and the third surface in the thickness direction, and is located on the opposite side of the fourth surface from the third surface in the first direction. Note 11. The conductive member has a restricting surface facing the fifth surface, as described in Appendix 10. Note 12. The semiconductor device according to Appendix 11, wherein a portion of the first conductive junction layer is located between the fifth surface and the restricting surface. Note 13. The semiconductor device according to any one of appendices 10 to 12, wherein the first conductive junction layer and the second conductive junction layer contain tin. Note 14. A die pad located away from the first lead, The system further comprises a bonding layer that joins the die pad and the semiconductor element, The bonding layer is a semiconductor device as described in Appendix 13, wherein the bonding layer contains tin. Note 15. The semiconductor element has a second electrode located on the opposite side from the first electrode in the thickness direction, The semiconductor device according to Appendix 14, wherein the bonding layer is in contact with the second electrode. Note 16. The system further comprises a second lead located away from the first lead in a second direction perpendicular to the thickness direction and the first direction, The semiconductor element has a gate electrode located on the same side as the first electrode in the thickness direction, The semiconductor device described in Appendix 15, wherein the second lead is electrically connected to the gate electrode. Note 17. The semiconductor element and the conductive member, and a sealing resin covering a portion of the first lead and the die pad, are further provided. The die pad has a back surface that faces the opposite side in the thickness direction from the side on which the semiconductor element is located, The semiconductor device according to any one of appendices 14 to 16, wherein the first mounting surface and the back surface are exposed from the sealing resin. Note 18. The first lead has a first side surface that faces away from the side on which the semiconductor element is located in the first direction, The semiconductor device described in Appendix 17, wherein the first side surface is exposed from the sealing resin. [Explanation of Symbols]
[0088] A10, A20, A30, A40: Semiconductor equipment 10: Semiconductor element 11: First electrode 12: Second electrode 13: Gate electrode 21: First lead 211: First main surface 212: First implementation surface 213: First side surface 214: Third surface 215: Fourth surface 216: Fifth surface 217: Recess 22: Second lead 221: Second main surface 222: Second implementation surface 223: Second side surface 224: Thin-walled section 224A: Intermediate surface 224B: End face 23: Die pad 231: Mounting surface 232: Back surface 233: Peripheral surface 234: Thin-walled section 234A: Intermediate surface 234B: End surface 29: Bonding layer 30: Conductive member 301: First surface 302: Second surface 303: Joint surface 304: Inclined surface 305: Regulatory surface 306: Opposing surface 31: First conductive member 32: Second conductive member 40: Wire 50: Sealing resin 51: Top surface 52: Bottom 53: First side 54: Second side P1: 1st interval P2: 2nd interval z: thickness direction x: first direction y: second direction
Claims
1. First lead, A semiconductor device having a first electrode, A conductive member that connects the first lead and the first electrode, A first conductive bonding layer that electrically connects the first lead and the conductive member, The device comprises a second conductive bonding layer that electrically connects the first electrode and the conductive member, The conductive member has a first surface facing the first lead in the thickness direction of the semiconductor element, and a second surface facing the first lead in a first direction perpendicular to the thickness direction. The first lead has a third surface facing the first surface and a fourth surface facing the second surface, The third surface faces the same side as the outer surface of the first electrode in the thickness direction, The first conductive bonding layer is in contact with each of the first, second, third, and fourth surfaces. The first surface is a curved surface that is concave in the thickness direction, wherein the semiconductor device.
2. The semiconductor device according to claim 1, wherein the maximum value of the first interval from the first surface to the third surface is smaller than the maximum value of the second interval from the second surface to the fourth surface.
3. The first lead has a first main surface that faces the same side as the third surface in the thickness direction, The semiconductor device according to claim 1, wherein the first main surface is located in the thickness direction with the fourth surface in between, on the opposite side from the third surface.
4. The semiconductor device according to claim 3, wherein the fourth surface faces the side on which the semiconductor element is located in the first direction.
5. The semiconductor device according to claim 4, wherein the first conductive junction layer is in contact with the first main surface.
6. The fourth surface faces the side opposite to the side on which the semiconductor element is located in the first direction, The semiconductor device according to claim 3, wherein the conductive member straddles the first main surface.
7. The first lead has a first mounting surface facing away from the third surface in the thickness direction, and a fifth surface facing the same side as the fourth surface in the first direction, Viewed in the thickness direction, the third surface overlaps the first mounting surface. The semiconductor device according to claim 4, wherein the fifth surface is located between the first mounting surface and the third surface in the thickness direction and is located on the opposite side of the fourth surface with the third surface in between in the first direction.
8. The semiconductor device according to claim 7, wherein the conductive member has a restricting surface facing the fifth surface.
9. The semiconductor device according to claim 8, wherein a portion of the first conductive junction layer is located between the fifth surface and the restricting surface.
10. The semiconductor device according to any one of claims 7 to 9, wherein the first conductive junction layer and the second conductive junction layer contain tin.
11. A die pad located away from the first lead, The system further comprises a bonding layer that joins the die pad and the semiconductor element, The semiconductor device according to claim 10, wherein the bonding layer contains tin.
12. The semiconductor element has a second electrode located on the opposite side from the first electrode in the thickness direction, The semiconductor device according to claim 11, wherein the bonding layer is in contact with the second electrode.
13. Further comprising a second lead located away from the first lead in a second direction perpendicular to the thickness direction and the first direction, The semiconductor element has a gate electrode located on the same side as the first electrode in the thickness direction, The semiconductor device according to claim 12, wherein the second lead is electrically connected to the gate electrode.
14. The semiconductor element and the conductive member, and a sealing resin covering a part of the first lead and the die pad, The die pad has a back surface that faces the opposite side in the thickness direction from the side on which the semiconductor element is located, The semiconductor device according to claim 11, wherein the first mounting surface and the back surface are exposed from the sealing resin.
15. The first lead has a first side surface that faces away from the side on which the semiconductor element is located in the first direction, The semiconductor device according to claim 14, wherein the first side surface is exposed from the sealing resin.