Semiconductor packages

Abstract

To provide a semiconductor package which includes a plurality of power semiconductor elements and can achieve both of heat radiation property securing and sealing resin crack suppressing.SOLUTION: A plurality of semiconductor elements 1 are mounted on different mounting parts 21 arranged with gaps, and connected with different bridge members 5. The bridge member 5 electrically connects the semiconductor element with another mounting part 21 forming a pair with the mounting part 21 on which the semiconductor element 1 located immediately below is mounted or a connection object part 22. A gap formed by the two adjacent bridge members 5 is filled with a sealing resin 6. The direction which is along the bridge member 5 and connects the semiconductor element 1 located immediately below with the other mounting part 21 or the connection object part 22 is a connection direction D1. In a semiconductor package, an end gap G2 on an end in the connection direction D1 in the gap formed by the two adjacent bridge members 5 is greater than a center gap G1 on the center in the same direction.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor package in which a clip is connected to a semiconductor element.

Background Art

[0002] Conventionally, as in the semiconductor package described in Patent Document 1 for example, a power semiconductor element such as a power MOSFET is mounted on a lead frame, a clip wider than a wire is connected to the power semiconductor element, and a resin-sealed structure is known. Note that MOSFET is an abbreviation for Metal-Oxide-Semiconductor Field-Effect Transistor.

[0003] In addition, as this type of semiconductor package, a so-called 2in1 structure is known in which a lead frame has two independent islands, power semiconductor elements are mounted on each of the two islands, and these are collectively sealed with one resin member.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In a semiconductor package using a plurality of power semiconductor elements with a large amount of heat generation during driving, from the viewpoint of improving heat dissipation, it is preferable to make the area of the clip connected to each semiconductor element as large as possible.

[0006] The inventors diligently studied semiconductor packages with a structure having multiple power semiconductor elements, such as a 2-in-1 structure, and with wide crosslinking members, such as clips, bonded to each power semiconductor element. As a result, it was newly discovered that in semiconductor packages with this structure, cracks can occur in the part of the encapsulating resin that fills the gap between two adjacent wide crosslinking members, potentially reducing reliability.

[0007] In view of the above, the present invention aims to provide a semiconductor package having multiple power semiconductor elements that can achieve both heat dissipation and crack suppression of the sealing resin. [Means for solving the problem]

[0008] To achieve the above objective, the semiconductor package described in claim 1 comprises a plurality of semiconductor elements (1), a plurality of plate-shaped bridging members (5) connected to different semiconductor elements, a lead frame (2) having a plurality of mounting sections (21) on which different semiconductor elements are mounted, and a sealing resin (6) covering a part of the lead frame, the plurality of semiconductor elements, and the bridging members, wherein the plurality of bridging members are arranged at a distance from other bridging members and electrically connect the semiconductor elements to parts (21, 22) of the lead frame that are different from the mounting sections on which the semiconductor elements to which they are connected are mounted, the plurality of mounting sections are arranged at a distance from other mounting sections, the connection direction (D1) is defined as the direction along the bridging members that connects the semiconductor elements to parts that are different from them, the central gap (G1) is defined as the gap at the center of the connection direction between a bridging member and an adjacent bridging member, and the end gap (G2) is defined as the gap at the end of the connection direction, with the end gap being wider than the central gap. The multiple bridging members have a larger planar size than the semiconductor element located directly beneath them and are arranged to cover at least a portion of each of the four sides forming the outer casing of the semiconductor element. The semiconductor element to which the bridging members are connected has a gate electrode (13) on the connection surface (1b) of the bridging member, and the lead frame has a gate terminal (24) that is electrically connected to the gate electrode. The gate terminal is located in the vicinity of the end gap, as viewed from the direction normal to the surface on which the semiconductor element is mounted, in a region that does not overlap with the bridging members. .

[0009] In this semiconductor package, multiple semiconductor elements are mounted on different mounting sections of a lead frame, and different crosslinking members are connected to these semiconductor elements. These members are then covered with a sealing resin. The connection direction is defined as the direction along the crosslinking members that connects the semiconductor elements to a part of the lead frame. The external gap at the end of the connection direction between adjacent crosslinking members is wider than the central gap at the center in the same direction. In other words, the semiconductor package does not have narrow areas near the outer casing of the package where thermal stress due to the drive control of the semiconductor elements is likely to concentrate, due to the filling portion between adjacent crosslinking members by the sealing resin. As a result, this semiconductor package can dissipate heat generated by the drive of multiple semiconductor elements to the outside through the crosslinking members of the plate-like members, while suppressing crack formation in the sealing resin even when repeated cooling cycles are performed due to the drive control of the semiconductor elements.

[0010] The reference numerals in parentheses attached to each component indicate an example of the correspondence between that component and the specific components described in the embodiments described later. [Brief explanation of the drawing]

[0011] [Figure 1] This is a top layout diagram showing a semiconductor package according to the first embodiment. [Figure 2] This is a cross-sectional view along line II-II in Figure 1. [Figure 3] This is an explanatory diagram illustrating the gap between two adjacent bridge members. [Figure 4] This figure shows the circuit configuration of the semiconductor package according to the first embodiment. [Figure 5] This is an explanatory diagram to help understand the semiconductor package and crack formation in the comparative example. [Figure 6] This is a top layout diagram showing a modified example of the semiconductor package of the first embodiment. [Figure 7] This is a top layout diagram showing a semiconductor package according to the second embodiment. [Figure 8] This is a cross-sectional view along line VIII-VIII in Figure 7. [Figure 9] It is a top view layout diagram showing a first modification example of the semiconductor package of the second embodiment. [Figure 10] It is a top view layout diagram showing a second modification example of the semiconductor package of the second embodiment. [Figure 11] It is a top view layout diagram showing the semiconductor package of the third embodiment. [Figure 12] It is a top view layout diagram showing the semiconductor package of other embodiments.

Mode for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present invention will be described based on the drawings. In each of the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals and described.

[0013] (First Embodiment) The semiconductor package P1 of the first embodiment will be described with reference to the drawings. The semiconductor package P1 is suitable for being mounted on a vehicle such as an automobile and used for driving control of various in-vehicle components. Of course, it can also be adopted for other uses.

[0014] In FIG. 1, the outline of the encapsulation resin 6 to be described later is shown by a two-dot chain line, the part of the outline of the component covered by the encapsulation resin 6 that is covered by the cross-linking member 5 to be described later is shown by a broken line, and the other parts are shown by solid lines. Also, in FIG. 1, for the sake of easy viewing, it does not show a cross-section, but the second electrode 12 of the semiconductor element 1 to be described later is hatched. These points are the same for FIGS. 3, 5 to 7, 9 to 11 to be described later.

[0015] Hereinafter, for convenience of explanation, as shown in FIG. 1, the direction along the left - right direction on the paper surface is referred to as the "x - direction", the direction perpendicular to the x - direction on the paper surface is referred to as the "y - direction", and the normal direction to the xy plane is referred to as the "z - direction", respectively. The x, y, and z directions in the figures after FIG. 2 respectively correspond to the x, y, and z directions in FIG. 1. Also, as shown in FIG. 1, viewing the semiconductor package P1 from the z - direction may be referred to as "top view".

[0016] [Semiconductor Package] The semiconductor package P1 of this embodiment includes, for example, as shown in FIG. 1, two semiconductor elements 1, a lead frame 2 having a mounting portion 21 and a connection portion 22, wires 4, two bridging members 5, and a sealing resin 6 covering these components. The semiconductor package P1 has a 2 - in - 1 structure in which two semiconductor elements 1 are covered by the sealing resin 6. Also, as shown in FIGS. 1 and 2, for example, the lead frame 2 is located inside the outer contour of the sealing resin 6, and the surface of the lead frame 2 opposite to the surface on the side of the semiconductor element 1 is exposed from the sealing resin 6, which is a QFN structure. QFN is an abbreviation for Quad Flat Non - leaded package. In the semiconductor package P1, two semiconductor elements 1 are respectively mounted on different mounting portions 21 arranged independently of each other in the lead frame 2, and these elements are electrically connected through the bridging members 5 and the mounting portions 21, forming a circuit configuration. The semiconductor package P1 has a size of, for example, a width of about 8 mm in the x - direction, a width of about 7 mm in the y - direction, and a thickness of about 0.9 mm in the z - direction, but is not limited thereto.

[0017] As the semiconductor element 1, for example, power semiconductor elements such as power MOSFET, IGBT, or RC - IGBT in which an IGBT and a diode are integrated can be adopted. The semiconductor element 1 is composed mainly of, for example, Si (silicon) or SiC (silicon carbide) and is manufactured by a known semiconductor process. In this specification, the case where the semiconductor element 1 is a power MOSFET is described as a representative example. Also, IGBT is an abbreviation for Insulated - Gate Bipolar Transistor.

[0018] For example, as shown in Figures 1 and 2, the semiconductor element 1 is shaped like a rectangular plate with its longitudinal direction in the y-direction, and has a first electrode 11 on one surface 1a facing the mounting section 21, and a second electrode 12 and a third electrode 13 on the other surface 1b opposite to surface 1a. In the semiconductor element 1, the first electrode 11 is the drain electrode, the second electrode 12 is the source electrode, and the third electrode 13 is the gate electrode. The semiconductor element 1 is mounted on the mounting section 21 of the lead frame 2 via a bonding material 3 made of a conductive bonding material such as solder.

[0019] For the sake of explanation, as shown in Figure 1, the semiconductor element 1 located on the left side in the x-direction will be referred to as the "first semiconductor element 1A," the one located on the right side in the x-direction will be referred to as the "second semiconductor element 1B," and these two will be collectively referred to as "semiconductor elements 1A and 1B." Similarly, as shown in Figure 2, the outer surface of the sealing resin 6 that covers the crosslinking member 5 and is located above the crosslinking member 5 in the z-direction will be referred to as the "upper surface 6a," the surface opposite the upper surface 6a will be referred to as the "lower surface 6b," and the surface connecting the upper surface 6a and the lower surface 6b will be referred to as the "side surface 6c."

[0020] The semiconductor elements 1A and 1B are each mounted on separate mounting sections 21 within the lead frame 2, and the first electrode 11 is electrically connected to the mounting section 21. A bridging member 5 is connected to the second electrode 12 of each semiconductor element 1A and 1B. The first semiconductor element 1A is electrically connected to the mounting section 21 on which the second semiconductor element 1B is mounted via the bridging member 5. The second semiconductor element 1B is electrically connected to a connected section 22 located away from the mounting section 21 on which it is mounted via the bridging member 5. In each semiconductor element 1A and 1B, the third electrode 13 is exposed from the bridging member 5, and a wire 4 is connected to the third electrode 13. The semiconductor elements 1A and 1B are arranged such that, for example, when viewed from above, one third electrode 13 is located on the upper side in the y-direction, and the other third electrode 13 is located on the lower side in the y-direction, i.e., they are arranged in a point-symmetrical configuration. The semiconductor elements 1A and 1B have a third electrode 13 formed near the corner of their other surface 1b that faces the other semiconductor element 1. In other words, the third electrode 13 of each semiconductor element 1A and 1B is located in a wide area of ​​the gap between the two adjacent bridging members 5 when viewed from above.

[0021] The lead frame 2 is made of a metallic material such as Cu (copper), Fe (iron), or an alloy thereof, and has a mounting section 21 on which a semiconductor element is mounted, a connected section 22 positioned spaced apart from the mounting section 21, and a plurality of terminal sections 23 protruding from the mounting section 21 or the connected section 22. The lead frame 2 further has a second terminal section 24, which is independent of the mounting section 21 and the connected section 22, with the terminal section 23 designated as the first terminal section 23. In the lead frame 2, for example, the mounting section 21, the connected section 22, and the second terminal section 24 are connected by tie bars (not shown) until the sealing resin 6 is molded, but after the sealing resin 6 is molded, these connecting parts are cut and removed, resulting in a final separated state. In this embodiment, the lead frame 2 comprises two mounting sections 21, one connected section 22, and two second terminal sections 24, which are positioned at a distance from each other and have an independent configuration.

[0022] The mounting section 21 is the part on which the semiconductor element 1 is mounted. As shown in Figure 1, for example, the mounting section 21 has a plurality of first terminal portions 23 that protrude toward adjacent edges of the outer casing of the sealing resin 6 when viewed from above. In this embodiment, the first terminal portions 23 of the mounting section 21 are drain terminals and are exposed to the outside on the lower surface 6b and side surface 6c of the sealing resin 6. For example, each of the two mounting sections 21 is mounted with one semiconductor element 1.

[0023] For the sake of explanation, the mounting section 21 on which the first semiconductor element 1A is mounted will be referred to as the "first mounting section 21A," and the mounting section 21 on which the second semiconductor element 1B is mounted will be referred to as the "second mounting section 21B."

[0024] In this embodiment, the lead frame 2 consists of a first mounting section 21A on which the first semiconductor element 1A is mounted, a second mounting section 21B on which the second semiconductor element 1B is mounted, and a connected section 22 that is paired with the second mounting section 21B.

[0025] The second mounting section 21B comprises an element mounting section 211 on which the second semiconductor element 1B is mounted, and an extension section 212 extending to the left in the x-direction from the element mounting section 211. The second mounting section 21B is positioned at a distance from the first mounting section 21A and the connected section 22, with the element mounting section 211 paired with the connected section 22, and the extension section 212 paired with the first mounting section 21A. The bridging member 5 connected to the first semiconductor element 1A is connected to the extension section 212 of the second mounting section 21B.

[0026] The connected portion 22 is a component that pairs with the mounting portion 21 and, like the mounting portion 21, has a plurality of first terminal portions 23. The connected portion 22 pairs with, for example, an adjacent second mounting portion 21B in the y-direction. The connected portion 22 is positioned at a distance from the mounting portion 21, as shown in Figures 1 and 2, for example, and one end of the bridging member 5 is connected to it. The connected portion 22 is electrically connected to the second electrode 12 of the semiconductor element 1 mounted on the paired mounting portion 21 via the bridging member 5. In this embodiment, the first terminal portions 23 of the connected portion 22 are source terminals and are exposed to the outside on the lower surface 6b and side surface 6c of the sealing resin 6.

[0027] The first terminal portion 23 is a plurality of terminals provided on the mounting portion 21 or the connected portion 22, for example, as shown in Figure 1. The first terminal portions 23 are arranged in parallel with a gap between them.

[0028] The second terminal portion 24 is, for example, positioned differently from the mounting portion 21 and the connected portion 22, and is electrically connected to the third electrode 13 of the semiconductor element 1 via a wire 4. In this embodiment, the second terminal portion 24 is a gate terminal and is exposed to the outside on the lower surface 6b and side surface 6c of the sealing resin 6. As shown in Figure 2, for example, a portion of the second terminal portion 24 is exposed from the sealing resin 6 and is connected to an external circuit board or the like. When viewed from above, that is, from the direction normal to the surface of the mounting portion 21 on which the semiconductor element 1 is mounted, the second terminal portion 24 is positioned near the end gap G2, which will be described later, among the gaps between two adjacent bridging members 5, and is positioned so as not to overlap with the bridging members 5.

[0029] The bonding material 3 is made of any conductive bonding material, such as solder, and electrically connects each component of the semiconductor package P1.

[0030] Wire 4 is made of a conductive material such as Au (gold). Wire 4 is connected to the third electrode 13 and the second terminal portion 24 of the semiconductor element 1 by wire bonding, for example, thereby electrically connecting them.

[0031] The crosslinking member 5 is a wide, plate-shaped member whose main component is any conductive material such as Cu, Fe, or their alloys. The crosslinking member 5 is a connecting member that crosslinks the semiconductor element 1 and a part of the lead frame 2, electrically connecting them, and can also be called a "clip." As shown in Figures 1 and 3, for example, in a top view, the crosslinking member 5 has a larger planar size than the semiconductor element 1 and is bonded to the semiconductor element 1 via the bonding material 3 to the second electrode 12.

[0032] The crosslinking member 5 is positioned, for example, in a top view, to cover all areas of the other surface 1b of the semiconductor element 1 except for a predetermined area including the third electrode 13. In other words, the crosslinking member 5 covers part or all of the four sides forming the outer perimeter of the other surface 1b of the semiconductor element 1, and is positioned to easily dissipate heat from the semiconductor element 1 during operation to the outside. For example, all parts of the crosslinking member 5 other than the connection part with the semiconductor element 1 and the lead frame 2 are covered by the sealing resin 6 and are not exposed to the outside. That is, as shown in Figure 2, the crosslinking member 5 has the side facing the semiconductor element 1 and the connected part 22 as the connection surface 5a, and the opposite side as the opposite surface 5b, with the opposite surface 5b being entirely covered by the sealing resin 6 and insulated from the outside by the sealing resin 6.

[0033] The crosslinking member 5 is positioned such that its height is the largest compared to the other members, with the mounting surface being the surface on which the semiconductor element 1 is mounted within the mounting section 21, and its height being the dimension in the direction normal to the mounting surface. In other words, the crosslinking member 5 is positioned closest to the top surface 6a among the members covered by the sealing resin 6. This allows the portion of the sealing resin 6 covering the crosslinking member 5 to be the surface layer, minimizing the thickness of the surface layer and providing an advantage in heat dissipation from the crosslinking member 5 to the outside.

[0034] The bridging member 5 has a connection direction D1 (in the example of FIG. 1, the direction along the y direction) for connecting the semiconductor element 1 located directly below itself and a part of the lead frame 2 to which the semiconductor element is connected via itself. One end of the connection direction D1 is narrower in width than the center in the same direction. The width of the bridging member 5 here refers to the width in the direction orthogonal to the connection direction D1. Specifically, in a top view, the bridging member 5 extends such that one end of the connection direction D1 moves away from the other adjacent bridging member 5, and its width becomes narrower than the center in the same direction. On the other hand, the other end side of the bridging member 5 in the connection direction D1 has substantially the same width as the center in the same direction. As a result, the gap between two adjacent bridging members 5 is, for example, as shown in FIG. 3. Taking the center gap in the connection direction D1 as the center gap G1 and the gap at the end in the same direction as the end gap G2, the relationship is G1 < G2. Thereby, the stress in the portion of the encapsulating resin 6 that fills the gap between two adjacent bridging members 5 is relaxed, and crack generation is suppressed. Details of this will be described later.

[0035] As shown in FIG. 2, the bridging member 5 connected to the second semiconductor element 1B is bent such that the other end side in the connection direction D1 faces the lead frame 2 side and is joined to the connection portion 22 via the bonding material 3. The bridging member 5 connected to the first semiconductor element 1A has the same shape as the above-described bridging member 5, and is arranged in the opposite direction in the y direction similar to the semiconductor elements 1A and 1B. The bent other end side is joined to the second mounting portion 21B via the bonding material 3. The bridging member 5 is in a so-called hollow state where the portion other than the connection portion with the semiconductor element 1 and a part of the lead frame 2 does not contact members other than the encapsulating resin 6.

[0036] The sealing resin 6 comprises, for example, an electrically insulating resin material such as epoxy resin, and a filler with a higher thermal conductivity than the resin material. As the filler, inorganic particles such as alumina may be used. The sealing resin 6 is formed, for example, by a method such as injection molding using a mold. The sealing resin 6 covers the semiconductor element 1, a part of the lead frame 2, the bonding material 3, the wire 4, and the crosslinking member 5. The sealing resin 6 has, for example, an upper surface 6a and a lower surface 6b that are flat surfaces aligned with the xy plane. On the upper surface 6a of the sealing resin 6, other components of the semiconductor package P1 are not exposed, and electrical insulation is ensured on the upper surface 6a. From the viewpoint of achieving high heat dissipation, it is preferable that the sealing resin 6 has a thermal conductivity of 3 W / m·K or higher, but it is not limited to this. Hereinafter, for convenience of explanation, as shown in Figure 1, for example, the part of the sealing resin 6 that fills the gap between two adjacent crosslinking members 5 will be referred to as the "first filling part 61".

[0037] The above describes the basic configuration of the semiconductor package P1 of this embodiment.

[0038] [Example of circuit configuration] The semiconductor package P1, for example, in this embodiment, constitutes the circuit shown in Figure 4, i.e., a circuit in which semiconductor elements 1A and 1B are connected in series via a lead frame 2. In Figure 4, "D1", "S1", and "G1" correspond to terminals connected to the first electrode 11, second electrode 12, and third electrode 13 of the first semiconductor element 1A, respectively. In Figure 3, "D2", "S2", and "G2" correspond to terminals connected to the first electrode 11, second electrode 12, and third electrode 13 of the second semiconductor element 1B, respectively.

[0039] The semiconductor package P1 is configured as a half-bridge circuit in which a first semiconductor element 1A and a second semiconductor element 1B are connected in series, and the terminal portion 23 of the second mounting section 21B, which corresponds to the connection portion between them, serves as the output terminal. In the semiconductor package P1, for example, the terminal portion 23(D1) of the first mounting section 21A is connected to an external power supply (not shown), and the terminal portion 23(S2) of the connected section 22 is connected to a reference potential (GND). For example, the first semiconductor element 1A is the high side and the second semiconductor element 1B is the low side. The semiconductor elements 1A and 1B are, for example, both N-channel type transistors, with the first electrode 11 on one side 1a being the drain electrode, and the second electrode 12 and third electrode 13 on the other side 1b being the source electrode and gate electrode, respectively. The semiconductor elements 1A and 1B are mounted in a so-called face-up mounting configuration, with the other side 1b, where the second electrode 12 of the source electrode is formed, facing away from the mounting section 21, which functions as a heat dissipation member.

[0040] In other words, the terminal portion 23 of the first mounting portion 21A is the D1 terminal, the terminal portion 24 connected to the power supply terminal and the third electrode 13 of the first semiconductor element 1A is the G1 terminal, and the terminal portion 23 protruding from the extension portion 212 is the S1 terminal. Also, the terminal portion 23 of the element mounting portion 211 is the D2 terminal, the terminal portion 24 connected to the output terminal and the third electrode 13 of the second semiconductor element 1B is the G2 terminal, and the terminal portion 23 of the connected portion 22 is the S2 terminal.

[0041] [Crack suppression in sealing resins] Next, the effects of having two adjacent bridging members 5 shaped and arranged such that the end gap G2 > center gap G1 will be explained in comparison with the semiconductor package 100 of the comparative example shown in Figure 5.

[0042] First, let's describe the comparative example semiconductor package 100.

[0043] The comparative example semiconductor package 100 comprises two semiconductor elements 1, a lead frame 7 having two pairs of mounting portions 71 and connected portions 72, a crosslinking member 8, and a sealing resin 6 that seals these. The lead frame 7 further has a first terminal 73 extending from the mounting portions 71 and connected portions 72 to the edges of the sealing resin 6 that form the outer casing of the package, and a second terminal 74 independent of the mounting portions 71, connected portions 72, and first terminal 73. In the comparative example semiconductor package 100, on the left side in the x-direction, the connected portions 72 and mounting portions 71 are arranged in order from the top in the y-direction, and on the right side in the x-direction, the mounting portions 71 and connected portions 72 are arranged in order from the top in the y-direction. In the comparative example semiconductor package 100, the semiconductor elements 1C and 1D are each connected to their second electrodes 12 via the crosslinking member 8, and are electrically connected to the connected portions 72 that are paired with the mounting portion 71 on which they are mounted via the crosslinking member 8. The comparative example semiconductor package 100 has two mounting sections 71 and connection sections 72 arranged with a gap between them, and has a 2-in-1 structure in which semiconductor elements 1C and 1D are electrically independent.

[0044] As shown in Figure 5, the semiconductor elements 1C and 1D have a third electrode 13 formed near the end in the y-direction and at the center in the x-direction on the other surface 1b, with the third electrode 13 exposed from the bridging member 8. The third electrode 13 is electrically connected to the second terminal 74 by a wire 4. The bridging member 8 has a larger planar size than the semiconductor element 1 and covers the entire area of ​​the semiconductor element 1 located directly below it, except for a predetermined area including the third electrode 13, thereby improving the heat dissipation of the semiconductor element 1. The bridging member 8 has a bifurcated shape, with one end located near the third electrode 13 branching out so as to avoid being directly above the third electrode 13. The two adjacent bridging members 8 connected to the semiconductor elements 1C and 1D are arranged so that the gap G0 between them is approximately constant. The gap G0 is set to a minimum of approximately 0.4 mm, for example, from the viewpoint of ensuring insulation between adjacent bridging members 8 and miniaturizing the entire package.

[0045] As a result of diligent research by the present inventors, it was found that in the comparative example semiconductor package 100, cracks occur in the first filling portion 61 that fills the gap between two adjacent crosslinking members 8 of the sealing resin 6 during the repeated cooling cycle caused by the driving control of the semiconductor element 1.

[0046] Specifically, in the comparative example semiconductor package 100, the width of the first filling portion 61 is generally narrow, and its edges are located near the outer surface of the sealing resin 6. Furthermore, thermal deformation occurs in the comparative example semiconductor package 100 due to the thermal cycle, and the stress associated with this thermal deformation concentrates in the first filling portion 61. As a result, although the comparative example semiconductor package 100 can improve heat dissipation by using a crosslinking member 8 with a larger planar size than the semiconductor element 1, there is a risk of cracks occurring in the sealing resin 6 originating from the edges of the first filling portion 61, which may result in insufficient reliability.

[0047] In contrast, in the semiconductor package P1 of this embodiment, the width of two adjacent bridging members 5 is narrowed such that one end in the connection direction D1 is away from the other bridging member 5, and the end gap G2 is wider than the central gap G1. As a result, the width of the first filling portion 61 near the outer edge of the package, where thermal stress tends to concentrate due to the thermal cycle, is wider than the width near the center of the package, thus mitigating thermal stress. As a result, the semiconductor package P1 can efficiently dissipate heat generated by multiple semiconductor elements 1 to the outside by using multiple wide bridging members 5, and the stress on the first filling portion 61 of the sealing resin 6 is mitigated, suppressing crack occurrence. For example, the end gap G2 should be at least larger than the central gap G1, but if the central gap G1 is 0.4 mm, it should be larger than 0.4 mm, preferably twice as large, 0.8 mm or more, but is not limited to this.

[0048] In this embodiment, the semiconductor package P1 has wide crosslinking members 5 connected to each of the two semiconductor elements 1, which are covered with a sealing resin 6. The gap between adjacent crosslinking members 5 is larger at the edges G2 near the outer edge of the package than at the center gap G1 near the center of the package. As a result, the heat generated by the operation of the semiconductor elements 1 can be dissipated over a wide area by the crosslinking members 5, which have a planar size larger than that of the semiconductor elements 1, and the width of the edges of the first filling portion 61 is wider than at the center, thus relieving stress at the edges. Therefore, the semiconductor package P1 can achieve both heat dissipation and crack suppression.

[0049] (Modification of the first embodiment) The two crosslinking members 5 may have a shape in which, as shown in Figure 6, for example, a chamfered portion 51 is formed in a portion of the connection direction D1 that is located on the center side of the third electrode 13 of the semiconductor element 1 to which it is connected, when viewed from above, in order to relieve stress on the sealing resin 6. Specifically, each of the two crosslinking members 5 has a chamfered portion 51 formed as a notched portion that gradually moves away from the other crosslinking member 5 as it moves from near the center of the semiconductor package toward the edge. As a result, the gap in the chamfered portion 51 of the first filling portion 61 is defined as the chamfer width G3, and the change in width in the direction from the package edge toward the package center becomes gentler, G2 > G3 > G1, further relieving thermal stress due to the cooling cycle. Note that the inclination and outer shape of the chamfered portion 51 are not limited to the example shown in Figure 6 and can be changed as appropriate.

[0050] This modified version also provides a semiconductor package P1 that offers the same effects as the first embodiment described above. Furthermore, because the crosslinking member 5 has a chamfered portion 51, the thermal stress on the first filling portion 61 of the sealing resin 6 is further reduced, resulting in the effect of further suppressing crack formation in the sealing resin 6.

[0051] (Second Embodiment) The semiconductor package P2 of the second embodiment will be described with reference to the drawings.

[0052] For the sake of explanation, as shown in Figure 7, for example, the portion of the sealing resin 6 that fills the gap between adjacent mounting portions 21 or connected portions 22 will be referred to as the "second filling portion 62".

[0053] The semiconductor package P2 of this embodiment differs from the first embodiment in that, as shown in Figures 7 and 8, for example, the second filling portion 62 of the sealing resin 6 is positioned offset from a part of the central gap G1 of the first filling portion 61. This embodiment will mainly explain this difference.

[0054] In this embodiment, the two bridging members 5 each have a projection 52 in which a portion of the area, including the central portion in the connection direction D1, protrudes toward the other bridging member 5. For example, the side of the projection 52 facing the other bridging member 5 is inclined with respect to the y direction. A portion of the projection 52 extends onto the mounting portion 21 on which the semiconductor element 1 is mounted, located directly below the opposing bridging members 5. In other words, in a top view, a portion of the projection 52 straddles the gap between the two mounting portions 21. The two bridging members 5 are substantially the same shape and planar size as in the first embodiment described above.

[0055] In this embodiment, as shown in Figure 8, the encapsulating resin 6 has a configuration in which a portion of the first filling portion 61 is offset from the second filling portion 62. Specifically, for example, while the second filling portion 62 is arranged along one direction (the y-direction in the example of Figure 8), the first filling portion 61 is arranged along a different direction (a direction other than the y-direction in the example of Figure 8), with only a portion of it located on the second filling portion 62. As a result, even when thermal stress associated with the drive control of the semiconductor element 1 is applied to the second filling portion 62, the encapsulating resin 6 is configured such that the thermal stress is less likely to be transmitted to the first filling portion 61 because most of the first filling portion 61 is offset from the second filling portion 62. Therefore, compared to the case where most of the first filling portion 61 is located on the second filling portion 62, the thermal stress on the first filling portion 61 is reduced, and crack occurrence in the first filling portion 61 is further suppressed. Furthermore, from the viewpoint of stress relaxation, it is preferable that the portion of the first filling portion 61 that is offset from the second filling portion 62 includes both ends in the connection direction D1. Also, "the first filling portion 61 and the second filling portion 62 are offset" means that, when viewed from the direction normal to the surface of the mounting portion 21 on which the semiconductor element 1 is mounted, the first filling portion 61 is offset from the second filling portion 62 in a direction that intersects with the second filling portion 62. For example, as shown in Figure 7, when viewed from above, a portion of the first filling portion 61 is offset from the second filling portion 62 in a direction that intersects with the second filling portion 62, that is, in a direction that intersects with the y direction.

[0056] According to this embodiment, the semiconductor package P2 is obtained that has the same effects as the first embodiment described above. Furthermore, because the first filling portion 61 and the second filling portion 62 of the sealing resin 6 are offset, thermal stress in the second filling portion 62 is less likely to be transmitted to the first filling portion 61, and the effect of further suppressing crack generation in the sealing resin 6 is also obtained.

[0057] (Modified version of the second embodiment) The semiconductor package P2 may have an offset configuration in which the first filling portion 61 and the second filling portion 62 are offset, for example, as shown in Figure 9, by having one of the two bridging members 5 protrude more than the other. For example, one of the two bridging members 5 that is directly connected to the first semiconductor element 1A may be called the "first bridging member 5A," and the other may be called the "second bridging member 5B," so that the semiconductor package P2 has a configuration in which only the first bridging member 5A has a protruding portion 52. The first bridging member 5A may have a configuration in which the protruding portion 52 is substantially trapezoidal when viewed from above, and has a notch 521 near the third electrode 13 of the first semiconductor element 1A directly below it. On the other hand, the second bridging member 5B may have no protruding portion 52, and has a configuration in which the notch 522 is located near the third electrode 13 of the second semiconductor element 1B directly below it, moving away from the first bridging member 5A. As a result, the sealing resin 6 has a positional shift between most of the first filling portion 61 and the second filling portion 62, and also has chamfered notches 521 and 522, which relieves stress on the first filling portion 61.

[0058] The semiconductor package P2 may have a configuration in which the width in the x-direction of the portion of the second mounting portion 21B facing the first mounting portion 21A in the x-direction is greater than that of the first mounting portion 21A, as shown in Figure 10, and the first filling portion 61 and the second filling portion 62 are offset. In addition, the width of the connected portion 22 in the x-direction is approximately the same as the width in the same direction of the portion of the second mounting portion 21B facing the first mounting portion 21A in the x-direction. In this case, even if the two bridging members 5 have protruding portions 52 and are approximately the same shape and planar size, the position of the second filling portion 62 is shifted to the left in the x-direction relative to the first filling portion 61 when viewed from above, so that the first filling portion 61 and the second filling portion 62 are offset. Therefore, the modified semiconductor package p2 shown in Figure 10 has a configuration that provides the same effect as the modified example shown in Figure 9.

[0059] This modified form also provides a semiconductor package P2 that offers the same effects as the second embodiment described above. Furthermore, since one of the two crosslinking members 5 has a notch 521 and the other has a notch 522, these function as chamfered portions, further relieving stress in the first filling portion 61 and providing the effect of further suppressing crack formation in the sealing resin 6.

[0060] (Third embodiment) The semiconductor package P3 of the third embodiment will be described with reference to the drawings.

[0061] The semiconductor package P3 of this embodiment differs from the first embodiment in that, as shown in Figure 11, for example, the lead frame 2 has two mounting sections 21 and two connection sections 22, and the two pairs of mounting sections 21 and connection sections 22 are arranged in opposite directions in the y-direction. This embodiment will mainly explain this difference.

[0062] In this embodiment, the lead frame 2 has a first mounting portion 21A that replaces a part of the second mounting portion 21B and is paired with a connected portion 22 that is positioned separately below it in the y-direction. In this embodiment, the second mounting portion 21B does not have an extension portion 212 that faces the first mounting portion 21A in the y-direction. The lead frame 2 has two pairs of mounting portions 21 and connected portions 22, and the two pairs of mounting portions 21 and connected portions 22 are arranged in parallel in the x-direction and facing opposite directions in the y-direction, i.e., they are arranged in a point-symmetrical manner.

[0063] In this embodiment, the first semiconductor element 1A has a bridging member 5 connected to the second electrode 12, and is electrically connected via the bridging member 5 to a connected portion 22 of the lead frame 2 that is paired with the first mounting portion 21A. The first semiconductor element 1A is not electrically connected to the second semiconductor element 1B and constitutes an independent circuit. In this embodiment, the first terminal portion 23 of the first mounting portion 21A, the connected portion 22 that is paired with the first mounting portion 21A, and the second terminal portion 24 are the drain terminal, source terminal, and gate terminal of the first semiconductor element 1A, respectively.

[0064] In this embodiment, the second semiconductor element 1B is mounted on the second mounting section 21B and is electrically connected via a bridging member 5 to a connected section 22 located above the second mounting section 21B in the y-direction. The first terminal section 23 of the second mounting section 21B, the connected section 22 which is paired with the second mounting section 21B, and the second terminal section 24 are the drain terminal, source terminal, and gate terminal of the second semiconductor element 1B, respectively.

[0065] In other words, the semiconductor package P3 has an alternating arrangement in which the source terminals and drain terminals in the circuit section on the left side in the x-direction are arranged in the y-direction in the opposite direction to the arrangement of the source terminals and drain terminals in the circuit section on the right side in the x-direction. In this configuration as well, the two bridging members 5 are shaped such that the gap at the end G2 in the connection direction D1 is wider than the gap at the center G1, thereby easing the thermal stress on the first filling portion 61 of the sealing resin 6.

[0066] This embodiment also provides a semiconductor package P3 that offers the same effects as the first embodiment described above.

[0067] (Other embodiments) This disclosure is described in accordance with the embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the equivalence range. In addition, various combinations and forms, as well as other combinations and forms including one, more, or less of those elements, fall within the scope and concept of this disclosure.

[0068] (1) In the above embodiments, the semiconductor package was described as a representative example in which two semiconductor elements 1 are sealed with a sealing resin 6 in a 2-in-1 structure, but it is not limited to this. In each embodiment, the semiconductor package may be an N-in-1 structure with N (N≧3) semiconductor elements 1, in which case, if the gap between adjacent crosslinking members 5 is larger at the end gap G2 than at the center gap G1, the effect of suppressing crack occurrence can be obtained.

[0069] (2) In the second embodiment described above, the semiconductor package P2 may be configured such that, for example as shown in Figure 12, the two bridging members 5 have different shapes and planar sizes, and the entire first filling portion 61 is offset from the second filling portion 62. Alternatively, two adjacent bridging members 5 may be configured such that one has a notch 522 in the protruding portion 52, and the other does not have a notch in the protruding portion 52.

[0070] (3) It goes without saying that, in each of the above embodiments, the elements constituting the embodiment are not necessarily essential unless explicitly stated to be particularly essential or unless they are clearly considered essential in principle. Furthermore, in each of the above embodiments, when numerical values ​​such as the number, numerical values, quantities, or ranges of the components of the embodiment are mentioned, the embodiment is not limited to those specific numbers unless explicitly stated to be particularly essential or unless it is clearly limited to a specific number in principle. Furthermore, in each of the above embodiments, when the shape, positional relationship, etc. of the components are mentioned, the embodiment is not limited to those shapes, positional relationships, etc. unless explicitly stated or unless it is clearly limited to a specific shape, positional relationship, etc. in principle.

[0071] (Features of the present invention) [Claim 1] A semiconductor package, Multiple semiconductor elements (1), Multiple plate-shaped bridging members (5) connected to different semiconductor elements, A lead frame (2) having multiple mounting sections (21) on which different semiconductor elements are mounted, The system comprises a part of the lead frame, a plurality of semiconductor elements, and a sealing resin (6) covering the crosslinking member, Multiple bridging members are arranged at a distance from other bridging members and electrically connect the semiconductor element to a portion (21, 22) of the lead frame that is different from the mounting portion on which the semiconductor element to which it is connected is mounted. Multiple of the aforementioned mounting parts are arranged at a distance from each other. A semiconductor package wherein the direction along the bridging member that connects the semiconductor element and the different portion is defined as the connection direction (D1), the gap between the bridging member and another adjacent bridging member at the center of the connection direction is defined as the central gap (G1), and the gap at the end of the connection direction is defined as the end gap (G2), the end gap being wider than the central gap. [Claim 2] The semiconductor package according to claim 1, wherein the plurality of bridging members have a larger planar size than the semiconductor element located directly beneath them and are arranged to cover at least a portion of each of the four sides forming the outer casing of the semiconductor element. [Claim 3] The semiconductor package according to claim 1 or 2, wherein the portion of the sealing resin that fills the gap between adjacent mounting portions is designated as a first filling portion (61), and the portion that fills the gap between adjacent crosslinking members is designated as a second filling portion (62), and, when viewed from the direction normal to the surface of the mounting portion on which the semiconductor element is mounted, the first filling portion is offset in part or in whole from the second filling portion in a direction intersecting the second filling portion. [Claim 4] The semiconductor element to which the crosslinking member is connected has a gate electrode (13) on the connection surface (1b) of the crosslinking member. The lead frame has a gate terminal (24) that is electrically connected to the gate electrode, The semiconductor package according to any one of claims 1 to 3, wherein the gate terminal is located in the vicinity of the end gap and does not overlap with the bridging member, when viewed from the direction normal to the surface on which the semiconductor element is mounted within the mounting portion. [Explanation of Symbols]

[0072] 1... Semiconductor element, 1b... Connection surface, 13... Guard electrode (third electrode) 2...Lead frame, 21...Mounting section, 24...Gate terminal, 5...Bridge member 6... Sealing resin, 61... First filling section, 62... Second filling section, D1... Connection direction G1... Center gap, G2... End gap

Claims

1. A semiconductor package, Multiple semiconductor elements (1), Multiple plate-shaped crosslinking members (5) connected to different semiconductor elements, A lead frame (2) having multiple mounting sections (21) on which different semiconductor elements are mounted, The system comprises a part of the lead frame, a plurality of semiconductor elements, and a sealing resin (6) covering the crosslinking member, Multiple bridging members are arranged at a distance from other bridging members and electrically connect the semiconductor element to a portion (21, 22) of the lead frame that is different from the mounting portion on which the semiconductor element to which it is connected is mounted. Multiple of the aforementioned mounting parts are arranged at a distance from each other. The direction along the bridging member that connects the semiconductor element and the different portion is defined as the connection direction (D1), the gap between the bridging member and another adjacent bridging member at the center of the connection direction is defined as the central gap (G1), and the gap at the end of the connection direction is defined as the end gap (G2), wherein the end gap is wider than the central gap. The multiple bridging members are arranged so as to have a larger planar size than the semiconductor element located directly beneath them, and to cover at least a portion of each of the four sides forming the outer casing of the semiconductor element. The semiconductor element to which the crosslinking member is connected has a gate electrode (13) on the connection surface (1b) of the crosslinking member. The lead frame has a gate terminal (24) that is electrically connected to the gate electrode, A semiconductor package in which the gate terminal is located in the vicinity of the end gap, when viewed from the direction normal to the surface on which the semiconductor element is mounted, and in a region that does not overlap with the bridging member.

2. The semiconductor package according to claim 1, wherein a portion of the sealing resin that fills the gap between adjacent crosslinking members is designated as a first filling portion (61), and a portion that fills the gap between adjacent mounting portions is designated as a second filling portion (62), and, when viewed from the direction normal to the surface of the mounting portion on which the semiconductor element is mounted, a portion or all of the first filling portion is offset from the second filling portion in a direction intersecting the second filling portion.

3. The semiconductor package according to claim 1, wherein each of the plurality of bridging members has a chamfered portion (51) which is a notched portion that gradually moves away from other adjacent bridging members as it moves from the center to the end in the connection direction.

4. The semiconductor package according to claim 1, wherein each of the plurality of crosslinking members has a protruding portion (52) in which a portion of the area including the central portion in the connection direction protrudes from the other crosslinking members.

5. The semiconductor package according to claim 1, wherein the plurality of crosslinking members cover the entire remaining area of ​​the semiconductor element directly beneath them, excluding a predetermined region including the gate electrode.

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