Power converter

Abstract

To provide a power conversion apparatus capable of suppressing destruction of a switching element even in a case where a surge voltage is included in an inter-terminal voltage of the switching element, a drive apparatus and a drive method.SOLUTION: In a power conversion apparatus, multiple arms each consisting of a switching element are connected in series. The power conversion apparatus comprises a drive device which drives the switching element. The drive device includes a gate amplifier, a detection circuit, and a current amplifier. The gate amplifier controls a resistive state of the switching element in accordance with a gate signal. The detection circuit detects an inter-terminal voltage of the switching element. The current amplifier supplies a first current to a gate terminal of the switching element on the basis of the inter-terminal voltage. The current amplifier supplies a current to the gate terminal in such a manner that the current flowing to the gate terminal of the switching element becomes closer to zero when the inter-terminal voltage achieves a preset voltage.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] Embodiments of the present invention relate to a power conversion device, a drive device, and a drive method.

Background Art

[0002] In recent years, with the expansion of the application fields of power conversion devices, further increases in the voltage and capacity of power conversion devices have been demanded. However, there are practical limitations to the breakdown voltages of switching elements such as insulated gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field effect transistors (MOSFETs). Therefore, in order to further increase the voltage, multiple switching elements are connected in series to achieve a higher voltage.

[0003] Such IGBTs and MOSFETs are non-latching type switching elements whose on / off states are not self-sustaining, and they have higher gate control characteristics compared to latching type switching elements such as thyristors. For example, when a gate voltage is applied to the gate terminal of a switching element while a terminal voltage is applied between the collector and emitter terminals of the switching element, the switching element can be turned on, and the switching element can be turned off simply by removing the gate voltage applied to the gate terminal.

[0004] Furthermore, it is known that IGBTs and MOSFETs allow for control of characteristics such as current and voltage output from power switching elements by controlling the gate voltage during the switching transient when the switching element is turned on and turned off. One such control method is the so-called active gate drive technology, which controls the switching element by feeding back the output voltage and output current of the power switching element during the switching transient to the gate. This active gate drive technology is also used in converters with multiple switching elements in series when a short circuit occurs. In this case, in order to balance the collector-emitter terminal voltage (hereinafter referred to as the collector voltage) applied to the switching element even during a short circuit, the active gate drive technology supplies current to the gate terminal and controls the saturation current value of the switching element. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Patent No. 3932841 [Patent Document 2] Patent No. 4901083 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] However, because the collector voltage is not directly controlled, if the amount of current supplied to the gate terminal is small, there is a risk that the surge voltage when the current is interrupted will exceed the voltage rating of the element and destroy it. On the other hand, if the amount of current is large, the active gate may operate even during normal switching that is not a short circuit, potentially increasing losses significantly.

[0007] Therefore, the objective of this embodiment is to provide a power conversion device, a drive device, and a drive method that can suppress the destruction of a switching element even when a surge voltage is included in the terminal voltage of the switching element. [Means for solving the problem]

[0008] The power converter according to this embodiment is a power converter in which a plurality of arms composed of switching elements are connected in series, and includes a drive device for driving the switching elements. The drive device includes a gate amplifier, a detection circuit, and a current amplifier. The gate amplifier controls the resistance state of the switching elements by applying a DC voltage to the gate terminals of the switching elements in accordance with the gate signal. The detection circuit detects the terminal voltage of the switching elements. The current amplifier supplies a first current to the gate terminals of the switching elements based on the terminal voltage. The current amplifier supplies current to the gate terminals so that the current flowing through the gate terminals of the switching elements approaches zero when the terminal voltage reaches a preset voltage. [Brief explanation of the drawing]

[0009] [Figure 1] This figure shows the main parts of the power converter according to this embodiment. [Figure 2] A block diagram showing an example configuration of a gate drive device according to the first embodiment. [Figure 3] A diagram showing an example of the gain characteristics of a current amplifier. [Figure 4] A diagram showing an example of the clamping operation of a gate drive device. [Figure 5] A block diagram showing the configuration of the gate drive device according to the second embodiment. [Figure 6] A block diagram showing the configuration of the gate drive device according to the second embodiment. [Figure 7] A time chart showing an example of a short circuit being detected during turn-on. effect

[0010] This makes it possible to suppress the destruction of switching elements even when surge voltages are included in the terminal voltage. [Modes for carrying out the invention]

[0011] Hereinafter, a power conversion device, a drive device, and a drive method according to embodiments of the present invention will be described in detail with reference to the drawings. Note that the embodiments shown below are merely examples of embodiments of the present invention, and the present invention is not limited to these embodiments. Furthermore, in the drawings referenced in these embodiments, the same or similar reference numerals are used for identical parts or parts having similar functions, and repeated descriptions may be omitted. Also, the dimensional ratios in the drawings may differ from the actual ratios for illustrative purposes, and some components may be omitted from the drawings.

[0012] (First Embodiment) Figure 1 shows the main components of the power converter according to this embodiment. As shown in Figure 1, the power converter 1 comprises a control device 2, a positive first arm A10, a negative second arm A20, a DC capacitor C10, and a plurality of gate drive devices 5. In the power converter 1, for example, two first arms A10 and two second arms A20 connected in series are connected in parallel to each other, and each is connected to a DC capacitor C10, which is a DC voltage source. In Figure 1, the first arm A10 and second arm A20 whose connection points are connected to the U terminal of the AC system are shown. Note that since the U phase, V phase, and W phase have the same configuration, the first arm A10 and second arm A20 connected to the V terminal and W terminal, respectively, are not shown.

[0013] Multiple switching elements S22 are connected in series to the first arm A10, and multiple switching elements S22 are connected in series to the second arm A20. In this embodiment, the number of switching elements S22 in series is 4, but is not limited to this. A diode D24 is connected in antiparallel to each switching element S22. The switching elements S22 are, for example, insulated gate bipolar transistors (IGBTs). The diode D24 is, for example, an antiparallel diode.

[0014] An insulated-gate bipolar transistor is a type of power transistor that operates in bipolar mode, with, for example, a MOS input and a bipolar output. While this example uses an IGBT, it is not limited to this. For example, the switching element S22 may be composed of a field-effect transistor (FET) or an injection-enhanced insulated-gate transistor (IEGT). Furthermore, an insulated-gate field-effect transistor (MOSFET) can be used as the field-effect transistor (FET).

[0015] The control device 2 controls the gate drive device 5. This control device 2 generates a pulse signal controlled by, for example, PWM (Pulse Width Modulation) control as a gate signal and outputs it to the gate drive device 5. The drive control of the power converter 1 by the control device 2 can be performed using general control methods such as PWM control, and details are omitted. In addition, the power converter 1 can also be, for example, an NPC (Neutral-Point Clamp) inverter or an NPC (Neutral-Point Clamp) converter.

[0016] Furthermore, the control device 2 obtains the voltage value of the DC capacitor C10 and the current values ​​of the U, V, and W terminals from a voltage measuring device (not shown) and a current measuring device. The control device 2 can output a cutoff signal to each switching element S22 and turn it off if the voltage value of the DC capacitor C10 exceeds a preset overvoltage, or if the current at the AC output terminals U, V, and W terminals exceeds a preset overcurrent. This makes it possible to protect each switching element S22 from overvoltage or overcurrent.

[0017] Here, the details of the gate drive device 5 will be described. FIG. 2 is a block diagram showing a configuration example of the gate drive device 5 according to the first embodiment. As shown in FIG. 2, the gate drive device 5 is a device that can clamp the collector voltage of the switching element S22 by driving and controlling the gate current of the switching element S22. More specifically, this gate drive device 5 includes a gate amplifier 10, a positive-side gate drive voltage source 12, a negative-side gate drive voltage source 14, a gate resistor 16, a detection circuit (Vce detection circuit) 18, and a current amplifier 20. Note that the gate drive device 5 according to this embodiment corresponds to the drive device.

[0018] The gate amplifier 10 has its input terminal connected to terminal t10 and its output terminal connected to the gate resistor 16. The positive-side gate drive voltage source 12 and the negative-side gate drive voltage source 14 are connected to the gate amplifier 10. The positive-side gate drive voltage source 12 has its negative potential side connected to node n2 and its positive potential side connected to the gate amplifier 10. The negative-side gate drive voltage source 14 has its positive potential side connected to node n2 and its negative potential side connected to the gate amplifier 10. With such a configuration, the gate amplifier 10 outputs, as a pulse signal, the positive voltage of the positive-side gate drive voltage source 12 or the negative voltage of the negative-side gate drive voltage source 14 to the gate resistor 16 according to the gate signal transmitted from the control device 2 (see FIG. 1) via terminal t10. The gate amplifier 10 generates, for example, a pulse signal controlled by PWM control of the control device 2.

[0019] The gate resistor 16 is connected to terminal t14 via node n6. The gate terminal G of the switching element S22 is connected to terminal t14.

[0020] This gate amplifier 10 controls the voltage application state to the gate terminal G of the switching element S22 via the gate resistor 16 according to the gate signal of the control device 2. Thereby, the gate amplifier 10 can control the on / off of the switching element S22. For example, when the gate amplifier 10 outputs a high-level signal (during turn-on), the gate capacitance and the Miller capacitance of the switching element S22 are charged and it turns on.

[0021] On the other hand, when the gate amplifier 10 outputs a low-level signal (during turn-off), the gate capacitance and the mirror capacitance are discharged and turned off. Thus, the switching element S22 can switch between the on state, the transition state, and the off state according to the voltage of the gate terminal G, that is, the amount of charge existing in the gate capacitance and the mirror capacitance of the gate terminal G. In other words, the switching element S22 with an insulated gate terminal G such as an IGBT or an IEGT can switch between the on state, the transition state, and the off state according to the voltage of the gate terminal G, that is, the amount of charge existing in the gate terminal G. In this embodiment, the state of the switching element S22 including the on state, the transition state, and the off state may be referred to as a resistance state. That is, when the resistance state changes, the resistance value between the collector terminal C and the emitter terminal E of the switching element S22 changes. Thus, this gate amplifier 10 controls the resistance state of the switching element S22 according to the gate signal.

[0022] In the switching element S22, increasing the current flowing in and out of the gate terminal G can sharply change the voltage of the gate terminal and shorten the transition state. In this case, since the collector current Ic flowing through the collector terminal C of the switching element S22 changes sharply, a surge voltage is generated by the parasitic inductance in the power conversion device 1. This surge voltage is included in the collector voltage Vce.

[0023] When switching between the on state, the transition state, and the off state (resistance state), assuming that the rate of change of the collector current Ic flowing through the collector terminal C of the switching element S22 is dIc / dt, the parasitic inductance is Ls, and the voltage applied by the DC power supply between the collector terminal C and the emitter terminal E of the switching element S22 is the DC voltage Vdc, the collector voltage Vce including the surge voltage is expressed by Equation (1). In this embodiment, the voltage between the collector terminal C and the emitter terminal E of the switching element S22 is referred to as the collector voltage Vce.

Equation

[0024] One end of the detection circuit 18 is connected to terminal t16 via node n4. The emitter terminal E of the switching element S22 is connected to terminal t16. The other end of the detection circuit 18 is connected to terminal t12. The collector terminal C of the switching element S22 is connected to terminal t12. Through this connection, the detection circuit 18 detects the collector voltage Vce between the collector terminal C and the emitter terminal E of the switching element S22. Note that a general voltage detection circuit can be used for the detection circuit 18. Furthermore, the detection circuit 18 in this embodiment detects voltage, but is not limited to this. For example, the detection circuit 18 may detect the collector current Ic flowing through the collector C of the switching element S22. Alternatively, the detection circuit 18 may detect both the collector current Ic flowing through the collector C of the switching element S22 and the collector voltage Vce.

[0025] The current amplifier 20 is connected to node n6 and supplied with the voltage of the amplifier power supply VDD. The current amplifier 20 supplies a current amplifier current I14, which corresponds to at least the collector voltage Vce among the collector voltage Vce and collector current Ic detected by the detection circuit 18, to the gate terminal G of the switching element S22 via node n6 and terminal t14. The current amplifier current I14 is considered positive in the direction of the arrow. Figure 1 also further illustrates the gate amplifier current I12 and the gate terminal current I16. The gate amplifier current I12 and the gate terminal current I16 are considered positive in the direction of the arrow. In this embodiment, the current amplifier current I14 corresponds to the first current, the gate terminal current I16 corresponds to the second current, and the gate amplifier current I12 corresponds to the third current.

[0026] Thus, the current amplifier 20 according to this embodiment can control the gate terminal current I16 independently of the control by the gate amplifier 10 in response to the gate signal. The current amplifier 20 is directly connected to the gate terminal G. For this reason, a small resistor may be inserted between the current amplifier 20 and the gate terminal G for protection in the event of a fault. In this case, the resistor will be configured to have a resistance value smaller than the gate resistor 16.

[0027] [Example of gain characteristics of a current amplifier] Figure 3 shows an example of the gain characteristics of the current amplifier 20. The vertical axis represents the current, and the horizontal axis represents the collector voltage Vce. In this embodiment, the relationship between the collector voltage Vce and the current amplifier current I14 is referred to as the gain characteristics of the current amplifier 20.

[0028] Here, we will explain the gain characteristics of the current amplifier 20. The collector voltage Vce must be kept below the breakdown voltage of the switching element S22, both during a short circuit and during switching between the on state, transient state, and off state (resistive state). For example, during turn-off, the collector voltage Vce rises due to the surge voltage. In order to suppress the collector voltage Vce to below a predetermined clamp voltage Vclp, it is necessary to lower the impedance of the switching element S22. In other words, the current amplifier 20 needs to supply (inject) the current amplifier current I14 to the gate terminal G and raise the voltage at the gate terminal G.

[0029] In this case, if the current amplifier current I14 is injected into the gate terminal G more than necessary, the impedance will drop too low, causing the collector voltage Vce to drop more than necessary, and potentially leading to a significant increase in losses. In the worst case, it may become impossible to turn off the element. Also, if the current amplifier current I14 is too small, the rise in the collector voltage Vce cannot be stopped, leading to the destruction of the switching element S22. Therefore, in this embodiment, the current amplifier current I14 output by the current amplifier 20 is set to a gain such that the gate terminal current I16 becomes approximately zero when the collector voltage Vce reaches a preset clamp voltage Vclp. In other words, the current amplifier 20 supplies the current amplifier current I14 to the gate terminal G of the switching element S22 such that the gate terminal current I16 flowing through the gate terminal G approaches zero when the collector voltage Vce reaches a preset clamp voltage Vclp.

[0030] Here, let me add some information about making the gate terminal current I16 approximately zero (approaching zero). The following relationships hold between the collector current ic and the gate voltage vge, and between the gate terminal current ig and the gate voltage vge.

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[0031] For example, the current amplifier 20 can reduce the current flowing through the gate terminal G to near zero by supplying a gate amplifier current I12 to the gate terminal G that is inversely proportional to the gate resistor 16. More specifically, the current amplifier 20 can reduce the current flowing through the gate terminal G to near zero by supplying a gate amplifier current I12 to the gate terminal G that is proportional to the sum of the voltage at the gate terminal G and the voltage of the negative gate drive voltage source 14. Alternatively, the current amplifier 20 can reduce the current flowing through the gate terminal G to near zero by supplying a gate amplifier current I12 that is proportional to the change in the voltage at the gate terminal G.

[0032] To clamp the collector voltage Vce to a constant clamp voltage Vclp, it is necessary to control dIc / dt, as shown in equation (1), to a constant value. When controlling dIc / dt to a constant value, the gate terminal current I16 flowing through the gate terminal G is made approximately zero when the preset clamp voltage Vclp is reached, that is, the voltage at the gate terminal G is fixed. This allows dIc / dt to be kept constant. Therefore, if the current amplifier 20 has a gain such that the current flowing through the gate terminal G is approximately zero when the output of the detection circuit 18 reaches the preset clamp voltage Vclp, the collector voltage Vce can be controlled to the desired clamp voltage Vclp.

[0033] More specifically, the current amplifier 20 has the gain characteristics shown in Figure 3. As shown in Figure 3, the current amplifier current I14 begins to increase when the collector voltage Vce exceeds the operating start voltage Vs. For example, the current amplifier current I14 has a gain characteristic that increases in proportion to the difference between the operating start voltage Vs and the clamp voltage Vclp.

[0034] The voltage at the gate terminal G of the switching element S22 during its transient state is near the threshold voltage Vth of the switching element S22. Therefore, the gate amplifier current I12 flowing into the gate amplifier 10 during the turn-off of the switching element S22 is given by equation (6). Here, the voltage Vn is the drive voltage of the negative gate drive voltage source 14, and the resistance value Rg is the resistance value of the gate resistor 16.

number

[0035] In other words, when the collector voltage Vce reaches the clamp voltage Vclp, the current amplifier current I14 of the current amplifier 20 becomes the current Iag shown in equation (7). Thus, when the collector voltage Vce and the clamp voltage Vclp are equal, the current amplifier current I14 becomes an injection current Iag with the same magnitude as the absolute value of the gate amplifier current I12 during turn-off.

number

[0036] This gain characteristic is just one example, and the gain characteristic may be constructed using a quadratic function or an exponential function. However, it is also possible to increase the slope of the gain characteristic by using a quadratic function or an exponential function, or by increasing the operating start value. However, since the stability may be compromised due to the delay of the current amplifier 20, a characteristic proportional to the difference between the clamp voltage Vclp and the operating start voltage Vs is considered desirable. Note that the clamp voltage Vclp is set to a value that is smaller than the breakdown voltage of the switching element S22 and larger than the surge voltage when the switching element S22 is shut down by the shut-off signal.

[0037] [Example of clamping operation of gate drive device 5] Figure 4 shows an example of the clamping operation of the gate drive device 5. Figure 4 shows an example of the simulation results of the clamping operation according to this embodiment, according to the gain characteristics of Figure 3.

[0038] Figure 4(a) shows the collector voltage Vce detected by the detection circuit 18. The vertical axis represents the collector voltage Vce, and the horizontal axis represents time.

[0039] Figure 4(b) shows an example of the time variation of the gate amplifier current I12, the current amplifier current I14, and the gate terminal current I16. The vertical axis represents the currents I12, I14, and I16, and the horizontal axis represents time.

[0040] As shown in Figure 4(b), when the gate amplifier 10 is in turn-off operation, the gate capacitance and Miller capacitance of the switching element S22 begin to discharge. As a result, the gate amplifier current I12 flows to the positive side, and the charge in the gate capacitance and Miller capacitance of the switching element S22 decreases. At this time, as shown in Figure 4(a), the resistance of the switching element S22 increases, limiting the collector current Ice flowing through the switching element S22, so the collector voltage Vce of the switching element S22 rises.

[0041] Then, at time Ti10, the operating start voltage Vs is exceeded. At timing Ti10, when the collector voltage Vce exceeds the operating start voltage Vs, the current amplifier 20 starts supplying the current amplifier current I14 to the gate terminal G of the switching element S22, according to the gain characteristics shown in Figure 3. That is, the current amplifier 20 controls the amount of current amplifier current I14 supplied so that the collector voltage Vce becomes the clamp voltage Vclp, depending on the collector voltage Vce. The current amplifier 20 also stops supplying the current amplifier current I14 at timing Ti12 when the collector voltage Vce falls below the operating start voltage Vs.

[0042] In this way, the current amplifier 20 controls the current amplifier current I14 so that the collector voltage Vce remains below the breakdown voltage of the switching element S22, both during short circuits and during switching. For example, during turn-off, the collector voltage Vce rises due to the surge voltage. The current amplifier 20 can control the current amplifier current I14 to lower the impedance of the switching element S22 in order to suppress the collector voltage Vce to below the clamp voltage Vclp. That is, the current amplifier 20 compensates for the gate amplifier current I12 and controls the amount of current amplifier current I14 supplied so that the gate terminal current I16 is approximately zero. In this way, the current amplifier 20 injects the current amplifier current I14 into the gate terminal G, raising the voltage at the gate terminal G. In other words, the current amplifier 20 suppresses the voltage drop at the gate terminal G caused by the gate amplifier 10 in response to the gate signal by injecting the current amplifier current I14 into the gate terminal G. At this time, since the gate terminal current I16 is approximately zero, the voltage at the gate terminal G is fixed as described above. This allows us to keep dIc / dt constant.

[0043] As explained above, the current amplifier 20 controls the amount of current amplifier current I14 supplied so that the collector voltage Vce becomes the clamp voltage Vclp, depending on the collector voltage Vce. This makes it possible to suppress surge voltages in the collector voltage Vce to below the breakdown voltage of the switching element S22. Furthermore, the amount of current amplifier current I14 supplied by the current amplifier 20 is set so that the gate terminal current I16 flowing through the gate terminal G becomes approximately zero when the collector voltage Vce reaches the clamp voltage Vclp. This makes it possible to control the time variation amount dIc / dt of the collector current IC to be kept constant, and to stably control the collector voltage Vce with the clamp voltage Vclp. In this way, even if the collector voltage Vce, which is the terminal voltage of the switching element S22, contains a surge voltage, the destruction of the switching element S22 is suppressed.

[0044] (Second Embodiment) The power converter 1 according to the second embodiment differs from the power converter 1 according to the first embodiment in that it is capable of detecting short circuits using a ladder circuit and detecting the collector voltage Vce. The differences from the power converter 1 according to the first embodiment will be explained below.

[0045] Figure 5 is a block diagram showing the configuration of the gate drive device 5a according to the second embodiment. As shown in Figure 5, the gate drive device 5a differs from the gate drive device 5 according to the first embodiment in that it has a detection circuit 18a and a short-circuit detection circuit 22.

[0046] The detection circuit 18a is, for example, a ladder circuit, and is constructed by connecting circuits in series, each consisting of a detection capacitor C1 and a detection resistor R1 connected in parallel. A current amplifier 20 is connected to the first connection point n10, and a short-circuit detection circuit 22 is connected to the second connection point n20. The detection circuit 18a can accurately measure the voltage during the transient state of switching (microseconds) by using the detection capacitor C1.

[0047] The short-circuit detection circuit 22 detects the voltage V2 between connection point n20 and node n4. This voltage V2 is divided. For example, the value of voltage V2 can be a few hundredths of the collector voltage Vce. When the voltage V2 exceeds a predetermined value, the short-circuit detection circuit 22 outputs a detection signal indicating that a short circuit has occurred to the control device 2 (see Figure 1) via terminal t18. When the control device 2 receives the detection signal, it outputs a cutoff signal. In this way, when the control device 2 receives the detection signal, it controls the corresponding switching element S22 (see Figure 1) to cut off. It is also possible to supply the voltage V2 detected by the short-circuit detection circuit 22 to the current amplifier 20.

[0048] The current amplifier 20 detects the voltage V3 between the first connection point n10 and node n4. The current amplifier 20 can perform control in the same manner as in the first embodiment according to the voltage V3. In this way, the detection circuit 18a can be omitted by providing the first connection point n10 and the second connection point n20 and connecting them to the current amplifier 20 and the short-circuit detection circuit 22, respectively.

[0049] If a failure occurs in either the first arm A10 or the second arm A20 (see Figure 1) of the power converter 1, the other healthy element will turn on, causing a short circuit in the DC capacitor C10 and a large current to flow. Therefore, the other healthy element needs to interrupt the large current caused by the short circuit. As described above, when the control device 2 receives a detection signal, it performs control to, for example, shut off the corresponding switching element S22. At this time, because it is turned on, the voltage at the gate terminal G is close to the voltage of the positive gate drive voltage source and is relatively high. Therefore, the potential of the amplifier power supply VDDa of the current amplifier 20 according to this embodiment is set to a value higher than the potential of the positive gate drive voltage source 12. This makes it possible for the current amplifier 20 to secure the necessary current amplifier gain.

[0050] (Third embodiment) The power converter 1 according to the third embodiment further includes an off-continuation circuit 24, a clamp circuit 26, and a comparison circuit 28, and differs from the power converter 1 according to the second embodiment in that the gate drive device 5b is configured in a conductive case 30. The differences from the power converter 1 according to the second embodiment will be explained below.

[0051] Figure 6 is a block diagram showing the configuration of the gate drive device 5b according to the third embodiment. As shown in Figure 6, the gate drive device 5b further comprises an off-continuation circuit 24, a clamp circuit 26, and a comparison circuit 28, and differs from the gate drive device 5a according to the second embodiment in that the gate drive device 5b is configured within a conductive case 30.

[0052] The off-continuation circuit 24 stops supplying the current amplifier current I14 from the current amplifier 20 to the gate terminal G if the gate signal of the control device 2 remains in the off state for a certain period of time or longer. In other words, if the gate signal of the current amplifier 20 remains in the off state for a certain period of time or longer, the gain of the current amplifier 20 is controlled to zero by the off-continuation circuit 24.

[0053] When an off state, such as a gate block (turning off all switching elements), persists, the DC capacitor may overcharge for some reason, causing the collector voltage to rise. If this rises above the operating start voltage Vs (see Figure 3), the current amplifier 20 will malfunction. Alternatively, current will continuously flow from the current amplifier 20 to the negative gate voltage source 14, leading to circuit damage. In response to this, the off-continuation circuit 24 according to this embodiment controls the gain of the current amplifier 20 to zero if the off state persists for a certain period of time or longer, preventing current from being injected from the current amplifier 20 to the gate terminal. This suppresses malfunctions of the current amplifier 20. Alternatively, a connection switch may be configured between the current amplifier 20 and node n6, and the current amplifier 20 may be electrically disconnected from node n6 by controlling the connection switch. Furthermore, the off-continuation circuit 24 can also control the gain of the current amplifier 20 to zero in accordance with the clamp operation signal described later, in addition to the gate signal. Alternatively, the off-continuation circuit 24 may directly receive a signal indicating the continuation of the off state, such as a gate block, and control the current amplifier 20.

[0054] The clamp circuit 26 is, for example, a diode, and is connected between the gate terminal G and the positive electrode of the positive gate drive voltage source 12. This clamp circuit 26 clamps the potential of the gate terminal G to the potential of the positive gate drive voltage source 12. As described above, if the potential of the amplifier power supply VDD of the current amplifier 20 is set to a value higher than the potential of the positive gate drive voltage source 12, the voltage at the gate terminal G will be higher than the value assumed by the gate drive voltage source, which may lead to an increase in short-circuit current. In the absence of the clamp circuit 26, this may lead to an increase in short-circuit current, and the switching element S22 may be thermally destroyed before the short-circuit current can be interrupted. In contrast, the clamp circuit 26 according to this embodiment can suppress thermal destruction of the switching element S22 by clamping the potential of the gate terminal G to the potential of the positive gate drive voltage source 12.

[0055] The comparison circuit 28 compares the detection potential of the current amplifier 20 with a third threshold th3 between the operating start voltage Vs (see Figure 3) and the clamp voltage Vclp (see Figure 3). If the detection potential of the current amplifier 20 exceeds the threshold th3, it outputs a clamp operation signal to the control device 2 (external device) via terminal t20. As described above, when the clamp operation signal is input to an off state such as a gate block, the control device 2 instructs the off-continuation circuit 24 to control the gain of the current amplifier 20 to zero so that no current is injected from the current amplifier 20 to the gate terminal. This comparison circuit 28 also suppresses malfunctions of the current amplifier 20.

[0056] The conductive case 30 is electrically connected to the emitter terminal E of the switching element S22. This increases the capacitance from the first connection point n10 and the second connection point n20 to the emitter terminal E, suppressing the effect of parasitic capacitance and enabling accurate detection of the collector voltage Vce.

[0057] On the other hand, if there is no conductive case 30 electrically connected to the emitter terminal E, then if there is parasitic capacitance other than the detection capacitor between the first connection point n10 and the second connection point n20 and the collector terminal C, a discrepancy will occur in the detected collector voltage Vce. For example, since the detection circuit 18a steps down a voltage of several kV to several V, the capacitance of the detection circuit 18a from the first connection point n10 and the second connection point n20 to the collector terminal C is on the order of picofarads (pF), which is very small compared to the capacitance from the first connection point n10 and the second connection point n20 to the emitter terminal E. In this case, since the collector terminal C is connected to the DC capacitor C10 and other switching elements by busbars, the parasitic capacitance changes depending on the positional relationship of the gate drive device 5b, making adjustment very difficult.

[0058] In contrast, as shown in Figure 6, the gate drive device 5b according to this embodiment is covered with a conductive case 30 and connected to the emitter terminal E of the switching element S22. As a result, most of the parasitic capacitance of the detection circuit occurs between it and the conductive case 30. The conductive case 30 is connected to the emitter terminal E, so the parasitic capacitance of the detection circuit 18a occurs between it and the emitter terminal E. Since the capacitance of the detection circuit 18a from the first connection point n10 and the second connection point n20 to the emitter terminal E is large, the effect of parasitic capacitance is suppressed, and accurate detection of the collector voltage Vce becomes possible.

[0059] Figure 7 is a time chart showing an example of a short circuit detected during turn-on. The vertical axis shows the gate signal, gate voltage Vg, collector voltage Vce1, and collector current Ic from top to bottom, and the horizontal axis shows time. Collector voltage Vce2 is an example of the collector voltage of a fault-free switching element S22 in the same arm, and collector voltage Vce1 is an example of the collector voltage when there is some kind of fault. In Figure 7, the dashed line represents a partial operation example of a fault-free switching element S22, and the solid line represents an operation example of a fault-free switching element S22. For example, collector voltage Vce2 is an example of the collector voltage of a fault-free switching element S22, and collector voltage Vce1 is an example of the collector voltage when there is some kind of fault.

[0060] As shown in Figure 7, a high-level signal containing ON control information is input to the gate amplifier 10 as a gate signal from the control device 2 (see Figure 2) at timing t10. As a result, the gate amplifier 10 switches the gate voltage Vg applied to the gate terminal G of each switching element S22 from the negative potential Vg2 of the negative gate drive voltage source 14 to the positive potential Vg1 of the positive gate drive voltage source 12. As a result, the gate voltage Vg starts to rise from negative potential to positive potential.

[0061] Next, at timing t12, the gate voltage Vg exceeds the threshold voltage Vthp, and the switching element S22 starts turning on. As a result, the resistance of the switching element S22 decreases, and the collector current Ic starts to rise. Normally, as the resistance decreases, the collector voltage Vice decreases, as shown in collector voltage Vce2. However, if there is some kind of short-circuit fault in the switching element S22, the collector voltage Vce1 will start to rise.

[0062] Next, at timing t14, the short-circuit detection circuit 22 detects that the collector voltage Vce1 exceeds a predetermined value and outputs a detection signal indicating that a short circuit has occurred to the control device 2 via terminal t18. Subsequently, at timing t16, based on the detection signal, the control device 2 sets the gate signal to a low level as a cutoff signal for all switching elements S22 of the same arm.

[0063] As a result, the gate amplifier 10 switches the gate voltage Vg applied to the gate terminal G of the switching element S22 from the positive potential Vg1 of the positive gate drive voltage source 12 to the negative potential Vg2 of the negative gate drive voltage source 14, causing the collector voltage Vce1 and collector current Ic to decrease. At this time, the surge voltage is included in the collector voltages Vce1 and Vce2 due to the cutoff operation. Since the switching element S22, which is short-circuited, exceeds the operating start voltage, the current amplifier 20 operates, and the collector voltage Vce1 is clamped to the clamp voltage Vclp. Then, at timing t18, the collector current Ic becomes zero, and the cutoff is completed. In this way, since the current amplifier 20 operates and the collector voltage Vce1 is clamped to the clamp voltage Vclp, even if a surge voltage is included due to the cutoff operation, the collector voltage Vce1 is clamped to the clamp voltage Vclp. [Explanation of Symbols]

[0064] 1: Power converter, 2: Control device, 5: Gate drive device, 10: Gate amplifier, 12: Positive gate drive voltage source, 14: Negative gate drive voltage source, 16: Gate resistor, 18, 18a: Detection circuit, 20: Current amplifier, 22: Short circuit detection circuit, 28: Comparator circuit, 30: Conductive case, A10: First arm, A20: Second arm, C10: DC capacitor, I12: Gate amplifier current (third current), I14: Current amplifier current (first current), I16: Gate terminal current (second current), S22: Switching element, Vce, Vce1, Vce2: Collector voltage (voltage between terminals).

Claims

1. A power conversion device in which multiple arms composed of switching elements are connected in series, The device includes a drive unit for driving the switching element, The drive device is A gate amplifier that applies a DC voltage to the gate terminal of the switching element in response to a gate signal to control the resistance state of the switching element, A detection circuit for detecting the voltage between the terminals of the switching element, A current amplifier that injects current amplifier current into the gate terminal based on the terminal voltage, It has, The current amplifier supplies the current amplifier current injected into the gate terminal so as to balance the gate amplifier current, which is the current drawn from the gate terminal by the gate amplifier when the terminal voltage reaches a preset operating start voltage, and brings the gate terminal current, which is the combined current of the current amplifier current and the gate amplifier current, closer to zero so that the terminal voltage is less than or equal to the clamp voltage which is less than the breakdown voltage of the switching element.

2. The power conversion device according to claim 1, wherein the current amplifier supplies the current amplifier current to the gate terminal which is proportional to the difference between the terminal voltage and the preset operating start voltage.

3. The power conversion device according to claim 1, wherein the current amplifier supplies a current amplifier current inversely proportional to the gate resistance to the gate terminal, thereby bringing the gate terminal current close to zero.

4. The power conversion device according to claim 1, wherein the current amplifier supplies the gate terminal a current amplifier current proportional to the sum of the gate terminal voltage and the negative gate drive voltage source to the gate terminal, thereby bringing the gate terminal current close to zero.

5. The power conversion device according to claim 1, wherein the current amplifier brings the gate terminal current close to zero by flowing a current amplifier current that is proportional to the change in gate voltage.

6. The power conversion device according to claim 1, wherein the terminal voltage is the collector-emitter voltage of the switching element.

7. The power conversion device according to claim 1, wherein the relationship between the terminal voltage and the current amplifier current is set such that when the output of the detection circuit reaches the pre-set clamp voltage, the gate terminal current approaches zero.

8. The power conversion device according to claim 1, wherein the gate amplifier outputs a positive potential of the positive gate drive voltage source and a negative potential of the negative gate voltage source in accordance with the gate signal.

9. A clamping circuit is further provided between the gate terminal of the switching element and the positive electrode of the positive gate drive voltage source to clamp the potential. The power conversion device according to claim 8, wherein the power supply for the current amplifier that supplies voltage to the current amplifier is at a potential higher than the positive potential of the positive gate drive voltage source.

10. The gate amplifier, the detection circuit, and the current amplifier are further enclosed in a conductive case. The power conversion device according to claim 1, wherein the conductive case is at the same potential as the emitter terminal of the switching element.

11. The circuit further comprises a short-circuit detection circuit for detecting a short circuit in the switching element, The power conversion device according to claim 1, wherein the detection circuit is configured by connecting circuits of a capacitor and a resistor connected in parallel in series, the current amplifier is connected to the first series connection point, and the short-circuit detection circuit is connected to the second series connection point.

12. The power conversion device according to claim 1, wherein the current amplifier stops the current amplifier current when a continuous off signal is input.

13. A control device that controls the on / off state of each of the switching elements, A DC capacitor that supplies a DC voltage to the aforementioned arm, Furthermore, The power conversion device according to claim 7, wherein the control device outputs a cutoff signal to turn off each of the switching elements when the voltage of the DC capacitor exceeds a preset overvoltage value, or when the current at the connection point of the arm corresponding to the AC output terminal exceeds a preset overcurrent value.

14. The power conversion device according to claim 13, wherein the clamp voltage is set to a value greater than the surge voltage when the switching element is shut off by the shutoff signal.

15. The power conversion device according to claim 1, further comprising a comparison circuit that generates a clamp operation signal and outputs it to an external device when the terminal voltage is greater than a third threshold between the operation start voltage and a preset clamp voltage.

16. A drive device for a power converter, in which two or more arms composed of switching elements are connected in series, A gate amplifier that applies a DC voltage to the gate terminal of the switching element in response to a gate signal to control the resistance state of the switching element, A detection circuit for detecting the voltage between the terminals of the switching element, A current amplifier that injects current amplifier current into the gate terminal based on the terminal voltage, Equipped with, The current amplifier is a drive device that supplies the current amplifier current injected into the gate terminal so as to balance the gate amplifier current, which is the current drawn out from the gate terminal by the gate amplifier when the terminal voltage reaches a preset operating start voltage, and brings the gate terminal current, which is the combined current of the current amplifier current and the gate amplifier current, closer to zero so that the terminal voltage is less than or equal to the clamp voltage which is less than the breakdown voltage of the switching element.

17. A method for driving a power conversion device in which two or more arms composed of switching elements are connected in series, A first control step involves applying a DC voltage to the gate terminal of the switching element in response to a gate signal to control the resistance state of the switching element, A detection step for detecting the voltage between the terminals of the switching element, The system includes a second control step of injecting a current amplifier current into the gate terminal of the switching element based on the terminal voltage, In the second control step, when the terminal voltage reaches a preset operating start voltage, the current amplifier current injected into the gate terminal is supplied so as to balance the gate amplifier current, which is the current drawn from the gate terminal by the gate amplifier, and the gate terminal current, which is the combined current of the current amplifier current and the gate amplifier current and flows through the gate terminal, is brought close to zero so that the terminal voltage is less than or equal to the clamp voltage which is less than the breakdown voltage of the switching element.

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