Photodetectors, optical devices, and electronic devices

Abstract

To provide a light receiving element capable of reducing at least one of power consumption and a dead time while reducing an input voltage to a readout circuit.SOLUTION: A light receiving element includes a photon response multiplication portion including a charge multiplication region capable of multiplying charge generated in response to the incidence of a photon, a first resistance portion connected at one end to one end of the photon response multiplication portion, and having a resistance value greater than a resistance value of the photon response multiplication portion, a second resistance portion connected at one end to the other end of the first resistance portion, and a readout portion connected to the other end of the first resistance portion and reading out an output from the photon response multiplication portion via the first resistance portion.SELECTED DRAWING: Figure 4B

Description

Technical Field

[0001] The present disclosure relates to a light receiving element, an optical device, and an electronic device.

Background Art

[0002] As one of optical elements configured to photoelectrically convert received light into an electrical signal and output the electrical signal, a single photon avalanche diode that utilizes avalanche multiplication (hereinafter referred to as SPAD (Single Photon Avalanche Diode)) is known. Avalanche multiplication refers to a phenomenon in which electrons and holes generated by the incidence of photons are accelerated by a high electric field and continuously generate new electrons and holes. Since a set of electrons and holes are multiplied many times and a large current flows, the SPAD that utilizes this has an advantage of being able to detect weak light.

Prior Art Documents

Non-Patent Documents

[0003]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] During the operation of the SPAD, a reverse bias voltage of, for example, several tens of volts is applied between the cathode and anode of the SPAD. Therefore, the change in the cathode potential caused by the large current generated in the SPAD may also become large. Since the change in the cathode potential is read by the readout circuit, the input voltage of the readout circuit also changes significantly. In this case, it is necessary to suppress the change to be smaller than the withstand voltage of the readout circuit. Further, in the SPAD, since a large current flows due to avalanche amplification, the power consumption tends to increase.

[0005] Resistive voltage dividers are sometimes used to reduce power consumption by lowering the input voltage to the readout circuit below its breakdown voltage (Non-Patent Literature 1). However, the time constant determined by the resistance of the resistors used for the resistive voltage divider, the cathode parasitic capacitance of the SPAD, and the input parasitic capacitance to the readout circuit can become large, potentially increasing the SPAD recharge period. This recharge period is the so-called dead time during which the SPAD cannot detect photons. In other words, while resistive voltage dividers can lower power consumption by lowering the input voltage to the readout circuit below its breakdown voltage, they can also lead to the disadvantage of increased dead time.

[0006] Therefore, this disclosure proposes a photodetector, optical device, and electronic device that can reduce power consumption and at least one of dead time while reducing the input voltage to the readout circuit. [Means for solving the problem]

[0007] According to this disclosure, a photodetector is provided, comprising: a photon response multiplier including a charge multiplication region capable of multiplying the charge generated in response to the incidence of a photon; a first resistor connected at one end to one end of the photon response multiplier, the first resistor having a resistance value greater than the resistance value of the photon response multiplier; a second resistor connected at one end to the other end of the first resistor, having a resistance value greater than the resistance value of the photon response multiplier; and a readout unit connected to the other end of the first resistor, which reads the output from the photon response multiplier via the first resistor.

[0008] Furthermore, the present disclosure provides an optical device in which a plurality of photodetectors are arranged in a matrix, each comprising: a photon response multiplier including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons; a first resistor connected at one end to one end of the photon response multiplier, having a resistance value greater than the resistance value of the photon response multiplier; a second resistor connected at one end to the other end of the first resistor, having a resistance value greater than the resistance value of the photon response multiplier; and a connection point to which the other end of the first resistor, the one end of the second resistor, and a readout unit that reads the output from the photon response multiplier are connected.

[0009] Furthermore, the present disclosure provides an electronic device comprising: an optical system; a photon response multiplier unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons transmitted through the optical system; a first resistor unit connected at one end to one end of the photon response multiplier unit, the first resistor unit having a resistance value greater than the resistance value of the photon response multiplier unit; a second resistor unit connected at one end to the other end of the first resistor unit, the first end of the second resistor unit, and a reading unit that reads the output from the photon response multiplier unit, all arranged in a matrix of photodetectors, each having a connection point to which these elements are connected. [Brief explanation of the drawing]

[0010] [Figure 1] This block diagram shows a schematic example of the configuration of an electronic device to which an optical device relating to existing technology is applied. [Figure 2] This is a block diagram showing a schematic example of an optical device related to existing technology. [Figure 3A] This is a block diagram showing an example of the schematic configuration of pixels in an optical device related to existing technology. [Figure 3B] This is a block diagram showing another example of the schematic configuration of pixels in an optical device relating to existing technology. [Figure 3C]This graph schematically shows the change in cathode potential when a single photon is incident on the photodiode of a pixel in an optical device related to existing technology. [Figure 3D] This graph schematically shows the voltage-current characteristics of the photodiodes in the image pixels of optical devices related to existing technologies. [Figure 4A] This is a block diagram showing a schematic configuration example of an optical device according to the first embodiment. [Figure 4B] This is a block diagram showing a schematic configuration example of pixels in the pixel array portion of an optical device according to the first embodiment. [Figure 5A] This figure schematically shows the change in cathode voltage when a single photon is incident on a single-photon avalanche diode included in a pixel of the pixel array portion of the optical device according to the first embodiment. [Figure 5B] This is a diagram illustrating the operation of pixels in an optical device according to the first embodiment. [Figure 5C] This figure is for explaining the operation of the pixels of the optical device according to the first embodiment, following Figure 5B. [Figure 5D] This figure is for illustrating the operation of the pixels of the optical device according to the first embodiment, following Figure 5C. [Figure 5E] This figure is for illustrating the operation of the pixels of the optical device according to the first embodiment, following Figure 5D. [Figure 6A] This figure shows an example of a pixel configuration using a conventional method. [Figure 6B] This figure shows an example of a pixel configuration using a conventional method. [Figure 7A] This is a block diagram showing a specific example 1 of the shielding resistance portion in a pixel of an optical device according to the first embodiment. [Figure 7B] This is a block diagram showing a specific example 2 of the shielding resistance portion in the pixel of an optical device according to the first embodiment. [Figure 8A] This is a block diagram showing a specific example 1 of the quench resistance portion in the pixel of an optical device according to the first embodiment. [Figure 8B]This is a block diagram showing a specific example 2 of the quench resistance portion in the pixel of an optical device according to the first embodiment. [Figure 8C] Figure 8B is a diagram illustrating the operation of a pixel using a specific example 2 of the quench resistor section. [Figure 9A] This is a block diagram showing a specific example 1 of a readout circuit in a pixel of an optical device according to the first embodiment. [Figure 9B] This figure illustrates the operation of the readout circuit in the pixel of the optical device according to the first embodiment. [Figure 9C] This is a block diagram showing a specific example 2 of a readout circuit in a pixel of an optical device according to the first embodiment. [Figure 10A] This is a block diagram showing a schematic configuration example of pixels in an optical device according to the second embodiment. [Figure 10B] This is a diagram illustrating the operation of pixels in an optical device according to the second embodiment. [Figure 10C] This is a block diagram showing a specific example 3 of the shielding resistance portion in the pixel of an optical device according to the second embodiment. [Figure 11] This is a block diagram showing a schematic example of the pixel configuration of an optical device according to the third embodiment. [Figure 12] This is a block diagram showing an example of a stacked structure of an optical device according to the fourth embodiment. [Figure 13] This is a block diagram showing a schematic configuration example of pixels in an optical device according to the fourth embodiment. [Figure 14] This is a vertical cross-sectional view showing an example of the cross-sectional structure of an optical device according to the fourth embodiment, with respect to a plane perpendicular to the light incident surface. [Figure 15] Figure 14 is a horizontal cross-sectional view showing an example of the cross-sectional structure of the AA plane. [Figure 16] This is a schematic diagram showing the pixels of an optical device in a comparative example. [Figure 17A] This is a block diagram showing a modified example 1 of the pixels of an optical device according to the fourth embodiment. [Figure 17B]This is a block diagram showing a modified example 2 of the pixels of an optical device according to the fourth embodiment. [Figure 17C] This is a block diagram showing a modified example 3 of the pixels of an optical device according to the fourth embodiment. [Figure 17D] This is a block diagram showing a modified example 4 of the pixels of an optical device according to the fourth embodiment. [Figure 17E] This is a block diagram showing a modified example 5 of the pixels of an optical device according to the fourth embodiment. [Figure 18A] This is a block diagram showing a modified example 6 of the pixels of an optical device according to the fourth embodiment. [Figure 18B] This is a block diagram showing a modified example 7 of the pixels of an optical device according to the fourth embodiment. [Figure 19A] This is a block diagram showing a modified example 8 of the pixels of the optical device according to the fourth embodiment. [Figure 19B] This is a block diagram showing a modified example 9 of the pixels of an optical device according to the fourth embodiment. [Figure 19C] This is a block diagram showing a modified example 10 of the pixels of an optical device according to the fourth embodiment. [Figure 20] This is a schematic diagram showing an imaging device as an electronic device to which an optical device according to the embodiment of this disclosure can be applied. [Figure 21] This block diagram shows an example configuration of a distance measuring device as an electronic device to which an optical device according to the embodiment of this disclosure can be applied. [Figure 22] This block diagram shows a schematic example of the pixel configuration in the pixel array section of the optical device of a distance measuring device, which is an electronic device to which this technology is applied. [Figure 23] This diagram schematically illustrates the direct Time of Flight (ToF) method of distance measurement in a distance measuring device as an electronic device to which this technology is applied. [Figure 24] This figure shows an example of a histogram based on the time of light reception, generated in a distance measuring device as an electronic device to which this technology is applied. [Figure 25] This block diagram shows an example of a schematic configuration for an internal body information acquisition system. [Figure 26] This figure shows an example of a schematic configuration of an endoscopic surgical system. [Figure 27] This block diagram shows an example of the functional configuration of a camera head and CCU. [Figure 28] This block diagram shows an example of a schematic configuration of a vehicle control system. [Figure 29] This is an explanatory diagram showing an example of the installation location of the external information detection unit and the imaging unit. [Modes for carrying out the invention]

[0011] Embodiments of this disclosure will be described in detail below with reference to the drawings. In each of the following embodiments, the same parts will be denoted by the same reference numerals to avoid redundant descriptions.

[0012] Prior to describing the embodiments of this disclosure, existing technologies related to the embodiments of this disclosure will be described to facilitate understanding of the embodiments. Figure 1 is a block diagram showing a schematic configuration example of an electronic device to which an optical device relating to existing technology is applied. As shown in Figure 1, the electronic device 1 includes, for example, an imaging lens 30, an optical device 10, a storage unit 40, and a processor 50.

[0013] The imaging lens 30 is an example of an optical system that collects incident light and forms an image of it on the light-receiving surface of the optical device 10. The light-receiving surface may be a surface on the optical device 10 in which pixels are arranged in a matrix. The optical device 10 generates image data by converting the incident light into photoelectric data. The optical device 10 also performs predetermined signal processing on the generated image data, such as noise reduction and white balance adjustment.

[0014] The memory unit 40 is composed of, for example, flash memory, DRAM (Dynamic Random Access Memory), or SRAM (Static Random Access Memory), and records image data and the like input from the optical device 10.

[0015] The processor 50 may include, for example, an application processor that uses a CPU (Central Processing Unit) to run an operating system and various application software, as well as a GPU (Graphics Processing Unit) and a baseband processor. The processor 50 performs various necessary processes on image data input from the optical device 10 and image data read from the storage unit 40, displays the data to the user, and transmits it externally via a predetermined network.

[0016] Figure 2 is a block diagram showing a schematic configuration example of the optical device 10 described above. As shown in the figure, the optical device 10 comprises a pixel array section 11, a timing control circuit 15, a drive circuit 12, and an output circuit 13.

[0017] The pixel array section 11 comprises a plurality of pixels 20 arranged in a matrix. Pixel drive lines LD (vertical direction in the drawing) are connected to each column of the plurality of pixels 20, and output signal lines LS (horizontal direction in the drawing) are connected to each row. One end of the pixel drive line LD is connected to the output terminal of the drive circuit 12 corresponding to each column, and one end of the output signal line LS is connected to the input terminal of the output circuit 13 corresponding to each row.

[0018] The drive circuit 12 includes a shift register and an address decoder, and drives each pixel 20 of the pixel array 11 either all pixels simultaneously or in column units. The drive circuit 12 selects the pixels 20 to be used to detect photon incidence in column units by applying a selection control voltage to the pixel drive line LD corresponding to the column to be read. The signals (called detection signals) output from each pixel 20 of the column selected and scanned by the drive circuit 12 are input to the output circuit 13 through each of the output signal lines LS. The output circuit 13 outputs the detection signals input from each pixel 20 as pixel signals to the storage unit 40 or the processor 50.

[0019] The timing control circuit 15 includes a timing generator that generates various timing signals, and controls the drive circuit 12 and the output circuit 13 based on the various timing signals generated by the timing generator.

[0020] Figure 3A is a block diagram showing an example of the schematic configuration of a pixel 20 in the pixel array section 11. As shown in the figure, the pixel 20 includes a photodiode 21 and a quench resistor 22. In this pixel 20, the photodiode 21 is a single-photon avalanche diode (hereinafter referred to as SPAD21). In SPAD21, even if only one photon is incident, a large current is generated by avalanche multiplication, and this current is output as an electrical signal. The operation of SPAD21 will be described later.

[0021] In the illustrated example, the anode of SPAD21 is connected to a predetermined power supply, and the cathode of SPAD21 is connected to one end of the quench resistor 22. The other end of the quench resistor 22 is grounded. This allows a reverse bias voltage VDDL to be applied between SPAD21s, as described later. In addition, a cathode parasitic capacitance CK is generated on the cathode side of SPAD21. The cathode parasitic capacitance CK corresponds to the combined capacitance of SPAD21, the capacitance between the quench resistor 22 and its surrounding insulating layer, the capacitance generated by the wiring connecting SPAD21 and the quench resistor 22, and the capacitance of elements such as the inverter included in the readout circuit 23.

[0022] Referring to Figure 3B, a readout circuit 23 is connected to the connection point between the SPAD 21 and the quench resistor 22 in pixel 20. The readout circuit 23 may include, for example, an inverter circuit, and reads the change in potential (i.e., cathode potential) at the connection point between the SPAD 21 and the quench resistor 22, as will be described later.

[0023] Furthermore, in pixel 20, a subsequent circuit 24 is connected to the output terminal of the readout circuit 23. The subsequent circuit 24 may include, for example, a digital counter circuit, which would allow pixel 20 to function as a photon counter element. In this case, image data can be generated based on an output signal corresponding to the number of photons detected in each pixel 20. In other words, the optical device 10 can function as an imaging sensor.

[0024] Furthermore, the subsequent circuit 24 may include a time-to-digital converter (TDC) circuit instead of a digital counter circuit. The TDC circuit can generate a digital signal that indicates the time difference between a predetermined reference signal having a predetermined reference frequency and a detection signal based on that reference signal. When the subsequent circuit 24 includes a TDC circuit, the optical device 10 can function as a distance measuring element using, for example, a Time of Flight (ToF) method.

[0025] Next, the operation of SPAD21 will be explained with reference to Figures 3C and 3D. Figure 3C is a schematic graph showing the change in the cathode potential VK of SPAD21 when one photon is incident on SPAD21. Figure 3D is a schematic graph showing the voltage-current characteristics of SPAD21. In Figure 3D, the horizontal axis represents the voltage applied between the anode and cathode of SPAD21. This applied voltage changes the anode potential of SPAD21 to V. An Let the cathode potential be V Ca Therefore, V An -V Ca It is represented as follows. Also, in Figure 3D, the vertical axis represents the current I flowing in the forward direction (from anode to cathode) through SPAD21. An This indicates that.

[0026] When a forward bias voltage is applied to SPAD21, the current I is as shown in Figure 3D. AnCurrent flows in the forward direction, and its value increases as the applied voltage increases. On the other hand, when a reverse bias voltage is applied to SPAD21, when the voltage is low, the rectifying action of SPAD21 causes current I An No current flows. However, when the reverse bias voltage falls below the breakdown voltage -Vbd, avalanche multiplication occurs, resulting in a large current I An The current flows in the reverse direction. Here, the region between the breakdown voltage (-Vbd) and a voltage (-Vbd-Ve) that is even lower by a voltage Ve (also called the excess voltage Ve) is called the Geiger region. In the Geiger region, the gain due to avalanche multiplication is theoretically infinite. By applying a reverse bias voltage of, for example, several tens of volts across the SPAD21, the SPAD21 can operate in the Geiger region.

[0027] Here, when a predetermined voltage corresponding to the Geiger region is applied from a predetermined power source between the anode of SPAD21 and the ground terminal of the quench resistor 22, and a photon (one photon is sufficient) is incident on SPAD21 (at t0 in Figure 3C), this photon generates an electron-hole pair, which is accelerated by the high electric field due to the reverse bias voltage, generating electron-hole pairs one after another. In other words, avalanche multiplication occurs. This causes a large current to flow in the reverse direction.

[0028] This current also flows through the quench resistor 22, causing a voltage drop across it. As a result, the applied voltage across SPAD21 decreases. When the applied voltage (absolute value) between the cathode and anode of SPAD21 falls below the breakdown voltage (absolute value |Vbd|), the avalanche amplification stops (time t1). This phenomenon, where avalanche multiplication stops, is called quenching.

[0029] Thereafter, current is supplied to SPAD21 through the quenching resistor 22, and SPAD21 is charged. This charging is called recharge. The recharge is performed over a certain period (time t1 to t2) with a time constant determined by the cathode parasitic capacitance CK (FIGS. 3A and 3B). When the recharge is completed (time t2), the voltage applied to SPAD21 returns to the voltage corresponding to the Geiger region, and SPAD21 can operate in this region again. As described above, when photons are incident on SPAD21, the cathode potential VK of SPAD21 changes in a pulsed manner as shown in FIG. 3C. Such a change is read out by the readout circuit 23, and as a result, the photons are detected. Note that since SPAD21 cannot detect photons during the recharge period, this period is called the dead time.

[0030] (First Embodiment) [Configuration of the Optical Device According to the First Embodiment] Next, a configuration example of the optical device according to the first embodiment of the present disclosure will be described. FIG. 4A is a block diagram showing a schematic configuration example of the optical device according to the first embodiment. As shown in the figure, the optical device 100 includes a pixel array unit PAR, a column circuit 310, a row scanning circuit 320, and an interface circuit 330.

[0031] The pixel array unit PAR has a plurality of pixels (light receiving elements) 200 arranged in a matrix. For the plurality of pixels 200, bit lines BL0, BL1, ···, BL S (hereinafter, referred to as bit line BL when there is no need for particular distinction) are connected for each column, and word lines WL0, WL1, ···, WL N (hereinafter, referred to as word line WL when there is no need for particular distinction) are connected for each row. One end of the bit line BL is connected to the output end corresponding to each column of the column circuit 310, and one end of the word line WL is connected to the input end corresponding to each row of the row scanning circuit 320. For the sake of convenience of explanation, the vertical direction in the figure is referred to as the column direction, and the horizontal direction is referred to as the row direction.

[0032] The row scanning circuit 320 drives each pixel 200 of the pixel array PAR either all pixels simultaneously or in column units. The row scanning circuit 320 selects the pixels 200 to be used for detecting photon incidence in column units by applying a selection control voltage to the word line WL corresponding to the column to be read. The signals (called detection signals) output from each pixel 200 of the column selected and scanned by the row scanning circuit 320 are input to the column circuit 310 through each bit line BL. The column circuit 310 generates a digital signal by digitally converting the detection signal. The generated digital signal is output externally through the interface circuit 330. The column circuit 310 and the row scanning circuit 320 are controlled by timing signals from a timing control circuit (not shown).

[0033] [Pixel configuration of the optical device according to the first embodiment] Figure 4B is a block diagram showing a schematic configuration example of a pixel 200 in the pixel array PAR of the optical device 100 according to this embodiment. As shown in the figure, the pixel 200 has a photodiode 210, a shielding resistor 211, and a quench resistor 212. In this embodiment, the photodiode 210 is a SPAD, and will be referred to as SPAD210 below. The SPAD210 generates a large current by avalanche amplification (also called avalanche amplification) of the charge generated by photoelectric conversion in response to the incidence of one photon, and outputs this current as an electrical signal. However, the photodiode 210 is not limited to a SPAD, and may be a silicon photomultiplier tube.

[0034] One end of the shielding resistor 211 is connected to the cathode of the SPAD 210, and the other end of the shielding resistor 211 is connected to one end of the quench resistor 212. In other words, in the pixel 200, a series circuit is formed in which the SPAD 210, the shielding resistor 211, and the quench resistor 212 are connected in series.

[0035] The shielding resistance portion 211 and the quenching resistance portion 212 can be formed of, for example, high-resistance polysilicon. Also, the shielding resistance portion 211 and the quenching resistance portion 212 may be formed as a metal resistance. Examples of materials for the metal resistance include so-called cermet-based materials such as TaSiO2 and NbSiO2. Here, let the resistance value of the shielding resistance portion 211 be Rsh, and the resistance value between the cathode and anode of the SPAD 210 be R ON Then, the relationship of R ON < Rsh is satisfied. That is, the shielding resistance portion 211 is formed to have a resistance value larger than the resistance value between the cathode and anode of the SPAD 210. The effects caused by such a relationship will be described later.

[0036] Also, let the resistance value of the quenching resistance portion 212 be Rq, then the relationship of Rsh < Rq is satisfied. That is, the shielding resistance portion 211 and the quenching resistance portion 212 are formed such that the resistance value Rq of the quenching resistance portion 212 is larger than the resistance value Rsh of the shielding resistance portion 211. The effects caused by such a relationship will be described later.

[0037] Also, as shown in FIG. 4B, a parasitic capacitance C1 occurs on the cathode side of the SPAD 210. This parasitic capacitance C1 corresponds to a combined capacitance such as the capacitance of the SPAD 210 and the capacitance generated by the wiring connecting the SPAD 210 and the shielding resistance portion 211. Further, a parasitic capacitance C2 occurs between the shielding resistance portion 211 and the quenching resistance portion 212. The parasitic capacitance C2 corresponds to a combined capacitance such as the capacitance generated between the shielding resistance portion 211 and the surrounding insulating layer, the capacitance generated between the quenching resistance portion 212 and the surrounding insulating layer, the capacitance generated by the wiring connecting the shielding resistance portion 211 and the quenching resistance portion 212, and the capacitance of elements such as the inverter included in the readout circuit 230 (described later). Note that, compared with the surroundings of the parasitic capacitance C1, there are many circuit elements such as the shielding resistance portion 211, the quenching resistance portion 212, and the readout circuit 230 (described later) around the parasitic capacitance C2. Therefore, the capacitance (value) of the parasitic capacitance C2 tends to be larger than the capacitance (value) of the parasitic capacitance C1.

[0038] One end of the readout circuit 230 is connected to the connection point between the shielding resistor 211 and the quench resistor 212. The readout circuit 230 can include, for example, an inverter circuit. The readout circuit 230 reads the change in potential at the connection point between the shielding resistor 211 and the quench resistor 212, as will be described later.

[0039] Furthermore, at pixel 200, a digital counter circuit 240 is connected to the output terminal of the readout circuit 230. The digital counter circuit 240 counts the number of changes in potential at the connection point between the shielding resistor 211 and the quench resistor 22, that is, the number of photons incident on the SPAD 210, as read by the readout circuit 230, and outputs an output signal corresponding to the count. When a selection signal is input to the pixel 200 from the row scanning circuit 320 (Figure 4A) through the word line WL, this output signal is output from the digital counter circuit 240 through the bit line BL to the column circuit 310. By converting the output signal into brightness, the optical device 100 can function as an image sensor.

[0040] Alternatively, a TDC circuit may be connected downstream of the readout circuit 230 instead of the digital counter circuit. This would allow for direct ToF distance measurement based on the output from the readout circuit 230 and the difference between the light emission timing and the light reception timing.

[0041] Furthermore, the optical device 100 can also function as a distance measuring unit that performs distance measurement using an indirect ToF method, in which the light receiving unit receives light in each phase in response to the light emission of a predetermined light source, and calculates distance information based on the light received signals for each phase output by the light receiving unit.

[0042] As shown in Figure 4B, the series circuit consisting of SPAD210, shielding resistor 211, and quench resistor 212 is connected to a predetermined power supply, the anode of SPAD210 is maintained at potential VDDL, and the other end of quench resistor 212 (the end opposite to the end connected to shielding resistor 211) is maintained at potential VDDH. That is, a voltage equivalent to potential VDDH - potential VDDL is applied to the series circuit consisting of SPAD210, shielding resistor 211, and quench resistor 212. Here, since potential VDDH is higher than potential VDDL, a reverse bias voltage is applied to SPAD210. When the pixel 200 is operating, this applied voltage is set to a predetermined voltage corresponding to the Geiger region described earlier.

[0043] [Pixel operation of the optical device according to the first embodiment] Next, the operation of pixel 200 will be explained with reference to Figures 5A to 5E. In Figures 5B to 5E, pixel 200 is schematically shown, similar to Figure 4B, but the digital counter circuit 240 (or TDC circuit), word line WL, bit line BL, etc., are omitted.

[0044] First, a predetermined voltage is applied to the series circuit consisting of SPAD210, shielding resistor 211, and quench resistor 212 using a predetermined power supply. That is, a voltage corresponding to the Geiger region (reverse bias) is applied to SPAD210. When a photon is incident on SPAD210 in this state (time t0 in Figure 5A), avalanche multiplication occurs, and a large current flows from the cathode to the anode of SPAD210. Here, in Figure 5B, the current I2 flowing out of parasitic capacitance C2 is schematically represented by a thin arrow, and the current I1 flowing out of parasitic capacitance C1 is schematically represented by a thick line. Thus, the large current flowing from the cathode to the anode of SPAD210 is mainly supplied by parasitic capacitance C1. This is because the resistance R between the cathode and anode of SPAD210 is located between parasitic capacitance C2 and SPAD210. ONThis is because a shielding resistor 211 with a resistance value Rsh greater than that is provided. In other words, the charge accumulated in the parasitic capacitance C1 moves easily to the SPAD210, while the charge accumulated in the parasitic capacitance C2 is hindered by the shielding resistor 211 and does not move easily to the SPAD210. Therefore, during avalanche multiplication, current is mainly supplied from the parasitic capacitance C1 to the SPAD210.

[0045] During avalanche multiplication, as shown in the period t0-t1 of Figure 5A, the large current generated by the avalanche multiplication causes the cathode potential VK1 of SPAD210 to decrease. As the cathode potential VK1 decreases, the voltage applied across SPAD210 falls below the breakdown voltage, causing quenching (time t1 in Figure 4C). At this time, the charge accumulated in the parasitic capacitance C1 is discharged, and as shown in Figure 5C, the supply of current I1 from the parasitic capacitance C1 to SPAD210 is also stopped.

[0046] Furthermore, as shown in Figure 5A, during the avalanche doubling period (t0~t1), the potential VK2 between the shielding resistor 211 and the quench resistor 212 does not drop as much as the potential VK1. This is because, as mentioned above, current does not easily flow from the parasitic capacitance C2.

[0047] As quenching occurs, charge redistribution begins between parasitic capacitances C1 and C2 (time t1 in Figure 5A). That is, as shown in Figure 5D, the charge remaining in parasitic capacitance C2 moves to parasitic capacitance C1 through the shielding resistor 211. Here, since the resistance value Rq of the quenching resistor 212 is greater than the resistance value Rsh of the shielding resistor 211, the current I3 flowing through the quenching resistor 212 contributes only slightly to the charge redistribution. Therefore, the charge redistribution mainly takes place between parasitic capacitances C2 and C1. When the voltage across parasitic capacitance C1 and the voltage across parasitic capacitance C2 become equal (when potentials VK1 and VK2 become equal), the redistribution ends (time t2).

[0048] Once the redistribution is complete, recharging begins. That is, the current I2 from the parasitic capacitance C2 stops flowing, and as shown in Figure 5E, the recharging of SPAD210 proceeds due to the current I3 flowing through the quench resistor 212. Here, since there is no charge loss in the redistribution of charge between parasitic capacitances C2 and C1, the amount of charge required for recharging is equal to C1ΔVK1 consumed by the avalanche multiplication. That is, the current I3 supplies SPAD210 with an amount of charge equal to C1ΔVK1. Once the recharging is complete (time t3), SPAD210 becomes able to detect photons again.

[0049] [Effects of the operation of pixels in the optical device according to the first embodiment] Next, the effects resulting from the operation of the pixel 200 of the optical device according to the first embodiment will be explained in comparison with the conventional example. Figure 6A shows an example of the pixel configuration according to the conventional example, and this configuration example is substantially the same as the configuration disclosed in Non-Patent Document 1. As shown in the figure, the pixel of the conventional example consists of an avalanche photodiode PD1 and a resistor R L and resistor R S The two are connected in series. Also, resistor R L and resistor R S An inverter IVT is connected to the connection point. In this configuration, resistor R S one end (resistor R) S and resistor R L The connection point (and the opposite end) is grounded, and a reverse bias voltage (e.g., several tens of volts) is applied to the avalanche photodiode PD1. When a photon is incident on the avalanche photodiode PD1 and avalanche multiplication occurs, a voltage drop occurs in the avalanche photodiode PD1, as shown by the curve CL1 in Figure 6A. On the other hand, with this voltage drop, the resistor R L and resistor R S The voltage at the connection point, i.e., the voltage V applied to the input terminal of the inverter IVT. IVT It also decreases (curve CL2 in Figure 6A).

[0050] Here, let Vd be the voltage drop across the avalanche photodiode PD1 due to avalanche multiplication, and resistor R L Let the resistance value of resistor RQ1 be R S If the resistance value is RQ2, then the voltage V IVT It can be expressed by the following formula. V IVT =Vd × {1 / (1+RQ1 / RQ2)} In other words, the voltage V applied to the input terminal of the inverter IVT is determined by the ratio RQ1 / RQ2 of the resistance values ​​RQ1 and RQ2. IVT This is reduced compared to the voltage drop Vd in the avalanche photodiode PD1. In particular, the larger this ratio RQ1 / RQ2, the lower the voltage V IVT The voltage drops become lower. Generally, the voltage applied to the avalanche photodiode PD1 can reach several tens of volts, so the voltage drop Vd during avalanche amplification may exceed the voltage rating of, for example, the inverter IVT. However, the resistor R L The resistance value RQ1 and the resistor R S By appropriately adjusting the ratio with the resistance value RQ2, the voltage V IVT This makes it possible to lower the voltage below the inverter IVT's withstand voltage, thereby protecting the inverter IVT.

[0051] However, in a real circuit, as shown in Figure 6B, a cathode parasitic capacitance C01 is generated at the cathode terminal of the avalanche photodiode PD1, and an input parasitic capacitance C02 is generated at the input terminal of the inverter IVT. Here, in order to increase the ratio RQ1 / RQ2, a resistor R L Increasing the resistance value RQ1 increases the time constant determined by the resistance value RQ1, the cathode parasitic capacitance C01, and the input parasitic capacitance C02. As a result, the recharge time increases, and the dead time becomes longer.

[0052] On the other hand, in the first embodiment of this disclosure, during the series of operations of avalanche multiplication, quenching, redistribution, and recharging shown in Figures 5B to 5D, the cathode potential VK1 of SPAD210 decreases by ΔVK1, and the potential VK2 at the other end of the shielding resistor 211 (the end opposite to the end connected to SPAD210) decreases by ΔVK2. Here, if the capacitance (value) of parasitic capacitance C1 is CC1 and the capacitance (value) of parasitic capacitance C2 is CC2, then ΔVK2 is expressed by the following formula. ΔVK2 = ΔVK1 × {1 / (1+CC2 / CC1)} In other words, the voltage ΔVK2 generated at the other end of the shielding resistor 211 during a series of operations is lower than the voltage ΔVK1 generated between the SPADs 210 by the capacitance ratio CC2 / CC1. The voltage ΔVK2 at the other end of the shielding resistor 211 is the input voltage to the readout circuit 230, and is lower than the voltage ΔVK1 generated between the SPADs 210. This makes it possible to protect the readout circuit 230. In other words, it can be said that the readout circuit 230 is protected by the ratio CC2 / CC1 of the capacitance (value) of parasitic capacitance C2 to the capacitance (value) of parasitic capacitance C1.

[0053] Furthermore, as explained with reference to Figure 5B, the shielding resistor 211 controls the resistance value R between the cathode and anode of SPAD210. ON Because it has a larger resistance value Rsh, when the SPAD210 undergoes avalanche multiplication, only a small current I2 flows from the parasitic capacitance C2, and the current I1 mainly flows from the parasitic capacitance C1. Parasitic capacity C1 capacity (value) CC1 < Parasitic capacity C2 capacity (value) CC2 Resistance value R ON <Resistance value Rsh Due to this relationship, capacitance (value) CC1 and resistance value R ONThe time constant determined by this becomes smaller than the time constant determined by the capacitance (value) CC2 and the resistance value Rsh. Because the current I1 is supplied from the parasitic capacitance C1 to SPAD210 through a circuit with a small time constant, the period during which avalanche multiplication occurs can be shortened. Therefore, it becomes possible to shorten the time (dead time in a broad sense) from when a photon is incident on SPAD210 until it becomes possible to detect photons again.

[0054] Furthermore, during avalanche amplification, current I1 flows primarily from the parasitic capacitance C1, with only a small current I2 flowing from the parasitic capacitance C2, thus reducing the total current flow. Consequently, power consumption can be reduced compared to the case where current I2 also flows from the parasitic capacitance C2.

[0055] Furthermore, as quenching occurs, charge redistribution takes place from parasitic capacitance C2 to parasitic capacitance C1, and only after this redistribution is complete does the current I3 flowing through the quench resistor 212 contribute to recharging. Therefore, the time required for recharging by current I3 is shortened, making it possible to reduce the dead time. Moreover, since charge is redistributed from parasitic capacitance C2 to parasitic capacitance C1, the current I3 required for recharging can be reduced. In other words, power consumption can be reduced.

[0056] As described above, in the pixel 200 of the optical device according to this embodiment, the input voltage to the readout circuit 230 can be reduced below the withstand voltage of the readout circuit 230 by the ratio CC2 / CC1 of the capacitance (value) of parasitic capacitance C2 to the capacitance (value) of parasitic capacitance C1. Furthermore, the resistance R between the cathode and anode of the SPAD210 is used between the cathode of the SPAD210 and the input terminal of the readout circuit 230. ONBecause a shielding resistor 211 with a resistance value Rsh greater than that of the parasitic capacitance C2 is provided, effects such as reduced dead time and reduced power consumption are achieved. Furthermore, since the resistance value Rq of the quench resistor 212 is greater than the resistance value Rsh of the shielding resistor 211, recharging by current I3 begins only after the redistribution of charge from parasitic capacitance C2 to parasitic capacitance C1 is complete. In other words, the power required for recharging can also be reduced, making it possible to further reduce power consumption.

[0057] [Specific examples of shielding resistors] Next, specific examples of the shielding resistor 211 will be described with reference to Figures 7A and 7B. In these figures, the digital counter circuit 240 (or TDC circuit), word line WL, bit line BL, etc., shown in Figure 4B are omitted.

[0058] Figure 7A is a block diagram showing a specific example 1 of a shielding resistor 211 in a pixel 200 of an optical device 100 according to the first embodiment. As shown in the figure, the shielding resistor 211 can be realized by a resistive element 211A. The resistive element 211A may be formed from, for example, high-resistance polysilicon or a metal resistor. High-resistance polysilicon or metal resistors are formed during wiring formation by known semiconductor manufacturing processes such as thin-film formation processes, photolithography techniques, and etching processes.

[0059] Furthermore, as shown in Figure 7B, in specific example 2, the shielding resistor 211 may be composed of, for example, a P-channel type metal oxide semiconductor (MOS) transistor 211B. In this case, a bias voltage generation unit 250 is provided to apply a bias voltage to the gate of the MOS transistor 211B. For example, by adjusting the voltage applied from the bias voltage generation unit 250 to the gate of the MOS transistor 211B by an instruction signal from the row scanning circuit 320 (Figure 4A), the resistance value between the source and drain of the MOS transistor 211B, i.e., the resistance value Rsh of the shielding resistor 211, can be adjusted. This adjustment adjusts the resistance value R of SPAD210. ON The R between the resistance value Rsh of the shielding resistor 211 andON The relationship of Rsh can be appropriately realized. Therefore, shortening of the dead time and reduction of power consumption can be surely realized.

[0060] In addition, although one MOS transistor 211B is illustrated in FIG. 7B, the total resistance value Rsh of the shielding resistance part 211 may be adjusted by arranging a plurality of MOS transistors 211B in series and applying a date voltage to each of them. Further, in FIGS. 7A and 7B, the pixel 200 in the first embodiment is shown, but this specific example 1 is also applicable to the pixel 200B in the third embodiment.

[0061] Also, when the avalanche multiplication of the SPAD 210 occurs, by increasing the resistance value between the source and drain of the MOS transistor 211B, the flow of the current I2 from the parasitic capacitance C2 is suppressed, and the power consumption is reduced. On the other hand, by reducing the resistance value between the source and drain of the MOS transistor 211B along with the occurrence of quenching, the redistribution of charges is promoted, and it is also possible to shorten the dead time.

[0062] [Specific Example of Quenching Resistance Part] Next, a specific example of the quenching resistance part 212 will be described. FIG. 8A is a block diagram showing a specific example 1 of the quenching resistance part in the pixel 200 of the optical device according to the first embodiment.

[0063] As shown in FIG. 8A, the quench resistance portion 212 can have a constant current source 212A. Since the constant current source 212A has a large internal resistance, the relationship Rsh < Rq between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 is likely to be satisfied. Therefore, during avalanche amplification or during the redistribution of charges between the parasitic capacitance C2 and the parasitic capacitance C1, it is possible to reduce the contribution of the current from the quench resistance portion 212 (corresponding to the current I3 in FIG. 5B, etc.), and it is also possible to reduce power consumption. Further, the constant current source 212A can also maintain the current (corresponding to the current I3) during charging at a predetermined value. For this reason, by appropriately adjusting the recharge current, it is possible to efficiently perform the recharge.

[0064] Next, a specific example 2 of the quench resistance portion 212 will be described. In the pixel 200C in the specific example 2, as shown in FIG. 8B, an active recharge circuit 212B is provided instead of the quench resistance portion 212 in the pixel 200 of the first embodiment. However, the active recharge circuit 212B is also applicable to the pixels 200A and 200B.

[0065] The active recharge circuit 212B includes a switch 212S and a control unit 212C that controls ON / OFF of the switch 212S. The switch 212S electrically connects and disconnects a predetermined power supply (VDDH) and the shielding resistance portion 211 under the control of the control unit 212C. The control unit 212C is connected to the output terminal of the readout circuit 230 at one end. Thereby, the control unit 212C detects the output voltage of the readout circuit 230. Specifically, when the control unit 212C detects the fall of the pulsed output voltage from the readout circuit 230, after a predetermined delay time, the control unit 212C outputs an ON signal to turn on the switch 212S to the switch 212S. Further, after outputting the ON signal, when a predetermined period has elapsed, the control unit 212C outputs an OFF signal to turn off the switch 212S to the switch 212S.

[0066] The active recharge circuit 212B configured as described above operates as follows. As shown in Figure 8C, at time t0, when avalanche amplification occurs due to the incidence of photons, the cathode potential VK1 decreases. When quenching occurs and the redistribution of charge from parasitic capacitance C2 to parasitic capacitance C1 begins, the cathode potential VK1 rises again. That is, the cathode potential VK1 changes in a negative pulse shape. In contrast, the potential VK2 at the connection point between the shielding resistor 211 and the active recharge circuit 212B decreases throughout the avalanche amplification period (time t0~t1) and the redistribution period (time t1~t2). Such potential changes are detected by the readout circuit 230. Here, when the potential VK2 falls below a predetermined first threshold potential, the readout circuit 230 outputs an output voltage, and when the potential VK2 falls below a predetermined second threshold potential Vth, the readout circuit 230 stops outputting the output voltage. In other words, the readout circuit 230 outputs a pulsed output voltage during the period when the potential VK2 changes from a first threshold potential to a second threshold potential Vth. When the control unit 212C detects the falling edge of the output voltage of the readout circuit 230 (time t), D ), predetermined delay time (period t D After time t3 has elapsed, an ON signal is output to switch 212S. As a result, switch 212S turns ON (time t3), and current is supplied from the predetermined power supply to SPAD210 through the shielding resistor 211.

[0067] In the active recharge circuit 212B, as described above, switch 212S remains OFF until the potential VK2 falls below the second threshold potential Vth (until the pulsed output signal from the readout circuit 230 falls). Therefore, during the period from when a photon is incident until the pulsed output signal from the readout circuit 230 falls, the supply of current from the power supply to the shielding resistor 211 (corresponding to current I3 in Figure 5B, etc.) is stopped. Consequently, current flows from the parasitic capacitance C1 during avalanche amplification, and current flows from the parasitic capacitance C2 to the parasitic capacitance C1 during charge redistribution. Since switch 212S is OFF, no current flows through the shielding resistor 211, thus reliably reducing power consumption.

[0068] Furthermore, when the falling edge of the pulse-shaped output signal from the readout circuit 230 is detected and a predetermined delay time has elapsed, the switch 212S turns ON (time t3). This supplies current from the power supply to the shielding resistor 211, accelerating recharging. Therefore, it is possible to shorten the dead time. Here, if the timing of when the switch 212S turns ON is aligned with the time when the redistribution of charge from parasitic capacitance C2 to parasitic capacitance C1 is completed, the reduction of the dead time can be achieved more appropriately. Alternatively, a constant current source may be provided instead of the power supply. In this case, the current value of the current that flows after the switch 212S turns ON can be adjusted as appropriate, and thus it is possible to complete recharging in a short time. At time t3, when switch 212S is turned ON and current is supplied from the power supply to the shielding resistor 211, the potential VK2 rapidly returns to the potential before photon incidence, while, as shown in Figure 8C, the cathode potential VK1 of SPAD210 returns to the potential before photon incidence, lagging behind potential VK2. This is because, with respect to potential VK1, the time constant increases by the resistance value of the shielding resistor 211.

[0069] [Specific examples of read circuits] Next, a specific example of the readout circuit 230 will be described. Figure 9A is a block diagram showing a specific example 1 of the readout circuit in the pixel 200 of the optical device according to the first embodiment.

[0070] As shown in Figure 9A, the readout circuit 230 may have an inverter 230A. The input terminal of the inverter 230A is connected to the connection point between the shielding resistor 211 and the quench resistor 212. Power is supplied to the inverter 230A by predetermined wiring.

[0071] As shown in Figure 9B, the inverter 230A operates such that when the potential VK2 at the connection point between the shielding resistor 211 and the quench resistor 212 falls below a predetermined threshold Vth, the output voltage Vout becomes HIGH, and when the potential VK2 exceeds the predetermined threshold Vth, the output voltage Vout becomes LOW. This allows the change in potential VK2 to be output as a square wave pulse, even if the change changes in a V-shape. By using the inverter 230A as the readout circuit 230, it becomes possible to read the change in potential VK2 at the connection point between the shielding resistor 211 and the quench resistor 212.

[0072] Furthermore, in the second specific example of the readout circuit, as shown in Figure 9C, the readout circuit 230 includes a P-channel type MOS transistor 230B and a current source 230C. With this configuration, the MOS transistor 230B turns ON during periods when the magnitude of the potential VK2 is less than or equal to a predetermined voltage, and a pulse-shaped predetermined output voltage Vout corresponding to that period is output. Therefore, similar to the inverter 230A in Figure 9A, it becomes possible to read out the change in potential VK2.

[0073] (Second embodiment) Next, an optical device according to a second embodiment of this disclosure will be described with reference to Figures 10A and 7B. Figure 10A is a block diagram showing a schematic configuration example of a pixel 200A of the optical device according to the second embodiment. Although the digital counter circuit 240 (or TDC circuit), word line WL, bit line BL, etc., are omitted in Figure 10A, the pixel 200A is the same as the pixel 200 of the optical device 10 according to the first embodiment in terms of configurations other than those shown. Furthermore, the optical device according to this embodiment can have the same configuration as the optical device 100 according to the first embodiment, and can replace the optical device 10 in the electronic device 1 (Figure 1) in the same way as the optical device 100.

[0074] Referring to FIG. 10A, one end of the shielding resistor 211 is connected to the anode of the SPAD 210A, and one end of the quenching resistor 212 is connected to the other end of the shielding resistor 211. That is, in the pixel 200A in the present embodiment, unlike the pixel 200 in the first embodiment where the shielding resistor 211 and the quenching resistor 212 are connected in series on the cathode side of the SPAD 210, the shielding resistor 211 and the quenching resistor 212 are connected in series on the anode side of the SPAD 210A. On the other hand, the resistance value R ON of the SPAD 210A and the resistance value Rsh of the shielding resistor 211 satisfy the relationship of R ON < Rsh, and the pixel 200A is the same as the pixel 200 in that the resistance value Rsh of the shielding resistor 211 and the resistance value Rq of the quenching resistor 212 satisfy the relationship of Rsh < Rq.

[0075] As shown in the figure, a parasitic capacitance C1 occurs between the anode of the SPAD 210A and the shielding resistor 211. This parasitic capacitance C1 corresponds to a combined capacitance such as the capacitance of the SPAD 210A and the capacitance generated by the wiring connecting the SPAD 210A and the shielding resistor 211. Further, a parasitic capacitance C2 occurs between the shielding resistor 211 and the quenching resistor 212. The parasitic capacitance C2 corresponds to a combined capacitance such as the capacitance generated by the shielding resistor 211, the capacitance generated by the quenching resistor 212, the capacitance generated by the wiring connecting the shielding resistor 211 and the quenching resistor 212, and the capacitance of elements such as the inverter included in the readout circuit 230. Also, the input terminal of the readout circuit 230 is connected to the connection point between the shielding resistor 211 and the quenching resistor 212.

[0076] The cathode of the SPAD 210A is connected to the high potential terminal of a predetermined power supply, and the other end of the quenching resistor 212 (the end opposite to the connection point between the quenching resistor 212 and the shielding resistor 211) is connected to the low potential terminal of the predetermined power supply. During operation, a predetermined reverse bias voltage (potential VDDH - potential VDDL) corresponding to the Geiger region is applied between the SPAD 210A by the predetermined power supply.

[0077] Next, the operation of SPAD210A in this embodiment will be described. Figure 10B is a schematic graph showing the change in the anode potential VA1 of SPAD210A and the potential VA2 at the connection point between the shielding resistor 211 and the quench resistor 212 (the input terminal of the readout circuit 230) when one photon is incident on SPAD210A of pixel 200A.

[0078] When a predetermined voltage corresponding to the Geiger region is applied to the SPAD210A from a predetermined power supply, and a single photon is incident on the SPAD210A (time t0), avalanche multiplication occurs in the SPAD210A, and a large current flows from the cathode to the anode. As a result, as shown in Figure 10B, the anode potential VA1 of the SPAD210A rises (relative to the potential VDDL) during the period t0 to t1.

[0079] At this time, the resistance value Rsh of the shielding resistor 211 is equal to the resistance value R of SPAD210A. ON Because it is larger than the parasitic capacitance C1, current I1 flows through the SPAD210A primarily from the parasitic capacitance C1. Since only a small current I2 flows from the parasitic capacitance C2, the current flowing through the SPAD210A during avalanche amplification can be reduced. As a result, power consumption can be reduced.

[0080] Furthermore, the capacitance (value) CC1 of parasitic capacitance C1 is smaller than the capacitance (value) CC2 of parasitic capacitance C2, and the resistance between the cathode and anode of SPAD210 is R ON However, since it is smaller than the resistance value Rsh of the shielding resistor 211, capacitance (value) CC1 and resistance value R ON The time constant determined by this is smaller than the time constant determined by the capacitance (value) CC2 and the resistance Rsh. Because the current I1 from the parasitic capacitance C1 is supplied to SPAD210 through a circuit with a small time constant, the period during which avalanche multiplication occurs can be shortened. Therefore, it is possible to shorten the time (dead time in a broad sense) from when a photon is incident on SPAD210 until it becomes possible to detect photons again.

[0081] Furthermore, as the anode potential VA1 of SPAD210A rises during avalanche amplification, the potential VA2 at the connection point between the shielding resistor 211 and the quench resistor 212 also rises. Here, if we denote the rise in potential VA1 as ΔVA1, the rise in potential VA2 as ΔVA2, the capacitance (value) of parasitic capacitance C1 as CC1, and the capacitance (value) of parasitic capacitance C2 as CC2, ΔVA2 = ΔVA1 × {1 / (1 + CC2 / CC1)} It is expressed as follows. In other words, the voltage (ΔVA2) applied to the input terminal of the readout circuit 230 is lower than ΔVA1. Therefore, the input voltage (ΔVA2) can be kept lower than the withstand voltage of the readout circuit 230, thereby protecting the readout circuit 230.

[0082] As the anode potential VA1 rises, quenching occurs when the voltage (absolute value) applied to SPAD210A becomes smaller than the breakdown voltage (absolute value) (time t1). Along with quenching, charge redistribution begins between parasitic capacitances C2 and C1 (time t1). That is, the charge remaining in parasitic capacitance C2 moves to parasitic capacitance C1 through the shielding resistor 211. Here, since the resistance value Rq of the quench resistor 212 is greater than the resistance value Rsh of the shielding resistor 211, the current I3 flowing through the quench resistor 212 contributes only slightly to the charge redistribution. Therefore, charge redistribution mainly occurs between parasitic capacitances C1 and C2. When the voltage across parasitic capacitance C1 and the voltage across parasitic capacitance C2 become equal, the redistribution ends (time t2).

[0083] Once the redistribution is complete, recharging begins. That is, once the redistribution of charge is finished, no current flows from the parasitic capacitance C2, and the SPAD210 is recharged by the current I3 flowing through the quench resistor 212. Once the recharging is complete (time t3), the SPAD210 becomes able to detect photons again.

[0084] As described above, according to the pixel 200A of the optical device according to the second embodiment, even when the shielding resistance portion 211 and the quenching resistance portion 212 are arranged on the anode side of the SPAD 210A, the resistance value R between the cathode and the anode of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 satisfy the relationship of R ON < Rsh, the resistance value Rsh of the shielding resistance portion 211 and the resistance value Rq of the quenching resistance portion 212 satisfy the relationship of Rsh < Rq, and further, the capacitance (value) CC1 of the parasitic capacitance C1 and the capacitance (value) CC2 of the parasitic capacitance C2 satisfy the relationship of CC1 < CC2. Therefore, the same effect as that of the pixel 200 of the optical device according to the first embodiment is exhibited.

[0085] Further, as shown in FIG. 10C, in the pixel 200A of the optical device according to the second embodiment, the shielding resistance portion 211 can be constituted by, for example, an N-channel type MOS transistor 211C. In this case, a bias voltage generation portion 250 for applying a bias voltage to the gate of the MOS transistor 211C is provided. Even when the MOS transistor 211C is used as the shielding resistance portion 211 in the pixel 200A, the same effect as that when the P-channel type MOS transistor 211B (FIG. 7B) is used in the pixel 200 of the optical device according to the first embodiment is exhibited. Further, in this case, a plurality of MOS transistors 211C may be used.

[0086] In addition, the specific example of the quenching resistance portion described while referring to FIGS. 8A to 8C and the specific example of the readout circuit described while referring to FIGS. 9A to 9C can also be appropriately applied to the second embodiment.

[0087] (Third Embodiment) Next, referring to FIG. 11, an optical device according to the third embodiment of the present disclosure will be described. As shown in the figure, in the pixel 200B of the optical device according to the present embodiment, the SPAD 210, the shielding resistance portion 211, the quenching resistance portion 212, and the readout circuit 230 are arranged in the same manner as the pixel 200 (FIG. 4B) of the optical device according to the first embodiment. The resistance value R of the SPAD 210ON There is a relationship of R < Rsh between it and the resistance value Rsh of the shielding resistance portion 211. ON <There is a relationship of Rsh < Rq between the resistance value Rsh of the shielding resistance portion 211 and the resistance value Rq of the quenching resistance portion 212. In this regard, the pixel 200B is the same as the pixel 200. Although the digital counter circuit 240 (or TDC circuit), word line WL, bit line BL, etc. shown in FIG. 4B are omitted in FIG. 11, the pixel 200B may be configured in the same manner as the above-described pixels 200 and 200A. Further, the optical device according to the present embodiment can have the same configuration as the optical device 100 according to the first embodiment, and can be replaced with the optical device 10 in the electronic device 1 (FIG. 1) in the same manner as the optical device 100.

[0088] On the other hand, a capacitance variable element VC1 and VC2 are provided in the pixel 200B in the present embodiment. Specifically, the capacitance variable element VC1 is provided such that one end thereof is grounded and the other end is connected to the cathode of the SPAD 210. Further, the capacitance variable element VC2 is provided such that one end thereof is grounded and the other end is connected to a wiring connecting the shielding resistance portion 211 and the quenching resistance portion 212. That is, the capacitance variable element VC1 is provided instead of the parasitic capacitance C1 in the pixel 200 of the optical device according to the first embodiment, and the capacitance variable element VC2 is provided instead of the parasitic capacitance C2.

[0089] Each of the capacitance variable elements VC1 and VC2 can be formed by, for example, one MOS transistor. In this case, a bias voltage generation unit that applies a gate voltage to the gate of the MOS transistor is provided. For example, under the control of the row scanning circuit 320, the capacitance of the capacitance variable elements VC1 and VC2 can be adjusted by adjusting the gate voltage applied from the bias voltage generation unit to the gate electrode of the MOS transistor.

[0090] Further, each of the variable capacitors VC1 and VC2 may be formed by a plurality of MOS transistors. In this case, a bias voltage generation unit for applying a date voltage to the gate of each MOS transistor is provided. According to such a configuration, for example, under the control of the row scanning circuit 320, by adjusting the number of MOS transistors to which the gate voltage is applied, the capacitances of the variable capacitors VC1 and VC2 can be adjusted. Note that the variable capacitors VC1 and VC2 may be formed by complementary metal oxide semiconductor (CMOS) transistors.

[0091] In the pixel 200B of the optical device according to the present embodiment as well, similar to the pixel 200 of the optical device according to the first embodiment, the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 have a relationship of R ON < Rsh, and since there is a relationship of Rsh < Rq between the resistance value Rsh of the shielding resistance portion 211 and the resistance value Rq of the quenching resistance portion 212, if the capacitances of the variable capacitor VC1 and the variable capacitor VC2 are adjusted such that the capacitance of the latter is larger, the same effect as that exhibited by the pixel 200 can also be exhibited by the pixel 200B.

[0092] Also, in the pixel 200B of the optical device according to the present embodiment, variable capacitors VC1 and VC2 are provided, and their respective capacitances can be adjusted. As a result, the amount of charge accumulated in the variable capacitors VC1 and VC2 can also be adjusted. Therefore, it is possible to adjust the amount of current flowing from the variable capacitor VC1 to the SPAD 210 during avalanche multiplication, and the amount of charge moving from the variable capacitor VC2 to the variable capacitor VC1 during the redistribution of charges after quenching. As a result, shortening of the dead time and reduction of power consumption can be surely achieved.

[0093] Note that the specific example of the shielding resistance portion described while referring to FIGS. 7A and 7B, the specific example of the quenching resistance portion described while referring to FIGS. 8A to 8C, and the specific example of the readout circuit described while referring to FIGS. 9A to 9C can also be appropriately applied to the third embodiment.

[0094] (Fourth embodiment) Next, an optical device according to the fourth embodiment of this disclosure will be described with reference to Figures 12 to 16. Figure 12 is a schematic diagram showing an example of a laminated structure of the optical device according to the fourth embodiment. As shown in Figure 12, the optical device 100 comprises a first substrate 71 and a second substrate 72 bonded to the first substrate 71.

[0095] The first substrate 71 has, for example, a pixel array PAR (see Figure 4A) in which pixels 200 are arranged in a matrix. As shown in Figure 13, the first substrate 71 has a SPAD 210, a wiring layer 120, and a connection pad 125 formed for each pixel. As will be described later, the wiring layer 120 includes a shielding resistor 211. One end of the shielding resistor 211 is connected to the cathode of the SPAD 210. The other end of the shielding resistor 211 is connected to the connection pad 125 by predetermined wiring. The connection pad 125 is exposed on one surface of the first substrate 71 (the upper surface in the vertical direction of Figure 12) before the first substrate 71 and the second substrate 72 are joined. The connection pad 125 is made of, for example, copper (Cu). SPAD210 is provided on the lower side of the first substrate 71. That is, the lower surface of the first substrate 71 in Figure 12 is the light incident surface, and photons are incident on SPAD210 from below in the figure.

[0096] As shown in Figure 13, the second substrate 72 has a read circuit 230, a quench resistor 212, and a wiring layer 130 for each pixel. The read circuit 230 and the quench resistor 212 are connected to a connection pad 135 through the wiring layer 130. The connection pad 135 is exposed on one side (the bottom surface in Figure 12) of the second substrate 72 before the first substrate 71 and the second substrate 72 are joined. The connection pad 135 is made of, for example, Cu. The second substrate 72 may also have a digital counter circuit 240 (or TDC circuit) as shown in Figure 4B, a column circuit 310, a row scanning circuit 320, and an interface circuit 330 (Figure 4A).

[0097] Here, as shown on the right side of Figure 13, the number of wiring layers 130 formed on the second substrate 72 tends to be greater than the number of wiring layers 120 formed on the first substrate 71. This is because the second substrate 72 has a readout circuit 230, a digital counter circuit 240 (or TDC circuit), a word line WL, a bit line BL, etc., so the number of circuit elements and wiring formed on the second substrate 72 is greater than that on the first substrate 71. For this reason, the parasitic capacitance C2 that occurs between the connection pad 135 and the quench resistor 212 of the second substrate 72 is greater than the parasitic capacitance C1 on the cathode side of the SPAD 210 of the first substrate 71. In addition, parasitic capacitance is also generated by the junction 260, i.e., the connection between the connection pad 125 and the connection pad 135, but this parasitic capacitance is included in the parasitic capacitance C2 because its coupling with the parasitic capacitance C1 is prevented by the shielding resistor 211. Therefore, the ratio of the capacitance (value) CC1 of parasitic capacitance C1 to the capacitance (value) CC2 of parasitic capacitance C2, CC2 / CC1, becomes larger, making it possible to further reduce the input voltage to the readout circuit 230.

[0098] Referring to Figures 12 to 14, a joint 260 is formed by bonding (so-called Cu-Cu bonding) between the connection pad 125 of the first substrate 71 and the connection pad 135 of the second substrate 72. This electrically connects the SPAD 210 formed on the first substrate 71 and the read circuit 230 formed on the second substrate 72. In addition, the joint 260 mechanically joins the first substrate 71 and the second substrate 72. However, the first substrate 71 and the second substrate 72 may be electrically connected and mechanically joined by bonding the connecting pads 125 and 135 with metal bumps (so-called bump bonding). Alternatively, for joining the first substrate 71 and the second substrate 72, a so-called direct bonding method may be used, for example, by flattening the respective bonding surfaces and bonding them together by electron-electron force.

[0099] Furthermore, the first substrate 71 and the second substrate 72 may be electrically connected via a junction such as a TSV (Through-Silicon Via) that penetrates the semiconductor substrate. For connections using TSVs, for example, a so-called twin TSV method can be employed, in which two TSVs, one provided on the first substrate 71 and the other provided from the first substrate 71 to the second substrate 72, are connected on the outer surface of the chip, or a so-called shared TSV method can be employed, in which the two are connected by a TSV that penetrates from the first substrate 71 to the second substrate 72.

[0100] Next, the specific structure of the optical device according to the fourth embodiment will be described. Figure 14 is a vertical cross-sectional view showing an example of the cross-sectional structure of a plane perpendicular to the light incident surface of the optical device according to the fourth embodiment. Figure 15 is a horizontal cross-sectional view showing an example of the cross-sectional structure of plane AA in Figure 14. Note that Figure 14 focuses on the cross-sectional structure of SPAD210.

[0101] As shown in Figure 14, the SPAD 210 of the pixel 200 is provided, for example, on the semiconductor substrate 101 that constitutes the first substrate 71. On the semiconductor substrate 101, for example, when viewed from the light incident surface (the bottom surface in Figure 12), it is divided into a plurality of element regions by the element isolation section 110 (see, for example, Figure 15). The SPAD 210 is provided in each element region divided by the element isolation section 110. The element isolation section 110 may include the anode electrode 122 and insulating film 109 in the first trench, which will be described later.

[0102] Each SPAD210 includes a photoelectric conversion region 102, a P-type semiconductor region 104, an N-type semiconductor region 103, a P+-type semiconductor region 105, an N+-type semiconductor region 106, a cathode contact 107, and an anode contact 108.

[0103] The photoelectric conversion region 102 is, for example, an N-type well region or a region containing a low concentration of donor, which converts incident light into electron-hole pairs (hereinafter referred to as electric charge).

[0104] The P-type semiconductor region 104 is, for example, a region containing a P-type acceptor, and is located in the region surrounding the photoelectric conversion region 102, as shown in Figures 14 and 15. When a reverse bias voltage is applied to the anode contact 108, which will be described later, this P-type semiconductor region 104 forms an electric field that guides the charge generated in the photoelectric conversion region 102 to the N-type semiconductor region 103.

[0105] The N-type semiconductor region 103 is, for example, a region containing a higher concentration of donors than the photoelectric conversion region 102. As shown in Figures 14 and 15, this N-type semiconductor region 103 is located in the central part of the photoelectric conversion region 102 and takes in the charge generated in the photoelectric conversion region 102 and guides it to the P+-type semiconductor region 105. Note that the N-type semiconductor region 103 is not an essential component and may be omitted.

[0106] The P+ type semiconductor region 105 is, for example, a region containing acceptors at a higher concentration than the P-type semiconductor region 104, and a portion of it is in contact with the P-type semiconductor region 104. Similarly, the N+ type semiconductor region 106 is, for example, a region containing donors at a higher concentration than the N- type semiconductor region 103, and is in contact with the P+ type semiconductor region 105.

[0107] These P+-type semiconductor regions 105 and N+-type semiconductor regions 106 form a PN junction and function as amplification regions that accelerate the incoming charge to generate an avalanche current.

[0108] The cathode contact 107 is, for example, a region containing a higher concentration of donor than the N+-type semiconductor region 106, and is located in a region that is in contact with the N+-type semiconductor region 106.

[0109] The anode contact 108 is, for example, a region containing acceptors with a higher concentration than the P+-type semiconductor region 105. This anode contact 108 is located in a region that contacts the outer periphery of the P-type semiconductor region 104. The width of the anode contact 108 may be, for example, about 40 nm (nanometers). By making the anode contact 108 contact the entire outer periphery of the P-type semiconductor region 104 in this way, it becomes possible to form a uniform electric field in the photoelectric conversion region 102.

[0110] Furthermore, as shown in Figures 14 and 15, the anode contact 108 is located at the bottom of a trench (hereinafter referred to as the first trench) which is arranged in a matrix along the element isolation portion 110 on the surface (bottom surface in the drawings) side of the semiconductor substrate 101. Due to this structure, as will be described later, the formation position of the anode contact 108 is shifted in the height direction relative to the formation positions of the cathode contact 107 and the N+ type semiconductor region 106.

[0111] The surface (bottom surface in the drawing) of the semiconductor substrate 101 is covered with an insulating film 109. The thickness of the insulating film 109 in the first trench (thickness in the substrate width direction) depends on the voltage value of the reverse bias voltage applied between the anode and cathode, but may be, for example, about 150 nm.

[0112] The insulating film 109 is provided with openings that expose the cathode contact 107 and anode contact 108 on the surface of the semiconductor substrate 101. A cathode electrode 121 that contacts the cathode contact 107 and an anode electrode 122 that contacts the anode contact 108 are provided in each opening.

[0113] Each SPAD210 is separated by an element isolation section 110, which is located within a trench (hereinafter referred to as the second trench) that penetrates the semiconductor substrate 101 from the front to the back surface. The second trench is connected to the first trench on the front surface side of the semiconductor substrate 101. The inner diameter of the second trench is narrower than that of the first trench, and an anode contact 108 is formed in the resulting stepped portion.

[0114] Each element isolation section 110 includes an insulating film 112 covering the inner surface of the second trench and a light-shielding film 111 filling the inside of the second trench. The thickness of the insulating film 112 (thickness in the substrate width direction) depends on the voltage value of the reverse bias voltage applied between the anode and cathode, but may be, for example, about 10 nm to 20 nm. The thickness of the light-shielding film 111 (thickness in the substrate width direction) depends on the material used for the light-shielding film 111, but may be, for example, about 150 nm.

[0115] Here, by using a light-shielding conductive material for the light-shielding film 111 and the anode electrode 122, it becomes possible to form the light-shielding film 111 and the anode electrode 122 in the same process. Furthermore, by using the same conductive material as the light-shielding film 111 and the anode electrode 122 for the cathode electrode 121, it becomes possible to form the light-shielding film 111, the anode electrode 122, and the cathode electrode 121 in the same process.

[0116] Conductive materials with such light-shielding properties can include, for example, tungsten (W). However, they are not limited to tungsten (W); various conductive materials that reflect or absorb visible light or the light required for each element, such as aluminum (Al), aluminum alloys, and copper (Cu), may be used.

[0117] However, the light-shielding film 111 in the second trench is not limited to conductive materials; for example, a high refractive index material having a higher refractive index than the semiconductor substrate 101, or a low refractive index material having a lower refractive index than the semiconductor substrate 101, can also be used.

[0118] Furthermore, since light-shielding properties are not required for the material used in the cathode electrode 121, a conductive material such as copper (Cu) may be used instead of a conductive material that has light-shielding properties.

[0119] In this embodiment, a so-called FFTI (Front Full Trench Isolation) type element isolation section 110 is exemplified, in which the second trench penetrates the semiconductor substrate 101 from the surface side. However, it is not limited to this, and it is also possible to employ an FTI (Full Trench Isolation) type element isolation section in which the second trench penetrates the semiconductor substrate 101 from the back side and / or the front side, or a DTI (Deep Trench Isolation) type or RDTI (Reverse Deep Trench Isolation) type element isolation section in which the second trench is formed from the surface or back side to the middle of the semiconductor substrate 101.

[0120] If the second trench is of the FTI type, penetrating the semiconductor substrate 101 from the back side, the material for the light-shielding film 111 may be embedded in the second trench from the back side of the semiconductor substrate 101.

[0121] The upper parts of the cathode electrode 121 and the anode electrode 122 protrude from the surface (bottom surface in the drawing) of the insulating film 109. A wiring layer 120, for example, is provided on the surface (bottom surface in the drawing) of the insulating film 109.

[0122] The wiring layer 120 comprises an interlayer insulating film 123 and wiring 124 provided within the interlayer insulating film 123. The wiring 124 is in contact with a cathode electrode 121 protruding from, for example, the surface (bottom surface in the drawing) of the insulating film 109. The wiring 124 is also in contact with a connection pad 125 via a predetermined via or the like. Here, the wiring 124 may include a shielding resistor 211 (Figure 13). Specifically, part or all of the wiring 124 may be made of high-resistance polysilicon or metal resistors. In this case, the resistance value Rsh of the shielding resistor 211 of the wiring 124 is equal to the resistance value R of the SPAD 210. ON It is formed to be larger than that.

[0123] Although not shown in Figure 14, the wiring layer 120 also includes wiring that contacts the anode electrode 122. This wiring is connected to a predetermined wiring layer (not shown), which in turn is connected to a connection pad (not shown) provided on the periphery of the optical device 100 (Figure 4A). By connecting this connection pad to a low-potential terminal of a predetermined power supply, the anode electrode 122 can be maintained at a negative potential when the optical device 100 is in operation.

[0124] The wiring layer 130 of the second substrate 72 is bonded to the underside of the wiring layer 120. This bonding is achieved, as described above, for example, by a Cu-Cu bond between the connection pad 125 and the connection pad 135. The wiring layer 130 comprises an interlayer insulating film 131 and wiring 132 provided within the interlayer insulating film 131. The wiring 132 is electrically connected to a circuit element 142 formed on the semiconductor substrate 141. The circuit element 142 includes a readout circuit 230. Therefore, the cathode electrode 121 of the semiconductor substrate 101 is connected to the readout circuit 230 shown in Figure 3 via the wiring 124, the connection pad 125, the connection pad 135, and the wiring 132.

[0125] Furthermore, wiring 133 is also connected to connection pad 135. Wiring 133 may include a quench resistor 212 (Figure 13). Specifically, the quench resistor 212 is formed by part or all of wiring 133 being made of high-resistance polysilicon or metal resistors. In this case, wiring 133 is formed such that the resistance value Rq of the quench resistor 212 is greater than the resistance value Rsh of the shielding resistor 211. Wiring 133 is also connected to a predetermined wiring layer (not shown), and this wiring layer is connected to a connection pad (not shown) provided on the periphery of the optical device 100. This connection pad is connected to the high-potential terminal of the power supply. As a result, when the optical device 100 is operating, a voltage corresponding to the Geiger region (reverse bias) can be applied to the quench resistor 212, the shielding resistor 211, and the SPAD 210.

[0126] Furthermore, a pinning layer 113 and a planarization film 114 are provided on the back surface (top surface in the drawing) of the semiconductor substrate 101. In addition, a color filter 115 and an on-chip lens 116 are provided on the planarization film 114 for every 200 pixels. In this embodiment, a color filter 115 and an on-chip lens 116 are provided, but depending on the intended use and purpose of the optical device 100, a configuration without a color filter and / or on-chip lens is also possible.

[0127] The pinning layer 113 is a fixed charge film composed of, for example, a hafnium oxide (HfO2) film or an aluminum oxide (Al2O3) film containing an acceptor of a predetermined concentration. The planarization film 114 is an insulating film composed of, for example, an insulating material such as silicon oxide (SiO2) or silicon nitride (SiN), and is a film for planarizing the surface on which the upper color filter 115 or on-chip lens 116 is formed.

[0128] In the structure described above, when a voltage corresponding to the Geiger region (reverse bias) is applied between the cathode contact 107 and the anode contact 108, an electric field is formed that guides the charge generated in the photoelectric conversion region 102 to the N-type semiconductor region 103 due to the potential difference between the P-type semiconductor region 104 and the N+-type semiconductor region 106. In addition, a strong electric field is formed in the PN junction region between the P+-type semiconductor region 105 and the N+-type semiconductor region 106, accelerating the incoming charge and generating an avalanche current. This enables the SPAD210 to operate as an avalanche photodiode.

[0129] Next, the effects of the optical device according to this embodiment will be explained in comparison with the comparative example. Figure 16 is a schematic diagram showing the pixel configuration of the optical device according to the comparative example. Referring to Figure 16, in pixel 20A of the optical device according to the comparative example, SPAD21 and resistor R connected in series with each other L and resistor R SThe two are connected via a joint 260. The joint 260 is formed by connecting pads 125 and 135, similar to the joint 260 in the fourth embodiment of this disclosure. Also, resistor R L and resistor R S A reading circuit 230 is connected to the connection point. Here, SPAD21 and connection pad 135 are formed on the first substrate 710, and connection pad 125, resistor R L , and resistor R S This is formed on the second substrate 720.

[0130] At the junction 260, the two connecting pads 135 and 125 are joined, for example, by a Cu-Cu junction, and a parasitic capacitance C1b is generated by such a junction. Therefore, when a reverse bias voltage corresponding to the Geiger region is applied to the SPAD 21, and a photon is incident on the SPAD 21, causing avalanche amplification, current flows to the SPAD 21 from both parasitic capacitances C1a and C1b.

[0131] In contrast, in the pixel 200 of the optical device according to the fourth embodiment, as shown in Figure 13, a shielding resistor 211 is provided between the SPAD 210 and the connection pad 135. The shielding resistor 211 has a resistance value R of the SPAD 210. ON Because it has a resistance value Rsh that is greater than that, the current from the parasitic capacitance generated by the junction 260 (included in parasitic capacitance C2 in Figure 13) is blocked, and current flows mainly from parasitic capacitance C1 to SPAD210. In the above comparative example, compared to the case where current flows to SPAD21 from both parasitic capacitance C1a and parasitic capacitance C1b, when current flows from parasitic capacitance C1 to SPAD210, less current is required, and therefore, power consumption can be reduced. Also, the resistance value R of SPAD210 ON Therefore, since the time constant determined by the parasitic capacitance C1 is smaller than the time constant determined by the resistance value Rsh of the shielding resistor 211 and the parasitic capacitance C2, if there is no current contribution from the parasitic capacitance C2, it is possible to shorten the period during which avalanche amplification occurs.

[0132] In the optical device according to the fourth embodiment, the SPAD 210 and the readout circuit 230 are arranged vertically. Therefore, the pixel area as viewed from the light incident direction can be reduced compared to the case where the SPAD 210 and the readout circuit 230 are arranged side by side. Thus, high pixel density can be achieved.

[0133] [Modification Example of the Fourth Embodiment] Hereinafter, a modification example of the fourth embodiment will be described with reference to FIGS. 17A to 17E. These modification examples are common to the fourth embodiment in that the first substrate 71 and the second substrate 72 are joined by the joining portion 260, and are different from the fourth embodiment in that a plurality of SPADs 210 are electrically connected to one readout circuit 230.

[0134] [Modification Example 1] FIG. 17A is a block diagram showing Modification Example 1 of the pixel of the optical device according to the fourth embodiment. Referring to FIG. 17A, a plurality of connection pads 125 are provided on the first substrate 71. The upper surfaces of the plurality of connection pads 125 are flush with the upper surface of the first substrate 71. Inside the first substrate 71, a SPAD 210 and a shielding resistance portion 211 are connected in series to each of the plurality of connection pads 125. Here, similar to each of the embodiments described so far, the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 are in the relationship of R ON < Rsh.

[0135] On the other hand, a plurality of connection pads 135 are provided on the second substrate 72. The lower surfaces of the plurality of connection pads 135 are flush with the lower surface of the second substrate 72. The plurality of connection pads 135 are connected in parallel to each other, and the plurality of connection pads 135 connected in parallel are connected to the quenching resistance portion 212 and the readout circuit 230. Here, the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 are in the relationship of Rsh < Rq.

[0136] Furthermore, a plurality of connection pads 135 on the second substrate 72 are Cu-Cu bonded to corresponding connection pads 125 on the first substrate 71. As a result, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0137] According to such a configuration, a change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via the shielding resistance portion 211 and the bonding portion 260 provided for each SPAD 210. In other words, one readout circuit 230 is shared by a plurality of SPADs 210. Further, since one readout circuit 230 is formed in one pixel, in this modification, it can also be said that a plurality of SPADs 210 are provided in one pixel. By providing a plurality of SPADs 210 per pixel, photon detection for each pixel can be surely performed.

[0138] Also, similar to each of the above-described embodiments (including specific examples and modifications), the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 have a relationship of R ON < Rsh, and there is a relationship of Rsh < Rq between the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71. Therefore, also by this modification, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0139] [Modification 2] FIG. 17B is a block diagram showing a modification 2 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17B, a plurality of SPADs 210 are connected in parallel on the first substrate 71, and the plurality of SPADs 210 connected in parallel are connected to one shielding resistance portion 211. That is, a plurality of SPADs 210 are connected in parallel to the shielding resistance portion 211. Further, the shielding resistance portion 211 is connected to the connection pad 125. The upper surface of the connection pad 125 is flush with the upper surface of the first substrate 71. Here, the resistance value R of each SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 are R ONis in the relationship of <Rsh>.

[0140] On the other hand, connection pads 135 are provided on the second substrate 72. The lower surface of the connection pads 135 is flush with the lower surface of the second substrate 72. Further, a quench resistance portion 212 and a readout circuit 230 are connected to the connection pads 135. The resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 are in the relationship of Rsh < Rq.

[0141] Furthermore, the connection pads 135 are Cu-Cu bonded to the connection pads 125 of the first substrate 71. As a result, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0142] According to such a configuration, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via a set of shielding resistance portions 211 and joints 260. In that one readout circuit 230 is shared by a plurality of SPAD 210s, the modified example 2 is the same as the above-described modified example 1. Also, since one readout circuit 230 is formed in one pixel, in this modified example, it can also be said that a plurality of SPAD 210s are provided in one pixel. By providing a plurality of SPAD 210s per pixel, photon detection for each pixel can be reliably performed.

[0143] Also, similar to each of the above-described embodiments (including specific examples and modified examples), there is a relationship of R < Rsh between the resistance value R of each SPAD 210 and the resistance value Rsh of the shielding resistance portion 211, and there is a relationship of Rsh < Rq between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71. Therefore, also by this modified example, effects such as shortening of the dead time and reduction of power consumption are exhibited. ON and the resistance value Rsh of the shielding resistance portion 211, and there is a relationship of R < Rsh, and between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also by this modified example, effects such as shortening of the dead time and reduction of power consumption are exhibited. ON <Rsh, and there is a relationship of Rsh < Rq between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71. Therefore, also by this modified example, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0144] [Modified Example 3] FIG. 17C is a block diagram showing a modification example 3 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17C, on the first substrate 71, a plurality of pairs of SPADs 210 and shielding resistance portions 211 connected in series to each other are connected in parallel to the connection pad 125. The connection pad 125 is formed such that its upper surface is flush with the upper surface of the first substrate 71. Here, the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shielding resistance portion 211 connected in series with the SPAD 210 have a relationship of R ON < Rsh.

[0145] On the second substrate 72, one connection pad 135 is formed such that its lower surface is flush with the lower surface of the second substrate 72. Further, a quench resistance portion 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211 of the first substrate 71 have a relationship of Rsh < Rq.

[0146] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Thereby, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0147] In modification example 3, the change in the cathode potential of each SPAD 210 is detected by one readout circuit 230 via a set of shielding resistance portions 211 and the bonding portion 260. Modification example 3 is the same as modification example 1 described above in that one readout circuit 230 is shared by a plurality of SPADs 210. Also, since one readout circuit 230 is formed in one pixel, in this modification example, it can also be said that a plurality of SPADs 210 are provided in one pixel. By providing a plurality of SPADs 210 per pixel, photon detection for each pixel can be reliably performed.

[0148] Also, similar to each of the above-described embodiments (including specific examples and modification examples), between the resistance value R ON of each SPAD 210 and the resistance value Rsh of the shielding resistance portion 211, R ONThere is a relationship of <Rsh, and there is a relationship of Rsh < Rq between the resistance value Rq of the quench resistance part 212 and the resistance value Rsh of the shielding resistance part 211 of the first substrate 71. Therefore, also by means of this modification example, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0149] [Modification Example 4] FIG. 17D is a block diagram showing Modification Example 4 of the pixel of the optical device according to the fourth embodiment. Referring to FIG. 17D, similar to Modification Example 2 shown in FIG. 17B, a plurality of SPADs 210 are connected in parallel on the first substrate 71, and the plurality of SPADs 210 connected in parallel are connected to one shielding resistance part 211. However, in Modification Example 4, when a plurality of SPADs 210 and shielding resistance parts 211 connected in this way are taken as one group, a plurality of SPADs 210 and shielding resistance parts 211 of a plurality of groups are provided. The shielding resistance part 211 of each group is connected to the connection pad 125 at an end opposite to the connection part with the SPAD 210. The connection pad 125 is formed such that its upper surface is flush with the upper surface of the first substrate 71. Also in Modification Example 4, between the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shielding resistance part 211 to which the SPAD 210 is connected in series, there is a relationship of R ON < Rsh.

[0150] On the second substrate 72, one connection pad 135 is formed such that its lower surface is flush with the lower surface of the second substrate 72. Also, a quench resistance part 212 and a readout circuit 230 are connected to the connection pad 135. The resistance value Rq of the quench resistance part 212 and the resistance value Rsh of each shielding resistance part 211 of the first substrate 71 are in a relationship of Rsh < Rq.

[0151] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Thereby, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0152] 1] Also in Modification Example 4, the change in the cathode potential of each SPAD210 will be detected by one readout circuit 230. In that one readout circuit 230 is shared by a plurality of SPAD210s, Modification Example 4 is the same as Modification Example 1 described above. Also, since one readout circuit 230 is formed in one pixel, in this modification example too, a plurality of SPAD210s are provided in one pixel. By providing a plurality of SPAD210s per pixel, photon detection for each pixel can be surely performed.

[0153] Also, similar to each of the above-described embodiments (including specific examples and modification examples), the resistance value R of the SPAD210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD210 is connected have a relationship of R ON < Rsh, and between the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of each shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also by this modification example, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0154] [Modification Example 5] FIG. 17E is a block diagram showing Modification Example 5 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 17E, similar to Modification Example 4 shown in FIG. 17D, on the first substrate 71, a plurality of SPAD210s are connected in parallel, and the plurality of SPAD210s connected in parallel are connected to one shielding resistance portion 211. Also, when a plurality of SPAD210s and shielding resistance portions 211 connected in this way are taken as one group, it is the same as Modification Example 4 in that a plurality of groups are provided. However, in Modification Example 5, a plurality of connection pads 125 are provided, and the shielding resistance portion 211 of each group is connected to the corresponding connection pad 125. The connection pad 125 is formed such that its upper surface is flush with the upper surface of the first substrate 71. Also in Modification Example 5, the resistance value R of the SPAD210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD210 is connected have a relationship of R ON < Rsh.

[0155] The connection pad 135 is Cu-Cu bonded to the connection pad 125 of the first substrate 71. Thereby, the SPAD 210 and the readout circuit 230 are electrically connected, and the first substrate 71 and the second substrate 72 are mechanically connected.

[0156] Also in the fifth modification, the change in the cathode potential of each SPAD 210 will be detected by one readout circuit 230. In that one readout circuit 230 is shared by a plurality of SPAD 210s, the fifth modification is the same as the first modification described above. Further, since one readout circuit 230 is formed in one pixel, also in this modification, a plurality of SPAD 210s are provided in one pixel. By providing a plurality of SPAD 210s per pixel, photon detection for each pixel can be surely performed.

[0157] Also, similar to each of the above-described embodiments (including specific examples and modifications), the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD 210 is connected satisfy the relationship R ON < Rsh. And between the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of each shielding resistance portion 211 of the first substrate 71, there is a relationship of Rsh < Rq. Therefore, also by this modification, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0158] [Modification 6] Next, referring to FIGS. 18A and 18B, the sixth and seventh modifications of the fourth embodiment will be described. FIG. 18A is a block diagram showing a sixth modification of the pixel of the optical device according to the fourth embodiment. Referring to FIG. 18A, in the first substrate 71, the cathode of the SPAD 210 is connected to one end of the shielding resistance portion 211, and the other end of the shielding resistance portion 211 is connected to the connection pad 125. Also in the sixth modification, the resistance value R of the SPAD 210 ON and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD 210 is connected satisfy the relationship R ON < Rsh.

[0159] Also, in Modified Example 6, unlike the fourth embodiment (and its modified examples 1 to 5), the quenching resistance portion 212 is formed on the first substrate 71 instead of the second substrate 72. Such a quenching resistance portion 212 can be formed, for example, by providing a predetermined wiring in the region between the wiring 124 and the connection pad 125 in the first substrate 71 in FIG. 14. This wiring can have polysilicon resistance or metal resistance partially or entirely. Also, this wiring is electrically connected at one end to the wiring 124 where the shielding resistance portion 211 is provided (e.g., by a predetermined via or the like), and at the other end, it is electrically connected to a predetermined pad at the peripheral portion of the first substrate 71. By electrically connecting this pad to the high potential terminal of a predetermined power supply, it becomes possible to apply a reverse bias voltage between the quenching resistance portion 212 and the anode of the SPAD 210. Also, even when the quenching resistance portion 212 is formed on the first substrate 71, it is formed so that the relationship Rsh < Rq is satisfied between the resistance value Rq of the quenching resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211.

[0160] Even when configured as described above, during avalanche amplification, the current from the parasitic capacitance C2 is blocked by the shielding resistance portion 221 and only flows slightly. Also, since it is blocked by the quenching resistance portion 212 and the shielding resistance portion 211, the current flowing through the quenching resistance portion 212 to the SPAD 210 is also only slightly. That is, during avalanche amplification, mainly current flows from the parasitic capacitance C1 to the SPAD 210. Also, after quenching occurs, charge moves from the parasitic capacitance C2 to the parasitic capacitance C1, and after the voltage between the parasitic capacitances C1 and the voltage between the parasitic capacitances C2 become equal, current is supplied through the quenching resistance portion 212 and recharge proceeds. That is, also in Modified Example 6, a series of operations similar to those of avalanche amplification, quenching, charge redistribution, and recharge in the first to fourth embodiments (including modified examples) are performed. Therefore, also by Modified Example 6, effects such as shortening of the dead time and reduction of power consumption are exhibited.

[0161] [Modified Example 7] FIG. 18B is a block diagram showing a modification example 7 of a pixel of an optical device according to the fourth embodiment. Referring to FIG. 18B, in modification example 7 as well, similar to modification example 6, the quench resistance portion 212 is provided on the first substrate 71. However, in modification example 7, one end of the quench resistance portion 212 is connected to the connection point between the cathode of the SPAD 210 and the shielding resistance portion 211.

[0162] Such a quench resistance portion 212 can be formed, for example, by providing a predetermined wiring in the region between the wiring 124 and the cathode electrode 121 in the first substrate 71 in FIG. 14. This wiring can have polysilicon resistance or metal resistance partially or entirely. Also, this wiring is electrically connected to the cathode electrode 121 at one end and electrically connected to a predetermined pad at the peripheral edge of the first substrate 71 at the other end. By electrically connecting this pad to the high-potential terminal of a predetermined power supply and electrically connecting the anode of the SPAD 210 to the low-potential terminal, it becomes possible to apply a reverse bias voltage between the quench resistance portion 212 and the anode of the SPAD 210. Further, even when the quench resistance portion 212 is formed on the first substrate 71, the relationship Rsh < Rq is satisfied between the resistance value Rq of the quench resistance portion 212 and the resistance value Rsh of the shielding resistance portion 211.

[0163] Also, between the resistance value R ON of the SPAD 210 and the resistance value Rsh of the shielding resistance portion 211 to which the SPAD 210 is connected, there is a relationship of R ON < Rsh.

[0164] Even when configured as described above, during avalanche amplification, current flows mainly from the parasitic capacitance C1 to the SPAD210, while the current from the parasitic capacitance C2 is obstructed by the shielding resistor 221 and the quench resistor 212, and only a small amount flows. Furthermore, after quenching occurs, charge moves from the parasitic capacitance C2 to the parasitic capacitance C1, and after the voltage across the parasitic capacitance C1 and the voltage across the parasitic capacitance C2 become equal, current is supplied through the quench resistor 212, and recharging proceeds. In other words, in Modification 7, the same series of operations as in the first to fourth embodiments (including the modifications) are performed, including avalanche amplification, quenching, charge redistribution, and recharging. Therefore, Modification 7 also achieves effects such as a reduction in dead time and a reduction in power consumption.

[0165] Even with the configuration described above, during avalanche amplification, the current from parasitic capacitance C2 is obstructed by the shielding resistor 221 and flows only slightly. Furthermore, because it is obstructed by the quench resistor 212, the current flowing through the quench resistor 212 to SPAD210 is also only slight. In other words, during avalanche amplification, current flows mainly from parasitic capacitance C1 to SPAD210. After quenching occurs, charge moves from parasitic capacitance C2 to parasitic capacitance C1, and after the voltage across parasitic capacitance C1 becomes equal to the voltage across parasitic capacitance C2, current is supplied through the quench resistor 212 and recharging proceeds. In other words, in Modification 7, the same series of operations as in the first to fourth embodiments (including the modifications) are performed, including avalanche amplification, quenching, charge redistribution, and recharging. Therefore, Modification 7 also achieves effects such as reduced dead time and reduced power consumption.

[0166] [Differentiation 8] Next, with reference to Figures 19A to 19C, further modifications 8 to 9 of the fourth embodiment will be described. As shown in Figure 19A, the pixel in modification 8 is composed of a first substrate 71, a second substrate 72A, and a third substrate 73. The first substrate 71 has a SPAD 210 and a shielding resistor 211 connected in series therewith, similar to the first substrate 71 in the fourth embodiment. A readout circuit 230 is provided on the second substrate 72A. A quench resistor 212 is provided on the third substrate 73.

[0167] The second substrate 72A further has a connection pad 135 on its lower surface in Figure 19A. In this modified example, the lower surface of the connection pad 135 is the same surface as the lower surface of the second substrate 72A. The second substrate 72A also has a connection pad 135A on the surface opposite to its lower surface (the upper surface in Figure 19A). In this modified example, the upper surface of the connection pad 135A is the same surface as the upper surface of the second substrate 72A. The connection pad 135 and the connection pad 135A are connected by predetermined wiring, which is also connected to the readout circuit 230. The second substrate 72A may be, for example, a silicon substrate, and the readout circuit 230 may be composed of transistors, wiring, and other circuit elements formed on the silicon substrate. The connection pad 135 and the connection pad 135A may be connected by vias or wiring, for example.

[0168] The third substrate 73 has a connection pad 136 on its lower surface in Figure 19A. In this modified example, the lower surface of the connection pad 136 is the same surface as the lower surface of the third substrate 73. The connection pad 136 is connected to the quench resistor 212 by means of vias or wiring, for example.

[0169] Here, the connection pad 125 of the first substrate 71 is joined to the connection pad 135 of the second substrate 72A, for example, by a Cu-Cu bond, thereby forming a joint portion 260. The shielding resistor portion 211 of the first substrate 71 and the read circuit 230 of the second substrate 72A are electrically connected via the joint portion 260. The first substrate 71 and the second substrate 72A are also mechanically joined by the joint portion 260.

[0170] The connection pad 135A of the second substrate 72A is joined to the connection pad 136 of the third substrate 73, for example, by a Cu-Cu bond, thereby forming a joint 260A. The read circuit 230 of the second substrate 72A and the quench resistor 212 of the third substrate 73 are electrically connected via the joint 260A. The second substrate 72A and the third substrate 73 are also mechanically joined by the joint 260A. Furthermore, the quench resistor 212 is electrically connected to the shielding resistor 211 of the first substrate 71 via the joints 260 and 260A.

[0171] In the modified example 8 having the above configuration, the quench resistor section 212 and the read circuit 230 are formed on separate substrates and connected by a joint section 260A, which is different from the fourth embodiment. However, the shielding resistor section 211 has a resistance value R of SPAD210. ON This is similar to the fourth embodiment in that it has a resistance value Rsh that is greater than the resistance value Rsh of the shielding resistance 211, and the quench resistance 212 has a resistance value Rq that is greater than the resistance value Rsh of the shielding resistance 211.

[0172] Furthermore, a parasitic capacitance C2 is generated between the connection pad 135 and the read circuit 230, and a parasitic capacitance C1 is generated at the cathode of SPAD210. The parasitic capacitance C2 is the combined capacitance of the junction 260, the wiring connecting the connection pad 135 and the connection pad 135A, and the read circuit 230. Since many connection pads, wiring, and circuit elements are formed on the second substrate 72A, the capacitance of parasitic capacitance C2 tends to be larger than the capacitance of parasitic capacitance C1.

[0173] Therefore, in the modified example 8, as in the fourth embodiment, it is possible to reduce the input voltage to the readout circuit 230 while simultaneously reducing the dead time and power consumption.

[0174] [Modification 9] Figure 19B is a block diagram showing a modified example 9 of the pixel of an optical device according to the fourth embodiment. As shown in the figure, the pixel in modified example 9 is composed of a first substrate 71A, a second substrate 72B, and a third substrate 73A. The first substrate 71 is provided with a SPAD 210, the second substrate 72A is provided with a shielding resistor 211, and the third substrate 73A is provided with a quench resistor 212 and a readout circuit 230.

[0175] The first substrate 71A further has a connection pad 125 on its upper surface as shown in Figure 19B. In this modified example, the upper surface of the connection pad 125 is the same surface as the upper surface of the first substrate 71A. The connection pad 125 is connected to the cathode of the SPAD210.

[0176] The second substrate 72B has a connection pad 135 on its lower surface in Figure 19B. In this modified example, the lower surface of the connection pad 135 is the same surface as the lower surface of the second substrate 72B. The connection pad 135 is connected to the shielding resistor 211 by means of vias or wiring, for example. The second substrate 72B also has a connection pad 135A on its upper surface (the surface opposite to the lower surface). In this modified example, the upper surface of the connection pad 135A is the same surface as the upper surface of the second substrate 72B.

[0177] The third substrate 73A has a connection pad 136 on its lower surface in Figure 19B. In this modified example, the lower surface of the connection pad 136 is the same surface as the lower surface of the third substrate 73A. The connection pad 136 is connected to the quench resistor 212 and the read circuit 230 by means of vias or wiring, for example.

[0178] Here, the connection pad 125 of the first substrate 71A is joined to the connection pad 135 of the second substrate 72B, for example, by a Cu-Cu bond, thereby forming a joint portion 260. The SPAD 210 of the first substrate 71A and the shielding resistor portion 211 of the second substrate 72B are electrically connected via the joint portion 260. In addition, the first substrate 71A and the second substrate 72B are mechanically joined by the joint portion 260.

[0179] The connection pad 135A of the second substrate 72B is joined to the connection pad 136 of the third substrate 73A, for example, by a Cu-Cu bond, thereby forming a joint 260A. The shielding resistor 211 of the second substrate 72B and the quench resistor 212 and readout circuit 230 of the third substrate 73A are electrically connected via the joint 260A. The second substrate 72B and the third substrate 73A are also mechanically joined by the joint 260A.

[0180] In the modified example 9 having the above configuration, the SPAD 210, the quench resistor 212, and the read circuit 230 are formed on separate substrates, the SPAD 210 and the quench resistor 212 are electrically connected via a junction 260, and the shielding resistor 211, the quench resistor 212, and the read circuit 230 are electrically connected via a junction 260A. Here, the shielding resistor 211 is the resistance value R of the SPAD 210. ON This is similar to the fourth embodiment in that the quench resistor 212 has a resistance value Rq that is greater than the resistance value Rsh of the shielding resistor 211.

[0181] Furthermore, when comparing the parasitic capacitance C1 generated at the end of the shielding resistor 211 that is electrically connected to the SPAD 210 with the parasitic capacitance C2 generated at the opposite end, the capacitance of parasitic capacitance C2 is larger than that of parasitic capacitance C1. This is because parasitic capacitance C2 includes the capacitance due to the shielding resistor 211, the capacitance due to the wiring connecting the shielding resistor 211 and the connection pad 135A, the capacitance due to the junction 260A, and the capacitance due to the wiring connecting the connection pad 136 to the quench resistor 212 and the read circuit 230, while parasitic capacitance C1 only includes the capacitance due to the SPAD 210, the wiring connecting the SPAD 210 and the connection pad 125, and the capacitance due to the junction 260.

[0182] Therefore, the capacitance of parasitic capacitance C1 < the capacitance of parasitic capacitance C2, and the resistance value R ONSince the relationship < resistance value Rsh and resistance value Rsh < resistance value Rq is satisfied, the same effect as that exhibited by the embodiments (including modified examples) described so far is exhibited in Modified Example 9.

[0183] [Example 10] Figure 19C is a block diagram showing a modified example 10 of the pixel of an optical device according to the fourth embodiment. As shown in the figure, the pixel in modified example 9 is composed of a first substrate 71, a second substrate 72C, and a third substrate 73B. The first substrate 71 is provided with a SPAD 210 and a shielding resistor 211, the second substrate 72C is provided with a quench resistor 212, and the third substrate 73B is provided with a readout circuit 230. The first substrate 71 in this modified example has the same configuration as the first substrate 71 in the fourth embodiment and its modified example 8.

[0184] The second substrate 72C has a connection pad 135 on its lower surface in Figure 19C. In this modified example, the lower surface of the connection pad 135 is the same surface as the lower surface of the second substrate 72C. The second substrate 72C also has a connection pad 135A on its upper surface (the surface opposite to the lower surface). In this modified example, the upper surface of the connection pad 135A is the same surface as the upper surface of the second substrate 72C. The connection pads 135 and 135A are connected to each other, for example, by vias or wiring. The connection pads 135 and 135A are also electrically connected to the quench resistor 212.

[0185] The third substrate 73B has a connection pad 136 on its lower surface in Figure 19C. In this modified example, the lower surface of the connection pad 136 is the same surface as the lower surface of the third substrate 73B. The connection pad 136 is connected to the read circuit 230 by means of vias or wiring, for example.

[0186] Here, the connection pad 125 of the first substrate 71A is joined to the connection pad 135 of the second substrate 72C, for example, by a Cu-Cu bond, thereby forming a joint 260. The shielding resistor portion 211 of the first substrate 71A and the quench resistor portion 212 of the second substrate 72C are electrically connected via the joint 260. In addition, the first substrate 71A and the second substrate 72C are mechanically joined by the joint 260.

[0187] The connection pad 135A of the second substrate 72C is joined to the connection pad 136 of the third substrate 73B, for example, by a Cu-Cu bond, thereby forming a joint 260A. The quench resistor 212 of the second substrate 72C and the read circuit 230 of the third substrate 73B are electrically connected via the joint 260A. The second substrate 72C and the third substrate 73B are also mechanically joined by the joint 260A.

[0188] In the modified example 10 having the above configuration, the SPAD 210, the quench resistor 212, and the read circuit 230 are formed on separate substrates, the shielding resistor 211 and the quench resistor 212 are electrically connected via a joint 260, and the quench resistor 212 and the read circuit 230 are electrically connected via a joint 260A. Here, the shielding resistor 211 is the resistance value R of the SPAD 210. ON This is similar to the fourth embodiment in that the quench resistor 212 has a resistance value Rq that is greater than the resistance value Rsh of the shielding resistor 211.

[0189] Furthermore, a parasitic capacitance C2 is generated between the connection pad 135 and the read circuit 230, and a parasitic capacitance C1 is generated at the cathode of SPAD210. The parasitic capacitance C2 may include not only the capacitance due to the junction 260, the capacitance due to the wiring connecting the connection pad 135 and the connection pad 135A, and the capacitance due to the quench resistor 212, but also the capacitance due to the junction 260A and the capacitance due to the read circuit 230. On the other hand, the parasitic capacitance C1 only includes the capacitance due to SPAD210 and the capacitance due to the wiring connecting SPAD210 and the shielding resistor 211. For this reason, the parasitic capacitance C2 is larger than the parasitic capacitance C1.

[0190] Therefore, in the modified example 10, as in the fourth embodiment, it is possible to reduce the input voltage to the readout circuit 230 while simultaneously reducing the dead time and power consumption.

[0191] In addition, while modifications 8 to 10 of the fourth embodiment illustrate the joining of connection pads by Cu-Cu bonding, the connection pads may also be connected by metal pads. Furthermore, specific examples of the shielding resistor section described with reference to Figures 7A and 7B, the quench resistor section described with reference to Figures 8A to 8C, and the readout circuit described with reference to Figures 9A to 9C can also be appropriately applied to the fourth embodiment (including modifications).

[0192] <Application Example 1> The optical devices according to the embodiments of this disclosure described above can be applied to various electronic devices, such as imaging devices like digital still cameras and digital video cameras, mobile phones equipped with imaging functions, or other devices equipped with imaging functions.

[0193] Figure 20 is a block diagram showing an example configuration of an imaging device as an electronic device to which this technology is applied. The imaging device 201 shown in Figure 20 comprises an optical system 202, a shutter device 203, an optical device 100, a drive circuit 205, a signal processing circuit 206, a monitor 207, and a memory 208, and is capable of capturing still images and moving images.

[0194] The optical system 202 is composed of one or more lenses and guides light from the subject (incident light) to the optical device 100, forming an image on the light-receiving surface of the optical device 100.

[0195] The shutter device 203 is positioned between the optical system 202 and the optical device 100, and controls the light irradiation period and light shielding period for the optical device 100 according to the control of the drive circuit 205.

[0196] The drive circuit 205 drives the optical device 100 and the shutter device 203 by outputting drive signals that control the transfer operation of the optical device 100 and the shutter operation of the shutter device 203.

[0197] The optical device 100 includes light-receiving elements (pixels) according to each of the embodiments (including modified examples) described above. When applied to an imaging device, the optical device 100 has a digital counter circuit 240 (Figure 4B) at the output terminal of the readout circuit 230. Under the control of the drive circuit 205, the optical device 100 counts the number of photons for each pixel by the digital counter circuit 240 in accordance with the light that is imaged onto the light-receiving surface through the optical system 202 and the shutter device 203 during a predetermined exposure period. The count is converted into a luminance signal and, under the control of the drive circuit 205, is transferred to the column circuit 310 through the bit line BL according to a selection signal supplied from the row scanning circuit 320 (Figure 4A) to the word line WL of each pixel. The column circuit 310 converts the luminance signal from each pixel into a digital signal, and the converted digital signal is output to the signal processing circuit 206 through the interface circuit 330.

[0198] The signal processing circuit 206 performs various signal processing operations on the digital signal output from the optical device 100. The image (image data) obtained by the signal processing circuit 206 is supplied to the monitor 207 for display or supplied to the memory 208 for storage (recording).

[0199] In the imaging device 201 configured in this way, since the optical device 100 includes light-receiving elements according to each of the embodiments (including modified examples) described above, the imaging device 201 can also achieve the effects of reduced dead time and reduced power consumption. A color filter may be provided on the light-receiving surface of the optical device 100. This color filter includes a red filter that transmits light in the red wavelength region, a green filter that transmits light in the green wavelength region, and a blue filter that transmits light in the blue wavelength region, all of which are formed in accordance with the light-receiving elements (pixels) of the optical device 100. For example, a Bayer filter is exemplified as a color filter. By using such a color filter, the imaging device 201 can be configured as an imaging device capable of acquiring color images.

[0200] <Application Example 2> Next, we will describe a distance measuring device that performs distance measurement using the direct ToF method as an electronic device to which this technology is applied. Figure 21 is a block diagram showing an example configuration of a distance measuring device 600 as an electronic device to which this technology is applied. As shown in the figure, the distance measuring device 600 includes an optical device 100A, a light source unit 602, a storage unit 603, a control unit 604, and an optical system 605.

[0201] The light source unit 602 may be, for example, a vertical cavity surface-emitting laser (VCSEL) array that emits laser light as a surface light source. However, it is not limited to this, and the light source unit 602 may also be a laser diode array in which laser diodes are arranged in a line. In this case, the laser diode array is supported by a predetermined drive unit (not shown) and is scanned in a direction perpendicular to the direction of the laser diode arrangement. Furthermore, the light source unit 602 may also be a single laser diode. In this case, the single laser diode is supported by a predetermined drive unit (not shown) and is scanned in the horizontal and vertical directions.

[0202] In the example shown in Figure 22, the optical device 100A has pixels (photodetectors) 200 according to the first embodiment. However, the optical device 100A may have pixels (photodetectors) according to other embodiments (including modified versions). When applied to a distance measuring device, the optical device 100A has a TDC circuit 241, a generation unit 242, and a signal processing unit 243 connected in series with respect to the output terminal of the readout circuit 230, as shown in Figure 22, instead of the digital counter circuit 240 (Figure 4B) described above. The functions of the TDC circuit 241, the generation unit 242, and the signal processing unit 243 will be described later.

[0203] The signal processing unit 243 performs predetermined calculations based on the histogram data (described later) generated by the generation unit 242, for example, to calculate distance information. The signal processing unit 243 creates a curve approximation of the histogram based on the histogram data generated by the generation unit 242. The signal processing unit 243 can detect the peak of the curve approximated by this histogram and determine the distance D based on the detected peak.

[0204] The memory unit 603 (Figure 21) is composed of, for example, flash memory, DRAM, SRAM, etc., and stores data input from the optical device 10.

[0205] The control unit 604 controls the overall operation of the distance measuring device 600. For example, the control unit 604 supplies a predetermined reference signal having a predetermined frequency to the optical device 100 and the light source unit 602. The light source unit 602 emits pulsed light based on the reference signal supplied by the control unit 604. The optical device 100 determines the time difference between the light emission timing and the light reception timing based on the above reference signal and the output signal output from the readout circuit 230. The control unit 604 also sets the pattern for distance measurement for the optical device 100, for example, in response to an external instruction. The optical system 605 guides light incident from the outside to the light-receiving surface of the optical device 100.

[0206] Next, while referring to FIG. 23, as an example of distance measurement by the distance measurement device 600, the case where the distance measurement device 600 measures the distance D from the distance measurement device 600 to the measurement target 303 will be taken as an example to explain distance measurement by the direct ToF method. The time when the light source unit 602 emits light is defined as the emission timing t0, and the time when the optical device 100 receives the reflected light reflected by the measurement target 303 from the light emitted from the light source unit 602 is defined as the reception timing t1. At this time, the distance D between the distance measurement device 600 and the measurement target 303 can be calculated by the following formula (1). D=(c / 2)×(t1 - t0) …(1) Here, the constant c is the speed of light (2.9979×108 [m / sec]).

[0207] By the way, in the optical device 100A, when light (photons) is incident on the pixel 200, even if the light is light other than the reflected light from the measurement target 303 (for example, ambient light), an output signal is output from the readout circuit 230, and the reception timing is calculated by the TDC circuit 241 as described later. That is, the reception timing t1 calculated based on the reflected light from the measurement target 303 and the reception timing calculated based on light other than the reflected light cannot be distinguished.

[0208] Therefore, in the distance measurement device 600, light is repeatedly emitted from the light source unit 602 (for example, several hundred to several tens of thousands of times), and a histogram regarding the difference between the emission timing and the reception timing is created. FIG. 24 is a diagram showing an example of the histogram created in this way. As shown in the figure, the number of times (frequency) 301 of the reception timing is shown for each section ♯0, ♯1, ♯2, ···, ♯(N - 2), ♯(N - 1) having a predetermined unit time d. Here, the section ♯0 is the range of time d from the emission timing t0, and the section ♯1 is the range of time d from the time point when time d has elapsed from the emission timing t0. In the figure, the period from the emission timing t0 to t ep corresponds to the exposure time of the optical device 100.

[0209] Referring to Figure 24, compared to the dashed line range 311, there is a section where the number of light reception timings is significantly higher than in adjacent sections, as shown by the curve 312 (hereinafter referred to as section 312 for convenience). While reception of ambient light occurs randomly, reception of light emitted from the light source 602 and reflected by the object under measurement 303 occurs after the light has propagated a distance of 2 × D, and therefore can occur after a certain range of time has elapsed, although this includes errors. For this reason, the light reception timing t1 corresponding to the reflected light from the object under measurement 303 is considered to be included in section 312. Thus, for example, as shown in the figure, the end of the section in section 312 where the maximum number of light reception timings is recorded can be taken as the light reception timing t1 based on the reflected light from the object under measurement 303. It is not limited to this, however, the start time or the midpoint of the section where the maximum number of light reception timings is recorded may also be taken as the light reception timing t1. Alternatively, an approximate curve for the number of light emission timings may be obtained in section 312, and the light emission timing t1 may be determined based on its peak value.

[0210] As described above, the timing t1 for receiving reflected light from the object 303 can be determined, and the distance D to the object 303 can be calculated using equation (1).

[0211] When distance measurement is performed using the direct ToF method described above in the optical device 100A, the light reception timing is determined by the TDC circuit 241. Specifically, the TDC circuit 241 generates a time difference signal that indicates the time difference between the reference signal input from the control unit 604 and the output signal from the readout circuit 230. The reference signal from the control unit 604 is also input to the light source unit 602, and the light source unit 602 emits pulsed light based on this reference signal. Therefore, the light reception timing can be determined from the time difference signal generated in the TDC circuit 241, with reference to the light emission timing t0 when the pulsed light is emitted from the light source unit 602.

[0212] The light emission based on the reference signal by the light source unit 602 and the light reception by the SPAD 210 are repeated, and each time, a histogram regarding the difference between the light emission timing and the light reception timing obtained by the TDC circuit 241 is generated by the generation unit 242. Based on the histogram created by the generation unit 242, the signal processing unit 243 determines the light reception timing t1 and calculates the distance D.

[0213] Even in the distance measurement device 600 configured as described above, since the optical device 100A includes the light receiving element according to each of the above-described embodiments (including modifications), the distance measurement device 600 can also exhibit the effects of shortening the dead time and reducing the power consumption.

[0214] <Application Example 3> The technology according to the present disclosure (this technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0215] FIG. 25 is a block diagram showing an example of a schematic configuration of a patient's body information acquisition system using a capsule endoscope to which the technology according to the present disclosure (this technology) can be applied.

[0216] The body information acquisition system 10001 is composed of a capsule endoscope 10100 and an external control device 10200.

[0217] The capsule endoscope 10100 is swallowed by a patient during an examination. The capsule endoscope 10100 has an imaging function and a wireless communication function, and while moving inside organs such as the stomach and intestines by peristaltic movement or the like until it is naturally discharged from the patient, it sequentially captures images of the inside of the organ (hereinafter also referred to as body images) at a predetermined interval, and sequentially wirelessly transmits information about the body images to an external control device 10200 outside the body.

[0218] The external control unit 10200 comprehensively controls the operation of the internal information acquisition system 10001. The external control unit 10200 also receives information about internal images transmitted from the capsule endoscope 10100 and generates image data for displaying the internal images on a display device (not shown) based on the received information about the internal images.

[0219] In this way, the internal information acquisition system 10001 can continuously obtain images of the patient's internal condition from the time the capsule endoscope 10100 is swallowed until it is expelled.

[0220] The configuration and functions of the capsule endoscope 10100 and the external control unit 10200 will be explained in more detail.

[0221] The capsule endoscope 10100 has a capsule-shaped housing 10101, which houses a light source unit 10111, an imaging unit 10112, an image processing unit 10113, a wireless communication unit 10114, a power supply unit 10115, a power supply unit 10116, and a control unit 10117.

[0222] The light source unit 10111 is composed of a light source such as an LED (light-emitting diode) and illuminates the imaging field of view of the imaging unit 10112 with light.

[0223] The imaging unit 10112 consists of an image sensor and an optical system comprising a plurality of lenses provided in front of the image sensor. Reflected light (hereinafter referred to as observation light) irradiated onto the body tissue to be observed is focused by the optical system and incident on the image sensor. In the imaging unit 10112, the observation light incident on the image sensor is photoelectrically converted, and an image signal corresponding to the observation light is generated. The image signal generated by the imaging unit 10112 is provided to the image processing unit 10113.

[0224] The image processing unit 10113 is composed of processors such as a CPU (Central Processing Unit) and a GPU (Graphics Processing Unit), and performs various signal processing on the image signal generated by the imaging unit 10112. The image processing unit 10113 provides the processed image signal to the wireless communication unit 10114 as RAW data.

[0225] The wireless communication unit 10114 performs predetermined processing, such as modulation, on the image signal processed by the image processing unit 10113, and transmits the image signal to the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 also receives control signals related to the drive control of the capsule endoscope 10100 from the external control device 10200 via the antenna 10114A. The wireless communication unit 10114 provides the control signals received from the external control device 10200 to the control unit 10117.

[0226] The power supply unit 10115 consists of an antenna coil for receiving power, a power regeneration circuit that regenerates power from the current generated in the antenna coil, and a boost circuit, etc. Power is generated in the power supply unit 10115 using the principle of so-called contactless charging.

[0227] The power supply unit 10116 is composed of a secondary battery and stores the power generated by the power supply unit 10115. In Figure 25, to avoid making the diagram complicated, arrows and other symbols indicating the destinations of the power supply from the power supply unit 10116 are omitted, but the power stored in the power supply unit 10116 can be supplied to the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the control unit 10117, and used to drive them.

[0228] The control unit 10117 is composed of a processor such as a CPU and appropriately controls the operation of the light source unit 10111, the imaging unit 10112, the image processing unit 10113, the wireless communication unit 10114, and the power supply unit 10115 according to control signals transmitted from the external control device 10200.

[0229] The external control device 10200 is composed of a processor such as a CPU or GPU, or a microcomputer or control board that combines a processor and memory elements such as memory. The external control device 10200 controls the operation of the capsule endoscope 10100 by transmitting control signals to the control unit 10117 of the capsule endoscope 10100 via the antenna 10200A. In the capsule endoscope 10100, for example, the light irradiation conditions for the observation target in the light source unit 10111 may be changed by control signals from the external control device 10200. Also, the imaging conditions (for example, frame rate, exposure value, etc. in the imaging unit 10112) may be changed by control signals from the external control device 10200. Furthermore, the processing content in the image processing unit 10113 and the conditions for the wireless communication unit 10114 to transmit image signals (for example, transmission interval, number of transmitted images, etc.) may be changed by control signals from the external control device 10200.

[0230] Furthermore, the external control device 10200 applies various image processing to the image signals transmitted from the capsule endoscope 10100 to generate image data for displaying the captured internal images on a display device. This image processing can include, for example, development processing (demosaic processing), image enhancement processing (bandwidth enhancement, super-resolution processing, NR (Noise reduction) processing, and / or image stabilization processing), and / or magnification processing (electronic zoom processing). The external control device 10200 controls the drive of the display device to display the captured internal images based on the generated image data. Alternatively, the external control device 10200 may record the generated image data in a recording device (not shown) or print it out to a printing device (not shown).

[0231] The above describes an example of an internal information acquisition system to which the technology relating to this disclosure may be applied. The technology relating to this disclosure can be applied to the imaging unit 10112 of the configuration described above. Specifically, the optical devices according to each of the above embodiments can be used as the imaging unit 10112. The optical devices described above make it possible to shorten the dead time of SPAD 210 (or 210A). Therefore, by using an optical device as the imaging unit 10112, it becomes possible to appropriately set the imaging interval by the capsule endoscope 10100. In other words, the possibility that SPAD 210 (or 210A) is in dead time when imaging is performed by the capsule endoscope 10100 can be reduced. In addition, since the power consumption of SPAD 210 can be reduced, it becomes possible to reliably operate the optical device 100, etc., from the time the capsule endoscope 10100 is swallowed by the patient until it is naturally expelled.

[0232] Although this document describes a system for acquiring patient internal information using a capsule endoscope, the technology described herein may also be applied to, for example, an endoscopic surgical system. The following describes how the technology described herein may be applied to an endoscopic surgical system.

[0233] <Application Example 4> Figure 26 is a diagram showing an example of a schematic configuration of an endoscopic surgical system to which the technology described herein (the technology) may be applied.

[0234] Figure 26 illustrates a surgeon (physician) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgical system 11000. As shown in the figure, the endoscopic surgical system 11000 consists of an endoscope 11100, other surgical instruments 11110 such as an insufflation tube 11111 and an energy treatment device 11112, a support arm device 11120 for supporting the endoscope 11100, and a cart 11200 equipped with various devices for endoscopic surgery.

[0235] The endoscope 11100 is composed of a lens barrel 11101 with a region of a predetermined length inserted into the body cavity of the patient 11132 from its tip, and a camera head 11102 connected to the proximal end of the lens barrel 11101. In the illustrated example, an endoscope 11100 configured as a so-called rigid endoscope having a rigid lens barrel 11101 is shown, but the endoscope 11100 may be configured as a so-called flexible endoscope having a flexible lens barrel.

[0236] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and the light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101 and irradiated toward an observation target in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 may be a forward-viewing endoscope, or may be an oblique-viewing endoscope or a side-viewing endoscope.

[0237] An optical system and an imaging element are provided inside the camera head 11102, and the reflected light (observation light) from the observation target is condensed onto the imaging element by the optical system. The observation light is photoelectrically converted by the imaging element, and an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image, is generated. The image signal is transmitted as RAW data to a camera control unit (CCU) 11201.

[0238] The CCU 11201 is composed of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Further, the CCU 11201 receives an image signal from the camera head 11102, and performs various image processes for displaying an image based on the image signal, such as development processing (demosaicing processing), on the image signal.

[0239] The display device 11202 displays an image based on an image signal that has been processed by the CCU 11201, under control from the CCU 11201.

[0240] The light source device 11203 consists of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 11100 when photographing the surgical area, etc.

[0241] The input device 11204 is an input interface for the endoscopic surgical system 11000. The user can input various information and instructions to the endoscopic surgical system 11000 via the input device 11204. For example, the user can input instructions to change the imaging conditions (type of light, magnification, focal length, etc.) of the endoscope 11100.

[0242] The treatment instrument control device 11205 controls the drive of the energy treatment instrument 11112 for purposes such as tissue cauterization, incision, or vascular sealing. The insufflation device 11206 delivers gas into the patient's body cavity via the insufflation tube 11111 to inflate the body cavity of the patient 11132 for the purpose of securing a field of view by the endoscope 11100 and securing the operator's working space. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, images, or graphs.

[0243] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical area, can be configured as a white light source consisting of, for example, an LED, a laser light source, or a combination thereof. When the white light source is configured as a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to time-divisionally capture images corresponding to each of the RGB light sources by irradiating the observation target with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0244] Furthermore, the light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0245] Furthermore, the light source device 11203 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue and irradiating with narrow-band light compared to the irradiation light used during normal observation (i.e., white light), so-called narrow-band imaging is performed to image predetermined tissues such as blood vessels on the surface of mucosa with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light is irradiated onto body tissue and fluorescence from the body tissue is observed (autofluorescence observation), or a reagent such as indocyanine green (ICG) is injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent is irradiated onto the body tissue to obtain a fluorescence image. The light source device 11203 may be configured to supply narrow-band light and / or excitation light corresponding to such special light observation.

[0246] Figure 27 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Figure 26.

[0247] The camera head 11102 includes a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with one another.

[0248] The lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and then incident on the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses, including a zoom lens and a focus lens.

[0249] The imaging unit 11402 is composed of image sensors. The imaging unit 11402 may consist of one image sensor (a so-called single-chip type) or multiple image sensors (a so-called multi-chip type). If the imaging unit 11402 is composed of multiple chips, for example, each image sensor may generate an image signal corresponding to RGB, and these signals may be combined to obtain a color image. Alternatively, the imaging unit 11402 may be configured to have a pair of image sensors for acquiring image signals for the right eye and the left eye, respectively, corresponding to 3D (dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. In addition, if the imaging unit 11402 is composed of multiple chips, multiple lens units 11401 may be provided corresponding to each image sensor.

[0250] Furthermore, the imaging unit 11402 does not necessarily have to be located in the camera head 11102. For example, the imaging unit 11402 may be located inside the lens barrel 11101, directly behind the objective lens.

[0251] The drive unit 11403 is composed of actuators and, under control from the camera head control unit 11405, moves the zoom lens and focus lens of the lens unit 11401 along the optical axis by a predetermined distance. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.

[0252] The communication unit 11404 consists of communication devices for sending and receiving various types of information with the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.

[0253] Furthermore, the communication unit 11404 receives control signals from the CCU 11201 to control the drive of the camera head 11102 and supplies them to the camera head control unit 11405. These control signals include information regarding imaging conditions, such as information to specify the frame rate of the captured image, information to specify the exposure value at the time of imaging, and / or information to specify the magnification and focus of the captured image.

[0254] The imaging conditions such as frame rate, exposure value, magnification, and focus may be specified by the user as appropriate, or they may be automatically set by the control unit 11413 of the CCU11201 based on the acquired image signal. In the latter case, the endoscope 11100 will be equipped with so-called AE (Auto Exposure), AF (Auto Focus), and AWB (Auto White Balance) functions.

[0255] The camera head control unit 11405 controls the drive of the camera head 11102 based on the control signal received from the CCU 11201 via the communication unit 11404.

[0256] The communication unit 11411 consists of a communication device for sending and receiving various types of information with the camera head 11102. The communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.

[0257] Furthermore, the communication unit 11411 transmits control signals to the camera head 11102 to control the driving of the camera head 11102. Image signals and control signals can be transmitted by telecommunications, optical communications, etc.

[0258] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102.

[0259] The control unit 11413 performs various controls related to imaging the surgical area, etc., by the endoscope 11100, and the display of the images obtained from imaging the surgical area, etc. For example, the control unit 11413 generates control signals to control the driving of the camera head 11102.

[0260] Furthermore, the control unit 11413 displays the captured image showing the surgical area on the display device 11202 based on the image signal processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical instruments such as forceps, specific biological sites, bleeding, mist when using the energy treatment device 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When the control unit 11413 displays the captured image on the display device 11202, it may use the recognition results to superimpose various surgical support information onto the image of the surgical area. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can proceed with the surgery with confidence.

[0261] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable compatible with electrical signal communication, an optical fiber compatible with optical communication, or a composite cable thereof.

[0262] In the illustrated example, communication was performed via a wired connection using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may be performed wirelessly.

[0263] The above describes an example of an endoscopic surgical system to which the technology described herein may be applied. The technology described herein can be applied to the imaging unit 11402 of the camera head 11102, as described above. Specifically, the optical devices according to each of the above embodiments can be used as the imaging unit 11402. The above optical devices enable reduction of dead time and power saving. Therefore, similar effects can be achieved in an endoscopic surgical system to which this optical device is applied.

[0264] <Application Example 5> The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein may be implemented as a device mounted on any type of mobile vehicle, such as an automobile, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility device, airplane, drone, ship, or robot.

[0265] Figure 28 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology described herein may be applied.

[0266] The vehicle control system 12000 comprises multiple electronic control units connected via a communication network 12001. In the example shown in Figure 28, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 is shown in the figure, which includes a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface 12053.

[0267] The drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 12010 functions as a control device for a drivetrain generating device that generates driving force for the vehicle, such as an internal combustion engine or a drive motor; a drivetrain transmission mechanism that transmits driving force to the wheels; a steering mechanism that adjusts the steering angle of the vehicle; and a braking device that generates braking force for the vehicle.

[0268] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 12020 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.

[0269] The external information detection unit 12030 detects information from outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the external information detection unit 12030. The external information detection unit 12030 causes the imaging unit 12031 to capture images of the outside of the vehicle and receives the captured images. Based on the received images, the external information detection unit 12030 may perform object detection processing such as detecting people, cars, obstacles, signs, or characters on the road surface, or distance detection processing.

[0270] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0271] The in-vehicle information detection unit 12040 detects information inside the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver status detection unit 12041 that detects the driver's state. The driver status detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration, or determine whether the driver is drowsy, based on the detection information input from the driver status detection unit 12041.

[0272] The microcomputer 12051 can calculate control target values ​​for the drive force generator, steering mechanism, or braking system based on information from inside and outside the vehicle acquired by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including collision avoidance or impact mitigation, following based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.

[0273] Furthermore, the microcomputer 12051 can perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on information about the vehicle's surroundings acquired by the external information detection unit 12030 or the internal information detection unit 12040.

[0274] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12020 based on external information acquired by the external information detection unit 12030. For example, the microcomputer 12051 can control the headlights according to the position of a preceding or oncoming vehicle detected by the external information detection unit 12030, and perform coordinated control aimed at reducing glare, such as switching from high beams to low beams.

[0275] The audio-image output unit 12052 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying information to the vehicle's occupants or to those outside the vehicle. In the example shown in Figure 28, the output devices are exemplified as an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

[0276] Figure 29 shows an example of the installation position of the imaging unit 12031.

[0277] In Figure 29, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0278] The imaging units 12101, 12102, 12103, 12104, and 12105 are installed, for example, on the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle 12100. The imaging unit 12101 installed on the front nose and the imaging unit 12105 installed on the upper part of the windshield inside the vehicle mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 installed on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 installed on the upper part of the windshield inside the vehicle is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.

[0279] Figure 29 shows an example of the imaging range of imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of imaging unit 12101 located on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 located on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of imaging unit 12104 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 12101 to 12104, an overhead view image of the vehicle 12100 can be obtained.

[0280] At least one of the imaging units 12101 to 12104 may have a function for acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera consisting of multiple image sensors, or an image sensor having pixels for phase difference detection.

[0281] For example, the microcomputer 12051, based on distance information obtained from imaging units 12101 to 12104, can determine the distance to each object within the imaging range 12111 to 12114 and the temporal change of this distance (relative speed to vehicle 12100). In particular, it can extract the nearest object on the vehicle 12100's path that is traveling in approximately the same direction as vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. Furthermore, the microcomputer 12051 can set a predetermined distance to be maintained before the preceding vehicle and perform automatic braking control (including follow-and-stop control) and automatic acceleration control (including follow-and-start control), etc. In this way, cooperative control aimed at autonomous driving, where the vehicle drives autonomously without driver intervention, can be performed.

[0282] For example, the microcomputer 12051 can use distance information obtained from imaging units 12101 to 12104 to classify and extract three-dimensional object data related to three-dimensional objects, such as motorcycles, passenger cars, heavy vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines the collision risk, which indicates the degree of risk of collision with each obstacle. If the collision risk is above a set value and there is a possibility of collision, the microcomputer 12051 can provide driving assistance to avoid collisions by outputting a warning to the driver via the audio speaker 12061 or display unit 12062, or by performing forced deceleration or evasive steering via the drive system control unit 12010.

[0283] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared light. For example, the microcomputer 12051 can recognize pedestrians by determining whether or not pedestrians are present in the images captured by the imaging units 12101 to 12104. Such pedestrian recognition is performed, for example, by a procedure to extract feature points from the images captured by the imaging units 12101 to 12104 as infrared cameras, and a procedure to perform pattern matching on a series of feature points that indicate the contour of an object to determine whether or not it is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the imaging units 12101 to 12104 and recognizes a pedestrian, the audio-image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio-image output unit 12052 may also control the display unit 12062 to display an icon indicating a pedestrian at a desired position.

[0284] The above describes an example of a vehicle control system to which the technology of this disclosure may be applied. The technology of this disclosure can be applied to the imaging units 12101 to 12104 of the configuration described above. Specifically, the image sensors according to each of the embodiments described above (including modified examples) can be applied to the imaging units 12101 to 12104. By applying the technology of this disclosure to the imaging units 12101 to 12104, it becomes possible to recognize pedestrians even at night or in dark places, from the slightest light they emit. Furthermore, the effect of reducing power consumption by the technology of this disclosure is particularly useful in vehicles equipped with a drive motor as a drive force generating device for generating driving force for the vehicle.

[0285] While the above describes various effects exhibited by the light-receiving element, optical device including the same, and electronic device having the optical device according to embodiments of this disclosure, such effects are not limiting to this disclosure. Furthermore, not all of the various effects are required to be exhibited. In addition, the light-receiving element, optical device, and electronic device of this disclosure may exhibit additional effects not described herein.

[0286] Furthermore, this technology can also be configured as follows. (1) A photon response multiplication unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons, A first resistor is connected at one end to one end of the photon response multiplier, and the first resistor has a resistance value greater than the resistance value of the photon response multiplier. A second resistor is connected to the other end of the first resistor, with one end being connected to the other end. The connection point where the other end of the first resistor, the one end of the second resistor, and the readout unit that reads the output from the photon response multiplier are connected. A light-receiving element equipped with the following features. (2) The light-receiving element according to (1), wherein the second resistive portion has a resistance value greater than the resistance value of the first resistive portion. (3) The photon response multiplier has a first capacitance at one end, The light-receiving element according to (1) or (2), wherein the other end of the first resistive portion has a second capacitance. (4) The photodetector described in (3), wherein each of the first capacitance and the second capacitance is composed of a variable capacitance element. (5) The photodetector according to (4), wherein the variable capacitance element includes one or more transistors. (6) The photodetector according to (4), wherein the one or more transistors are metal oxide semiconductor transistors. (7) The second resistor is A switch is provided between the reading unit and a power supply electrically connected to the other end of the second resistor, A control unit that detects the output of the reading unit and controls the switch based on the detection result, A light-receiving element according to any one of (1) to (6), comprising the above. (8) The light-receiving element according to any one of (1) to (6), wherein the second resistor is a constant current source. (9) The photon response multiplication unit includes a single-photon avalanche diode, as described in any one of (1) to (8). (10) The photodetector according to (9), wherein one end of the photon response multiplication section is the cathode or anode of the single-photon avalanche diode. (11) The photon response multiplication unit includes a silicon photomultiplier tube, as described in any one of (1) to (8). (12) The photodetector according to any one of (1) to (11), wherein the first resistive part is a polysilicon resistive part or a metal resistive part. (13) The first resistive portion is a light-receiving element according to any one of (1) to (12), formed by one or more transistors. (14) The photodetector according to (13), wherein the one or more transistors are metal oxide semiconductor transistors. (15) The photodetector according to (14), further comprising a voltage generating unit for applying a voltage to the gate of the metal oxide semiconductor transistor to apply a gate voltage. (16) A first substrate having a first connection portion on one side The second substrate has a first connection portion and a corresponding second connection portion on one surface, and the second substrate is electrically and mechanically joined to the first substrate by joining the first connection portion and the second connection portion. Furthermore, The photon response multiplication unit is provided on the first substrate, The reading unit is a light-receiving element according to any one of (1) to (15) provided on the second substrate. (17) The first and second connecting parts are made of copper. The light-receiving element according to (16), wherein the first connecting portion and the second connecting portion are joined together by the surfaces of the first connecting portion and the second connecting portion, which are formed using copper, being brought into close contact with each other. (18) The light-receiving element according to (16), wherein the first connection portion and the second connection portion are joined by a metal bump. (19) A first substrate having a first connection portion on one side A second substrate having a second connection portion on one surface that corresponds to the first connection portion, and a third connection portion on a surface opposite to the said surface, and electrically and mechanically joining the first substrate by joining the first connection portion and the second connection portion, The third substrate has a third connecting portion on one surface that corresponds to the second connecting portion, and the third substrate is electrically and mechanically joined to the second substrate by the joining of the second connecting portion and the third connecting portion. Furthermore, The photon response multiplication unit is a light-receiving element according to any one of (1) to (15) provided on the first substrate. (20) The first substrate is provided with a plurality of photon response multiplication units, The photodetector according to (16) or (19), wherein the plurality of photon response multipliers are electrically connected to one of the readout circuits. (twenty one) A light-receiving element according to any one of (1) to (20), wherein a counting unit for counting the number of times a signal is output from the reading unit is connected to the output terminal of the reading unit. (twenty two) The light-receiving element according to any one of (1) to (20), wherein a time-to-digital conversion circuit that generates a digital signal indicating the time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal is connected to the output terminal of the reading unit. (twenty three) A photon response multiplication unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons, A first resistor is connected at one end to one end of the photon response multiplier, and the first resistor has a resistance value greater than the resistance value of the photon response multiplier. A second resistor is connected to the other end of the first resistor, with one end being connected to the other end. The connection point where the other end of the first resistor, the one end of the second resistor, and the readout unit that reads the output from the photon response multiplier are connected. An optical device in which multiple light-receiving elements, each possessing a specific characteristic, are arranged in a matrix. (twenty four) Optical system and A photon response multiplier unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons transmitted through the optical system, A first resistor connected at one end to one end of the photon response multiplier, the first resistor having a resistance value greater than the resistance value of the photon response multiplier, A second resistor is connected to the other end of the first resistor, and The connection point where the other end of the first resistor, the one end of the second resistor, and the readout unit that reads the output from the photon response multiplier are connected. An optical device in which multiple light-receiving elements, each having the same characteristics, are arranged in a matrix. Electronic devices equipped with these features. (twenty five) Optical system and A light-emitting unit configured to emit light based on a reference signal having a predetermined frequency, A photon response multiplier unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons through the optical system, A first resistor connected at one end to one end of the photon response multiplier, the first resistor having a resistance value greater than the resistance value of the photon response multiplier, A second resistor is connected to the other end of the first resistor, with one end connected to the other end. The connection point where the other end of the first resistor, the one end of the second resistor, and the readout unit that reads the output from the photon response multiplier are connected, A time-to-digital conversion circuit that generates a digital signal indicating the time difference between the reference signal and the output read out by the readout unit from the photon response multiplier unit via the first resistor unit. An optical device in which multiple light-receiving elements, each having the same characteristics, are arranged in a matrix. Electronic devices equipped with these features. [Explanation of Symbols]

[0287] 1 Electronic equipment 10 Optical devices 11 Pixel array section 12 Drive Circuit 13 Output Circuit 15 Timing control circuit 20, 200, 200A, 200B pixels 21. Photodiode (SPAD) 22 Quench Resistors 23 Readout circuit 30 imaging lenses 40, 603 Storage section 50 processors 71 First substrate 72 Second substrate LS output signal line LD pixel drive line 100 Optical Devices 101 Semiconductor substrate 102 Photoelectric Conversion Region 103 N-type semiconductor region 104 P-type semiconductor region 10⁵ P+ type semiconductor region 10⁶ N+ type semiconductor region 107 Cathode Contact 108 Anode Contact 109 Insulating film 110 Element separation section 111 Light-shielding film 113 Pinning Layer 114 Planarization film 115 Color Filters 116 On-chip lenses 120, 130 wiring layers 121 Cathode electrode 122 Anode electrode 125, 135, 135A, 136 connection pads 210, 210A Single-Photon Avalanche Diode (SPAD) 211 Shielding resistance section 211A Resistor element 211B P-channel MOS transistor 211C N-channel MOS transistor 212 Quench Resistor Section 212A constant current source 212B Active Recharge Circuit 212S Switch 212C Control Unit 230 Readout circuit 230A Inverter 240 Digital Counter Circuit 241 TDC Circuit 242 Generation part 243 Signal Processing Unit 250 Bias voltage generation unit 260 Joint 310 Column Circuit 320-line scanning circuit 330 Interface Circuit 600 Rangefinder 602 Light source section 604 Control Unit 605 Optical system PAR Pixel Array Section BL0, BL1, ..., BL S BL bit line WL0, WL1, ..., WL N WL word line C1, C2 parasitic capacitance R L , R S resistor IVT Inverter C01 Cathode Parasitic Capacity C02 Input Parasitic Capacitance VC1, VC2 Variable Capacitance Elements 201 Imaging device 202 Optical system 203 Shutter device 205 Drive Circuit 206 Signal Processing Circuit 207 Monitors 208 memory

Claims

1. A photon response multiplication unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons, A first resistor connected at one end to one end of the photon response multiplier, the first resistor having a resistance value greater than the resistance value of the photon response multiplier, A second resistor is connected to the other end of the first resistor, having a resistance value greater than the resistance value of the photon response multiplier, The other end of the first resistor, the one end of the second resistor, and the connection point to which the readout unit that reads the output from the photon response multiplier are connected, Equipped with, The second resistor has a resistance value greater than the resistance value of the first resistor. The photon response multiplier and the first resistor are provided on the first substrate. The second resistor is provided on the second substrate, The first substrate has a first connection portion on one side, The second substrate has a second connection portion on one surface that corresponds to the first connection portion, and the first substrate and the second substrate are electrically and mechanically joined by the joining of the first connection portion and the second connection portion. Light-receiving element.

2. The photon response multiplier has a first capacitance at one end, The light-receiving element according to claim 1, wherein the other end of the first resistive portion has a second capacitance.

3. The photodetector according to claim 2, wherein each of the first capacitance and the second capacitance is composed of a variable capacitance element.

4. The photodetector according to claim 3, wherein the variable capacitance element includes one or more transistors.

5. The second resistor is A switch is provided between the reading unit and the power supply electrically connected to the other end of the second resistor, A control unit that detects the output of the reading unit and controls the switch based on the detection result, A light-receiving element according to claim 1, comprising:

6. The light-receiving element according to claim 1, wherein the second resistive component is a constant current source.

7. The photodetector according to claim 1, wherein the photon response multiplication unit includes a single-photon avalanche diode.

8. The photodetector according to claim 7, wherein one end of the photon response multiplier is the cathode or anode of the single-photon avalanche diode.

9. The photodetector according to claim 1, wherein the photon response multiplication unit includes a silicon photomultiplier tube.

10. The light-receiving element according to claim 1, wherein the first resistive part is a polysilicon resistive part or a metal resistive part.

11. The light-receiving element according to claim 1, wherein the first resistive portion is composed of one or more transistors.

12. The light-receiving element according to claim 1, wherein the reading unit is provided on the second substrate.

13. The first and second connecting parts are made of copper. The light-receiving element according to claim 12, wherein the first connecting portion and the second connecting portion, which are made of copper, are joined together by the surfaces of the first connecting portion and the second connecting portion being in close contact with each other.

14. The light-receiving element according to claim 12, wherein the first connection portion and the second connection portion are joined by a metal bump.

15. The reading unit is provided on the third substrate, The second substrate has a third connection portion on the surface facing the first surface, The third substrate has a fourth connection portion on one surface that corresponds to the third connection portion, and the second substrate and the third substrate are electrically and mechanically joined by the joining of the third connection portion and the fourth connection portion. The light-receiving element according to claim 1.

16. The light-receiving element according to claim 1, wherein a counting unit for counting the number of times a signal is output from the reading unit is connected to the output terminal of the reading unit.

17. The light-receiving element according to claim 1, wherein a time-to-digital conversion circuit that generates a digital signal indicating the time difference between a reference signal having a predetermined frequency and another signal generated based on the reference signal is connected to the output terminal of the reading unit.

18. A photon response multiplication unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons, A first resistor connected at one end to one end of the photon response multiplier, the first resistor having a resistance value greater than the resistance value of the photon response multiplier, A second resistor is connected to the other end of the first resistor, having a resistance value greater than the resistance value of the photon response multiplier, The other end of the first resistor, the one end of the second resistor, and the connection point to which the readout unit that reads the output from the photon response multiplier are connected. Multiple light-receiving elements, each having one of these characteristics, are arranged in a matrix. The second resistor has a resistance value greater than the resistance value of the first resistor. The photon response multiplier and the first resistor are provided on the first substrate. The second resistor is provided on the second substrate, The first substrate has a first connection portion on one side, The second substrate has a second connection portion on one surface that corresponds to the first connection portion, and the first substrate and the second substrate are electrically and mechanically joined by the joining of the first connection portion and the second connection portion. Optical devices.

19. Optical system and An optical device in which a plurality of photodetectors are arranged in a matrix, each receiving a photon that has passed through the optical system, Equipped with, Each of the aforementioned plurality of light-receiving elements is A photon response multiplier unit including a charge multiplication region capable of multiplying the charge generated in response to the incidence of photons that have passed through the optical system, A first resistor connected at one end to one end of the photon response multiplier, the first resistor having a resistance value greater than the resistance value of the photon response multiplier, A second resistor is connected to the other end of the first resistor, having a resistance value greater than the resistance value of the photon response multiplier, The other end of the first resistor, the one end of the second resistor, and the connection point to which the readout unit that reads the output from the photon response multiplier are connected, Includes, The second resistor has a resistance value greater than the resistance value of the first resistor. The second resistor has a resistance value greater than the resistance value of the first resistor. The photon response multiplier and the first resistor are provided on the first substrate. The second resistor is provided on the second substrate, The first substrate has a first connection portion on one side, The second substrate has a second connection portion on one surface that corresponds to the first connection portion, and the first substrate and the second substrate are electrically and mechanically joined by the joining of the first connection portion and the second connection portion. electronic equipment.

Images