Dynamic coalescing of atomic memory operations for memory-local computing

Abstract

Dynamic coalescing of atomic memory operations for memory-local computing is disclosed. In one embodiment, it is determined whether a first atomic memory access and a second atomic memory access are candidates for coalescing. In response to a trigger event, the atomic memory accesses that are candidates for coalescing are coalesced in a cache before a memory-local computing unit requests memory-local processing. The atomic memory accesses may be coalesced in the same cache line, or atomic memory accesses in different cache lines may be coalesced using a multicast memory-local processing command.

Claims

1. A method for dynamically combining atomic memory operations for memory-local computing, To determine whether the first atomic memory access and the second atomic memory access are candidates for merging, This includes combining the first atomic memory access and the second atomic memory access in the cache before the memory-local computing unit requests memory-local processing, method.

2. Determining that the first atomic memory access is a candidate for merging, Allocating a special state cache line without loading data from memory, This includes storing the operand of the first atomic memory access in a location within the cache line targeted by the first atomic memory access, Determining whether the first atomic memory access and the second atomic memory access are candidates for merging is: This includes determining that the second atomic memory access is a candidate for merging with the first atomic memory access. The method according to claim 1.

3. Before the memory-local computing unit requests memory-local processing, the first atomic memory access and the second atomic memory access are combined in the cache. This includes merging the first atomic memory access and the second atomic memory access by performing the operation of the second atomic memory access on the data at the location in the cache line targeted by the second atomic memory access using the operand of the second atomic memory access, The method according to claim 2.

4. The process includes sending one or more memory-local processing commands to the memory controller for the first atomic memory access and the second atomic memory access in response to a trigger event. The method according to claim 3.

5. The process includes determining whether to allocate the special state cache line to the first atomic memory access based on one or more metrics, The method according to claim 2.

6. Determining whether the first atomic memory access and the second atomic memory access are candidates for merging is: This includes determining whether the first atomic memory access can be coalesced with the second atomic memory access based on symmetric access to different memory modules. The method according to claim 1.

7. Determining whether the first atomic memory access can be combined with the second atomic memory access based on the symmetric access to the different memory modules is: In response to a trigger event, a determination is made as to whether a first cache line including the first atomic memory access can be merged with a second cache line including the second atomic memory access, wherein the first cache line and the second cache line are in a special cache state. The method according to claim 6.

8. In response to the trigger event, it is determined whether the first cache line including the first atomic memory access can be merged with the second cache line including the second atomic memory access, wherein the first cache line and the second cache line are in a special cache state. This includes tracking cashlines that are candidates for merger, The method according to claim 7.

9. Before the memory-local computing unit requests memory-local processing, the first atomic memory access and the second atomic memory access are combined in the cache. This includes using a multi-module memory local processing command to combine the first atomic memory access and the second atomic memory access. The method according to claim 6.

10. The aforementioned memory-local computing unit is a processing-in-memory (PIM) unit. The method according to claim 1.

11. A system for dynamically combining atomic memory operations for memory-local computing, A memory device including at least one memory-local computing unit, Equipped with a computing device, The computing device is To determine whether the first atomic memory access and the second atomic memory access are candidates for merging, The first atomic memory access and the second atomic memory access are combined in the cache before the memory-local computing unit requests memory-local processing. It is configured to do, system.

12. The computing device is Determining that the first atomic memory access is a candidate for merging, Allocating a special state cache line without loading data from memory, The operand of the first atomic memory access is stored in a location within the cache line targeted by the first atomic memory access, It is configured to do the following: Determining whether the first atomic memory access and the second atomic memory access are candidates for merging is: This includes determining that the second atomic memory access is a candidate for merging with the first atomic memory access. Before the memory-local computing unit requests memory-local processing, the first atomic memory access and the second atomic memory access are combined in the cache. This includes merging the first atomic memory access and the second atomic memory access by performing the operation of the second atomic memory access on the data at the location in the cache line targeted by the second atomic memory access using the operand of the second atomic memory access, The system according to claim 11.

13. Determining whether the first atomic memory access and the second atomic memory access are candidates for merging is: This includes determining whether the first atomic memory access can be combined with the second atomic memory access based on symmetric access to different memory modules. Before the memory-local computing unit requests memory-local processing, the first atomic memory access and the second atomic memory access are combined in the cache. This includes using a multi-module memory local processing command to combine the first atomic memory access and the second atomic memory access. The system according to claim 11.

Images