semiconductor devices
The semiconductor device with a trench gate structure and heteroepitaxial contact layer addresses high source contact resistance and self-heating issues, improving reliability and performance by managing electric fields and channel uniformity.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- CHONGQING INNOEVSIC TECHNOLOGY CO LTD
- Filing Date
- 2024-06-13
- Publication Date
- 2026-06-15
Smart Images
Figure 0007873876000001 
Figure 0007873876000002 
Figure 0007873876000003
Abstract
Description
【Technical Field】 【0001】 This disclosure relates to the technical field of semiconductor devices, and more specifically, to semiconductor devices having a trench gate structure. 【Background Art】 【0002】 Silicon carbide (SiC) semiconductor devices have advantages such as high switching speed and high power density. The vertical transistor structure is advantageous for balancing the barrier voltage and conduction resistance in the same area compared to the planar transistor structure. Currently, the source contact resistance of SiC power devices is large, and the self-heating effect of the contact resistance reduces the reliability of semiconductor devices. 【Summary of the Invention】 【Problems to be Solved by the Invention】 【0003】 In view of the above problems, an object of this disclosure is to provide a semiconductor device that reduces the source contact resistance by providing a contact layer. 【Means for Solving the Problems】 【0004】 A semiconductor device according to an embodiment of this disclosure includes a semiconductor layer, a trench gate structure, a contact layer, and a conductive layer. The semiconductor layer has opposing first and second surfaces, and at least a part of the trench gate structure is located in a trench on the first surface of the semiconductor layer. The semiconductor layer a source region extending from the first surface toward the second surface, a drift region and a body region, including a drift region and a body region where at least a part of the drift region is located between the body region and the second surface of the semiconductor layer. The first portion of the body region is located between the source region and the drift region along the direction from the first surface to the second surface, and both the first portion of the body region and the source region are adjacent to the first side wall of the trench. The contact layer is a heteroepitaxial layer of the semiconductor layer, located on the first surface of the semiconductor layer and adjacent to the source region. The conductive layer is adjacent to the contact layer and is electrically connected to the source region via the contact layer. The source region and the drift region are of the first conductivity type, and the body region is of the second conductivity type, with the first conductivity type and the second conductivity type being opposite to each other. 【0005】 Selectively, the semiconductor layer includes a SiC semiconductor layer, and the contact layer includes one or more of a Si layer, a SiGe layer, a GaN layer, and a GaAs layer. 【0006】 Selectively, the thickness of the contact layer includes the thickness of one or more atomic layers. 【0007】 Selectively, the contact layer has a crystalline structure. 【0008】 Selectively, the first, second, and third portions of the body region are adjacent to each other in order along the width direction of the trench gate structure. The first and second portions of the body region are located between the two trench gate structures, the first portion is adjacent to the first side wall of the trench gate structure, the second portion is close to the second side wall of the trench gate structure, and the first and second side walls face each other. The third portion and the second portion are adjacent to the same trench gate structure, and the third portion is located between the bottom surface of the trench gate structure and the second surface, and the third portion and the first portion are separated by the drift region. The second portion is adjacent to the second side wall, or the second portion and the second side wall are separated by the drift region. 【0009】 Selectively, the third portion of the body region extends from the bottom surface of the trench gate structure toward the second surface, or At least a portion of the bottom surface of the trench gate structure and the third portion of the body region are separated by the drift region along the direction from the first surface to the second surface. 【0010】 Selectively, the second portion of the body region includes a first subregion and a second subregion that are connected. Along the width direction of the trench gate structure, the first sub-region is adjacent to the first portion of the body region, and the second sub-region is adjacent to the third portion of the body region. The distance from the edge of the first portion of the body region toward the second surface to the first surface is the first distance, the distance from the edge of the first sub-region toward the second surface to the first surface is the second distance, and the distance from the edge of the second sub-region toward the second surface to the first surface is the third distance. The third distance is greater than the second distance, and the second distance is greater than the first distance. 【0011】 Selectively, the distance from the bottom surface of the trench gate structure to the first surface is the fourth distance, and the second distance is greater than or equal to the fourth distance. 【0012】 Selectively, the distance at which the drift region separates the third portion of the body region and the bottom surface of the trench gate structure along the direction from the second surface to the first surface is the fifth distance. The sum of the fourth distance and the fifth distance is equal to the second distance. 【0013】 Selectively, the edge of the second portion of the body region toward the second surface and the edge of the third portion toward the second surface are connected, or The edge of the third portion in the direction toward the second surface is closer to the second surface than the edge of the second portion in the direction toward the second surface. 【0014】 Selectively, the semiconductor layer further includes a channel drain region located between the first portion of the body region and the drift region, thereby the source region, the first portion of the body region and the channel drain region are adjacent in order along the direction from the first surface to the second surface and are all adjacent to the first sidewall of the trench gate structure. The channel drain region is further adjacent to the drift region and the second portion of the body region, and the channel drain region and the third portion of the body region are separated by the drift region. The channel drain region is of the first conductivity type. 【0015】 Selectively, the doping concentration in the channel drain region is greater than the doping concentration in the drift region. 【0016】 Selectively, the distance from the edge of the channel drain region toward the second surface to the first surface is less than or equal to the distance from the bottom surface of the trench gate structure to the first surface, or The distance from the edge of the channel drain region toward the second surface to the first surface is greater than the distance from the bottom surface of the trench gate structure to the first surface, and the channel drain region is adjacent to a part of the bottom surface of the trench gate structure. 【0017】 Selectively, the semiconductor layer further includes a channel drain region located between the first portion of the body region and the drift region, thereby the source region, the first portion of the body region and the channel drain region are adjacent in order along the direction from the first surface to the second surface and are all adjacent to the first sidewall of the trench gate structure. The channel drain region further adjoins the second part of the drift region and the body region respectively, and the channel drain region and the third part of the body region are separated by the drift region. The channel drain region has a first conductivity type. The distance from the edge in the direction towards the second surface of the channel drain region to the first surface is a sixth distance. The sixth distance is greater than the second distance, and the third distance is greater than the sixth distance, whereby the channel drain region and the second sub-region are separated by the drift region along the width direction of the trench gate structure. 【0018】 Optionally, the semiconductor layer further includes a body contact region, the body contact region extends in the direction from the first surface towards the second surface, the body contact region is adjacent to the body region. The body contact region is adjacent to the source region or separated by the body region. The body contact region has a second conductivity type. 【0019】 Optionally, along the extending direction of the trench gate structure, a part of the body contact region is adjacent to the second sidewall, there is a gap between another part of the body contact region and the second sidewall, and the part of the body contact region adjacent to the second sidewall and the part having a gap are alternately arranged along the extending direction of the trench gate structure. Or, both the body contact region and the second sidewall are separated by the body region. 【0020】 Optionally, the trench gate structure includes the gate dielectric layer and the gate conductor. The gate dielectric layer covers the inner surface of the trench and a part of the first surface adjacent to the trench, and the trench extends in the direction from the first surface towards the second surface. A portion of the gate conductor is located in the trench, and another portion extends outside the trench and covers the gate dielectric layer. The gate dielectric layer is positioned between the gate conductor and the semiconductor layer so as to separate the gate conductor from the semiconductor layer. 【0021】 Selectively, the semiconductor device is a metal-oxide semiconductor field-effect transistor or an insulated-gate bipolar transistor. 【0022】 Selectively, between the two trench gate structures, the source region extends from the first side wall of one trench gate structure toward the second side wall of the other trench gate structure and is adjacent to the second portion of the body region. [Effects of the Invention] 【0023】 One of the above technical proposals has the following beneficial effects. 【0024】 By placing a heteroepitaxial layer, which acts as a contact layer, on the first surface of the semiconductor layer, the conductive layer forms an electrical connection with the source region via the contact layer, thereby reducing the source-contact resistance and improving the reliability of the semiconductor device. 【0025】 In some embodiments, a portion of the body region is positioned below the bottom surface of the trench gate structure, and the drift region separates the bottom surface of the trench gate structure from this portion of the body region, thereby adjusting the electric field distribution near the bottom and corners of the trench and mitigating the problem of damage to the gate dielectric layer due to excessive electric field concentration at the bottom and corners of the trench. 【0026】 In some embodiments, the channel drain region, the first portion of the body region, and the source region are arranged vertically so that they are sequentially adjacent to the first sidewall of the same trench gate structure, and the length of the channel is controlled by utilizing the position of the channel drain region, thereby increasing the uniformity of the channel length, the uniformity of the portion of the channel that overlaps with the drain region, and the uniformity of the concentration in the drain region, and thereby improving the overall performance of the device. 【0027】 In some embodiments, the distance from the first sidewall of the trench gate structure to the body region gradually increases along the direction from the first surface to the second surface, and when the device is on, the current path that flows from the source region and channel to the second surface gradually widens, thereby reducing the conduction resistance and further improving the performance of the device. 【0028】 In some embodiments, the gate dielectric layer extends from the inner surface of the trench to the first surface of the semiconductor layer, thereby protecting a portion of the trench gate structure adjacent to the first surface of the semiconductor layer. 【0029】 The general descriptions above and the detailed descriptions below are illustrative and interpretive and do not limit this disclosure. [Brief explanation of the drawing] 【0030】 To more clearly illustrate the technical concepts of the embodiments of this disclosure, the drawings of the embodiments are briefly described below. Clearly, the drawings in the following description relate only to some embodiments of this disclosure and not to limitations of this disclosure. 【0031】 [Figure 1] A schematic diagram of the perspective structure of a semiconductor device according to the first embodiment of this disclosure is shown. [Figure 2] A schematic cross-sectional view along line AA in Figure 1 is shown. [Figure 3] A schematic diagram of the structure of a semiconductor device according to the second embodiment of this disclosure is shown. [Figure 4] A schematic diagram of the structure of a semiconductor device according to the third embodiment of this disclosure is shown. [Figure 5] A schematic diagram of the structure of a semiconductor device according to the fourth embodiment of this disclosure is shown. [Figure 6] A schematic diagram of the structure of a semiconductor device according to the fifth embodiment of this disclosure is shown. [Figure 7] A schematic diagram of the structure of a semiconductor device according to the sixth embodiment of this disclosure is shown. [Figure 8] A schematic diagram of the structure of a semiconductor device according to the seventh embodiment of this disclosure is shown. [Figure 9] A schematic diagram of the structure of the semiconductor device according to the eighth embodiment of this disclosure is shown. [Modes for carrying out the invention] 【0032】 The present disclosure will be described in more detail below with reference to the drawings. In each drawing, the same elements are represented by the same reference numerals. For clarity, the parts of the drawings are not drawn proportionally. Also, some known parts may not be shown. For simplicity, a semiconductor structure obtained through several steps can be described in a single figure. 【0033】 When describing the structure of a device, if we say that one layer or region is located "above" or "above" another layer or region, we should understand that it may be directly above the other layer or region, or it may contain other layers or regions between them. Also, if the device is inverted, that layer or region will be located "below" or "below" the other layer or region. 【0034】 To describe cases where a layer or region is directly located on top of another layer or region, this specification uses expressions such as "directly located on..." or "located on and adjacent to...". 【0035】 Power devices generally include an active element region, an edge termination region, and a crack-stop or interruption region. The active element region includes an active element array. This disclosure relates to the active element structure. The dimensions of the active elements may vary depending on the product, and bulk regions may exist between active elements within the active element region. 【0036】 The following describes many specific details of this disclosure, such as the structure, materials, dimensions, processing steps, and technology of the device, to provide a clearer understanding of this disclosure. However, it is not necessary to implement this disclosure in accordance with these specific details, as can be understood by those skilled in the art. 【0037】 Figure 1 shows a schematic perspective view of the semiconductor device of the first embodiment of this disclosure, and Figure 2 shows a schematic cross-sectional view along line AA in Figure 1. In Figure 1, some of the structures on the semiconductor layer are omitted to more clearly show the positional relationships between each structure. 【0038】 As shown in Figures 1 and 2, the semiconductor device of the first embodiment of the present disclosure includes a semiconductor layer 100, a contact layer 190, a plurality of trench gate structures 150, an interlayer dielectric layer 160, and a conductive layer 170. The semiconductor layer 100 has opposing first surfaces 10 and second surfaces 20 and a plurality of trenches 102, the trenches extending from the first surface 10 toward the second surface 20 to the semiconductor layer 100. The plurality of trench gate structures 150 are located in corresponding trenches 102. The semiconductor layer 100 is, for example, a SiC substrate or a laminated structure consisting of a SiC substrate and an epitaxial layer. However, the embodiments of the present disclosure are not limited thereto, and those skilled in the art can provide other materials and number of layers for the semiconductor layer 100 as needed. 【0039】 The semiconductor layer 100 includes a drift region 101, a body region 110, a source region 130, a body contact region 140, and a drain contact region 180. The source region 130 and the drift region 101 are of the first conductivity type, and the body region 110 and the body contact region 140 are of the second conductivity type, with the doping concentration of the body contact region 140 being greater than that of the body region 110. The first conductivity type and the second conductivity type are opposite. The first conductivity type is either P-type or N-type, and the second conductivity type is the other of P-type or N-type. 【0040】 The semiconductor device in this embodiment may be a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT), for example, the conductivity type of the drain contact region 180 may be set to a first conductivity type or a second conductivity type accordingly. However, the embodiments of this disclosure are not limited thereto, and those skilled in the art may, as necessary, provide other conductivity types for each region in the semiconductor layer 100, thereby making the semiconductor device a MOSFET or an IGBT. 【0041】 The trench gate structure 150 includes a gate dielectric layer 151 and a gate conductor 152. The gate dielectric layer 151 covers the inner surface of the trench 102, and the gate conductor 152 is located in the trench 102. The gate dielectric layer 151 is located between the semiconductor layer 100 and the gate conductor 152 so as to separate the semiconductor layer 100 from the gate conductor 152. The trench gate structure 150 has a first side wall 150a, a second side wall 150b, and a bottom surface 150c, with the first side wall 150a and the second side wall 150b facing each other. Multiple trench gate structures 150 extend along the Y-axis and are distributed at intervals along the X-axis (which can be considered the width direction of the trench gate structure 150). Selectively, the X-axis, Y-axis, and Z-axis (along the direction from the second surface 20 to the first surface 10) are perpendicular to each other. Selectively, the X-axis direction is either the <11-20> direction or the <1-100> direction, and the plane of the first side wall 102a and the plane of the second side wall 102b are either the (11-20) plane or the (1-100) plane. 【0042】 The body region 110 includes a first portion 111, a second portion 112, and a third portion 113, which are connected sequentially along the X-axis. The first portion 111 is adjacent to the first side wall 150a of the trench gate structure 150, the second portion 112 is adjacent to the second side wall 150b of the trench gate structure 150, and the third portion 113 is located between the bottom surface 150c and the second surface 20 of the trench gate structure 150, and is adjacent to the bottom surface 150c of the trench gate structure 150. The edge of the second portion 112 in the direction toward the second surface 20 and the edge of the third portion 113 in the direction toward the second surface 20 are substantially flush. Selectively, the first portion 111, the second portion 112, and the third portion 113 have different doping concentrations. 【0043】 The source region 130 extends from the first surface 10 to the second surface 20 of the semiconductor layer 100. The source region 130 and the drift region 101 are separated along the Z-axis by the first portion 111 of the body region 110. Between the two trench gate structures 150, the source region 130 and the first portion 111 are adjacent to the first side wall 150a of the same trench gate structure 150. 【0044】 Selectively, between the two trench gate structures 150, the source region 130 is adjacent to the second portion 112 of the body region 110 by extending from the first side wall 150a of one trench gate structure 150 to the second side wall 150b of the other trench gate structure 150. When the junction depth of the source region 130 is deep, increasing the width of the source region 130 helps to reduce the contact diffusion resistance of the source region 130. 【0045】 The body contact region 140 extends in the direction from the first surface 10 to the second surface 20 of the semiconductor layer 100 and is adjacent to the body region 110. Along the X-axis, between two adjacent trench gate structures 150, one end of the body contact region 140 is adjacent to the source region 130, and the other end is close to the second sidewall 150b of the trench gate structure 150 and is not connected to the second sidewall 150b, and the body contact region 140 and the second sidewall 150b are separated by the body region 110. Selectively, the body contact region 140 and the source region 130 are separated by the body region 110. 【0046】 Selectively, along the Y-axis, a portion of the body contact region 140 is adjacent to the second side wall 150b, while another portion of the body contact region 140 and the second side wall 150b are separated by the body region 110, creating a gap. Along the Y-axis, the portion of the body contact region 140 adjacent to the second side wall 150b and the portion with the gap are arranged alternately. 【0047】 The capacitance from gate to source consists of three parts: the capacitance from the gate conductor 152 to the body region 110, the capacitance from the gate conductor 152 to the body contact region 140, and the capacitance from the gate conductor 152 to the source region 130. The source region 130 is electrically connected to the body region 110. Because the doping concentration of the body contact region 140 is higher than that of the body region 110, and its capacitance per unit area is higher, the total capacitance from gate to source can be adjusted by adjusting the area of the second sidewall 150b that directly contacts the body contact region 140. Depending on the application and system requirements, the requirements for gate charge or the ratio of capacitance from gate to drain / (capacitance from gate to drain + capacitance from gate to source) also differ. For example, when a hard-switched transistor is turned off, the drain voltage may rise sharply, causing the gate to self-turn on due to capacitive coupling. If there is insufficient margin for gate self-turn-on, the margin can be improved by increasing the capacitance from gate to source. 【0048】 The contact layer 190 is located on the first surface 10 of the semiconductor layer 100, adjacent to the source region 130 and the body contact region 140, respectively. A portion of the body region 110 is exposed on the first surface 10, and the contact layer 190 is further adjacent to this portion of the body region 110 that is exposed on the first surface 10. The contact layer 190 is a heteroepitaxial layer of the crystal structure of the semiconductor layer 100, and optionally, the contact layer 190 includes one or more of the Si layer, SiGe layer, GaN layer, and GaAs layer. The heteroepitaxial layer may be another semiconductor crystalline material or a crystalline material with less in-situ impurity doping. The thickness of the contact layer 190 is at the atomic layer level; for example, the thickness of the buffer layer 190 is the thickness of one atomic layer, or two to three atomic layers, so as not to create a large barrier to carrier flow. 【0049】 The conductive layer 170 is located on the first surface 10 of the semiconductor layer 100 and is adjacent to the contact layer 190. The conductive layer 170 is electrically connected to the body region 110, the source region 130, and the body contact region 140, respectively, via the contact layer 190. The interlayer dielectric layer 160 is located between the semiconductor layer 100 and the conductive layer 170, and the interlayer dielectric layer 160 and the gate structure 150 are installed in correspondence to separate the conductive layer 170 from the trench gate structure 150. 【0050】 In this embodiment, the conductive layer 170 is a source metal layer, and the conductive layer 170 and the interlayer dielectric layer 160 may be a multilayer structure of different materials. An example of a multilayer source metal layer is that the source metal layer includes a tungsten (W) layer directly covering the contact layer 190 and an aluminum copper (AlCu) layer directly covering the tungsten layer. This embodiment optionally further includes parts not shown, for example, connecting the gate conductor 152 and the gate metal layer by opening a gate contact region directly above the gate conductor 152, the gate contact region being located directly on the gate conductor 152, and the gate conductor 152 being separated from the source metal layer via the interlayer dielectric layer 160. 【0051】 In this embodiment, a heteroepitaxial layer, which is a contact layer 190, is placed on the first surface 10 of the semiconductor layer 100, and the conductive layer 170 forms an electrical connection with the source region 130 via the contact layer 190, thereby reducing the source-contact resistance and improving the reliability of the semiconductor device. 【0052】 At least a portion of the drift region 101 is located between the body region 110 and the second surface 20, adjacent to the second portion 112 and the third portion 113 of the body region 110, the bottom surface 102c of the trench gate structure 150, and the drain contact region 180, respectively, the drain contact region 180 extending from the second surface 20 of the semiconductor layer 100 toward the first surface 10. 【0053】 Furthermore, the semiconductor device of this embodiment further includes a drain metal layer (not shown) located on the second surface 20 of the semiconductor layer 100 and connected to the drain contact region 180. 【0054】 In this embodiment, by providing a plurality of recesses 11 on the first surface 10 of the semiconductor layer 100, the conductive layer 170 extends to the recesses 11 adjacent to the first surface 10 of the conductive layer 170. This increases the contact area between the conductive layer 170 and the source region 130 per unit area, reduces source contact resistance, and improves the reliability of the semiconductor device. 【0055】 Figure 3 shows a schematic diagram of the structure of a semiconductor device according to the second embodiment of this disclosure. 【0056】 As shown in Figure 3, the semiconductor device of the second embodiment of this disclosure is similar to that of the first embodiment and will not be described further here; please refer to the descriptions in Figures 1 and 2. The differences are as follows: In this embodiment, along the Z-axis direction, at least a portion of the bottom surface 150c of the trench gate structure 150 and the third portion 113 of the body region 110 are separated by a drift region 101. Selectively, the third portion 113 is adjacent to the bottom surface 150c near the corner of the second side wall 150b and the bottom surface 150c. Selectively, the third portion 113 and the bottom surface 150c are completely separated by the drift region 101. Selectively, the second portion 112 of the body region 110 and the second side wall 150b of the trench gate structure 150 are separated by the drift region 101. 【0057】 In this embodiment, the drift region 101 separates the bottom surface 150c of the trench gate structure 150 from the third portion 113 of the body region 110, thereby adjusting the electric field distribution near the bottom and corners of the trench 102 and mitigating the problem of damage to the gate dielectric layer 151 due to excessive electric field concentration at the bottom and corners of the trench 102. 【0058】 Figure 4 shows a schematic diagram of the structure of a semiconductor device according to the third embodiment of this disclosure. 【0059】 As shown in Figure 4, the semiconductor device of the third embodiment of this disclosure is similar to that of the first embodiment and will not be explained further here; please refer to the descriptions in Figures 1 and 2. The differences are as follows: The semiconductor layer 100 of this embodiment further includes a channel drain region 120, the channel drain region 120 is of the first conductivity type, and the doping concentration of the channel drain region 120 is greater than the doping concentration of the drift region 101. 【0060】 The channel drain region 120 is located between the first portion 111 of the body region 110 and the drift region 101, thereby the source region 130, the first portion 111 of the body region 110, and the channel drain region 120 are adjacent to each other in order along the direction from the first surface 10 to the second surface 20. Between the two trench gate structures 150, the first portion 111, the channel drain region 120, and the source region 130 are all adjacent to the first side wall 150a of the same trench gate structure 150. The channel drain region 120 is close to the bottom surface 150c of the trench gate structure 150 and adjacent to the second portion 112. The channel drain region 120 and the third portion 113 of the body region 110 are separated by the drift region 101. Selectively, the distance from the edge of the channel drain region 120 toward the second surface 20 to the first surface 10 is less than or equal to the distance from the bottom surface 150c of the trench gate structure 150 to the first surface 10. Selectively, the distance from the edge of the channel drain region 120 toward the second surface 20 to the first surface 10 is greater than the distance from the bottom surface 150c of the trench gate structure 150 to the first surface 10, and the channel drain region 120 is adjacent to a portion of the bottom surface 150c of the trench gate structure 150. 【0061】 In this embodiment, when the semiconductor device is in the ON state, the conductivity of the portion adjacent to the first side wall 102a of the trench 102 in the first portion 111 of the body region 110 is reversed, thereby forming a channel. By installing the channel drain region 120 on the bottom surface 150c adjacent to the trench gate structure 150, the length of the channel can be precisely controlled, thereby increasing the uniformity of the lengths of multiple channels in the semiconductor device. Furthermore, by installing the channel drain region 120, the uniformity of the portion overlapping with the drain region of the channel and the uniformity of the concentration in the drain region can be further increased, thereby improving the overall performance of the device. 【0062】 In some specific embodiments, the channel drain region 120 and the source region 130 are formed in the same process step to more precisely control the channel length and further improve the uniformity of the channel length. 【0063】 Figure 5 shows a schematic diagram of the structure of a semiconductor device according to the fourth embodiment of this disclosure. 【0064】 As shown in Figure 5, the aspects of the semiconductor device of the fourth embodiment of this disclosure that are the same as those of the third embodiment will not be explained further here, and should be referred to in the description in Figure 4. The differences are as follows: In this embodiment, along the Z-axis direction, at least a portion of the bottom surface 150c of the trench gate structure 150 and the third portion 113 of the body region 110 are separated by a drift region 101. Selectively, the third portion 113 is adjacent to the bottom surface 150c near the corner of the second side wall 150b and the bottom surface 150c. Selectively, the third portion 113 and the bottom surface 150c are completely separated by the drift region 101. Selectively, the second portion 112 of the body region 110 and the second side wall 150b of the trench gate structure 150 are separated by the drift region 101. 【0065】 In this embodiment, the drift region 101 separates the bottom surface 150c of the trench gate structure 150 from the third portion 113, thereby adjusting the electric field distribution near the bottom and corners of the trench 102 and mitigating the problem of damage to the gate dielectric layer 151 due to excessive electric field concentration at the bottom and corners of the trench 102. 【0066】 Figure 6 shows a schematic diagram of the structure of a semiconductor device according to the fifth embodiment of this disclosure. 【0067】 As shown in Figure 6, the fact that it is the same as the second embodiment of the semiconductor device of the fifth embodiment of this disclosure does not need to be explained further here, and you can refer to the description in Figure 3. The differences are as follows: In this embodiment, the second portion 112 of the body region 110 includes a connected first sub-region 112a and a second sub-region 112b. Along the X-axis, the first sub-region 112a is adjacent to the first portion 111 of the body region 110, and the second sub-region 112b is adjacent to the third portion 113 of the body region 110. 【0068】 The distance from the edge of the first part 111 in the direction toward the second surface 20 to the first surface 10 is the first distance d1, the distance from the edge of the first sub-region 112a in the direction toward the second surface 20 to the first surface 10 is the second distance d2, and the distance from the edge of the second sub-region 112b in the direction toward the second surface 20 to the first surface 10 is the third distance d3, where the third distance d3 is greater than the second distance d2, and the second distance d2 is greater than the first distance d1. 【0069】 In this embodiment, by adjusting the distance d2 from the bottom edge of the first sub-region 112a to the first surface, the edge adjacent to the first sidewall 150a of the body region 110 becomes stepped, and the distance from the first sidewall 150a to the second portion 112 of the body region 110 gradually increases along the direction from the first surface 10 to the second surface 20. When the device is on, the current path that flows from the source region 130 and the channel to the second surface 20 gradually widens, thereby reducing the conduction resistance and further improving the performance of the device. 【0070】 Selectively, the distance from the bottom surface 150c of the trench gate structure 150 to the first surface 10 is the fourth distance d4, and the second distance d2 is greater than or equal to the fourth distance d4, thereby reducing the effect of the high electric field at the bottom of the trench 102. 【0071】 Selectively, the distance at which the drift region 101 separates the third portion 111 of the body region 110 and the bottom surface 150c of the trench gate structure 150 along the Z-axis is the fifth distance d5, and the sum of the fourth distance d4 and the fifth distance d5 is equal to the second distance d2, so that the bottom surface 112-1 of the second sub-region 112b and the separation surface 113-1 of the third portion 113 of the body region 110 are approximately flush. This allows for controlling the depth of the second sub-region 112b to an appropriate degree and avoids limiting the usefulness of charge compensation in reducing on-resistance due to the second distance d2 being too large. 【0072】 Figure 7 shows a schematic diagram of the structure of a semiconductor device according to the sixth embodiment of this disclosure. 【0073】 As shown in Figure 7, the fact that it is the same as the third embodiment of the semiconductor device of the sixth embodiment of this disclosure does not need to be explained further here, and you can refer to the description in Figure 4. The differences are as follows: In this embodiment, the second portion 112 of the body region 110 includes a connected first sub-region 112a and a second sub-region 112b. Along the X-axis, the first sub-region 112a is adjacent to the first portion 111 of the body region 110, and the second sub-region 112b is adjacent to the third portion 113 of the body region 110. 【0074】 The distance from the edge of the first part 111 in the direction toward the second surface 20 to the first surface 10 is the first distance d1, the distance from the edge of the first sub-region 112a in the direction toward the second surface 20 to the first surface 10 is the second distance d2, and the distance from the edge of the second sub-region 112b in the direction toward the second surface 20 to the first surface 10 is the third distance d3, where the third distance d3 is greater than the second distance d2, and the second distance d2 is greater than the first distance d1. 【0075】 In this embodiment, by adjusting the distance d2 from the bottom edge of the first sub-region 112a to the first surface, the edge adjacent to the first sidewall 150a of the body region 110 becomes stepped, and the distance from the first sidewall 150a to the second portion 112 of the body region 110 gradually increases along the direction from the first surface 10 to the second surface 20. When the device is on, the current path that flows from the source region 130 and the channel to the second surface 20 gradually widens, thereby reducing the conduction resistance and further improving the performance of the device. 【0076】 Selectively, the distance from the edge of the channel drain region 120 toward the second surface 20 to the first surface 10 is the sixth distance d6, and the sixth distance d6 is greater than the second distance d2, and the third distance d3 is greater than the sixth distance d6, thereby separating a portion of the channel drain region 120 and the second sub-region 112b along the X-axis direction by the drift region 101. 【0077】 Figure 8 shows a schematic diagram of the structure of a semiconductor device according to the seventh embodiment of this disclosure. 【0078】 As shown in Figure 8, the features of the semiconductor device of the seventh embodiment of this disclosure are the same as those of the sixth embodiment and will not be explained further here; please refer to the description in Figure 7. The differences are as follows: In this embodiment, along the Z-axis direction, at least a portion of the bottom surface 150c of the trench gate structure 150 and the third portion 113 of the body region 110 are separated by a drift region 101. Selectively, the third portion 113 is adjacent to the bottom surface 150c near the corner of the second side wall 150b and the bottom surface 150c. Selectively, the third portion 113 and the bottom surface 150c are completely separated by the drift region 101. Selectively, the second portion 112 of the body region 110 and the second side wall 150b of the trench gate structure 150 are separated by the drift region 101. 【0079】 In this embodiment, the drift region 101 separates the bottom surface 150c of the trench gate structure 150 from the third portion 113, thereby adjusting the electric field distribution near the bottom and corners of the trench 102 and mitigating the problem of damage to the gate dielectric layer 151 due to excessive electric field concentration at the bottom and corners of the trench 102. 【0080】 Figure 9 shows a schematic diagram of the structure of a semiconductor device according to the eighth embodiment of this disclosure. 【0081】 As shown in Figure 9, the eighth embodiment of the semiconductor device of this disclosure is similar to the first embodiment and will not be explained further here; please refer to the descriptions in Figures 1 and 2. The differences are as follows: In this embodiment, a portion of the trench gate structure 150 is located within the trench 102, and another portion is located above the first surface 10. Specifically, the gate dielectric layer 151 covers the inner surface of the trench 102 and a portion of the first surface 10 adjacent to the trench 102, and a portion of the gate conductor 152 is located in the trench 102, while another portion extends outside the trench 102 and covers the gate dielectric layer 151 located on the first surface 10. 【0082】 The trench gate structure 150 in this embodiment extends from inside the trench 102 to the first surface 10, protecting a portion of the first surface 10 adjacent to the trench 102 and reducing manufacturing damage to the portion of the first surface 10 adjacent to the trench 102. 【0083】 Optionally, in the semiconductor device of the eighth embodiment of the present disclosure, at least a portion of the bottom surface 150c of the trench gate structure 150 and the third portion 113 may be separated by a drift region 101 along the Z-axis direction, as in the second, fourth, fifth, and seventh embodiments of the present disclosure. 【0084】 Optionally, in the semiconductor device of the eighth embodiment of this disclosure, a channel drain region 120 may be provided, as in the third, fourth, sixth, and seventh embodiments of this disclosure. 【0085】 Optionally, in the semiconductor device of the eighth embodiment of this disclosure, a first sub-region 112a and a second sub-region 112b may be provided, as in the fifth, sixth, and seventh embodiments of this disclosure. 【0086】 Examples of the present disclosure have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is limited by the appended claims and equivalents. Without departing from the scope of the present disclosure, various substitutions and modifications can be made by those skilled in the art, and such substitutions and modifications should fall within the scope of the present disclosure.
Claims
[Claim 1] A semiconductor device comprising a semiconductor layer, a trench gate structure, a contact layer, and a conductive layer, wherein the semiconductor layer has opposing first and second surfaces, and at least a portion of the trench gate structure is located in a trench of the first surface of the semiconductor layer. The aforementioned semiconductor layer is A source region extending from the first surface toward the second surface, A drift region and a body region, wherein at least a portion of the drift region is located between the body region and the second surface of the semiconductor layer, The first portion of the body region is located between the source region and the drift region along the direction from the first surface to the second surface, and both the first portion of the body region and the source region are adjacent to the first side wall of the trench. The contact layer is a heteroepitaxial layer of the semiconductor layer, located on the first surface of the semiconductor layer and adjacent to the source region. The conductive layer is adjacent to the contact layer and is electrically connected to the source region via the contact layer. The source region and the drift region are of the first conductivity type, and the body region is of the second conductivity type, and the first conductivity type and the second conductivity type are opposite to each other. The first, second, and third portions of the body region are adjacent to each other in order along the width direction of the trench gate structure. The body region and the second surface are separated by the drift region. The first and second portions of the body region are located between the two trench gate structures, the first portion is adjacent to the first side wall of the trench gate structure, the second portion is close to the second side wall of the trench gate structure, and the first and second side walls face each other. The third portion and the second portion are adjacent to the same trench gate structure, and the third portion is located between the bottom surface of the trench gate structure and the second surface, and the third portion and the first portion are separated by the drift region. The third portion of the body region extends from a part of the bottom surface of the trench gate structure toward the second surface, or A semiconductor device in which at least a portion of the bottom surface of the trench gate structure and a third portion of the body region are separated by the drift region along the direction from the first surface to the second surface. [Claim 2] The semiconductor device according to claim 1, wherein the semiconductor layer includes a SiC semiconductor layer, and the contact layer includes one or more of a Si layer, a SiGe layer, a GaN layer, and a GaAs layer. [Claim 3] The semiconductor device according to claim 1, wherein the thickness of the contact layer includes the thickness of one or more atomic layers. [Claim 4] The semiconductor device according to claim 1, wherein the contact layer has a crystalline structure. [Claim 5] The semiconductor device according to claim 1, wherein the second portion is adjacent to the second sidewall, or the second portion and the second sidewall are separated by the drift region. [Claim 6] The second portion of the body region includes a first subregion and a second subregion that are connected, Along the width direction of the trench gate structure, the first sub-region is adjacent to the first portion of the body region, and the second sub-region is adjacent to the third portion of the body region. The distance from the edge of the first portion of the body region toward the second surface to the first surface is the first distance, the distance from the edge of the first sub-region toward the second surface to the first surface is the second distance, and the distance from the edge of the second sub-region toward the second surface to the first surface is the third distance. The semiconductor device according to claim 5, wherein the third distance is greater than the second distance, and the second distance is greater than the first distance. [Claim 7] The semiconductor device according to claim 6, wherein the distance from the bottom surface of the trench gate structure to the first surface is the fourth distance, and the second distance is greater than or equal to the fourth distance. [Claim 8] Along the direction from the second surface toward the first surface, the distance from the bottom surface of the trench gate structure to the first surface is the fourth distance, and the distance at which the third portion of the body region and the bottom surface of the trench gate structure are separated by the drift region is the fifth distance. The semiconductor device according to claim 6, wherein the sum of the fourth distance and the fifth distance is equal to the second distance. [Claim 9] The edge of the second portion of the body region toward the second surface and the edge of the third portion toward the second surface are connected, or The semiconductor device according to any one of claims 5 to 8, wherein the edge of the third portion in the direction toward the second surface is closer to the second surface than the edge of the second portion in the direction toward the second surface. [Claim 10] The semiconductor layer further includes a channel drain region located between the first portion of the body region and the drift region, thereby the source region, the first portion of the body region and the channel drain region are adjacent to each other in order along the direction from the first surface to the second surface and are all adjacent to the first sidewall of the trench gate structure. The channel drain region is further adjacent to the drift region and the second portion of the body region, and the channel drain region and the third portion of the body region are separated by the drift region. The semiconductor device according to any one of claims 1 to 8, wherein the channel drain region is of a first conductivity type. [Claim 11] The semiconductor device according to claim 10, wherein the doping concentration of the channel drain region is greater than the doping concentration of the drift region. [Claim 12] The distance from the edge of the channel drain region toward the second surface to the first surface is less than or equal to the distance from the bottom surface of the trench gate structure to the first surface, or The semiconductor device according to claim 10, wherein the distance from the edge of the channel drain region toward the second surface to the first surface is greater than the distance from the bottom surface of the trench gate structure to the first surface, and the channel drain region is adjacent to a part of the bottom surface of the trench gate structure. [Claim 13] The semiconductor layer further includes a channel drain region located between the first portion of the body region and the drift region, thereby the source region, the first portion of the body region and the channel drain region are adjacent to each other in order along the direction from the first surface to the second surface and are all adjacent to the first sidewall of the trench gate structure. The channel drain region is further adjacent to the drift region and the second portion of the body region, and the channel drain region and the third portion of the body region are separated by the drift region. The channel drain region is of the first conductivity type, The distance from the edge of the channel drain region toward the second surface to the first surface is the sixth distance. The semiconductor device according to claim 6, wherein the sixth distance is greater than the second distance, and the third distance is greater than the sixth distance, thereby separating the channel drain region and the second sub-region by the drift region along the width direction of the trench gate structure. [Claim 14] The semiconductor layer further includes a body contact region, the body contact region extends in the direction from the first surface to the second surface, and the body contact region is adjacent to the body region. The body contact region is adjacent to the source region or separated by the body region. The semiconductor device according to any one of claims 1 to 8, wherein the body contact region is of the second conductive type. [Claim 15] Along the extending direction of the trench gate structure, a portion of the body contact region is adjacent to the second side wall of the trench gate structure, and there is a gap between another portion of the body contact region and the second side wall, and the portion of the body contact region adjacent to the second side wall and the portion with the gap are arranged alternately along the extending direction of the trench gate structure. Alternatively, the semiconductor device according to claim 14, wherein both the body contact region and the second side wall are separated by the body region. [Claim 16] The trench gate structure includes a gate dielectric layer and a gate conductor. The gate dielectric layer covers the inner surface of the trench and a portion of the first surface adjacent to the trench, and the trench extends from the first surface toward the second surface. A portion of the gate conductor is located in the trench, and another portion extends outside the trench and covers the gate dielectric layer. The semiconductor device according to any one of claims 1 to 8, wherein the gate dielectric layer is located between the gate conductor and the semiconductor layer so as to separate the gate conductor and the semiconductor layer. [Claim 17] The semiconductor device according to any one of claims 1 to 8, wherein the semiconductor device is a metal-oxide semiconductor field-effect transistor or an insulated gate bipolar transistor. [Claim 18] The semiconductor device according to any one of claims 5 to 8, wherein, between two trench gate structures, the source region extends from a first sidewall of one trench gate structure toward a second sidewall of the other trench gate structure and is adjacent to a second portion of the body region.