Semiconductor equipment
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2025-06-05
- Publication Date
- 2026-06-17
Smart Images

Figure 0007875349000001 
Figure 0007875349000002 
Figure 0007875349000003
Abstract
Claims
1. Having a first transistor to a fifth transistor, Either the source or the drain of the first transistor is always in electrical contact with the first wiring. The source or drain of the first transistor is always in electrical contact with the second wiring. The gate of the first transistor is always in electrical contact with the third wiring. Either the source or the drain of the second transistor is always in electrical contact with the first wiring. The source or drain of the second transistor is always in electrical contact with the source or drain of the third transistor. The source or drain of the third transistor is always in electrical contact with the fourth wiring. The gate of the third transistor is always in electrical contact with the fifth wiring. Either the source or drain of the fourth transistor is always in contact with the gate of the second transistor. The source or drain of the fourth transistor is always in electrical contact with the fourth wiring. Either the source or the drain of the fifth transistor is always in contact with the gate of the second transistor. The source or drain of the fifth transistor is always in contact with the gate of the second transistor. The gate of the fifth transistor is always in electrical contact with the sixth wiring. The sixth wiring comprises a period during which a first potential is applied to the sixth wiring, and a period during which a second potential lower than the first potential is applied to the sixth wiring. Semiconductor equipment.
2. Having a first transistor to a fifth transistor, Either the source or the drain of the first transistor is always in electrical contact with the first wiring. The source or drain of the first transistor is always in electrical contact with the second wiring. The gate of the first transistor is always in electrical contact with the third wiring. Either the source or the drain of the second transistor is always in electrical contact with the first wiring. The source or drain of the second transistor is always in electrical contact with the source or drain of the third transistor. The source or drain of the third transistor is always in electrical contact with the fourth wiring. The gate of the third transistor is always in electrical contact with the fifth wiring. Either the source or drain of the fourth transistor is always in contact with the gate of the second transistor. The source or drain of the fourth transistor is always in electrical contact with the fourth wiring. Either the source or the drain of the fifth transistor is always in contact with the gate of the second transistor. The source or drain of the fifth transistor is always in contact with the gate of the second transistor. The gate of the fifth transistor is always in electrical contact with the sixth wiring. The gate of the fourth transistor is provided with a potential that causes the fourth transistor to conduct or a potential that causes the fourth transistor to become non-conductive. When the fourth transistor is conducting, the potential of the fourth wiring is applied to the gate of the second transistor via the fourth transistor. The sixth wiring comprises a period during which a first potential is applied to the sixth wiring, and a period during which a second potential lower than the first potential is applied to the sixth wiring. Semiconductor equipment.
3. In Claim 1 or Claim 2, Each of the first to fifth transistors has the same polarity. Semiconductor equipment.