Semiconductor equipment
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SEMICON ENERGY LAB CO LTD
- Filing Date
- 2025-06-11
- Publication Date
- 2026-06-17
Smart Images

Figure 0007875350000025 
Figure 0007875350000026 
Figure 0007875350000027
Abstract
Claims
1. A first insulating film, An oxide semiconductor film disposed above the first insulating film and having a channel formation region for the first transistor, The source electrode and drain electrode of the first transistor are electrically connected to the oxide semiconductor film and have regions in contact with the oxide semiconductor film, The gate insulating film of the first transistor having a region positioned above the oxide semiconductor film, The gate electrode of the first transistor is positioned above the gate insulating film and has a region in contact with the gate insulating film, A second insulating film having a region positioned above the gate electrode of the first transistor, A wiring having a region positioned above the second insulating film, The gate electrode of the second transistor, which is positioned below the first insulating film, The second transistor has a channel forming region located below the gate electrode of the second transistor, The channel formation region of the second transistor has silicon, The first insulating film has a first region that does not overlap with the oxide semiconductor film and a second region that overlaps with the oxide semiconductor film. The film thickness in the first region is smaller than the film thickness in the second region. The source electrode or drain electrode of the first transistor is electrically connected to the source region or drain region of the second transistor via a first contact hole that penetrates the first region. The gate electrode of the first transistor is electrically connected to the wiring, A semiconductor device in which the wiring is electrically connected to the gate electrode of the second transistor via a second contact hole that penetrates the first region.
2. In Claim 1, A semiconductor device in which, when nanobeam electron diffraction is performed on the oxide semiconductor film, multiple spots are observed within a ring-shaped region.
3. In claim 1 or 2, A semiconductor device wherein the gate electrode of the first transistor has a region in which the bottom surface of the gate electrode of the first transistor is located below the bottom surface of the oxide semiconductor film.
4. In any one of claims 1 to 3, The first transistor is of the n-channel type, The second transistor described above is a p-channel type, The first transistor and the second transistor constitute a semiconductor device that forms an inverter.