Electro-optical devices and electronic equipment

Abstract

To provide an electro-optical device which achieves both optical performance of a lens and reliability of electrical connection between a pixel electrode and a transistor.SOLUTION: A liquid crystal device 300 comprises: a transistor 1; a pixel electrode 10 which is provided correspondingly to the transistor 1; a lens layer 34 which is provided in a layer between the transistor 1 and the pixel electrode 10; a relay layer 30 which is provided in a layer between the transistor 1 and the lens layer 34; and a contact plug 31 which electrically connects the relay layer 30 with the pixel electrode 10. A portion of the contact plug 31 is provided in the relay layer 30.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] The present invention relates to an electro-optical device and an electronic device including the electro-optical device.

Background Art

[0002] An electro-optical device including a pixel electrode formed on a substrate body of a device substrate, a switching element formed between the pixel electrode and the substrate, and a lens formed between the pixel electrode and the switching element is described in Patent Document 1. In the device of Patent Document 1, the depth of a contact hole that electrically connects between the pixel electrode and the switching element is shallower than the depth of a concave surface for the lens.

[0003] This configuration is such that the aspect ratio of the contact hole is increased so that the reliability of the electrical connection is not reduced. Therefore, a relay electrode that relays the contact hole is provided at a position shallower than the bottom of the concave surface for the lens between adjacent lenses.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The applicant of the present application has come to the finding that forming a relay electrode at a position shallower than the bottom of the concave surface for the lens between adjacent lenses may affect the optical performance of the lens through experiments, prototypes, etc. by the inventors and the like. The present invention is made in view of the above finding, for example, and an object thereof is to provide an electro-optical device capable of achieving both the optical performance of a lens and the reliability of an electrical connection between a pixel electrode and a switching element.

Means for Solving the Problems

[0006] An electro-optical apparatus according to one aspect of the present application includes a transistor, a pixel electrode provided corresponding to the transistor, and a lens layer provided in the layer between the transistor and the pixel electrode. A first light-transmitting layer provided in the layer between the transistor and the lens layer, a first relay layer provided in the layer between the lens layer and the pixel electrode, a second relay layer provided in the layer between the first light-transmitting layer and the lens surface of the lens layer, a third relay layer provided between the transistor and the first light-transmitting layer, and a layer provided penetrating the lens layer. The first relay layer and The aforementioned second relay layer and to connect electrically The first 1. Connecting member and A terminal comprising: a second connecting member that penetrates the first light-transmitting layer and, in a plan view, overlaps with the first connecting member, and electrically connects the second relay layer and the third relay layer; a first conductive layer provided in the same layer as the first relay layer, a second conductive layer provided in the same layer as the second relay layer, a transparent conductive layer provided in the same layer as the pixel electrode, an interlayer insulating layer provided in the same layer as the lens layer and made of the same material as the lens layer, and a third connecting member provided in the same layer as the first connecting member, penetrating the interlayer insulating layer, and electrically connecting the first conductive layer and the second conductive layer; Equipped with, The thickness of the lens layer at the position through which the first connecting member penetrates is thinner than the thickness of the interlayer insulating layer at the position through which the third connecting member penetrates, the first connecting member penetrates the second relay layer and its end is located within the recess of the second connecting member, and the end of the third connecting member is located within the recess of the second conductive layer .

[0007] An electronic device according to one aspect of the present application comprises the electro-optical device described above. [Brief explanation of the drawing]

[0008] [Figure 1] A plan view of the electro-optical apparatus according to Embodiment 1. [Figure 2] Cross-sectional view of the electro-optical apparatus along line II-II in Figure 1. [Figure 3] An equivalent circuit diagram showing the electrical configuration of the element substrate. [Figure 4] An explanatory diagram showing the cross-sectional structure of the display area on the element substrate. [Figure 5] A plan view showing a portion of the display area on the element substrate. [Figure 6] A cross-sectional view along the line VI-VI in Figure 5. [Figure 7] A plan view showing a portion of the display area on the element substrate. [Figure 8] A plan view showing a portion of the display area on the element substrate. [Figure 9] A plan view showing a portion of the display area on the element substrate. [Figure 10] A plan view showing a portion of the display area on the element substrate. [Figure 11] A plan view showing a portion of the display area on the element substrate. [Figure 12] An explanatory diagram showing the cross-sectional structure of the outer region of the element substrate. [Figure 13] A plan view showing a portion of the outer region of the element substrate. [Figure 14]Cross-sectional view showing a part of the cross-sectional structure along line XIV-XIV of FIG. 13. [Figure 15] Planar view showing a part of the display area of the element substrate according to Embodiment 2. [Figure 16] Schematic diagram showing an example of an electronic device according to Embodiment 3.

MODE FOR CARRYING OUT THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, for the sake of easy viewing of each component, the scale of dimensions may be shown differently depending on the components. In addition, hereinafter, for the sake of convenience of explanation, the X-axis, Y-axis, and Z-axis orthogonal to each other will be appropriately used for explanation. In addition, one direction along the X-axis is denoted as the X1 direction, and the direction opposite to the X1 direction is denoted as the X2 direction. Similarly, one direction along the Y-axis is denoted as the Y1 direction, and the direction opposite to the Y1 direction is denoted as the Y2 direction. One direction along the Z-axis is denoted as the Z1 direction, and the direction opposite to the Z1 direction is denoted as the Z2 direction. In addition, hereinafter, looking in the Z1 direction or Z2 direction is referred to as "planar view", and looking from a direction perpendicular to the cross-section including the Z-axis is referred to as "cross-sectional view".

[0010] Furthermore, in the following description, for example, with respect to the substrate, the description "on the substrate" includes any of the cases where it is disposed in contact with the upper surface of the substrate, where it is disposed via another structure on the substrate, or where a part is disposed in contact with the upper surface of the substrate and a part is disposed via another structure. In addition, the description of the upper surface of a certain structure indicates the surface on the Z1 direction side of the said structure, for example, the "upper surface of the light-transmitting layer" indicates the surface on the Z1 direction side of the light-transmitting layer. In addition, the description of the bottom surface of a certain structure indicates the surface on the Z2 direction side of the said structure, for example, the "bottom surface of the contact plug" indicates the surface on the Z2 direction side of the contact plug.

[0011] 1. Embodiment 1 In this embodiment, as an electro-optical device, an active driving type liquid crystal device having a TFT (Thin Film Transistor) as a switching element for each pixel will be described as an example. This liquid crystal device is used, for example, as a light modulation device in a projection display device as an electronic device described later.

[0012] 1.1. Outline of the Structure of the Liquid Crystal Device The structure of the liquid crystal device as the electro-optical device according to this embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 shows a plan view of the electro-optical device according to Embodiment 1, and shows a schematic plan configuration of a transmissive liquid crystal device 300 as the electro-optical device. FIG. 2 is a cross-sectional view of the electro-optical device taken along line II-II of FIG. 1, and shows a schematic cross-sectional configuration of the liquid crystal device 300.

[0013] As shown in FIGS. 1 and 2, the liquid crystal device 300 includes a light-transmissive element substrate 100, a light-transmissive counter substrate 200, a frame-shaped seal member 8, and a liquid crystal layer Lc. Note that "light-transmissive" means transmissivity with respect to visible light, and preferably means that the transmittance of visible light is 50% or more.

[0014] The liquid crystal device 300 has a display area A1 for displaying an image and an outer area A2 located outside the display area A1 in a plan view. A plurality of pixels P arranged in a matrix are provided in the display area A1. Note that the shape of the liquid crystal device 300 shown in FIG. 1 is a rectangle, but it may be, for example, a circle.

[0015] As shown in FIG. 2, the element substrate 100 and the counter substrate 200 are arranged via the liquid crystal layer Lc. In this embodiment, the counter substrate 200 is arranged on the light incident side of the liquid crystal layer Lc, and the element substrate 100 is arranged on the light emission side of the liquid crystal layer Lc. The incident light IL incident on the counter substrate 200 is modulated by the liquid crystal layer Lc and emitted from the element substrate 100 as modulated light ML.

[0016] The element substrate 100 has a base body 90, multiple interlayer insulating layers including an interlayer insulating layer 82, a pixel electrode 10, and an alignment film 12. Although not shown in the figures, a lens layer 34, which will be described later, is provided between the pixel electrode 10 and the interlayer insulating layer 82.

[0017] The substrate 90 is a translucent and insulating flat plate. The substrate 90 is, for example, a glass substrate or a quartz substrate. Transistors 1, described later, are arranged between the layers of the multiple interlayer insulating layers. The pixel electrode 10 is translucent. The pixel electrode 10 includes, for example, transparent conductive materials such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and FTO (Fluorine-doped tin oxide). The thickness direction of the pixel electrode 10 coincides with the Z1 or Z2 direction. The alignment film 12 is transparent and insulating. The alignment film 12 aligns the liquid crystal molecules of the liquid crystal layer Lc. Examples of materials for the alignment film 12 include silicon dioxide or polyimide.

[0018] The opposing substrate 200 is a substrate positioned opposite the element substrate 100. The opposing substrate 200 has a base body 210, an insulating layer 220, a common electrode 230, and an alignment film 240.

[0019] The substrate 210 is a translucent and insulating plate. The substrate 210 is, for example, a glass substrate or a quartz substrate. The insulating layer 220 is translucent and insulating. The material of the insulating layer 220 is, for example, an inorganic material such as silicon oxide. The common electrode 230 is an electrode positioned opposite to a plurality of pixel electrodes 10, and can be rephrased as a counter electrode. The common electrode 230 includes, for example, a transparent conductive material such as ITO, IZO, and FTO. The common electrode 230 and the pixel electrodes 10 apply an electric field to the liquid crystal layer Lc. The alignment film 240 is translucent and insulating.

[0020] The sealing member 8 is placed between the element substrate 100 and the opposing substrate 200. The sealing member 8 is formed using an adhesive containing various curable resins, such as epoxy resin. The sealing member 8 may also include a gap material made of an inorganic material such as glass.

[0021] The liquid crystal layer Lc is located within a region enclosed by the element substrate 100, the opposing substrate 200, and the sealing member 8. The liquid crystal layer Lc is located between a plurality of pixel electrodes 10 and a common electrode 230. The liquid crystal layer Lc is an electro-optic layer whose optical properties change in response to an electric field. The liquid crystal layer Lc contains liquid crystal molecules having positive or negative dielectric anisotropy. The orientation of the liquid crystal molecules changes in response to the electric field applied to the liquid crystal layer Lc. The liquid crystal layer Lc modulates the incident light IL in response to the applied electric field.

[0022] As shown in Figure 1, multiple scan line drive circuits 6, data line drive circuits 7, and multiple external terminals 9 are arranged in the outer region A2 of the element substrate 100. Some of the multiple external terminals 9 are connected to the scan line drive circuits 6 or data line drive circuits 7 via wiring (not shown). In addition, the multiple external terminals 9 include terminals to which a common potential is applied from the outside.

[0023] 1.2. Electrical configuration of the element substrate Figure 3 is an equivalent circuit diagram showing the electrical configuration of the element substrate. As shown in Figure 3, the display area A1 of the element substrate 100 is provided with multiple transistors 1 as switching elements, n scan lines 3, m data lines 4, and n capacitance lines 5. n and m are integers of 2 or more. Transistors 1 are arranged corresponding to each intersection of the n scan lines 3 and the m data lines 4.

[0024] Each of the n scan lines 3 extends in the X1 direction, and the n scan lines 3 are arranged at equal intervals in the Y1 direction. Each of the n scan lines 3 is electrically connected to the gate electrodes of the corresponding plurality of transistors 1. The n scan lines 3 are electrically connected to the scan line drive circuit 6 shown in Figure 1. As shown in Figure 3, scan signals G1, G2, ..., and Gn are supplied to the 1 to n scan lines 3 from the scan line drive circuit 6 in line-by-line sequence.

[0025] Each of the m data lines 4 extends in the Y1 direction, and the m data lines 4 are arranged at equal intervals in the X1 direction. Each of the m data lines 4 is electrically connected to the source region of the corresponding set of transistors 1. The m data lines 4 are electrically connected to the data line drive circuit 7 shown in Figure 1. As shown in Figure 3, image signals E1, E2, ..., and Em are supplied in parallel from the data line drive circuit 7 to the 1 to m data lines 4.

[0026] The n scan lines 3 and m data lines 4 are electrically insulated from each other and are arranged in a grid pattern in a planar view. The region enclosed by two adjacent scan lines 3 and two adjacent data lines 4 corresponds to a pixel P. A pixel electrode 10 is provided for each pixel P. The pixel electrode 10 is electrically connected to the drain region of transistor 1.

[0027] Each of the n capacitance lines 5 extends in the Y1 direction, and the n capacitance lines 5 are arranged at equal intervals in the X1 direction. Furthermore, the n capacitance lines 5 are electrically insulated from the m data lines 4 and the n scan lines 3, and are spaced apart from them. A fixed potential, such as a common potential or ground potential, is applied to each capacitance line 5.

[0028] One electrode of the auxiliary capacitor 2 is electrically connected to the capacitance line 5. The other electrode of the auxiliary capacitor 2 is electrically connected to the pixel electrode 10 and holds the potential of the image signal supplied to the pixel electrode 10.

[0029] 1.3. Cross-sectional structure of the display area on the element substrate Figure 4 is an explanatory diagram showing the cross-sectional structure of the display area of ​​the element substrate, and shows the cross-sectional structure of a pixel P provided in the display area A1. As shown in Figure 4, in the display area A1, the element substrate 100 has a cross-sectional structure in which insulating or conductive functional layers or functional films are stacked in the Z1 direction of the substrate 90.

[0030] A light-shielding layer 80 is placed between the substrate 90 and the interlayer insulating layer 82. The light-shielding layer 80 is formed of a conductive material having light-shielding properties. Examples of conductive materials with light-shielding properties include metals such as tungsten (W), titanium (Ti), chromium (Cr), iron (Fe), and aluminum (Al), metal nitrides, and metal silicides. The light-shielding layer 80 constitutes a part of the scanning line 3. "Light-shielding properties" refers to light-shielding properties with respect to visible light, preferably meaning that the transmittance of visible light is less than 50%, and more preferably 10% or less.

[0031] The interlayer insulating layer 82 has light-transmitting and insulating properties. The interlayer insulating layer 82 is formed from an inorganic material such as silicon dioxide. A transistor 1 is placed on the interlayer insulating layer 82.

[0032] Transistor 1 has a semiconductor layer 70 having an LDD (Lightly Doped Drain) structure, a gate electrode 74, and a gate insulating layer 72. The semiconductor layer 70 has a drain region 70d, an LDD region 70a, a channel region 70c, an LDD region 70b, and a source region 70s. The channel region 70c is located between the source region 70s and the drain region 70d. The LDD region 70b is located between the channel region 70c and the source region 70s. The LDD region 70a is located between the channel region 70c and the drain region 70d. The semiconductor layer 70 is, for example, polysilicon, and the regions excluding the channel region 70c are doped with impurities to enhance conductivity. The impurity concentrations in the LDD region 70b and LDD region 70a are lower than the impurity concentrations in the source region 70s and drain region 70d.

[0033] A gate electrode 74 is provided on the semiconductor layer 70 via a gate insulating layer 72. The gate electrode 74 overlaps the channel region 70c of the semiconductor layer 70. The gate electrode 74 is formed, for example, by doping polysilicon with impurities that enhance conductivity. Alternatively, the gate electrode 74 may be formed using conductive materials such as metals, metal silicides, and metal compounds.

[0034] The gate insulating layer 72 is composed of silicon oxide, which is formed by, for example, thermal oxidation or CVD (chemical vapor deposition). The gate electrode 74 and the light-shielding layer 80 are electrically connected via a contact hole 81 that penetrates the gate insulating layer 72 and the interlayer insulating layer 82.

[0035] A conductive layer 60 and a relay layer 62 are provided on the transistor 1 via an interlayer insulating layer 76. The conductive layer 60 and the relay layer 62 are provided in the same layer and are formed of a light-shielding conductive material. The interlayer insulating layer 76 is formed of the same material as the interlayer insulating layer 82. The conductive layer 60 constitutes part of the data line 4. The conductive layer 60 is electrically connected to the source region 70s of the semiconductor layer 70 via a contact hole 73 that penetrates the interlayer insulating layer 76. The relay layer 62 is electrically connected to the drain region 70d of the semiconductor layer 70 via a contact hole 71 that penetrates the interlayer insulating layer 76.

[0036] An interlayer insulating layer 64 is provided on the conductive layer 60 and the intermediate layer 62, and an intermediate layer 52 is provided on the interlayer insulating layer 64. The intermediate layer 52 is made of a light-shielding conductive material. The interlayer insulating layer 64 is made of the same material as the interlayer insulating layer 82. The relay layer 52 is electrically connected to the relay layer 64 via contact holes 61 that penetrate the interlayer insulating layer 64.

[0037] An auxiliary capacitance 2 is provided on the relay layer 52 via an interlayer insulating layer 54. The auxiliary capacitor 2 has a capacitive electrode 50 provided on the substrate 90 side, a capacitive electrode 40 provided on the pixel electrode 10 side, and a dielectric layer 56 provided between the capacitive electrode 50 and the capacitive electrode 40. Both the capacitive electrode 40 and the capacitive electrode 50 are made of a light-shielding conductive material. The interlayer insulating layer 54 is made of the same material as the interlayer insulating layer 82.

[0038] The capacitive electrode 50 constitutes a part of the capacitance line 5. The capacitive electrode 40 is electrically connected to the relay layer 52 via a contact hole 51 that penetrates the interlayer insulating layer 54, and is electrically connected to the drain region 70d of the transistor 1.

[0039] An optical functional layer LS, including a lens layer 34, is provided between the capacitive electrode 40 and the pixel electrode 10. The optical functional layer LS is provided to suppress light loss. Specifically, it adjusts the optical path of the transmitted light so that the transmitted light that has passed through the pixel electrode 10 does not hit light-shielding material layers such as data lines 4 and capacitance lines 5 and become lost. The optical functional layer LS includes a light-transmitting layer 42, a light-transmitting layer 32, a lens layer 34, and a light-transmitting layer 22.

[0040] The light-transmitting layer 42 is a path length adjustment layer, also known as a path layer, used to adjust the optical path length. The light-transmitting layer 42 is formed from an inorganic material such as silicon dioxide, and the upper surface of the light-transmitting layer 42 is planarized by CMP (Chemical Mechanical Polishing) or the like.

[0041] The light-transmitting layer 32 is a lens-forming layer in which a recess 32c is provided that becomes the lens surface 34s of the lens layer 34, and like the light-transmitting layer 42, it is formed from an inorganic material such as silicon dioxide. The light-transmitting layer 32 is composed of two light-transmitting layers 32a and 32b. The recesses 32c of the light-transmitting layer 32 are formed by etching the light-transmitting layer 32 after it has been deposited. Therefore, the light-transmitting layer 32 is initially formed to a thickness of about 10 μm. Since it is difficult to deposit a light-transmitting layer 32 of about 10 μm in a single step, in this embodiment, the deposition is performed twice, and the light-transmitting layer 32 is formed by the light-transmitting layer 32a and light-transmitting layer 32b that are stacked by the two deposition steps.

[0042] The lens layer 34 is provided on the light-transmitting layer 32. The lens layer 34 is formed from an inorganic material with a different refractive index from the light-transmitting layer 32, such as silicon oxynitride. The lens layer 34 is formed by depositing silicon oxynitride to fill the recesses 32c, and then planarizing it by CMP or the like.

[0043] The light-transmitting layer 22 is provided on the lens layer 34. The light-transmitting layer 22 is an optical path length adjusting layer and, like the light-transmitting layer 42, is formed from an inorganic material such as silicon oxide. The thickness of the light-transmitting layer 22 is thinner than the thickness of the light-transmitting layer 32.

[0044] The protective layer 24 is provided on the light-transmitting layer 22. The protective layer 24 is made of an inorganic material that is light-transmitting and hygroscopic, such as BSG (Borosilicate Glass). The pixel electrode 10 is provided on the protective layer 24. The alignment film 12 is provided on the pixel electrode 10.

[0045] The pixel electrode 10 and the capacitive electrode 40 are electrically connected via the pixel contact plug 21, the relay layer 20, the contact plug 31, the relay layer 30, and the contact plug 41. This electrically connects the pixel electrode 10 to the drain region 70d of the transistor 1.

[0046] The pixel contact plug 21 is provided within the contact hole 23. The contact hole 23 penetrates the protective layer 24 and the light-transmitting layer 22. The pixel contact plug 21 is formed by filling the inside of the contact hole 23 with a conductive material such as tungsten. The pixel contact plug 21 contacts the pixel electrode 10 and the relay layer 20, electrically connecting the pixel electrode 10 and the relay layer 20.

[0047] The relay layer 20 is provided between the light-transmitting layer 22 and the lens layer 34. When tungsten is used for the pixel contact plug 21, the relay layer 20 is formed of a material that can have good conductivity with tungsten, such as titanium nitride.

[0048] The contact plug 31 is provided within the contact hole 33. The contact hole 33 is provided through the lens layer 34 and the light-transmitting layer 32. The contact plug 31 is formed by filling the inside of the contact hole 33 with a conductive material such as tungsten. The contact plug 31 contacts the relay layer 20 and the relay layer 30, electrically connecting the relay layer 20 and the relay layer 30. As will be described in more detail later, in this embodiment, the contact hole 33 penetrates the relay layer 30, exposing the contact plug 41 at the bottom surface of the contact hole 33. Therefore, the contact plug 31 also contacts the contact plug 41.

[0049] The intermediate layer 30 is provided between the light-transmitting layer 32 and the light-transmitting layer 42. When tungsten is used for the contact plug 31, the intermediate layer 30 is made of a material that can have good conductivity with tungsten, such as titanium nitride.

[0050] The contact plug 41 is provided within the contact hole 43. The contact hole 43 is provided through the light-transmitting layer 42. The contact plug 41 is formed by filling the inside of the contact hole 43 with a conductive material such as tungsten. The contact plug 41 contacts the relay layer 30, the capacitive electrode 40, and the contact plug 31, electrically connecting the relay layer 30 and the contact plug 31 with the capacitive electrode 40.

[0051] 1.4. Planar structure of the display area on the element substrate Figure 5 is a plan view showing a portion of the display area of ​​the element substrate, specifically the display area A1 of the element substrate 100 as viewed from the liquid crystal layer Lc side in the Z2 direction. In Figure 5, the pixel electrodes 10 are drawn with solid lines, and the components included in the optical functional layer LS, which is located on the substrate 90 side of the pixel electrodes 10, are drawn with dashed lines. In the plan views shown below, the curved shape of the lens surface 34s is shown as a double circle with a dashed line, and the boundary between two adjacent lens surfaces 34s is shown as a boundary line 34b.

[0052] As shown in Figure 5, the pixel electrodes 10 are arranged in a matrix along the X and Y axes. The pixel contact plug 21 is provided at one of the four corners of the pixel electrode 10, in this embodiment, at a position that coincides with the lower left corner of the drawing in a plan view.

[0053] The relay layer 20 has a rectangular shape. Each of the four corners of the relay layer 20 is positioned to coincide with one of the corners of four adjacent pixel electrodes 10 in the X2, Y2, and diagonal directions of the pixel electrodes 10. The pixel contact plug 21 is positioned so as to overlap with the corner of the relay layer 20 in a plan view.

[0054] The contact plug 31 is provided in a position that overlaps with the relay layer 20 in a plan view. In this embodiment, the contact plug 31 is provided in a position that does not overlap with the pixel contact plug 21 in a plan view. In order to provide the contact plug 31 so as not to overlap with the pixel contact plug 21, the contact plug 31 is provided in the relay layer 20 at a corner diagonally opposite to the corner where the pixel contact plug 21 is provided. When the pixel contact plug 21 is positioned so as not to overlap with the contact plug 31, the film deposition performance of the pixel electrode 10 that overlaps with the pixel contact plug 21 can be improved compared to when the pixel contact plug 21 is positioned to overlap with the contact plug 31.

[0055] The contact plug 31 has the shape of an inverted frustum of a cone. Therefore, the outer edge 31a of the upper surface of the contact plug 31 surrounds the outside of the outer edge 31b of the lower surface in a plan view.

[0056] Although not shown in the diagram, the relay layer 30 is provided to be the same size and shape as the relay layer 20. The relay layer 20 and the relay layer 30 overlap almost completely in a plan view. Although not shown in the diagram, the contact plug 41 is positioned to overlap with the contact plug 31.

[0057] The capacitive electrode 40 has a wide portion 40w provided at the corner of the L-shape, an extended portion extending along the X1 direction from the wide portion 40w so as to overlap with the scan line 3, and an extended portion extending along the Y1 direction from the wide portion 40w so as to overlap with the data line 4. The wide section 40w is provided so as to overlap with the contact holes 33, 43, and 51. Furthermore, the wide section 40w is provided in a shape that almost completely overlaps with the relay layer 20.

[0058] In this embodiment, the intersection of the boundary line 34b coincides with the contact plug 31. This indicates that the contact plug 31 is provided penetrating the lens surface 34s of the lens layer 34. Note that the boundary line 34b that coincides with the inside of the contact hole 33 would normally disappear when the contact hole 33 is formed in the lens layer 34, but it is shown in Figure 5 to indicate that the lens surface 34s is provided without any gaps.

[0059] 1.5. Structure of the optical functional layer in the display area of ​​the element substrate Figure 6 is a cross-sectional view along the line VI-VI in Figure 5, showing the cross-sectional structure of the optical functional layer LS. As shown in Figure 6, in this embodiment, the contact hole 33 includes a portion that penetrates the lens layer 34, the light-transmitting layer 32, and the relay layer 30, and a recess 41c provided on the upper surface of the contact plug 41.

[0060] The aspect ratio of contact hole 33 is approximately twice as high as that of other contact holes, such as contact hole 43. In this embodiment, the depth L of contact hole 33 is approximately 5 to 10 μm, and the inner diameter D of contact hole 33 is approximately 1 μm, so the aspect ratio L / D is approximately 5 to 10.

[0061] The recess 41c is formed by over-etching. The contact hole 33 is formed by anisotropic etching such as dry etching. It is difficult to stop the etching at a position that penetrates the lens layer 34 and the light-transmitting layer 32 and exposes the intermediate layer 30. Therefore, in this embodiment, over-etching is performed to ensure that the contact hole 33 reaches the intermediate layer 30. However, since the combined thickness of the lens layer 34 and the light-transmitting layer 32 to be etched is thick, at 5 to 10 μm, if the etching does not stop at the intermediate layer 30, a recess 41c will be formed on the upper surface of the contact plug 41.

[0062] Furthermore, as will be explained in more detail later, the main reason why the recess 41c is formed is that, in this embodiment, the contact hole 33 and the contact hole 133 of the external terminal 9 are formed in the same process. The time required to form the contact hole 133 is longer than the time required to form the contact hole 33. Therefore, if etching of the contact hole 33 is continued until the formation of the contact hole 133 is complete, the etching that forms the contact hole 33 will be over-etched. As a result of the over-etching of the etching that forms the contact hole 33, the etching that forms the contact hole 33 penetrates the relay layer 30 and forms a recess 41c in the contact plug 41.

[0063] To ensure reliable electrical connection through the contact hole 33, the contact hole 33 is positioned to overlap with the contact plug 41 in a plan view. This ensures that even if a portion of the relay layer 30 is penetrated during the etching process of the contact hole 33, the bottom of the contact hole 33 is formed within the contact plug 41. In other words, a recess 41c is formed in the contact plug 41. Therefore, the contact plug 31 filling the contact hole 33 makes direct contact with the contact plug 41, ensuring reliable electrical connection between the contact plug 31 and the contact plug 41.

[0064] Figure 7 is a plan view showing a portion of the display area of ​​the element substrate, and shows the layout of the pixel electrode 10, pixel contact plug 21, relay layer 20, and contact plug 31 when viewed in the Z2 direction in the plan view of display area A1 of Figure 5. In Figure 7, the pixel electrode 10 is shown by a solid line. As shown in Figure 7, the pixel contact plug 21 and contact plug 31 are positioned so as to overlap with the relay layer 20 in a plan view. The pixel contact plug 21 is positioned so as not to overlap with the contact plug 31 in a plan view. To prevent the pixel contact plug 21 and contact plug 31 from overlapping in a plan view, the pixel contact plug 21 and contact plug 31 are positioned at diagonal corners of the relay layer 20, respectively.

[0065] Figure 8 is a plan view showing a portion of the display area of ​​the element substrate, and shows the layout of the relay layer 20, contact plug 31, and capacitive electrode 40 when viewed in the Z2 direction in the plan view of display area A1 in Figure 5. In Figure 8, the relay layer 20 is shown by a solid line. As shown in Figure 8, the relay layer 20 almost completely overlaps the wide portion 40w of the capacitive electrode 40 in a plan view. Furthermore, the relay layer 20 almost completely overlaps the relay layer 30 (not shown) in a plan view.

[0066] The boundary line 34b, which indicates the boundary where two adjacent lens surfaces 34s touch, is formed by two boundary lines 34b along the X and Y axes, and the intersection of these two boundary lines 34b is located inside the outer edges 31b and 31a of the contact plug 31. Therefore, the contact hole 33 is provided by penetrating the lens surface 34s of the lens layer 34. Alternatively, the lens surface 34s may be formed such that the boundary line 34b and the contact hole 33 do not overlap in a plan view. In this case, since there is no intersection of the boundary line 34b, the lens surface 34s is not formed at the location where the contact hole 33 is provided. Therefore, in this case, the contact hole 33 is provided only in the light-transmitting layer 32 between the four adjacent lens surfaces 34s.

[0067] Figure 9 is a plan view showing a portion of the display area of ​​the element substrate, and shows the layout of the relay layer 30, contact plug 31, contact plug 41, and capacitive electrode 40 when viewed in the Z2 direction in the plan view of display area A1 of Figure 5. In Figure 9, the relay layer 30 is shown by a solid line. As shown in Figure 9, the relay layer 30, like the relay layer 20, almost completely overlaps the wide portion 40w of the capacitive electrode 40.

[0068] As shown in Figure 9, the cross-section of the contact plug 31 that penetrates the relay layer 30 is visible on the surface including the upper surface of the relay layer 30. The contact plug 31 is positioned so as to overlap with the contact plug 41. More specifically, the outer edge 31b on the bottom side of the contact plug 31 is positioned inside the outer edge 41a of the contact plug 41.

[0069] Figure 10 is a plan view showing a portion of the display area of ​​the element substrate, and shows the layout of the contact plug 41, contact plug 31, and capacitive electrode 40 when the upper surface of the contact plug 41 on the relay layer 30 side is viewed in the Z2 direction in the plan view of display area A1 of Figure 5. In Figure 10, the contact plug 41 is shown by a solid line. The contact plug 31 is positioned to overlap with the contact plug 41 and is in contact with the recess 41c of the contact plug 41. Therefore, as shown in Figure 10, the cross-section of the contact plug 31 that fills the recess 41c of the contact plug 41 is visible on the surface of the contact plug 41 including the upper surface on the relay layer 30 side. If the area of ​​the cross-section of the contact plug 31 is area S2, and the area enclosed by the outer edge 41a of the upper surface of the contact plug 41 is area S1, then the value of area S1 is greater than the value of area S2.

[0070] Figure 11 is a plan view showing a portion of the display area of ​​the element substrate, and shows the layout of the capacitive electrode 40 and the semiconductor layer 70 when viewed in the Z2 direction in the plan view of display area A1 of Figure 5. In Figure 11, the capacitive electrode 40 is shown by a solid line. As shown in Figure 11, the capacitive electrode 40 is positioned to overlap with the semiconductor layer 70 in a plan view. The wide portion 40w of the capacitive electrode 40 is positioned to overlap with the channel region 70c of the semiconductor layer 70 and functions as a light-shielding layer for the channel region 70c of the semiconductor layer 70.

[0071] 1.6. Cross-sectional structure of the outer region of the element substrate Figure 12 is an explanatory diagram showing the cross-sectional structure of the outer region of the element substrate, and shows the cross-sectional structure of the external terminal 9 provided in the outer region A2. Components identical to those shown in Figure 4 are denoted by the same reference numerals and their explanations are omitted.

[0072] As shown in Figure 12, the external terminal 9, which serves as a terminal, has an electrode pad 110 as a transparent conductive layer on its uppermost layer. The electrode pad 110 is electrically connected to a configuration provided in the display area A1, such as a capacitance line 5, a scan line drive circuit 6, a data line drive circuit 7, etc., via relay layers 120, 130, 140, 150, and 160 provided between the base body 90 and the electrode pad 110, contact plugs 121, 125, and 127 provided between the electrode pad 110 and relay layer 120, contact plugs 131, 135, 137, and 139 provided between relay layer 120 and relay layer 130, contact plugs 141, 145, 147, and 149 provided between relay layer 130 and relay layer 140, contact plug 151 provided between relay layer 140 and relay layer 150, and contact plug 161 provided between relay layer 150 and relay layer 160.

[0073] The electrode pad 110 is provided on the same layer as the pixel electrode 10. The electrode pad 110 is formed using the same process and materials as the pixel electrode 10. The contact hole 123 is provided on the same layer as the contact hole 23. The contact hole 123 is formed using the same process as the contact hole 23. The contact plug 121, which fills the contact hole 123, is formed using the same process and materials as the pixel contact plug 21. Contact plugs 125 and 127 are also formed in the same manner as contact plug 121.

[0074] The intermediate layer 120 is provided on the same layer as the intermediate layer 20. The intermediate layer 120 is formed using the same process and materials as the intermediate layer 20. The intermediate layer 130 is provided in the same layer as the intermediate layer 30. The intermediate layer 130 is formed using the same process and materials as the intermediate layer 30.

[0075] An interlayer insulating layer 132 and an interlayer insulating layer 134 are provided between the relay layer 120 and the relay layer 130. The interlayer insulating layer 132 is provided in the same layer as the light-transmitting layer 32. The interlayer insulating layer 132 is formed using the same process and materials as the light-transmitting layer 32. After film formation, the interlayer insulating layer 132 is planarized by etching, which forms recesses 32c. No recesses 32c are formed in the interlayer insulating layer 132. An interlayer insulating layer 134 is formed on the interlayer insulating layer 132. The interlayer insulating layer 134 is formed using the same process and materials as the lens layer 34.

[0076] The interlayer thickness between the relay layer 120 and the relay layer 130 is approximately the same as the interlayer thickness between the relay layer 20 and the relay layer 30, but the interlayer insulating layer 134 and the lens layer 34 have different thicknesses. Specifically, the thickness T2 of the interlayer insulating layer 134 is greater than the thickness T1 of the lens layer 34 at the location where the contact hole 33 shown in Figure 4 is provided.

[0077] The contact hole 133 is formed using the same process as the contact hole 33. The contact plug 131 that fills the contact hole 133 is formed using the same process and materials as the contact plug 31. The contact plugs 135, 137, and 139 are also formed in the same way as the contact plug 131.

[0078] The intermediate layer 140 is provided in the same layer as the capacitive electrode 40. The intermediate layer 140 is formed using the same process and materials as the capacitive electrode 40. The contact hole 143 is provided on the same layer as the contact hole 43. The contact hole 143 is formed using the same process as the contact hole 43. The contact plug 141 that fills the contact hole 143 is formed using the same process and material as the contact plug 41. The contact plugs 145, 147, and 149 are also formed in the same way as the contact plug 141.

[0079] 1.7 Planar structure of the outer region of the element substrate Figure 13 is a plan view showing a portion of the outer region of the element substrate, and is a view of the external terminal 9 of the outer region A2 of the element substrate as seen in the Z2 direction. As shown in Figure 13, contact plugs 121, 125, and 127 are positioned so as not to overlap with contact plugs 131, 135, 137, and 139. The contact plug 131, like the contact plug 31, has the shape of an inverted frustum of a cone. Therefore, the outer edge 131a of the upper surface of the contact plug 131 is provided so as to surround the outside of the outer edge 131b of the bottom surface of the contact plug 131 in a plan view.

[0080] 1.8. Structure of the optical functional layer in the outer region of the element substrate Figure 14 is a cross-sectional view along the line XIV-XIV in Figure 13, showing the cross-sectional structure of the optical functional layer LS in the outer region A2. As shown in Figure 14, in this embodiment, the contact hole 133 includes the interlayer insulating layer 134, the interlayer insulating layer 132, and the recess 130c provided in the intermediate layer 130.

[0081] The recess 130c is formed by over-etching. The contact hole 133 is formed by anisotropic etching such as dry etching, but because the thickness of the interlayer insulating layer 134 and the interlayer insulating layer 132 is thick, at 5 to 10 μm, it is difficult to stop the etching at a position that exposes the intermediate layer 130.

[0082] Furthermore, as mentioned above, the contact hole 133 is formed using the same process as the contact hole 33. The combined thickness of the interlayer insulating layer 134 and the interlayer insulating layer 132 through which the contact hole 133 passes is approximately the same as the combined thickness of the lens layer 34 and the light-transmitting layer 32 through which the contact hole 33 passes. However, the ratio of the thickness of the lens layer and the thickness of the light-transmitting layer through which the contact hole 133 and the contact hole 33 pass is different.

[0083] Specifically, as shown in Figures 4 and 12, the thickness T2 of the interlayer insulating layer 134 is greater than the thickness T1 of the lens layer 34. Furthermore, since the lens layer 34 and the interlayer insulating layer 134 are made of materials with a slower etching rate than the light-transmitting layer 32 and the interlayer insulating layer 132, the formation of the contact hole 133 requires a longer etching time than the formation of the contact hole 33. Therefore, if etching of the contact hole 33 is continued until the contact hole 133 is completed, the etching that forms the contact hole 33 will penetrate the intermediate layer 30 and form a recess 41c on the upper surface of the contact plug 41.

[0084] In this embodiment, an example is described in which the contact plug 31 penetrates the lens surface 34s of the lens layer 34. However, the contact plug 31 may also be configured not to penetrate the lens layer 34. Specifically, it may be configured to penetrate only the light-transmitting layer 32. Even in this case, the ratio of the thickness of the interlayer insulating layer 134 to the thickness of the interlayer insulating layer 132 and the ratio of the thickness of the lens layer 34 to the thickness of the light-transmitting layer 32 are different for contact hole 133 and contact hole 33. Therefore, etching to form contact hole 133 takes longer than etching etching to form contact hole 33. Consequently, etching to form contact hole 33 causes contact hole 33 to penetrate the intermediate layer 30, and a recess 41c is formed in the contact plug 41.

[0085] As described above, the liquid crystal apparatus 300 as an electro-optical apparatus of this embodiment comprises a transistor 1, a pixel electrode 10 provided corresponding to the transistor 1, a lens layer 34 provided in the layer between the transistor 1 and the pixel electrode 10, a relay layer 30 provided in the layer between the transistor 1 and the lens layer 34, and a contact plug 31 for electrically connecting the relay layer 30 and the pixel electrode 10, wherein a portion of the contact plug 31 is provided within the relay layer 30. Thus, a portion of the contact plug 31 is provided within the relay layer 30. Therefore, the reliability of the electrical connection between the pixel electrode 10 and the transistor 1 can be improved.

[0086] In the liquid crystal device 300 of this embodiment, a light-transmitting layer 32 is provided in the layer between the relay layer 30 and the lens layer 34, and the contact plug 31 is provided in a contact hole 33 that penetrates the lens layer 34 and the light-transmitting layer 32. Thus, the contact plug 31 is provided within a contact hole 33 that penetrates the lens layer 34 and the light-transmitting layer 32. Therefore, it is possible to achieve both the optical performance of the lens layer 34 and the reliability of the electrical connection between the pixel electrode 10 and the transistor 1.

[0087] In the liquid crystal device 300 of this embodiment, a light-transmitting layer 22 thinner than the light-transmitting layer 32 is provided in the layer between the lens layer 34 and the pixel electrode 10, a relay layer 20 is provided in the layer between the lens layer 34 and the light-transmitting layer 22, and a pixel contact plug 21 is provided for electrically connecting the relay layer 20 and the pixel electrode 10, wherein the pixel contact plug 21 is provided so as not to overlap with the contact plug 31 in a plan view. Thus, the pixel contact plug 21 is positioned so as not to overlap with the contact plug 31 in a plan view. Therefore, the film deposition properties of the pixel electrode 10 can be improved.

[0088] In the liquid crystal device 300 of this embodiment, the pixel contact plug 21 is further provided within a contact hole 23 that penetrates the light-transmitting layer 22. Thus, the pixel contact plug 21 is provided within a contact hole 23 that penetrates the light-transmitting layer 22. Therefore, it is possible to achieve both the optical performance of the optical functional layer LS including the light-transmitting layer 22 and the reliability of the electrical connection between the pixel electrode 10 and the transistor 1.

[0089] In the liquid crystal device 300 of this embodiment, a capacitive electrode 40 as a light-shielding layer having a wide portion 40w that overlaps with the semiconductor layer 70 of the transistor 1 in a plan view, and a contact plug 41 for electrically connecting the capacitive electrode 40 and the relay layer 30 are further provided, and the contact plug 41 is provided at a position that overlaps with the contact plug 31 in a plan view. Thus, the contact plug 41 is positioned to overlap with the contact plug 31 in a plan view. Therefore, even if the contact plug 31 penetrates the relay layer 30, electrical connection between the contact plug 31 and the contact plug 41 can be reliably established.

[0090] In the liquid crystal device 300 of this embodiment, a light-transmitting layer 42 is further provided in the layer between the relay layer 30 and the capacitive electrode 40, and the contact plug 41 is provided in a contact hole 43 that penetrates the light-transmitting layer 42. Thus, the contact plug 41 is provided within the contact hole 43 that penetrates the light-transmitting layer 42. Therefore, it is possible to achieve both the optical performance of the optical functional layer LS including the light-transmitting layer 42 and the reliability of the electrical connection between the pixel electrode 10 and the transistor 1.

[0091] In the liquid crystal device 300 of this embodiment, the area S1 on the relay layer 30 side of the contact plug 41 is further larger than the area S2 on the relay layer 30 side of the contact plug 31. Thus, the area S1 of the contact plug 41 on the relay layer 30 side is larger than the area S2 of the contact plug 31 on the relay layer 30 side. Therefore, even if the contact plug 31 penetrates the relay layer 30, the electrical connection between the contact plug 31 and the contact plug 41 can be reliably established.

[0092] In the liquid crystal device 300 of this embodiment, an external terminal 9 is provided in an outer region A2, which is outside the display region A1 on which the pixel electrodes 10 are provided, and includes an external terminal 9 having an intermediate layer 130 provided in the same layer as the intermediate layer 30, an electrode pad 110 as a transparent conductive layer provided in the same layer as the pixel electrodes 10, and a contact plug 131 provided in the same layer as the contact plug 31 to electrically connect the electrode pad 110 and the intermediate layer 130. Thus, the external terminal 9 includes a contact plug 131 on the same layer as the contact plug 31. Therefore, the reliability of the electrical connection between the electrode pad 110 and the relay layer 130 can be improved, as can the electrical connection between the pixel electrode 10 and the transistor 1.

[0093] In the liquid crystal device 300 of this embodiment, an interlayer insulating layer 134 is provided between the electrode pad 110, which is a transparent conductive layer, and the relay layer 130, in the same layer as the lens layer 34, and the contact plug 131 is provided in a contact hole 133 that penetrates the interlayer insulating layer 134. Thus, the contact plug 131 is provided within the contact hole 133 that penetrates the interlayer insulating layer 134. Therefore, similar to the electrical connection between the pixel electrode 10 and the transistor 1, the contact plug 131 can reliably electrically connect the electrode pad 110 and the relay layer 130.

[0094] In the liquid crystal device 300 of this embodiment, the thickness of the lens layer 34 through which the contact hole 33 passes is further smaller than the thickness of the interlayer insulating layer 134 through which the contact hole 133 passes. Thus, the thickness of the lens layer 34 through which the contact hole 33 passes is smaller than the thickness of the interlayer insulating layer 134 through which the contact hole 133 passes. Therefore, by providing a portion of the contact plug 31 within the relay layer 30, the reliability of the electrical connection between the pixel electrode 10 and the transistor 1, as well as the reliability of the electrical connection between the electrode pad 110 and the relay layer 130, can be ensured.

[0095] In the liquid crystal device 300 of this embodiment, the contact plug 31 is further provided penetrating the relay layer 30, and a portion of the contact plug 131 is provided within the relay layer 130. Thus, the contact plug 31 is provided penetrating the relay layer 30, and a portion of the contact plug 131 is provided within the relay layer 130. Therefore, the reliability of the electrical connection between the pixel electrode 10 and the transistor 1, as well as the reliability of the electrical connection between the electrode pad 110 and the relay layer 130, can be ensured.

[0096] 2. Embodiment 2 The structure of the liquid crystal device as an electro-optical device according to Embodiment 2 will be described with reference to Figure 15. Figure 15 is a plan view showing a part of the display area of ​​the element substrate according to Embodiment 2. Embodiment 2 differs from Embodiment 1 in that the contact plug 31 is provided in a different position. Components that are the same as those in Embodiment 1 are denoted by the same reference numerals and their descriptions are omitted.

[0097] As shown in Figure 15, the contact plug 31 is located approximately in the center of the relay layer 20 in a plan view. The pixel contact plug 21 is located in a position that overlaps with the contact plug 31 in a plan view. Furthermore, the contact plug 31 is located in a position that almost completely overlaps with a contact plug 41 (not shown) in a plan view.

[0098] In this way, when a portion of the pixel contact plug 21 is positioned to overlap with the contact plug 31, it is easier to align the pixel contact plug 21 and the contact plug 31 than when they are positioned so that they do not overlap. Furthermore, since the contact plug 31 is located approximately in the center of the relay layer 20, the size of the relay layer 20 can be reduced. Similarly, by reducing the size of the relay layer 30 and the wide portion 40w of the capacitive electrode 40, the light-shielding area can be reduced, and the aperture area through which light passes can be widened.

[0099] As described above, the liquid crystal device 300 as an electro-optical device of this embodiment provides the following effects in addition to the effects of the above embodiment. In the liquid crystal device 300 of this embodiment, the layer between the lens layer 34 and the pixel electrode 10 is further provided with a light-transmitting layer 22 which is thinner than the light-transmitting layer 32, a relay layer 20 provided in the layer between the lens layer 34 and the light-transmitting layer 22, and a pixel contact plug 21 for electrically connecting the relay layer 20 and the pixel electrode 10, wherein the pixel contact plug 21 is provided such that a portion of it overlaps with the contact plug 31 in a plan view. Thus, the pixel contact plug 21 is positioned so that it partially overlaps with the contact plug 31 in a plan view. Therefore, alignment between the pixel contact plug 21 and the contact plug 31 can be easily performed. In addition, by reducing the size of the relay layer 20, the relay layer 30, and the wide portion 40w of the capacitive electrode 40, the light-shielding area can be reduced, and the aperture area through which light passes can be widened.

[0100] 3. Embodiment 3 Figure 16 is a schematic diagram showing a projector, which is an example of an electronic device used as a projection-type display device. The projector 1000 is, for example, a three-panel projector equipped with three of the above-described liquid crystal displays 300. Liquid crystal display 300R corresponds to the red display color, liquid crystal display 300G corresponds to the green display color, and liquid crystal display 300B corresponds to the blue display color. The control unit 1005 includes, for example, a processor and memory, and controls the operation of the liquid crystal displays 300R, 300G, and 300B.

[0101] The illumination optical system 1001 supplies the red component RL from the light emitted from the illumination device 1002, which is the light source, to the liquid crystal device 300R, the green component GL to the liquid crystal device 300G, and the blue component BL to the liquid crystal device 300B. Each liquid crystal device 300R, 300G, and 300B functions as an optical modulator that modulates the respective colored lights RL, GL, and BL supplied from the illumination optical system 1001 according to the displayed image. The projection optical system 1003 combines the light emitted from each liquid crystal display unit 300R, 300G, and 300B and projects it onto the projector screen 1004.

[0102] As described above, the projector 1000 as an electronic device of this embodiment includes the liquid crystal display 300 described above. Therefore, by adopting a liquid crystal display unit 300 with high optical and electrical reliability, the performance of the projector 1000 can be improved.

[0103] Furthermore, the electronic device is not limited to the three-chip projector 1000 exemplified. For example, it may be a single-chip, two-chip, or projector equipped with four or more liquid crystal displays 300. The electronic device may also be a PDA (Personal Digital Assistant), digital still camera, television, video camera, car navigation system, in-car display, electronic organizer, e-paper, calculator, word processor, workstation, videophone, and POS (Point of Sale), printer, scanner, copier, video player, or device equipped with a touch panel.

[0104] Although preferred embodiments have been described above, the present invention is not limited to the embodiments described above. Furthermore, the configuration of each part of the present invention can be replaced with any configuration that performs similar functions to those of the embodiments described above, and any configuration can be added. [Explanation of Symbols]

[0105] 1...Transistor, 2...Auxiliary capacitor, 3...Scan line, 4...Data line, 5...Capacitance line, 6...Scan line drive circuit, 7...Data line drive circuit, 8...Sealing member, 9...External terminal, 10...Pixel electrode, 12...Alignment film, 20...Relay layer, 21...Pixel contact plug, 22...Transparent layer, 23...Contact hole, 24...Protective layer, 30...Relay layer, 31...Contact plug, 31a...Outer edge, 31b...Outer edge, 32...Transparent layer, 32a...Transparent layer, 32b...Transparent layer, 32c...Recess, 33...Contact hole, 34...Lens layer, 34b...Boundary line, 34s...Lens surface, 40...Capacitance electrode, 40w...Wide section 41...Contact plug, 41a...Outer edge, 41c...Recess, 42...Transparent layer, 43...Contact hole, 50...Capacitive electrode, 51...Contact hole, 52...Intermediate layer, 54...Interlayer insulating layer, 56...Dielectric layer, 60...Conductive layer, 61...Contact hole, 62...Intermediate layer, 64...Interlayer insulating layer, 70...Semiconductor layer, 70a...LDD region, 70b...LDD region, 70c...Channel region, 70d...Drain region, 70s...Source region, 71...Contact hole, 72...Gate insulating layer, 73...Contact hole, 74...Gate electrode, 76...Interlayer insulating layer, 80...Light shielding layer, 81...Contact Tact hole, 82...Interlayer insulating layer, 90...Substrate, 100...Element substrate, 110...Electrode pad, 120...Intermediate layer, 121...Contact plug, 125...Contact plug, 127...Contact plug, 130...Intermediate layer, 130c...Recess, 131...Contact plug, 135...Contact plug, 137...Contact plug, 139...Contact plug, 131a...Outer edge, 131b...Outer edge, 132...Interlayer insulating layer, 133...Contact hole, 134...Interlayer insulating layer, 140...Intermediate layer, 141...Contact plug, 145...Contact plug, 147...Contact plug Lug, 149... Contact plug, 143... Contact hole, 150... Intermediate layer, 151... Contact plug, 160... Intermediate layer, 161... Contact plug, 200... Opposing substrate, 210... Base, 220... Insulating layer, 230... Common electrode, 240... Alignment film, 300... Liquid crystal device, 300B, 300G, 300R... Liquid crystal device, 1000... Projector, 1001... Illumination optical system, 1002... Illumination device, 1003... Projection optical system, 1004... Projector screen, 1005... Control unit, A1... Display area, A2... Outer area, S1... Area, S2... Area, LS... Optical functional layer.

Claims

1. Transistors and, A pixel electrode provided in correspondence with the transistor, A lens layer provided in the layer between the transistor and the pixel electrode, A first light-transmitting layer is provided in the layer between the transistor and the lens layer, A first relay layer is provided in the layer between the lens layer and the pixel electrode, A second relay layer is provided in the layer between the first light-transmitting layer and the lens surface of the lens layer, A third relay layer is provided between the transistor and the first light-transmitting layer, A first connecting member is provided that penetrates the lens layer and electrically connects the first relay layer and the second relay layer, A second connecting member penetrates the first light-transmitting layer and is provided so as to overlap with the first connecting member in a plan view, and electrically connects the second relay layer and the third relay layer, A terminal having, outside the display area where the pixel electrodes are provided, a first conductive layer provided in the same layer as the first relay layer, a second conductive layer provided in the same layer as the second relay layer, a transparent conductive layer provided in the same layer as the pixel electrodes, an interlayer insulating layer provided in the same layer as the lens layer and made of the same material as the lens layer, and a third connecting member provided in the same layer as the first connecting member, penetrating the interlayer insulating layer and electrically connecting the first conductive layer and the second conductive layer, The thickness of the lens layer at the position through which the first connecting member penetrates is thinner than the thickness of the interlayer insulating layer at the position through which the third connecting member penetrates. The first connecting member penetrates the second relay layer, with its end located within a recess of the second connecting member, and the third connecting member has its end located within a recess of the second conductive layer. Electro-optical device.

2. The device comprises a second light-transmitting layer provided in the layer between the second relay layer and the lens layer, The first connecting member is provided within a first contact hole that penetrates the lens layer and the second light-transmitting layer. The electro-optical apparatus according to claim 1.

3. A third light-transmitting layer, which is thinner than the second light-transmitting layer, is provided in the layer between the lens layer and the pixel electrode. The device comprises a fourth connecting member that penetrates the third light-transmitting layer and electrically connects the first relay layer and the pixel electrode, The fourth connecting member is provided so as not to overlap with the first connecting member in a plan view. The electro-optical apparatus according to claim 2.

4. The second connecting member is provided within the second contact hole that penetrates the first light-transmitting layer. The electro-optical apparatus according to claim 3.

5. The fourth connecting member is provided within the third contact hole that penetrates the third light-transmitting layer. The electro-optical apparatus according to claim 3.

6. The area of ​​the second connecting member on the second relay layer side is larger than the area of ​​the first connecting member on the second relay layer side. The electro-optical apparatus according to claim 5.

7. The third connecting member is provided within a fourth contact hole that penetrates the interlayer insulating layer. The electro-optical apparatus according to claim 1.

8. A third light-transmitting layer, which is thinner than the second light-transmitting layer, is provided in the layer between the lens layer and the pixel electrode. The device comprises a fourth connecting member that penetrates the third light-transmitting layer and electrically connects the first relay layer and the pixel electrode, The fourth connecting member is provided such that it partially overlaps with the first connecting member in a plan view. The electro-optical apparatus according to claim 2.

9. An electronic device comprising an electro-optical apparatus as described in any one of claims 1 to 8.

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