Method for manufacturing a semiconductor device, semiconductor device, integrated circuit element, and method for manufacturing an integrated circuit element.

Abstract

A semiconductor device manufacturing method according to the present invention is provided with: a step for providing a first integrated circuit element comprising a first semiconductor substrate, a first insulation film, and a first electrode; a step for providing a second integrated circuit element comprising a second semiconductor substrate, a second insulation film, and a second electrode; a step for joining the first insulation film and the second insulation film together; and a step for joining the first electrode and the second electrode together. The first insulation film has a first inorganic insulation layer and a first organic insulation layer. The first organic insulation layer is located on a first joining surface side, of the first integrated circuit element, opposite the first semiconductor substrate. The second insulation film has a second inorganic insulation layer and a second organic insulation layer. The second organic insulation layer is located on a second joining surface side, of the second integrated circuit element, opposite the second semiconductor substrate. The thickness of the first organic insulation layer is less than that of the first inorganic insulation layer, and the thickness of the second organic insulation layer is less than that of the second inorganic insulation layer.

Claims

1. A step of providing a first integrated circuit element comprising a first semiconductor substrate having a semiconductor element, and a first wiring layer having a first insulating film and a first electrode and provided on one surface of the first semiconductor substrate, A step of providing a second integrated circuit element having a second semiconductor substrate having a semiconductor element, and a second wiring layer having a second insulating film and a second electrode and provided on one surface of the second semiconductor substrate, A step of joining the first insulating film of the first integrated circuit element and the second insulating film of the second integrated circuit element to each other, The process includes a step of joining the first electrode of the first integrated circuit element and the second electrode of the second integrated circuit element to each other, The first insulating film comprises a first inorganic insulating layer containing an inorganic insulating material and a first organic insulating layer containing an organic insulating material, wherein the first organic insulating layer is located on the first junction surface side opposite to the first semiconductor substrate in the first integrated circuit element. The second insulating film comprises a second inorganic insulating layer containing an inorganic insulating material and a second organic insulating layer containing an organic insulating material, wherein the second organic insulating layer is located on the second junction surface side opposite to the second semiconductor substrate in the second integrated circuit element. The thickness of the first organic insulating layer is thinner than that of the first inorganic insulating layer. The thickness of the second organic insulating layer is thinner than that of the second inorganic insulating layer. A method for manufacturing a semiconductor device, comprising the step of joining the first insulating film and the second insulating film to each other, wherein the first integrated circuit element and the second integrated circuit element are brought facing each other and heated while the surface of the first organic insulating layer is recessed relative to the first electrode and the surface of the second organic insulating layer is recessed relative to the second electrode, and the joining is performed.

2. The Young's modulus of the organic insulating material contained in at least one of the first organic insulating layer and the second organic insulating layer is 7.0 GPa or less. A method for manufacturing a semiconductor device according to claim 1.

3. The organic insulating material contained in at least one of the first organic insulating layer and the second organic insulating layer includes polyimide, polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or PBO precursor. A method for manufacturing a semiconductor device according to claim 1 or 2.

4. The first inorganic insulating layer is formed from a plurality of layers, The first organic insulating layer is formed from a single layer, The aforementioned second inorganic insulating layer is formed from a plurality of layers, The second organic insulating layer is formed from a single layer. A method for manufacturing a semiconductor device according to any one of claims 1 to 3.

5. The electrode provided in the first inorganic insulating layer of the first electrode is smaller than the electrode provided in the first organic insulating layer of the first electrode, The electrode provided in the second inorganic insulating layer of the second electrode is smaller than the electrode provided in the second organic insulating layer of the second electrode. The method for manufacturing a semiconductor device according to claim 4.

6. The thickness of at least one of the first organic insulating layer and the second organic insulating layer is 10 μm or less. A method for manufacturing a semiconductor device according to any one of claims 1 to 5.

7. A step of polishing the first organic insulating layer and the first electrode of the first integrated circuit element, The process further comprises polishing the second organic insulating layer and the second electrode of the second integrated circuit element. A method for manufacturing a semiconductor device according to any one of claims 1 to 6.

8. In the step of polishing the first integrated circuit element, the first organic insulating layer and the first electrode are polished using a chemical mechanical polishing method such that the surface of the first organic insulating layer is recessed relative to the surface of the first electrode. In the step of polishing the second integrated circuit element, the second organic insulating layer and the second electrode are polished using a chemical mechanical polishing method such that the surface of the second organic insulating layer is recessed relative to the surface of the second electrode. The method for manufacturing a semiconductor device according to claim 7.

9. In the step of polishing the first integrated circuit element, the polishing is performed so that the surface roughness of the surface of the first organic insulating layer becomes 2 nm or less. In the step of polishing the second integrated circuit element, the polishing is performed so that the surface roughness of the surface of the second organic insulating layer becomes 2 nm or less. The method for manufacturing a semiconductor device according to claim 7 or 8.

10. An integrated circuit element for manufacturing a semiconductor device by joining it with other integrated circuit elements, A semiconductor substrate having a first surface and a second surface, wherein a semiconductor element is formed on at least one of the first surface and inside the substrate, The semiconductor substrate comprises a wiring layer provided on the second surface of the semiconductor substrate, The aforementioned wiring layer is An inorganic insulating layer provided on the second surface of the semiconductor substrate, An organic insulating layer provided on the inorganic insulating layer and exposed to the outside of the wiring layer, The semiconductor substrate comprises an electrode electrically connected to the semiconductor element, which penetrates the inorganic insulating layer and the organic insulating layer and is exposed to the outside from the organic insulating layer, The thickness of the organic insulating layer is thinner than that of the inorganic insulating layer. The Young's modulus of the organic insulating material contained in the aforementioned organic insulating layer is 7.0 GPa or less. An integrated circuit element in which the surface of the organic insulating layer is recessed relative to the electrode.

11. The inorganic insulating layer is formed from a plurality of layers, The aforementioned organic insulating layer is formed from a single layer. Of the electrodes, the electrode provided in the inorganic insulating layer is smaller than the electrode provided in the organic insulating layer. The integrated circuit element according to claim 10.

12. A method for manufacturing an integrated circuit element for manufacturing a semiconductor device by joining it with other integrated circuit elements, A step of providing a semiconductor substrate having a first surface and a second surface, wherein a semiconductor element is formed on at least one of the first surface and inside the substrate, The process includes forming a wiring layer on the second surface of the semiconductor substrate, The step of forming the wiring layer is, A step of forming an inorganic insulating layer on the second surface of the semiconductor substrate, A step of forming an inner layer electrode that penetrates the inorganic insulating layer so as to be electrically connected to the semiconductor element, The step of forming an organic insulating layer on the inorganic insulating layer, The process includes the step of forming an outer layer electrode that penetrates the organic insulating layer so as to be electrically connected to the inner layer electrode, The thickness of the organic insulating layer is thinner than that of the inorganic insulating layer. The Young's modulus of the organic insulating material contained in the aforementioned organic insulating layer is 7.0 GPa or less. A method for manufacturing an integrated circuit element, further comprising the step of polishing the organic insulating layer and the outer layer electrode of the integrated circuit element, wherein the organic insulating layer and the outer layer electrode are polished using a chemical mechanical polishing method such that the surface of the organic insulating layer is recessed relative to the surface of the outer layer electrode.

13. After forming the outer layer electrode, the organic insulating layer is formed. A method for manufacturing an integrated circuit element according to claim 12.

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