Manufacturing method for semiconductor devices
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- MITSUBISHI ELECTRIC CORP
- Filing Date
- 2022-04-25
- Publication Date
- 2026-06-26
AI Technical Summary
Existing semiconductor devices face challenges in efficiently removing air bubbles during the encapsulation process, particularly in DLB structures, leading to longer vacuum maintenance times and reduced productivity due to large equipment and complex vacuum control processes.
A semiconductor device configuration with a planar case member and lid jig for easy pressure control, using an injection nozzle and exhaust pipe to fill and depressurize the case interior region, allowing for rapid vacuum establishment and bubble removal.
Facilitates quick pressure control and reduces the time required for vacuum maintenance, enhancing production efficiency and reducing the likelihood of air bubble entrapment during resin injection.
Smart Images

Figure 0007880731000001 
Figure 0007880731000002 
Figure 0007880731000003
Abstract
Description
Technical Field
[0001] The technology disclosed in the present specification relates to a semiconductor device.
Background Art
[0002] Semiconductor devices in which the current path is in the longitudinal direction of the element for the purpose of handling high voltage or large current are generally called power semiconductor devices. Power semiconductor devices include, for example, insulated gate bipolar transistors (i.e., IGBTs), metal-oxide-semiconductor field-effect transistors (i.e., MOSFETs), bipolar transistors, or diodes.
[0003] Semiconductor devices in which a power semiconductor device is mounted on a circuit board and further packaged with a filler are used in a wide range of fields such as industrial equipment, automobiles, or railways.
[0004] In recent years, with the high-performance improvement of equipment equipped with semiconductor devices, the requirements for high-performance improvement of semiconductor devices, such as an increase in rated voltage and rated current, and further an expansion of the operating temperature range (high temperature and low temperature), have been increasing.
[0005] Such a package structure of a semiconductor device is mainly of a case type. In a semiconductor device using a case-type package structure, a power semiconductor device is mounted via an insulating circuit board configured to have a surface electrode pattern on one surface of an insulating substrate and a back surface electrode pattern on the other surface on a base plate for heat dissipation. Then, a case is adhered to the base plate.
[0006] Furthermore, semiconductor elements mounted inside semiconductor devices are connected to the main electrodes. Bonding wires are used to connect these semiconductor elements to the main electrodes. On the other hand, direct potting (DP) encapsulation technology, which does not require molds and enables high heat-resistant epoxy encapsulation, is becoming widespread in order to prevent insulation failure when high voltage is applied.
[0007] Direct potting (DP) encapsulation technology involves injecting a liquid resin before curing into the case of a package structure and curing the resin using methods such as heat or light. Generally, voids (air bubbles) in the encapsulation resin can affect insulation properties or long-term reliability, so it is necessary to thoroughly remove air bubbles during the injection of the encapsulation resin to prevent void formation.
[0008] However, the DP encapsulation resin used in DP encapsulation has a higher viscosity compared to general silicone gel encapsulants, making it difficult to inject into narrow gaps and resulting in problems with air bubbles not easily escaping.
[0009] On the other hand, modules with a DLB (Direct Lead Bonding) structure that achieve high reliability are known. The DLB structure extends the external terminals of the semiconductor device to directly above the semiconductor chip, and the semiconductor chip and the external terminals are directly joined with solder.
[0010] In DLB (Digital Light Blocking) modules, the electrode plates, which have a large surface area, and the insulating substrate on which the semiconductor elements are mounted are arranged in a parallel plate structure. Air bubbles trapped between the electrode plates and the insulating substrate are particularly difficult to remove, resulting in longer process times. To address this, vacuum injection equipment, which injects sealing resin under vacuum, is used. However, the equipment structure is large, and the time required for depressurization or resin spreading leaves challenges in terms of productivity.
[0011] For example, Patent Document 1 describes a DLB structure module in which the distance between the electrode plate and the substrate at the module side edge where the electrode extends is made larger than the distance between the electrode plate and the substrate at the junction between the upper surface of the semiconductor element and the electrode plate, thereby making it easier for air bubbles to move when resin is injected into the module and suppressing the formation of air bubbles.
[0012] Furthermore, for example, Patent Document 2 describes how, in a DLB structure module, the injection properties of the DP sealing resin are improved and the formation of air bubbles are suppressed by providing a step in the electrode plate to increase the gap between the electrode plate and the substrate, and by forming an opening in the electrode plate. [Prior art documents] [Patent Documents]
[0013] [Patent Document 1] International Publication No. 2019 / 194272 [Patent Document 2] Japanese Patent Publication No. 2006-202885 [Overview of the Initiative] [Problems that the invention aims to solve]
[0014] Even when increasing the gap between the electrode plate and the substrate and providing an opening in the electrode plate to suppress bubble formation, the semiconductor device must still be kept in a vacuum until the bubbles dissipate.
[0015] To increase production efficiency, methods such as injecting DP encapsulation resin into another semiconductor device (module) while holding one semiconductor device in a vacuum, or simultaneously holding multiple modules in a vacuum and injecting DP encapsulation resin, are employed, resulting in larger equipment. This larger equipment leads to longer times for exhaust depressurization to maintain the vacuum during resin injection, and for releasing the system into the atmosphere after the bubbles disappear.
[0016] The technology disclosed in the present specification has been made in view of the problems described above, and is a technology capable of shortening the time for pressure control.
Means for Solving the Problems
[0017] A semiconductor device which is a first aspect of the technology disclosed in the present specification Manufacturing method is A semiconductor element is provided on the upper surface of an insulating substrate, the insulating substrate on which the semiconductor element is provided is surrounded in plan view by a case member, the upper surface of the case member is a plane that is continuous in the circumferential direction, a main terminal is electrically connected to the upper surface of the semiconductor element, the upper surface of the case member is covered with a lid jig, the case interior region which is the area surrounded by the case member and the insulating substrate is sealed, the lid jig comprises an injection nozzle for filling the case interior region with sealing resin and an exhaust pipe for depressurizing the case interior region, and the sealing resin is filled into the case interior region via the injection nozzle while depressurizing the case interior region via the exhaust pipe. .
Effects of the Invention
[0018] According to at least the first aspect of the technology disclosed in the present specification, since the upper surface of the case member has a planar shape that is easy to seal with a lid jig or the like, it becomes easy to perform pressure control in the case region in a short time.
[0019] Also, the objects, features, aspects, and advantages related to the technology disclosed in the present specification will become clearer from the following detailed description and the accompanying drawings.
Brief Description of the Drawings
[0020] [Figure 1] It is a side view schematically showing an example of the configuration of a semiconductor device according to an embodiment. [Figure 2] It is a plan view schematically showing an example of the configuration of a semiconductor device according to an embodiment. [Figure 3] It is a diagram showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 4] It is a diagram showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 5] It is a diagram showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 6] It is a diagram showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 7] It is a diagram showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 8] It is a diagram showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 9] Figure 8 is a schematic side view showing an example of the configuration of a vacuum injection apparatus for injecting DP sealing resin. [Figure 10] This figure shows an example of the configuration of a semiconductor device according to an embodiment. [Figure 11] This is a cross-sectional view showing an example of the configuration of a semiconductor device according to an embodiment, with a cover jig attached. [Figure 12] This is a plan view showing an example of the configuration of a semiconductor device according to an embodiment, with a cover jig attached to the configuration. [Figure 13] This is a cross-sectional view showing an example of the configuration of a semiconductor device according to an embodiment, with a cover jig attached. [Figure 14] This figure shows an example of the configuration of a semiconductor device according to an embodiment. [Figure 15] This is a cross-sectional view showing an example of the configuration of a semiconductor device according to an embodiment, with a cover jig attached. [Figure 16] This diagram conceptually illustrates an example of the configuration of a power conversion system including the power conversion device of this embodiment. [Modes for carrying out the invention]
[0021] The embodiments will be described below with reference to the attached drawings. In the following embodiments, detailed features will be shown for the purpose of explaining the technology, but these are illustrative, and not all of them are necessarily essential features for the embodiments to be implementable.
[0022] Please note that the drawings are for illustrative purposes only, and for the sake of clarity, some components may be omitted or simplified as appropriate. Furthermore, the relative sizes and positions of components shown in different drawings are not necessarily accurately represented and may be modified as appropriate. In addition, hatching may be added to drawings other than cross-sectional views, such as plan views, to facilitate understanding of the embodiment.
[0023] Furthermore, in the following explanations, similar components will be denoted by the same symbols, and their names and functions will also be the same. Therefore, detailed explanations of them may be omitted to avoid redundancy.
[0024] Furthermore, in the descriptions contained in this specification, when a certain component is described as "equipped with," "includes," or "has," unless otherwise specified, it is not an exclusive expression that excludes the existence of other components.
[0025] Furthermore, even if ordinal numbers such as "first" or "second" are used in the descriptions contained herein, these terms are used for convenience to facilitate understanding of the embodiments, and the contents of the embodiments are not limited to the order that may result from these ordinal numbers.
[0026] Furthermore, even if terms such as "top," "bottom," "left," "right," "side," "bottom," "front," or "back" are used in the descriptions of this specification to indicate a specific position or direction, these terms are used for convenience to facilitate understanding of the embodiments and are not related to the actual position or direction in which the embodiments are carried out.
[0027] Furthermore, in the descriptions contained herein, when a "top surface of..." or "bottom surface of..." is used, it includes not only the top surface or bottom surface of the component in question itself, but also the state in which other components are formed on the top surface or bottom surface of the component in question. That is, for example, when it is stated that "B is provided on the top surface of A", this does not preclude the presence of another component "C" between A and B.
[0028] <First Embodiment> The semiconductor device and the method for manufacturing the semiconductor device according to this embodiment will be described below.
[0029] <About the configuration of semiconductor devices> Figure 1 is a schematic side view showing an example of the configuration of a semiconductor device according to this embodiment. Figure 2 is a schematic top view showing an example of the configuration of a semiconductor device according to this embodiment. Note that the parts covered by the sealing resin are not actually visible, but are shown by making them transparent to the sealing resin for illustrative purposes.
[0030] As shown in Figures 1 and 2, the semiconductor device comprises an insulating substrate 10, a diode 21 and an IGBT 22 which are semiconductor elements disposed on the upper surface of the insulating substrate 10, and a main terminal 60 which is an electrode plate connected to the upper surface of the diode 21 and the upper surface of the IGBT 22 to form an electrical circuit.
[0031] The diode 21, IGBT 22, and main terminal 60 are each placed inside a case and sealed with direct potting (DP) sealing resin 7. The DP sealing resin 7 covers a portion of the main terminal 60, the insulating substrate 10, the diode 21, and the IGBT 22.
[0032] The details of each component are described below.
[0033] The insulating substrate 10 comprises an insulating base material 11 and copper conductor layers 12 and 13 formed on both sides of the insulating base material 11, respectively. The insulating base material 11 is made of, for example, AlN, and has a length of 40 mm in the X-axis direction, a length of 25 mm in the Y-axis direction, and a thickness of 0.635 mm in the Z-axis direction. The copper conductor layers 12 and 13 have a thickness of, for example, 0.4 mm in the Z-axis direction.
[0034] On the electrode pattern (copper conductor layer 12) formed on the upper surface of the insulating substrate 11, semiconductor elements, a diode 21 and an IGBT 22, are mounted, and each is electrically connected to the electrode pattern (copper conductor layer 12) via solder 31. The diode 21 has a length of 15 mm in the X-axis direction, a length of 15 mm in the Y-axis direction, and a thickness of 0.3 mm in the Z-axis direction. The electrode pattern (copper conductor layer 13) on the lower surface of the insulating substrate 11 is fixed to the insulating substrate 10 via a bonding material such as solder.
[0035] The insulating substrate 10 then becomes the bottom plate of the semiconductor device, and a region (hereinafter referred to as the case region 205) is formed between the insulating substrate 10 and the case member 51 arranged around the insulating substrate 10. The case member 51 is provided to surround the insulating substrate 10 in a plan view. The upper surface of the case member 51 surrounding the insulating substrate 10 in a plan view is a continuous plane in the circumferential direction. The DP sealing resin 7 is filled into the case region 205.
[0036] The case member 51 is fixed to the insulating substrate 10 using adhesive 8. By filling the gap between the case member 51 and the insulating substrate 10 with adhesive 8, leakage of the DP sealing resin 7 is prevented. The case member 51 is made of, for example, polyphenylene sulfide (i.e., PPS) resin, and has a length of 48 mm in the X-axis direction, a length of 28 mm in the Y-axis direction, and a height of 12 mm in the Z-axis direction. The adhesive 8 is made of, for example, silicone.
[0037] The main terminal 60 is insert-molded into the case member 51. The main terminal 60 is made of copper, for example, and has a thickness of 0.5 mm in the Z-axis direction and a width of 8 mm in the Y-axis direction. The main terminal 60 is connected via solder 32 to electrodes through which large currents flow, such as the source electrode of a power semiconductor element of a diode 21 or IGBT 22. The portion of the main terminal 60 that is exposed from the top of the case member 51 is a screw terminal 61.
[0038] Furthermore, a signal terminal 62 is provided in the case member 51 by insert molding. The signal terminal 62 is electrically connected to the gate electrode or temperature sensor electrode of the IGBT 22 by a bonding wire 4. The bonding wire 4 is made of aluminum, for example, and has a diameter of 0.15 mm.
[0039] Furthermore, the case member 51 is arranged to surround the insulating substrate 10 in a plan view, and the copper conductor layer 13 is provided exposed and not covered by the case member 51.
[0040] The details of each component are described below.
[0041] When using semiconductor devices made from semiconductor materials that operate at temperatures above 150°C as the diode 21 and IGBT 22 of the semiconductor device, the effect of suppressing bubble generation is significant. In particular, the effect is greater when applied to so-called wide-bandgap semiconductors, which have a larger bandgap than silicon (Si), and are formed from materials such as silicon carbide (SiC), gallium nitride (GaN)-based materials, or diamond (C).
[0042] Furthermore, while Figures 1 and 2 show, as an example, only two semiconductor elements mounted on a single semiconductor device, the number of semiconductor elements is not limited to this, and the necessary number of semiconductor elements may be mounted depending on the application.
[0043] Furthermore, although solder 31 and solder 32 are used as joining materials in Figures 1 and 2, the joining materials are not limited to these. Silver or a silver alloy may be used to join the semiconductor element and the copper conductor layer 12, or the lower surface of the insulating substrate 11 and the copper conductor layer 13 may be joined.
[0044] Copper is typically used for the copper conductor layer 12, copper conductor layer 13, and main terminal 60. However, the materials used are not limited to copper, and any material with the necessary heat dissipation characteristics is acceptable. For example, aluminum or iron may be used, or composite materials thereof may be used. Furthermore, composite materials such as copper / Invar / copper may be used, or alloys such as AlSiC and CuMo may be used.
[0045] Furthermore, the surfaces of the copper conductor layer 12, the copper conductor layer 13, and the main terminal 60 are usually nickel-plated, but the plating is not limited to this; gold or tin plating may also be applied, as long as the structure can supply the necessary current and voltage to the semiconductor element.
[0046] Furthermore, since at least a portion of the main terminal 60 and the copper conductor layer 12 are embedded in the DP sealing resin 7, minute irregularities may be provided on the surface of the main terminal 60 and the copper conductor layer 12 to improve the adhesion between the main terminal 60 and the copper conductor layer 12 and the DP sealing resin 7. These irregularities make it possible to improve the adhesion between the main terminal 60 and the copper conductor layer 12 and the DP sealing resin 7.
[0047] The insulating substrate 10 is an insulating base material 11 made of ceramic such as Al2O3, SiO2, AlN, BN, or Si3N4, with copper or aluminum electrode patterns provided on both sides.
[0048] The insulating substrate 11 must have heat dissipation and insulating properties, and is not limited to the above-mentioned materials. It may also be an insulating substrate 11 made of a material such as a resin cured product with dispersed ceramic powder or a resin cured product with embedded ceramic plates, on which copper conductor layers 12 and copper conductor layers 13 are provided.
[0049] Furthermore, if the insulating substrate 11 is a resin cured product in which ceramic powder is dispersed, the ceramic powder used in the insulating substrate 11 may be Al2O3, SiO2, AlN, BN, or Si3N4, but is not limited to these, and diamond, SiC, or B2O3 may also be used. In addition, resin powders such as silicone resin or acrylic resin may be used.
[0050] While spherical powders are often used, the powder is not limited to this form; crushed, granular, flake-like, or aggregated powders may also be used. The amount of powder filling should be sufficient to provide the required heat dissipation and insulation properties. The resin used for the insulating substrate 11 is usually epoxy resin, but it is not limited to this; polyimide resin, silicone resin, or acrylic resin may also be used, as long as it is a material that combines insulation and adhesive properties.
[0051] The bonding wire 4 is made of aluminum or gold and has a circular cross-section, but is not limited to this; for example, a strip (ribbon) of copper plate with a square cross-section may be used. The material of the bonding wire 4 may also be an aluminum alloy.
[0052] As shown in Figure 2, in this embodiment, four bonding wires 4 are used to connect the IGBT 22 and the signal terminal 62. However, the application of the bonding wires 4 may also be to connect IGBTs 22 to each other, or to connect the upper electrode pattern (copper conductor layer 12) to the signal terminal 62. Furthermore, depending on the current density of the IGBT 22, bonding wires 4 of the required thickness (size) and the required number of bonding wires 4 can be used.
[0053] Furthermore, as a method for joining the bonding wire 4 to the part to be joined, molten metal bonding, which involves melting a metal piece such as copper or tin, or ultrasonic bonding can be employed. However, the method is not particularly limited as long as it can supply the necessary current and voltage to the semiconductor element.
[0054] The case member 51 is preferably made of a resin material with a high thermal softening point; for example, PPS (Poly Phenylene Sulfide) resin can be used. However, it is not particularly limited to any material that does not deform under heat within the operating temperature range of the semiconductor device and has insulating properties.
[0055] Epoxy resin is used as the DP encapsulating resin 7, but it is not limited to this; any material having the desired elastic modulus and heat resistance can be used, for example, a urethane resin that combines insulating and adhesive properties.
[0056] Figures 3 to 8 show examples of methods for manufacturing a semiconductor device according to this embodiment. The method for manufacturing a semiconductor device according to this embodiment will be explained using Figures 3 to 8.
[0057] First, Figure 3 shows an insulating substrate 10 in which a copper conductor layer 12 is formed on the upper surface of an insulating substrate 11 and a copper conductor layer 13 is formed on the lower surface.
[0058] Next, as shown in Figure 4, the diode 21 and IGBT 22 are positioned and mounted on the copper conductor layer 12 on the upper surface of the insulating substrate 10 via a plate-shaped solder 31, and solder die bonding is performed by heating and melting the solder 31 using a reflow oven.
[0059] Next, as shown in Figure 5, a silicone adhesive 8 is applied to the inner circumference of the case member 51 in which the main terminal 60 or signal terminal 62 is insert-molded. Then, the ceramic insulating substrate 10 is positioned and mounted, and the adhesive 8 is cured by heating in an oven at a temperature of 50°C or higher and 150°C or lower for 30 minutes.
[0060] Next, as shown in Figure 6, molten solder 32 is poured into the main terminal 60 through openings corresponding to the source electrodes of the diode 21 and IGBT 22, thereby forming the main circuit.
[0061] Next, as shown in Figure 7, a bonding wire 4 is used to connect the gate electrode or temperature sensor electrode of the IGBT 22 to the signal terminal 62 extending from the case member 51 by wire bonding. This configuration is referred to as configuration 100.
[0062] Finally, as shown in Figure 8, the DP encapsulating resin 7 is poured in while heated to, for example, 40°C or higher and 90°C or lower, then vacuum degassed and heated (for example, held at 50°C or higher and 200°C or lower for a predetermined time) to cure and complete the encapsulation. In this way, the semiconductor device is completed.
[0063] Figure 9 is a schematic side view showing an example of the configuration of a vacuum injection apparatus for injecting the DP encapsulating resin shown in Figure 8. The details of the resin injection process will be explained with reference to Figure 9.
[0064] Multiple semiconductor devices (i.e., configuration 100 shown in Figure 7) are placed on a transport pallet 71 before the sealing resin is poured into them, and then transported into the vacuum chamber 70 of the vacuum injection device. After transport, the entrance (not shown) of the transport pallet 71 in the vacuum chamber 70 is closed, and the gas inside the vacuum chamber 70 is discharged from the exhaust port 72.
[0065] Then, for example, after evacuating the vacuum chamber 70 to a low vacuum of 100 Pa or more and 10,000 Pa or less, the semiconductor device (configuration 100) placed on the transport pallet 71 is moved directly below the injection nozzle 73 of the resin injection device. The tip of the injection nozzle 73 is located inside the vacuum chamber 70. Then, a predetermined amount of resin is injected from the injection nozzle 73 into the case of configuration 100.
[0066] The resin injected from the injection nozzle 73 is subjected to a defoaming treatment in a separately prepared tank, where the volume of gas in the resin liquid is increased under reduced pressure to promote defoaming by buoyancy. However, residual gas may dissolve into the resin in the piping path from the tank to the injection nozzle 73. Also, during resin injection, depending on the discharge flow rate of the resin, gas near component 100 may be entrained.
[0067] After resin injection, the transport pallet 71 moves. Then, the semiconductor device is held on the transport pallet 71 for a certain period of time while maintaining a reduced pressure state so that the gas in the resin of the resin-injected semiconductor device is naturally discharged from the resin.
[0068] Furthermore, during the period of time the semiconductor device is held, resin is injected from the injection nozzle 73 to another semiconductor device that has been moved directly below the injection nozzle 73 on the transport pallet 71. This increases production efficiency.
[0069] After a predetermined amount of resin has been injected into all the semiconductor devices mounted on the transport pallet 71, and a certain period of time has elapsed during which the vacuum chamber 70 is held under reduced pressure for degassing, the air in the vacuum chamber 70 is released at a predetermined time. After the air in the vacuum chamber 70 is released, the transport pallet 71 is removed from the outlet (not shown), and the semiconductor devices are transported on the pallet to the next process, the resin curing process.
[0070] Figure 9 illustrates a vacuum injection device into which resin is injected into three components 100, but the number of components 100 into which resin is injected may be greater than that. Also, the number of injection nozzles 73 provided in the vacuum injection device is not limited to one, but may be provided with multiple injection nozzles 73.
[0071] The holding time under reduced pressure required to degas the injected resin, the evacuation time of the vacuum chamber 70 housing the multiple semiconductor devices and the transport pallet 71, and the time for restoring the vacuum chamber 70 to atmospheric pressure are adjusted according to the degassing rate of the resin. In the configuration shown in Figure 9, the loading of the configuration 100 by the transport pallet 71, the evacuation of the vacuum chamber 70, the injection of resin, the holding of the semiconductor devices for degassing, and the restoration of the vacuum chamber 70 to atmospheric pressure are performed in succession, resulting in a long overall time required for the resin injection process.
[0072] Figure 10 shows an example of the configuration of a semiconductor device according to this embodiment. As shown in the example in Figure 10, for one configuration 100, a lid jig 90 having a flat portion opposite to the flat portion of the peripheral edge of the case member 51 seals the internal case region 205, which is the region in which the resin of the semiconductor device is injected.
[0073] The lid jig 90 comprises a flat plate-shaped lid portion 105 having a size that overlaps with the component 100 in a plan view, a flange-shaped exhaust port 91 provided on the lid portion 105, an injection nozzle 92 provided on the lid portion 105 for injecting resin, a projection 192 provided on the lid portion 105 to avoid interference with the signal terminal 62, and an O-ring 93 provided on the flat portion of the lid portion 105 that faces the flat portion of the peripheral edge of the case member 51 for maintaining a vacuum in the case interior region 205.
[0074] Figure 11 is a cross-sectional view showing an example of the configuration of a semiconductor device according to this embodiment with the cover jig 90 attached. As shown in the example in Figure 11, the exhaust port 91 is connected to an exhaust pipe 193 connected to a vacuum pump 97. The internal region 205 of the case is depressurized via the exhaust pipe 193. A leak valve 99 for venting to the atmosphere is provided as a branch of the exhaust pipe 193. The injection nozzle 92 is connected to a pipe 194 connected to a mixer 98. The pipe 194 is provided with an on / off valve (not shown) for controlling the resin flow.
[0075] As shown in Figures 10 and 11, by attaching the lid jig 90 to the configuration 100, the volume to be evacuated and reduced in pressure can be reduced. Therefore, the evacuation time and the time to restore pressure to atmospheric pressure can be shortened.
[0076] The material for the lid jig 90 is preferably stainless steel, aluminum, or plated steel such as Ni, or alloys such as Fe, Mo, or Mg, which have a heat resistance temperature of 180°C and material rigidity and thickness that can withstand a pressure of 100 Pa.
[0077] Figure 12 is a plan view showing an example of the configuration of the semiconductor device according to this embodiment, with the cover jig 90 attached to the configuration 100. In Figure 12, for convenience, the cover jig 90 is shown as a dotted line with transparency.
[0078] An O-ring 93 is provided on the peripheral edge of the lid jig 90 in a plan view to maintain a vacuum in the case interior region 205. The case interior region 205 is sealed when the O-ring 93 contacts the peripheral edge of the case member 51. A groove may be formed on the peripheral edge of the case member 51 to fix the position of the O-ring 93, and by using grease or the like to improve the airtightness of the O-ring 93, leakage during exhaust can be effectively prevented.
[0079] As shown in Figure 12, the position of the injection nozzle 92 in the lid jig 90 in a plan view is preferably such that it avoids being directly above the main terminal 60. When the viscosity of the resin injected through the injection nozzle 92 is between 1000 mPaS and tens of thousands of mPaS, if vacuum bubbles are drawn into the resin flowing under the main terminal 60 during injection, these vacuum bubbles become difficult to remove. This phenomenon is more likely to occur when the injection nozzle 92 is located directly above the main terminal 60, so the possibility of this phenomenon occurring can be reduced by positioning the injection nozzle 92 in a location that avoids being directly above the main terminal 60. Furthermore, in order for the injected resin to spread into the case interior region 205 as quickly as possible, it is desirable to position the injection nozzle 92 near the center of the case interior region 205 in a plan view.
[0080] On the other hand, if the viscosity of the injected resin is several hundred mPaS or less, the resin has high fluidity and vacuum bubbles are easy to remove, so there are no particular positional constraints on the injection nozzle 92, and it is sufficient if it is inside the case interior region 205 in a plan view. Similarly, the exhaust port 91 is sufficient if it is inside the case interior region 205 in a plan view.
[0081] Next, a method for manufacturing a semiconductor device according to this embodiment, using the cover jig 90, will be described.
[0082] The lid jig 90 is aligned with the configuration 100 in a plan view and placed down so that the internal region 205 of the semiconductor device case is sealed. Next, the internal region 205 of the case is evacuated using a vacuum pump 97 through the exhaust port 91, pressurizing the lid jig 90 with air, and the internal region 205 of the case is sealed by crushing the O-ring 93. Then, the vacuuming of the internal region 205 of the case proceeds.
[0083] As described above, the internal case region 205 is sealed by the lid fixture 90, which reduces the exhaust volume. Therefore, even with a smaller vacuum pump than a large vacuum injection device (for example, the vacuum injection device illustrated in Figure 9) used to vacuum a volume encompassing multiple components 100 simultaneously, the desired pressure (for example, 100 Pa or more and 10,000 Pa or less) can be reached in a short time.
[0084] Then, once the pressure is reduced to a predetermined level, the resin is dispensed from the resin mixer 98 using a pump or compressed air, and injected through the injection nozzle 92 to fill the case interior region 205 of the semiconductor device with DP sealing resin 7. That is, the case interior region 205, which is sealed by the lid jig 90, is depressurized by the action of a vacuum pump, and under reduced pressure, the DP sealing resin 7 is injected into the case interior region 205 from the injection nozzle 92. The mixer 98 may be a cylinder filled with pre-mixed resin or a tube of a one-component type resin.
[0085] By keeping the internal case region 205 under vacuum when the resin is injected, gas entrapment during resin injection is reduced. Furthermore, by keeping the internal case region 205 under vacuum when the resin is injected, gases that dissolve into the resin in the piping 194 that delivers the resin to the internal case region 205 also reach the resin surface when the resin is spread in the internal case region 205, promoting bubble removal. As a result, the vacuum holding time for degassing can be shortened.
[0086] After the air bubbles have been removed, the leak valve 99, which branches off from the exhaust pipe 193, is opened to draw in air and release it to the atmosphere. Because the volume of the case interior region 205 is kept small by the cover jig 90, the time required for releasing to the atmosphere to restore pressure can also be shortened. Therefore, the resin injection process can be completed in a short time overall.
[0087] Furthermore, the cover fixture 90 is not limited to being provided as a single unit on a single semiconductor device; a semiconductor device may have multiple units of cover fixture 90 mounted on it. Also, although the leak valve 99 is provided branching off from the exhaust pipe 193, the leak valve may be attached to the cover fixture 90 via a new pipe.
[0088] <Second Embodiment> A semiconductor device and a method for manufacturing a semiconductor device according to this embodiment will be described. In the following description, components similar to those described in the embodiments described above will be denoted by the same reference numerals, and their detailed descriptions will be omitted as appropriate.
[0089] <About the configuration of semiconductor devices> In this embodiment, a configuration in which the peripheral edge of the semiconductor device is not in contact with the cover jig will be described.
[0090] Figure 13 is a cross-sectional view showing an example of the configuration of a semiconductor device according to this embodiment with the cover jig 90A attached. As shown in the example in Figure 13, the cover jig 90A comprises a cover portion 105, a flange-shaped exhaust port 91, an injection nozzle 92, a support jig 94 that supports the semiconductor device via an O-ring 93A, and an O-ring 93 provided on the flat portion of the cover portion 105 facing the flat portion of the peripheral edge of the support jig 94 for maintaining a vacuum in the case interior region 205. The support jig 94 supports the side surface of the case member 51 of the semiconductor device via the O-ring 93A and supports the semiconductor device while in contact with the bottom surface of the case member 51. In a plan view, the support jig 94 is arranged surrounding the case member 51. The upper surface of the support jig 94 surrounding the case member 51 in a plan view is a continuous plane in the circumferential direction. The exhaust port 91 is connected to an exhaust pipe 193 connected to a vacuum pump. The receiving jig 94 and the lid 105 overlap in a plan view, and the area occupied by both in a plan view is larger than that of the semiconductor device.
[0091] Then, the case interior region 205 is sealed by covering the top surface of the receiving jig 94 with the lid jig 90A, and in this state, the case interior region 205 is filled with DP sealing resin 7. That is, the case interior region 205 sealed by the lid jig 90A is depressurized by the action of a vacuum pump, and under reduced pressure, the DP sealing resin 7 is injected into the case interior region 205 from the injection nozzle 92.
[0092] In this embodiment, however, it is not essential that the upper surface of the case member 51 be a continuous plane in the circumferential direction.
[0093] Figure 14 shows an example of the configuration of a semiconductor device according to this embodiment. As shown in the example in Figure 14, the receiving jig 94 includes a receiving portion 89 for positioning the semiconductor device.
[0094] The case interior region 205 is sealed when the O-ring 93 contacts the peripheral edge of the support fixture 94. The peripheral edge of the support fixture 94 may have a groove to fix the position of the O-ring 93, and by using grease or the like to improve the airtightness of the O-ring 93, leakage during exhaust can be effectively prevented.
[0095] Furthermore, the O-ring 93A contacts the side of the support fixture 94 and the side of the case member 51, thereby sealing the internal case region 205. The side of the support fixture 94 may have a groove to fix the position of the O-ring 93A, and by using grease or the like to improve the airtightness of the O-ring 93A, leakage during exhaust can be effectively prevented.
[0096] Furthermore, the O-ring for ensuring a vacuum in the internal region 205 of the case may be provided within the receiving portion 89.
[0097] <Third Embodiment> A semiconductor device and a method for manufacturing a semiconductor device according to this embodiment will be described. In the following description, components similar to those described in the embodiments described above will be denoted by the same reference numerals, and their detailed descriptions will be omitted as appropriate.
[0098] <About the configuration of semiconductor devices> Figure 15 is a cross-sectional view showing an example of the configuration of a semiconductor device according to this embodiment with the lid jig 90B attached. As shown in the example in Figure 15, the lid jig 90B comprises a lid portion 105, a flange-shaped exhaust port 91, an injection nozzle 92, a projection 192 to avoid interference with the signal terminal 62, an O-ring 93 provided on the flat portion of the lid portion 105 facing the flat portion of the peripheral edge of the case member 51 for maintaining a vacuum in the case interior region 205, and a heater 96 for heating the DP sealing resin 7 filled in the case interior region 205. The exhaust port 91 is connected to an exhaust pipe 193 connected to a vacuum pump.
[0099] By bringing the electrode terminals (main terminals 60 or signal terminals 62) or case member 51 provided on the semiconductor device into contact with the lid jig 90B and heating them with the heater 96, the electrode terminals, case member 51, and the internal case region 205 can be heated and kept warm. Preferably, the contact portion between the lid jig 90B and the electrode terminals or case member 51 provided on the semiconductor device is made of a metal with high thermal conductivity, such as stainless steel or aluminum.
[0100] Furthermore, by heating the case interior region 205, the heater 96 can indirectly maintain the temperature of the resin injected into the case interior region 205 within a range of 40°C or higher and 100°C or lower. This allows the resin to be injected into the case interior region 205 without increasing its viscosity due to resin cooling, and also facilitates the removal of air bubbles trapped during resin injection. Additionally, by heating and maintaining the temperature of the electrode terminals or case member 51 and the case interior region 205 while keeping them in contact with the lid jig 90B, the fluidity of the resin after injection does not decrease, and the time required to fill the entire case interior region 205 with resin can be shortened.
[0101] <Fourth Embodiment> A power converter according to this embodiment and a method for manufacturing the power converter will be described below. In the following description, components similar to those described in the embodiments described above will be denoted by the same reference numerals, and their detailed descriptions will be omitted as appropriate.
[0102] <Regarding the configuration of the power converter> This embodiment applies the semiconductor device according to the first, second, or third embodiment described above to a power converter. The power converter to which it is applied is not limited to any particular application, but the following description will focus on its application to a three-phase inverter.
[0103] Figure 16 is a conceptual diagram showing an example of the configuration of a power conversion system including the power conversion device of this embodiment.
[0104] The power conversion system shown in Figure 16 comprises a power supply 100A, a power converter 200, and a load 300.
[0105] The power supply 100A is a DC power supply that supplies DC power to the power converter 200. The power supply 100A can be composed of various components, such as a DC grid, solar cells, or batteries, or it may be composed of a rectifier circuit or AC / DC converter connected to an AC grid. Alternatively, the power supply 100A may be composed of a DC / DC converter that converts the DC power output from the DC grid into a predetermined power.
[0106] The power converter 200 is a three-phase inverter connected between the power supply 100A and the load 300. It converts the DC power supplied from the power supply 100A into AC power and supplies the AC power to the load 300. As shown in Figure 16, the power converter 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.
[0107] Load 300 is a three-phase electric motor driven by AC power supplied from power converter 200. Note that Load 300 is not limited to a specific application; it is an electric motor installed in various electrical devices, such as hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning equipment.
[0108] The details of the power converter 200 are described below. The main conversion circuit 201 is equipped with switching elements and freewheeling diodes (not shown here), and by switching the switching elements, it converts the DC power supplied from the power supply 100A into AC power and supplies it to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 in this embodiment is a two-level three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes antiparallel to each switching element. Each switching element or each freewheeling diode of the main conversion circuit 201 is composed of a semiconductor device 202 corresponding to either the first or second embodiment described above. The six switching elements are connected in series in pairs to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.
[0109] Furthermore, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built into the semiconductor device 202, or it may be configured to be a separate drive circuit from the semiconductor device 202. The drive circuit generates a drive signal to drive the switching elements of the main conversion circuit 201 and supplies it to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, according to the control signal from the control circuit 203, which will be described later, it outputs a drive signal to turn on the switching element and a drive signal to turn off the switching element to the control electrodes of each switching element. When the switching element is kept in the ON state, the drive signal is a voltage signal (ON signal) that is greater than or equal to the threshold voltage of the switching element, and when the switching element is kept in the OFF state, the drive signal is a voltage signal (OFF signal) that is less than or equal to the threshold voltage of the switching element.
[0110] The control circuit 203 controls the switching elements of the main converter circuit 201 so that the desired power is supplied to the load 300. Specifically, it calculates the time (on time) that each switching element of the main converter circuit 201 should be in the ON state based on the power to be supplied to the load 300. For example, the main converter circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. Then, it outputs a control command (control signal) to the drive circuit of the main converter circuit 201 so that an ON signal is output to the switching element that should be in the ON state at each point in time, and an OFF signal is output to the switching element that should be in the OFF state. The drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to this control signal.
[0111] In the power conversion device according to this embodiment, semiconductor devices according to the first, second, or third embodiment are used as the switching elements and freewheeling diodes of the main conversion circuit 201, thereby realizing a power conversion device with excellent insulation characteristics and long-term reliability.
[0112] In this embodiment, an example of applying this technology to a two-level three-phase inverter has been described, but this technology is not limited to this and can be applied to various power conversion devices. In this embodiment, a two-level power conversion device is used, but a three-level or multi-level power conversion device may also be used, and when supplying power to a single-phase load, this technology may be applied to a single-phase inverter. Furthermore, when supplying power to a DC load, this technology can also be applied to a DC / DC converter or an AC / DC converter.
[0113] Furthermore, the power conversion device to which this technology is applied is not limited to cases where the load is an electric motor, but can also be used, for example, as a power supply for an electrical discharge machine or laser processing machine, or as a power supply for an induction heating cooker or non-contact power supply system, and can even be used as a power conditioner for a solar power generation system or energy storage system.
[0114] <Regarding the manufacturing method of power converters> Next, a method for manufacturing a power conversion device according to this embodiment will be described.
[0115] First, a semiconductor device is manufactured using the manufacturing method described in the embodiments described above. Then, a main conversion circuit 201 having the semiconductor device is provided as part of the power conversion device. The main conversion circuit 201 is a circuit for converting and outputting the input power.
[0116] A control circuit 203 is provided as part of the configuration of the power conversion device. The control circuit 203 is a circuit that outputs a control signal to the main conversion circuit 201 for controlling the main conversion circuit 201.
[0117] <Regarding the effects produced by the embodiments described above> Next, examples of the effects produced by the embodiments described above will be shown. In the following description, the effects will be described based on the specific configurations illustrated in the embodiments described above, but they may be replaced with other specific configurations illustrated in this specification to the extent that similar effects are produced. That is, for convenience, in the following, only one of the corresponding specific configurations may be described as representative, but the specific configuration described as representative may be replaced with another corresponding specific configuration.
[0118] Furthermore, such substitutions may be made across multiple embodiments. That is, the respective configurations exemplified in different embodiments may be combined to produce similar effects.
[0119] According to the embodiment described above, the semiconductor device comprises an insulating substrate 10, a semiconductor element, a main terminal 60, a case member 51, and a sealing resin. Here, the semiconductor element corresponds to at least one of, for example, a diode 21, an IGBT 22, etc. The sealing resin corresponds to, for example, a DP sealing resin 7. The IGBT 22 is provided on the upper surface of the insulating substrate 10. The main terminal 60 is electrically connected to the upper surface of the IGBT 22. The case member 51 is provided surrounding the insulating substrate 10 in a plan view. The DP sealing resin 7 covers a part of the main terminal 60, the insulating substrate 10, and the IGBT 22. The DP sealing resin 7 is also filled into the case interior region 205, which is the region surrounded by the case member 51 and the insulating substrate 10. Here, the upper surface of the case member 51 surrounding the insulating substrate 10 in a plan view is a plane that is continuous in the circumferential direction.
[0120] With this configuration, the upper surface of the case member 51 has a flat shape that is easy to seal with a lid jig, making it easy to control the pressure in the case interior region 205 in a short time. This promotes degassing of the DP sealing resin 7 injected into the case interior region 205, while enabling good resin injection. In addition, since both the time for depressurizing the case interior region 205 and the time for restoring pressure to atmospheric pressure are shortened, the overall time for the resin injection process can be reduced. Thus, a semiconductor device with high pressure resistance and excellent insulation properties can be obtained, filled with sufficiently degassed resin.
[0121] Furthermore, the same effect can be achieved even if other configurations exemplified in this specification are added to the above configuration as appropriate, that is, if other configurations in this specification that were not mentioned as the above configuration are added as appropriate.
[0122] Furthermore, according to the embodiment described above, the DP sealing resin 7 is filled into the depressurized case interior region 205 while the upper surface of the case member 51 is covered with the lid jig 90 (or lid jig 90A, lid jig 90B). With this configuration, the case interior region 205 can be depressurized in a short time while the upper surface of the case member 51 is covered with the lid jig 90.
[0123] Furthermore, according to the embodiment described above, the power conversion device includes the above-mentioned semiconductor device and a main conversion circuit 201 that converts and outputs the input power, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 for controlling the main conversion circuit 201. With such a configuration, since the semiconductor device is filled with resin that has been sufficiently degassed even in a short resin injection process, a power conversion device with high withstand voltage and excellent insulation properties can be obtained.
[0124] According to the embodiment described above, in the method for manufacturing a semiconductor device, an IGBT 22 is provided on the upper surface of an insulating substrate 10. The insulating substrate 10 on which the IGBT 22 is provided is surrounded by a case member 51 in a plan view. Here, the upper surface of the case member 51 is a plane that is continuous in the circumferential direction. The main terminal 60 is electrically connected to the upper surface of the IGBT 22. The upper surface of the case member 51 is covered with a cover jig 90 (or cover jig 90A, cover jig 90B) to seal the case interior region 205, which is the area surrounded by the case member 51 and the insulating substrate 10. Here, the cover jig 90 includes an injection nozzle 73 for filling the case interior region 205 with DP sealing resin 7 and an exhaust pipe 193 for depressurizing the case interior region 205. The case interior region 205 is depressurized via the exhaust pipe 193 while the DP sealing resin 7 is filled into the case interior region 205 via the injection nozzle 73.
[0125] With this configuration, the case interior region 205 can be reduced in a short time while the upper surface of the case member 51 is covered with the lid jig 90. This promotes degassing of the DP sealing resin 7 injected into the case interior region 205, enabling good resin injection. In addition, since both the time required for depressurizing the case interior region 205 and the time required for restoring pressure to atmospheric pressure are shortened, the overall time for the resin injection process can be reduced.
[0126] Unless otherwise specified, the order in which each process is performed can be changed.
[0127] Furthermore, the same effect can be achieved even if other configurations exemplified in this specification are appropriately added to the above configuration, that is, if other configurations in this specification that are not mentioned as above configurations are appropriately added.
[0128] Furthermore, according to the embodiment described above, in the method for manufacturing a semiconductor device, the case member 51 is further surrounded by a receiving jig 94 in a plan view. Here, the upper surface of the receiving jig 94 is a plane that is continuous in the circumferential direction. Filling the case interior region 205 with the DP sealing resin 7 is done while the case interior region 205 is sealed by covering the upper surface of the receiving jig 94 with a lid jig 90A. With this configuration, even if the upper surface of the case member 51 is not in contact with the lid jig, the receiving jig 94, which surrounds the case member 51, comes into contact with the lid jig 90A, sealing the case interior region 205, thereby allowing the case interior region 205 to be reduced in a short time.
[0129] Furthermore, according to the embodiments described above, the lid jig 90B is equipped with a heater 96 for heating the DP sealing resin 7. In the semiconductor device manufacturing method, filling the case interior region 205 with the DP sealing resin 7 involves filling the case interior region 205 with the DP sealing resin 7 while heating it with the heater 96. With this configuration, the resin can be poured into the case interior region 205 without increasing its viscosity due to resin cooling, and air bubbles trapped during resin injection can be easily removed.
[0130] <Modifications of the embodiments described above> In the embodiments described above, the material, dimensions, shape, relative arrangement, or implementation conditions of each component may also be described, but these are merely examples and not limiting in all aspects.
[0131] Accordingly, countless variations and equivalents not shown are envisioned within the scope of the art disclosed herein. These include, for example, modifications, additions, or omissions of at least one component, as well as the extraction of at least one component from at least one embodiment and its combination with a component from another embodiment.
[0132] Furthermore, in the embodiments described above, if a material name or the like is mentioned without further specification, it is assumed that the material includes other additives, such as alloys, unless otherwise specified, as long as it does not create a contradiction.
[0133] Furthermore, the descriptions in this specification are referenced for all purposes related to the present technology and are not considered to be prior art.
[0134] The various aspects of this disclosure are summarized below as an appendix.
[0135] (Note 1) Insulating substrate and A semiconductor element provided on the upper surface of the insulating substrate, The main terminal electrically connected to the upper surface of the semiconductor element, A case member is provided surrounding the insulating substrate in a plan view, The case comprises a sealing resin that covers a portion of the main terminal, the insulating substrate, and the semiconductor element, and fills the case interior region which is the region surrounded by the case member and the insulating substrate. In a plan view, the upper surface of the case member surrounding the insulating substrate is a continuous plane in the circumferential direction. Semiconductor equipment.
[0136] (Note 2) A semiconductor device as described in Appendix 1, and a main conversion circuit that converts and outputs the input power, The system includes a control circuit that outputs a control signal to the main conversion circuit for controlling the main conversion circuit, Power converter.
[0137] (Note 3) A semiconductor element is provided on the upper surface of the insulating substrate. The insulating substrate on which the semiconductor element is provided is enclosed by a case member in a plan view. The upper surface of the case member is a continuous plane in the circumferential direction. The main terminal is electrically connected to the upper surface of the semiconductor element. The upper surface of the case member is covered with a lid jig, and the internal case region, which is the area surrounded by the case member and the insulating substrate, is sealed. The lid jig comprises an injection nozzle for filling the internal region of the case with sealing resin and an exhaust pipe for reducing the pressure in the internal region of the case. The sealing resin is filled into the internal region of the case via the injection nozzle while depressurizing the internal region of the case through the exhaust pipe. A method for manufacturing a semiconductor device.
[0138] (Note 4) The method for manufacturing a semiconductor device as described in Appendix 3, The aforementioned case member is further surrounded by a support jig in a plan view, The upper surface of the aforementioned support fixture is a continuous plane in the circumferential direction, Filling the internal region of the case with the sealing resin is performed while the internal region of the case is sealed by covering the upper surface of the receiving jig with the lid jig. A method for manufacturing a semiconductor device.
[0139] (Note 5) A method for manufacturing a semiconductor device as described in Appendix 3 or 4, The lid fixture further comprises a heater for heating the sealing resin, Filling the internal region of the case with the sealing resin involves filling the internal region of the case with the sealing resin while heating the sealing resin with the heater. A method for manufacturing a semiconductor device. [Explanation of Symbols]
[0140] 7 sealing resin, 10 insulating substrate, 51 case component, 60 main terminal, 73 injection nozzle, 90 cover jig, 90A cover jig, 90B cover jig, 92 injection nozzle, 94 receiving jig, 96 heater, 193 exhaust piping, 194 piping, 200 power converter, 201 main converter circuit, 202 semiconductor device, 203 control circuit, 205 internal case area.
Claims
1. A semiconductor element is provided on the upper surface of the insulating substrate. The insulating substrate on which the semiconductor element is provided is enclosed by a case member in a plan view. The upper surface of the case member is a continuous plane in the circumferential direction. The main terminal is electrically connected to the upper surface of the semiconductor element. The upper surface of the case member is covered with a lid jig, and the internal case region, which is the area surrounded by the case member and the insulating substrate, is sealed. The lid jig comprises an injection nozzle for filling the internal region of the case with sealing resin and an exhaust pipe for reducing the pressure in the internal region of the case. The sealing resin is filled into the internal region of the case via the injection nozzle while depressurizing the internal region of the case through the exhaust pipe. A method for manufacturing a semiconductor device.
2. A method for manufacturing a semiconductor device according to claim 1, The aforementioned case member is further surrounded by a support jig in a plan view, The upper surface of the aforementioned support fixture is a continuous plane in the circumferential direction, Filling the internal region of the case with the sealing resin is performed while the internal region of the case is sealed by covering the upper surface of the receiving jig with the lid jig. A method for manufacturing a semiconductor device.
3. A method for manufacturing a semiconductor device according to claim 1 or 2, The lid fixture further comprises a heater for heating the sealing resin, Filling the internal region of the case with the sealing resin involves filling the internal region of the case with the sealing resin while heating the sealing resin with the heater. A method for manufacturing a semiconductor device.