Power converter

Abstract

The present invention comprises: a main converter (3) that has one end side connected to an inductor (2), and a DC positive electrode (P), a negative electrode (N), and a neutral point (O) set on the other end side; a capacitor circuit (5) that has a positive electrode terminal (P), a negative electrode terminal (N), and a neutral point (O) connected to the DC side; a sub-converter (4) that is composed of a capacitor (Csx) and a plurality of elements (Sx7–Sx10), is connected between the neutral point (O) of the capacitor circuit (5) and the neutral point (O) of the main converter (3), and in which a capacitor voltage (Vsx) changes according to a combination of opening / closing settings for the elements (Sx7–Sx10); and a control unit (6) that controls the operation of the main converter (3) and the sub-converter (4).

Description

Technical Field

[0001] The present disclosure relates to a power conversion device.

Background Art

[0002] Power conversion devices such as inverters and converters that convert power between DC and three-phase AC are used in various applications and are required to be miniaturized and lightened. Therefore, a multilevel power conversion device (see, for example, Patent Document 1 and Non-Patent Document 1) is applied to reduce the volume of passive components such as capacitors, inductors, and resistors in the power conversion device.

[0003] Since the multilevel power conversion device burdens a semiconductor switching element and a smoothing capacitor with a voltage lower than the DC voltage, it is possible to apply a low-voltage withstand semiconductor switching element and a low-voltage withstand capacitor, and large power output and high power density can be realized. In addition, since it can output a multilevel voltage, by increasing the number of voltage levels, the energy stored in the inductor can be reduced, and miniaturization and low loss of the inductor can be realized.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Non-Patent Documents

[0005]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] On the other hand, in typical multilevel power conversion devices such as the diode clamp method, the flying capacitor method, and the cascade connection method, many semiconductor switching elements, bidirectional semiconductor switching elements, capacitors, etc. are added. For example, in the diode clamp method, many diodes are added, and at 4 levels or more, capacitor balance control becomes complicated, and the volume increases due to an external voltage balance circuit. In the flying capacitor method, although the balance control of the capacitor voltage is simple, many capacitors are required and the size of the device increases. Also, in the cascade connection method, since the DC part cannot be shared, an independent DC power supply is required, increasing the size and weight of the device. That is, in any method, conventional multilevel power conversion devices have had the problem that the volume and cost of the power conversion device increase.

[0007] This disclosure discloses a technique for solving the above problems, and aims to obtain a power conversion device that can output a multilevel voltage by applying low-breakdown-voltage semiconductor switching elements without increasing the size and weight of the device.

Means for Solving the Problems

[0008] The power conversion device of the present disclosure is characterized by comprising: an inductor provided for each phase on the AC side; a main converter having one end connected to the inductor and the other end having a DC positive terminal, a DC negative terminal and a neutral point; a capacitor circuit having a positive terminal, a DC negative terminal and a neutral point connected to the DC side; a subconverter composed of a capacitor and a plurality of semiconductor switching elements, connected between the neutral point of the capacitor circuit and the neutral point of the main converter, the capacitor voltage changing according to the combination of switching settings for the plurality of semiconductor switching elements; and a control unit that controls the operation of the main converter and the subconverter. [Effects of the Invention]

[0009] According to the power conversion device of this disclosure, a low-voltage semiconductor switching element can be applied to the subconverter, making it possible to obtain a power conversion device capable of outputting multilevel voltages without increasing the size and weight of the device. [Brief explanation of the drawing]

[0010] [Figure 1] Figures 1A and 1B are circuit diagrams illustrating the configuration of the power conversion device according to Embodiment 1 and the configuration of the submodules constituting the power conversion circuit, respectively. [Figure 2] This is a circuit diagram illustrating the power conversion circuit for one phase of the power conversion device according to Embodiment 1. [Figure 3] This is a table-format diagram showing the output terminal voltage and switch settings for each switching state in the power converter according to Embodiment 1. [Figure 4] Figures 4A to 4F are diagrams showing the conduction paths for each switching state in the power conversion circuit of one phase of the power conversion device according to Embodiment 1. [Figure 5] This diagram, in table format, shows the output voltage for each switching state and the output voltage in the current direction, the capacitor charge / discharge state of the subconverter, and the charge / discharge state of the positive and negative capacitors in the power converter according to Embodiment 1. [Figure 6] This is a circuit diagram illustrating the configuration of the control unit constituting the power conversion device according to Embodiment 1. [Figure 7] Figures 7A and 7B are schematic diagrams showing the transitions between modes and switching states in the power converter according to Embodiment 1, when the current direction is positive and when it is negative, respectively. [Figure 8] This is a schematic diagram showing the transition of modes and switching states in the power conversion device according to Embodiment 1, when the current direction is positive, along with the conduction path in the power conversion circuit for one phase. [Figure 9] This is a schematic diagram showing the transition of modes and switching states in the power conversion device according to Embodiment 1 when the current direction is negative, along with the conduction path in the power conversion circuit for one phase. [Figure 10] Figures 10A to 10D show the time-series changes in the modes set when the power converter is equipped with a zero voltage generation unit, and when the current is negative, respectively. [Figure 11] This is a block diagram showing an example of the hardware configuration of a control unit constituting the power conversion device of the present disclosure. [Modes for carrying out the invention]

[0011] Embodiment 1. Figures 1A to 10D are for explaining the configuration and operation of the power converter according to Embodiment 1. Figure 1A is a circuit diagram illustrating the configuration of the power converter, Figure 1B is a circuit diagram of a submodule that constitutes a subconverter of the power converter circuit, and Figure 2 is a circuit diagram illustrating the power converter circuit for one phase when a subconverter is configured using one submodule shown in Figure 1B for each phase.

[0012] Figure 3 is a table showing the output terminal voltage and switch on / off settings for each switching state in the single-phase power conversion circuit shown in Figure 2. Figures 4A to 4F are diagrams showing the conduction paths for each switching state in the single-phase power conversion circuit shown in Figure 2, as shown in Figure 3. Figure 5 is a table showing the output voltage relative to the output terminal voltage and current direction for each switching state shown in Figure 3, the capacitor charge / discharge state of the subconverter, and the charge / discharge state of the positive and negative capacitors. In Figures 4A to 4F, the power conversion circuit itself is drawn with thin lines to highlight the current path. The same applies to Figures 8 and 9, which will be described later.

[0013] Furthermore, Figure 6 is a circuit diagram illustrating the configuration of the control unit that controls the switching of the switching state described above, Figure 7A is a schematic diagram showing the transition of modes and switching states with set values ​​when the current direction is positive, and Figure 7B is a schematic diagram showing the transition of modes and switching states with set values ​​when the current direction is negative. In Figures 7A and 7B, the information is presented from left to right in the following order: mode, output terminal voltage, and the open / closed state of each of the four switches.

[0014] Figure 8 is a schematic diagram corresponding to Figure 7A, showing the transition of modes and switching states when the current direction is positive, along with the conduction path in a single-phase power conversion circuit. Figure 9 is a schematic diagram corresponding to Figure 7B, showing the transition of modes and switching states when the current direction is negative, along with the conduction path in a single-phase power conversion circuit.

[0015] Figures 10A and 10B show the time-series changes in the modes set in the switching elements within the submodule when the current is positive, with the zero voltage generation unit not provided and with the zero voltage generation unit provided, respectively. Figures 10C and 10D show the time-series changes in the modes set in the switching elements within the submodule when the current is negative, with the zero voltage generation unit not provided and with the zero voltage generation unit provided, respectively.

[0016] As shown in Figure 1A, the power conversion device 10 of this disclosure includes a power conversion circuit 1 having DC-side terminals P, O, N connected to a DC power supply or DC equipment, and AC-side terminals R, S, T connected to an AC power supply or AC equipment, and a control unit 6 that controls the operation of the power conversion circuit.

[0017] The power conversion circuit 1 is arranged in the following order from the AC side terminals (R, S, T) to the DC side terminals (P, O, N): inductor 2, main converter 3, and capacitor circuit 5. It is characterized by having multiple submodules 7, as shown in Figure 1B, connected in series, and a subconverter 4 positioned between the neutral points O of the main converter 3 and the capacitor circuit 5.

[0018] By outputting multilevel voltages from the AC output terminals (R, S, T) of the main converter 3, a voltage equal to the difference between the multilevel voltage and the AC terminal voltage is applied to the inductor 2 connected between the main converter 3 and the AC terminals (R, S, T). A subconverter 4 is connected between the neutral point O of the DC terminals and the DC terminals of the main converter 3. The positive terminal P and negative terminal N of the DC terminals are connected to the terminals of the main converter 3, respectively. The main converter 3 can output multilevel voltages by outputting voltages corresponding to the positive voltage, negative voltage, and the output terminal voltage of the subconverter 4.

[0019] In Figure 1A, the main converter 3 is shown as a power conversion circuit 1 capable of bidirectional power conversion using an active neutral point clamping method, but it may also be configured to be capable of unidirectional power conversion only. In that case, the number of semiconductor switching elements in the main converter 3 can be reduced by changing the semiconductor switching elements to diodes. In Figure 1B, the sub-converter 4 is a two-level full-bridge converter containing at least one capacitor as one submodule 7, and at least one submodule 7 is connected between the neutral point O of the main converter 3 and the capacitor circuit 5. If the neutral point voltage is the reference potential (GND, 0V), the output terminal voltage of the sub-converter 4 will be the positive voltage, negative voltage, or 0V of the capacitor voltage Vsx of the sub-converter 4.

[0020] The control unit 6 controls the switching (off and on) operation of the main converter 3 and sub-converter 4 based on information such as the AC side output terminal voltages vr, vs, vt, positive side capacitor voltage Vmp, negative side capacitor voltage Vmn, sub-converter 4 capacitor voltages Vsr, Vss, Vst (indicated as "Vsx" in Figure 1B), and inductor currents ir, is, it.

[0021] The control unit 6 controls the capacitor voltages of the sub-converter 4. The control unit 6 also controls the positive and negative voltages. Furthermore, the control unit 6 controls the inductor currents. Note that the controlled state quantities may change depending on the systems connected to the input and output (voltage sources, current sources, passive components).

[0022] The main converter 3 and sub-converter 4 are not limited to the exemplified configuration, and may also be 2-level, diode clamp, flying capacitor, T-type, neutral point clamp, etc., and may have any number of output levels, not just 2 or 3 levels. However, the main converter 3 must be configured to be connectable to the neutral point, and the sub-converter 4 is connected between the neutral point connection point of the main converter 3 and the neutral point of the capacitor circuit 5. The capacitor Csx of the sub-converter 4 may be an external power source such as a battery. When limiting power conversion to unidirectional AC to DC only, some of the semiconductor switching elements of the main converter 3 and sub-converter 4 may be changed to diodes.

[0023] The semiconductor switching element may be a silicon (Si) or silicon carbide (SiC) based MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or IGBT (Insulated Gate Bipolar Transistor), as well as a gallium nitride (GaN) power transistor or a gallium oxide (GaO) power transistor. Although there is only one semiconductor switching element symbolically, multiple parallel or multiple series connections may be used to increase current capacity or voltage withstand capability. In the case of multiple parallel or multiple series connections, the semiconductor switching elements may be a mixture of the aforementioned silicon-based IGBTs and silicon carbide-based MOSFETs.

[0024] The inductor 2 connected between the AC terminal and the main converter 3 has at least one inductor L, and other passive components may be connected in series and parallel to the inductor 2. An LC filter, LCL filter, etc., may be connected to remove harmonic switching noise. A damping circuit may also be provided to suppress the resonance phenomenon of the filter.

[0025] The control unit 6 only needs to have one or more controllers. For example, different controllers may be used for the main converter 3 and the sub-converter 4, or separate controllers may be used for the main converter 3 and sub-converter 4 corresponding to each phase. Communication between controllers may be by wired or wireless communication. In addition, the current detection value, voltage detection value, temperature detection value, gate signal, etc. of the power conversion circuit 1 may be connected to the control unit 6 by wire or wirelessly.

[0026] The control unit 6 is composed of a CPU (Central Processing Unit), a DSP (Digital Signal Processor), an FPGA (Field-Programmable Gate Array), and analog circuits. Control may be applied so that the positive and negative voltages are the same. The control is performed so that the difference voltage between the positive and negative voltages becomes 0, and the capacitor voltage Vsx of the subconverter 4 is controlled to a predetermined voltage. Each voltage control of the control unit 6 is a PI (Proportional-Integral) control that brings the target voltage and the voltage detected by the voltage detection means closer together.

[0027] The voltage detection means may directly detect the voltages across the positive-side capacitor Cmp and the negative-side capacitor Cmn, respectively, as the positive and negative terminal voltages. Alternatively, the negative or positive terminal voltage may be estimated by subtracting the positive-side capacitor voltage Vmp or the negative-side capacitor voltage Vmn from the voltages across the positive and negative terminals. The capacitor voltage Vsx of the sub-converter 4 may be estimated from the capacitor current value. To reduce the number of voltage sensors, the capacitor voltage Vsx of the sub-converter 4 may be estimated from the switching patterns of the main converter 3 and the sub-converter 4, as well as the inductor currents ir, is, it, positive terminal voltage, negative terminal voltage, etc.

[0028] Furthermore, the control unit 6 may detect the inductor currents ir, is, and it, perform a dq (direct / quadrature) conversion, and control the current using PI control or the like to control the input and output power. It may also detect the inductor currents of all three phases. Alternatively, it may detect the inductor currents of two phases and calculate the current of the third phase based on Kirchhoff's first law. Alternatively, it may detect the AC voltages of all three phases and synchronize the phases using a PLL (Phase Locked Loop). Alternatively, it may detect the AC voltage of only one phase and calculate the undetected AC voltage by utilizing the fact that there is a 120-degree phase difference between the phases.

[0029] To reduce the number of current sensors, the inductor currents ir, is, and it may be estimated from the inductor voltage, AC-side terminal voltage, and the main converter output voltage command value in the control unit 6. A device consisting of passive components, electronic components, semiconductor switching elements, etc., may be connected to the AC terminal, and the output terminal from that device may be connected to the DC terminal. In other words, a common mode filter, a normal mode filter, a submodule, etc., may be connected.

[0030] Similarly, the terminals output from the devices described above that are connected to the DC terminals may be connected to the AC terminals. The AC terminals may be connected to, for example, motors, generators, AC systems, loads consisting of passive components, current sources, and voltage sources. The DC terminals may be connected to, for example, solar cells, fuel cells, batteries, loads consisting of passive components, LEDs (Light-Emitting Diodes), power converters, current sources, and voltage sources.

[0031] Although an example with a three-phase AC terminal is shown, single-phase and multi-phase configurations are also possible, and there are no restrictions on the phase configuration. In the case of a single-phase configuration, half-bridge and full-bridge configurations are possible. Even with a three-phase configuration, a V-connection method is used, where one phase is connected to the AC terminal and the neutral point. Each voltage in submodule 7 may be the same voltage or each may be a different voltage. The modulation method of submodule 7 can be any known modulation method used in single-phase circuits, such as bipolar modulation, unipolar modulation, or hybrid modulation.

[0032] The switching frequency of the main converter 3 may be set to the fundamental frequency of the AC side to reduce switching losses. Alternatively, the switching frequencies of the main converter 3 and the sub-converter 4 may be set to different frequencies to reduce switching losses. To reduce losses in the main converter 3, control may be applied in which the main converter 3 outputs a single pulse voltage and the sub-converter 4 compensates for the difference voltage. However, the absolute value of the voltage output by the sub-converter 4 must be lower than the absolute values ​​of the positive and negative voltages.

[0033] When forming the power conversion circuit 1 using the sub-converter 4 with the number of sub-modules 7 per phase being one (n = 1), the circuit diagram of the power conversion circuit 1x for one phase is as shown in Fig. 2. In Fig. 2, the switching elements (elements S ,

[0037] , , ,

[0036] , ~S x4 ) corresponding to the main converter 3 are configured in a T-type manner, but they may also be configured in a diode clamp method, a flying capacitor method, a neutral point clamp method, etc.

[0034] When no sub-module 7 is interposed between the main converter 3 and the neutral point O of the capacitor circuit 5, three-level output is possible, but by interposing one sub-module 7, it becomes possible to output five levels. When performing case-by-case analysis based on the output voltage for the five-level output, as shown in Fig. 3, there are six switching states.

[0035] [[ID=1​​​​​​​​​​​​​​​​​​​​​​​Figures 4A to 4F show the conduction paths within the power conversion circuit 1x for each of the six switching states shown in Figure 3. Here, the current direction from AC to DC (to the right) is considered positive. That is, Figures 4A to 4F show the case where the current direction is positive.

[0038] Switching state 1 is when the converter output terminal voltage Vxo is +Vmp. In switching state 1, as shown in Figure 4A, no current flows into the capacitor Csx of submodule 7, so the capacitor voltage Vsx does not fluctuate. On the other hand, in the capacitor circuit 5 on the DC terminal side, current flows into capacitors Cmp and Cmn, so the capacitor voltages Vmp and Vmn increase.

[0039] Switching state 2 is when the converter output terminal voltage Vxo is +Vsx. In switching state 2, as shown in Figure 4B, current flows into the capacitor Csx of submodule 7, so the capacitor voltage Vsx increases. On the other hand, in capacitor circuit 5, current flows out of capacitor Cmp and the capacitor voltage Vmp decreases, while current flows into capacitor Cmn and the capacitor voltage Vmn increases.

[0040] Switching state 3 is when the converter output terminal voltage Vxo is 0V. In switching state 3, as shown in Figure 4C, no current flows through the capacitor Csx of submodule 7, so the capacitor voltage Vsx does not change. On the other hand, in capacitor circuit 5, current flows out of capacitor Cmp, causing the capacitor voltage Vmp to decrease, while current flows into capacitor Cmn, causing the capacitor voltage Vmn to increase.

[0041] Switching state 4 is when the converter output terminal voltage Vxo is 0V. In switching state 4, as shown in Figure 4D, no current flows through the capacitor Csx of submodule 7, so the capacitor voltage Vsx does not change. On the other hand, in capacitor circuit 5, current flows out of capacitor Cmp, causing the capacitor voltage Vmp to decrease, while current flows into capacitor Cmn, causing the capacitor voltage Vmn to increase.

[0042] Switching state 5 is when the converter output terminal voltage Vxo is -Vsx. In switching state 5, as shown in Figure 4E, current flows out of the capacitor Csx of submodule 7, causing the capacitor voltage Vsx to decrease. On the other hand, in capacitor circuit 5, current flows out of capacitor Cmp, causing the capacitor voltage Vmp to decrease, while current flows into capacitor Cmn, causing the capacitor voltage Vmn to increase.

[0043] Switching state 6 is when the converter output terminal voltage Vxo is -Vmp. In switching state 6, as shown in Figure 4F, no current flows into the capacitor Csx of submodule 7, so the capacitor voltage Vsx does not fluctuate. On the other hand, in capacitor circuit 5, current flows out of capacitors Cmp and Cmn, so the capacitor voltages Vmp and Vmn decrease.

[0044] By rapidly switching between the aforementioned switching states, the output terminal voltage Vxo averaged over a certain period can be controlled.

[0045] Figure 5 shows in table format the converter output terminal voltage Vxo, current direction, charge / discharge state of capacitor Csx of subconverter 4, and charge / discharge state of positive side capacitor Cmp and negative side capacitor Cmn with respect to the switching state and current direction. The direction in which current flows from the AC side to the DC side is considered positive (+), and the opposite direction is considered negative (-).

[0046] As shown in Figure 5, when the current is positive, the capacitor of the sub-converter 4 charges in switching state 2 and discharges in switching state 5. In other words, the capacitor voltage can be controlled by adjusting the time ratio between switching state 2 and switching state 5. The same applies when the current is negative.

[0047] When the current is positive, the DC positive electrode capacitor Cmp charges in switching state 1 and discharges in other switching states. The DC negative electrode capacitor Cmn discharges in switching state 5 and charges in other switching states. When the current is negative, this charge-discharge relationship is reversed. Therefore, by changing the time ratio of each switching state, it is possible to control the voltage of the DC side capacitor circuit 5.

[0048] An example of the contents of the control unit 6 will be explained using Figure 6. The control system 301 includes a power factor adjustment function, a DC side capacitor voltage balancing function, a capacitor voltage balancing function within the submodule 7, and a multilevel generation function. The control system 301 includes a PLL unit 302 that calculates frequency and phase from AC voltage, a coordinate transformation unit 303 that performs dq conversion on three-phase voltage, that is, converts three AC signals into two DC signals, and a coordinate transformation unit 304 that performs dq conversion on three-phase current.

[0049] Furthermore, it includes an inductor current control unit (power factor control unit) 305 that controls the current of the inductor L so that the error between the current command value and the actual current is zero, and a pulse width modulation (PWM) unit 306 that generates a high-frequency switching signal and modulates the pulse width of the main converter 3. In addition, it includes a voltage control unit 307 that controls the voltage of the capacitor circuit 5 so that the difference between the capacitor voltage Vmp and the capacitor voltage Vmn in the capacitor circuit 5 is zero, and a logic unit 308 that adds a dead time to the switching signal to prevent failure due to element short circuits.

[0050] Furthermore, it includes a capacitor voltage control unit 309 that controls the capacitor voltage Vsx in the submodule 7 so that the error between the capacitor voltage Vsx connected to each module and the target voltage command value is zero, and a command value generation unit 310 that generates the command value for the subconverter 4. Furthermore, it includes a PWM unit 311 that generates a high-frequency switching signal, a dead time generation unit 312 that provides a dead time to prevent failure due to short circuits in the elements of the subconverter 4, and a zero voltage generation unit 313 that generates a signal such that the terminal voltage of the subconverter 4 becomes zero.

[0051] The PLL section 302 to the logic section 308 controls the main converter 3, while the capacitor voltage control section 309 to the zero voltage generation section 313 are functions added in this disclosure to control the sub-converter 4. In the case of a 3-level circuit configuration, the output voltage levels are 3 levels, and the voltage of the sub-converter 4 cannot be balanced. On the other hand, by adding the new functions described above, the output voltage levels become multi-level, enabling voltage balancing of the sub-converter 4 and allowing for miniaturization of the device.

[0052] The PLL unit 302 detects the voltages of all three phases, but the PLL may be configured by detecting only one phase. The coordinate transformation units 303 and 304 detect the voltages and currents of all three phases, but the dq coordinate transformation may be configured by detecting only one or two phases. The αβ coordinate transformation may be used for the coordinate transformation. Alternatively, current control may be performed on each of the three phases without performing a coordinate transformation. The power factor control unit 305 may improve the power factor using a PI controller.

[0053] Current command value id in the dq coordinate system * , IQ * The error currents of the detected current values ​​id and iq are converted into a compensation voltage using a PI controller, the AC voltages Vd and Vq in the dq coordinate system are added together, and the DC voltage is divided. This generates the voltage command value that the power converter should output in the dq coordinate system, and the three-phase voltage command value is generated using the voltage phase θ.

[0054] The voltage control unit 307 calculates the difference between the detected capacitor voltages Vmn and Vmp. Then, the band elimination filter (BEF) removes frequencies three times the AC power supply frequency, and the PI controller converts the resulting signal into a compensation current. The compensation amount is calculated by dividing this current by the maximum inductor current. By adding the above compensation amount to the three-phase voltage command value calculated by the inductor current control unit (power factor control unit) 305, the charge and discharge amount of the capacitor circuit 5 is changed, bringing the difference voltage between the capacitor voltages Vmp and Vmn closer to zero.

[0055] The PWM unit 306 generates pulses by comparing the magnitude relationship between the aforementioned three-phase voltage command value and a triangular wave (or sawtooth wave, etc.). The logic unit 308 adds a dead time to prevent short circuits in the elements and then switches the semiconductor switching element (element S x1 ~S x4 It outputs an ON / OFF signal to ).

[0056] In the capacitor voltage control unit 309, the capacitor voltage command value Vsr * Vss * Vst * The error voltage (difference) of the detected capacitor voltages Vsr, Vss, and Vst is converted into a compensation current using a PI controller. Then, the maximum value of the inductor current is divided, and as shown in Figure 5, the charging and discharging direction changes depending on the polarity of the current, so the polarity is converted according to the current polarity.

[0057] Capacitor voltage command value Vsr * Vss * Vst * When the detected values ​​of the capacitor voltages Vsr, Vss, and Vst are small, the compensation amount becomes a positive value. If the current polarity is positive, the duration of switching state 2 becomes longer compared to switching state 5. If the current polarity is negative, the duration of switching state 2 becomes shorter compared to switching state 5, and the capacitor is charged and begins to follow the command value.

[0058] The PWM unit 311 generates pulses for the sub-converter 4 based on the aforementioned compensation amount and the three-phase voltage command value of the main converter 3. The logic unit 308 adds a dead time to prevent short circuits of elements, and the semiconductor switching elements (elements S) of the sub-converter 4 are controlled. x7 ~S x10 It outputs an ON / OFF signal for ). The dead time generation unit 312 generates a signal from the ON / OFF signal according to the number of elements in the submodule 7 and adds a dead time to avoid failure due to element short circuits. The zero voltage generation unit 313 shifts the switching pulse according to the current direction to realize switching state 3 and switching state 4 operation in which the terminal voltage of the subconverter 4 becomes zero.

[0059] Using Figure 7A, we will explain the mode and switching state transitions when the current direction is positive, and using Figure 7B, we will explain the transitions when the current direction is negative. The notation enclosed in the ellipse indicates, from left to right, the mode type, the output terminal voltage Vxo, and the element S. x7 ~S x10 This shows the open / closed settings for each switch.

[0060] When the current direction is positive, as shown in Figure 7A, the system switches between seven modes (M1, M2, M3, M4a, M4b, M5, M6) to output five levels. When the current direction is negative, as shown in Figure 7B, the system switches between seven modes (M1, M2, M4c, M4d, M3, M5, M6) to output five levels. By using the zero voltage generation unit 313, four additional modes (M4a, M4b, M4c, M4d) are added, and the system has the effect of outputting a zero voltage.

[0061] Figure 8 shows the mode transitions when the current direction is positive, as explained in Figure 7A, using the current path in the circuit of Figure 2. Figure 9 shows the mode transitions when the current direction is negative, as explained in Figure 7B, using the current path in the circuit of Figure 2.

[0062] When the current direction is positive, as shown in Figure 8, element S is released from mode M3. x8 By turning on only element S x8 and elementsSx10 Current can be commutated through the diode, and it can transition to mode M4a, which outputs a zero voltage. Next, element S x9 By turning it on, the current flows to element S x8 , capacitor Csx, element S x9 Because the signals flow in this order, it is possible to transition to mode M5, which outputs -Vxs.

[0063] Mode M5 to element S x8 By turning off elementS x7 From the diode to element S x9 Current is commutated, and the device transitions to mode M4b, which outputs zero voltage. Element S x9 By turning it off, element S x7 Diodes, capacitors Csx, elements S x10 The diodes are commutated in that order, and the system transitions to mode M3, which outputs +Vsx.

[0064] When the current direction is negative, as shown in Figure 9, element S is affected from mode M2. x10 By turning on only element S x8 and elementsS x10 Current can be commutated through the diode, and it can transition to mode M4c, which outputs a zero voltage. Next, element S x10 By turning it off, the current is reduced to element S x8 , capacitor Csx, element S x9 Because the signals flow in this order, it is possible to transition to mode M3, which outputs -Vsx.

[0065] Mode M3 to element S x7 By turning on element S x9 From the diode to element S x7 Current can be commutated to the element S, and it can transition to mode M4d, which outputs a zero voltage. From mode M4d, element S x10 By turning on element S x10 , capacitor Csx, element S x7 The current can be commutated in that order, and the system can transition to mode M2, which outputs +Vsx.

[0066] Next, the mode changes with and without the zero voltage generation unit 313 will be explained using Figures 10A to 10D. Figure 10A shows the time-series change of the operation setting (mode) set for the switching element when the current direction is positive and the zero voltage generation unit 313 is not provided, and Figure 10B shows the time-series change of the mode within the submodule 7 when the current direction is positive and the zero voltage generation unit 313 is provided. Furthermore, Figure 10C shows the time-series change of the switch operation when the current direction is negative and the zero voltage generation unit 313 is not provided, and Figure 10D shows the time-series change of the mode within the submodule 7 when the current direction is negative and the zero voltage generation unit 313 is provided. In Figures 10A to 10D, the elements S are shown from top to bottom. x7 ~S x10 Each switch setting, with the bottom row indicating the output voltage, shows the output voltage.

[0067] If the zero voltage generation unit 313 is not provided, as shown in Figures 10A and 10C, none of the four modes (M4a, M4b, M4c, M4d) exist, and only +Vsx or -Vsx can be output. On the other hand, element S x9 Or element S x10 By applying the zero-voltage generation unit 313, which delays the switching, four modes (M4a, M4b, M4c, M4d) can be generated, as shown in Figures 10B and 10D. This makes it possible to output a zero voltage.

[0068] The control unit 6 of this disclosure, or the multiple controllers comprising it, can be composed of a processor 6H0 and a storage device 6H1, as shown in Figure 11, as an example of hardware 6H. Although not shown, the storage device comprises a volatile storage device such as random access memory and a non-volatile auxiliary storage device such as flash memory. Alternatively, a hard disk may be provided as an auxiliary storage device instead of flash memory. The processor 6H0 executes a program input from the storage device 6H1. In this case, the program is input from the auxiliary storage device to the processor 6H0 via the volatile storage device. The processor 6H0 may also output data such as calculation results to the volatile storage device of the storage device 6H1, or it may store the data in the auxiliary storage device via the volatile storage device. The processor 6H0 may have a communication function, or it may be equipped with a communication unit not shown.

[0069] While this disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but are applicable individually or in various combinations to the embodiments. Accordingly, countless variations not illustrated are envisioned within the scope of the technology disclosed in this disclosure. For example, these include modifying, adding or omitting at least one component, or even extracting at least one component and combining it with a component from another embodiment.

[0070] As described above, the power conversion device 10 of this disclosure includes an inductor 2 provided for each phase (R, S, T) on the AC side, a main converter 3 with one end connected to the inductor 2 and the other end having a DC positive terminal (P), a DC negative terminal (N), and a neutral point (O), a capacitor circuit 5 having a positive terminal (P), a negative terminal (N), and a neutral point (O) connected to the DC side, a capacitor Csx and a plurality of semiconductor switching elements (elements S x7 ~Sx 10) is composed of and connected between the neutral point (O) of the capacitor circuit 5 and the neutral point (O) of the main converter 3, and consists of multiple semiconductor switching elements (element S x7 ~Sx 10 The system includes a sub-converter 4 whose capacitor voltage Vsx changes according to a combination of switching settings (switching states 1 to 6, modes M1 to M6) for the main converter 3, and a control unit 6 that controls the operation of the main converter 3 and the sub-converter 4. As a result, the sub-converter 4 can be constructed using low-voltage semiconductor switching elements, enabling the output of multi-level voltages without increasing the size and weight of the device.

[0071] The control unit 6 is configured to control the absolute value of the capacitor voltage Vsx so that it is lower than the absolute value of the voltage at the positive terminal (P) of the capacitor circuit 5 (capacitor voltage Vmp) and the absolute value of the voltage at the negative terminal (N) (capacitor voltage Vmn). This balances the voltages and stabilizes the operation.

[0072] The control unit 6 controls the subconverter 4 such that the combination of switching settings (modes M1 to M6) that result in the output voltage of the subconverter 4 being zero differs depending on the direction of the current flowing through the inductor 2, thereby controlling element S x7 ~S x10 The bias in actions between them is leveled out.

[0073] The control unit 6 controls multiple semiconductor switching elements (elements S x7 ~S x10 If the switching operation of at least one of the elements is delayed for a period of time equivalent to the period during which the output voltage of the subconverter 4 is reduced to zero, the zero-voltage period can be reliably controlled.

[0074] Even if the control unit 6 selects different elements depending on the direction of the current flowing through the inductor 2 as the target for delaying the opening and closing operation, the element S x7 ~S x10 The bias in actions between them is leveled out.

[0075] The sub-converter 4 constitutes a full-bridge circuit, and the control unit 6 is configured to control the sub-converter 4 so as to insert a delay in the switching signal of the upper or lower semiconductor switching element for one leg of the full-bridge circuit, corresponding to the direction of the current flowing through the inductor 2, for a duration equivalent to the period during which the output voltage becomes zero. This configuration allows for more reliable control of the zero period.

[0076] The subconverter 4 consists of four elements S as multiple semiconductor switching elements. x7 ~S x10 By configuring it as a full bridge circuit including capacitor Csx, the capacitor voltage Vsx can be reliably manipulated.

[0077] If the main converter 3 is a T-type system including at least two semiconductor switching elements and two semiconductor rectifying elements, then multi-level output can be reliably achieved. [Explanation of symbols]

[0078] 1: Power conversion circuit, 2: Inductor, 3: Main converter, 4: Sub-converter, 5: Capacitor circuit, 6: Control unit, 7: Sub-module, 10: Power conversion device, Csx: Capacitor, S x1 ~S x4 ,S x7 ~S x10 :Element (semiconductor switching element), Vsr, Vss, Vst, Vsx:Capacitor voltage.

Claims

1. Inductors provided for each phase of the AC side, A main converter, with one end connected to the inductor and the other end having a DC positive electrode, a DC negative electrode, and a neutral point. A capacitor circuit having a positive terminal, a negative terminal, and a neutral point connected to the DC side. A sub-converter comprising a capacitor and multiple semiconductor switching elements, connected between the neutral point of the capacitor circuit and the neutral point of the main converter, wherein the capacitor voltage changes according to the combination of switching settings for the multiple semiconductor switching elements, and A control unit that controls the operation of the main converter and the sub-converter, A power conversion device characterized by being equipped with the following features.

2. The power conversion device according to claim 1, characterized in that the control unit controls the absolute value of the capacitor voltage to be lower than the absolute value of the voltage at the positive terminal and the absolute value of the voltage at the negative terminal of the capacitor circuit.

3. The power conversion device according to claim 1 or 2, characterized in that the control unit controls the subconverter such that the combination of switching settings that results in the output voltage of the subconverter being zero differs depending on the direction of the current flowing through the inductor.

4. The power conversion device according to claim 1 or 2, characterized in that the control unit delays the switching operation of at least one of the plurality of semiconductor switching elements for a period of time equivalent to the period during which the output voltage of the subconverter becomes zero.

5. The power conversion device according to claim 4, characterized in that the control unit selects different elements according to the direction of the current flowing through the inductor as the target for delaying the switching operation.

6. The aforementioned subconverter constitutes a full bridge circuit, The power conversion device according to claim 3, characterized in that the control unit controls the subconverter to insert a delay of a time equivalent to the period during which the output voltage is reduced to zero into the switching signal of the upper semiconductor switching element or the lower semiconductor switching element, according to the direction of the current flowing through the inductor, for one leg of the full bridge circuit.

7. The power conversion device according to claim 1 or 2, characterized in that the subconverter is a full bridge circuit including four elements and the capacitor as the plurality of semiconductor switching elements.

8. The power conversion device according to claim 1 or 2, characterized in that the main converter is a T-type system including at least two semiconductor switching elements and two semiconductor rectifying elements.

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