Structure and method for patterning pitch lines

The use of self-aligned double patterning as an intermediate process addresses the challenge of forming sub-15 nm pitch mandrels in SALELE, achieving precise sub-8 nm line patterning with reduced defects and fewer EUV steps, thus overcoming the limitations of existing technologies.

JP7882625B2Active Publication Date: 2026-06-30INTERNATIONAL BUSINESS MACHINE CORPORATION

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
INTERNATIONAL BUSINESS MACHINE CORPORATION
Filing Date
2022-10-11
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Existing technologies face challenges in reliably forming mandrels with pitches equal to or narrower than 30 nm in the self-aligned litho-etch-litho-etch (SALELE) process for sub-15 nm BEOL wiring, as the number of defects increases with decreasing scale, making it difficult to achieve sub-30 nm pitch mandrel patterning.

Method used

A method involving self-aligned double patterning (SADP) is used as an intermediate process to form conductive metal mandrels with sub-15 nm pitch, utilizing a multilayer hard mask and spacers to create mandrels with both constant and variable widths, followed by etching to transfer patterns to lower layers.

Benefits of technology

Enables the formation of sub-15 nm pitch BEOL wiring with reduced defects and fewer EUV steps, allowing for precise patterning of sub-8 nm lines without requiring sub-30 nm pitch mandrel patterning, enhancing design flexibility and reducing defect occurrence.

✦ Generated by Eureka AI based on patent content.

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Abstract

Structure and method for patterning pitch lines - Patents.com A method of semiconductor manufacturing includes forming a plurality of first mandrels as a top layer of a multi-layer hard mask and forming a first spacer surrounding each of the plurality of first mandrels, removing the plurality of first mandrels and cutting the first spacers to form a plurality of second mandrels, forming a second spacer surrounding each of the plurality of second mandrels and forming a first self-aligned pattern including a plurality of third mandrels, removing the plurality of second mandrels and the second spacers and etching the multi-layer hard mask to transfer the first self-aligned pattern to an underlying layer of the multi-layer hard mask, forming a second self-aligned pattern, where the second self-aligned pattern is intermingled with the first self-aligned pattern, and etching the first self-aligned pattern and the second self-aligned pattern into a conductive metal layer.
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Description

Technical Field

[0001] The present invention generally relates to the field of pitch lines, and more particularly to the formation of pitch lines having a pitch equal to or narrower than 30 nm.

Background Art

[0002] In self-aligned litho-etch-litho-etch (SALELE) in the wiring formation process (BEOL) of sub-15 nm pitch, a reliable mandrel patterning process for sub-30 nm pitch that is not yet available is required. When the BEOL pitch is less than 13 nm, SALELE becomes very difficult. As the scale decreases, the number of defects generated in the mandrel increases. Therefore, reliably providing a mandrel with a pitch equal to or narrower than 30 nm has not yet been achieved.

Summary of the Invention

[0003] Further aspects and / or advantages are, in part, described in the following description, in part will become apparent from the description, or may be understood by implementing the present invention.

[0004] A semiconductor device includes a plurality of conductive metal mandrels having a pitch of less than 15 nm, and the plurality of conductive mandrels include a plurality of mandrels having a constant width and a plurality of mandrels having a variable width.

[0005] A method includes forming a plurality of conductive metal mandrels having a pitch of less than 15 nm, and the plurality of conductive mandrels include a plurality of mandrels having a constant width and a plurality of mandrels having a variable width.

[0006] A semiconductor manufacturing method comprises the following steps: forming a multilayer hard mask on a conductive metal layer; forming a plurality of first mandrels as the uppermost layer of the multilayer hard mask, and forming a first spacer surrounding each of the plurality of first mandrels; removing the plurality of first mandrels, and cutting the first spacers positioned to surround each of the plurality of first mandrels to form a plurality of second mandrels; forming a second spacer surrounding each of the plurality of second mandrels, and forming a first self-aligned pattern including a plurality of third mandrels, where the first self-aligned pattern includes a plurality of third mandrels having a constant width and a plurality of third mandrels having a variable width; removing the plurality of second mandrels and second spacers, and etching the multilayer hard mask to transfer the first self-aligned pattern to the lower layer of the multilayer hard mask. A step of forming a second self-aligned pattern, where the second self-aligned pattern is mixed with the first self-aligned pattern, and a step of etching the first self-aligned pattern and the second self-aligned pattern into a conductive metal layer. [Brief explanation of the drawing]

[0007] The above and other aspects, features, and advantages of certain exemplary embodiments of the present invention will become more apparent from the following description in conjunction with the accompanying drawings.

[0008] [Figure 1] This figure shows a top view of a multilayer device according to one embodiment of the present invention.

[0009] [Figure 2] This figure shows a cross-section A of a multilayer device according to this embodiment of the present invention.

[0010] [Figure 3] This figure shows a top view of a multilayer device after a spacer has been formed around the first mandrel, according to one embodiment of the present invention.

[0011] [Figure 4] FIG. A cross-sectional view of a multilayer device after forming a spacer so as to surround a first mandrel, according to an embodiment of the present invention.

[0012] [Figure 5] FIG. A top view of a multilayer device after removing a first mandrel, according to an embodiment of the present invention.

[0013] [Figure 6] FIG. A cross-sectional view of a multilayer device after removing a first mandrel, according to an embodiment of the present invention.

[0014] [Figure 7] FIG. A top view of a multilayer device after removing a part of a spacer, according to an embodiment of the present invention.

[0015] [Figure 8] FIG. A cross-sectional view of a multilayer device after removing a part of a spacer, according to an embodiment of the present invention.

[0016] [Figure 9] FIG. A top view of a multilayer device after forming a second spacer, according to an embodiment of the present invention.

[0017] [Figure 10] FIG. A cross-sectional view of a multilayer device after forming a spacer, according to an embodiment of the present invention.

[0018] [Figure 11] FIG. A top view of a multilayer device after forming a first pattern, according to an embodiment of the present invention.

[0019] [Figure 12] FIG. A cross-sectional view of a multilayer device after forming a first pattern, according to an embodiment of the present invention.

[0020] [Figure 13] FIG. showing a top view of a multilayer device after removing a second mandrel and a second spacer according to an embodiment of the present invention.

[0021] [Figure 14] FIG. showing a cross-sectional view A of a multilayer device after removing a second mandrel and a second spacer according to the present embodiment of the present invention.

[0022] [Figure 15] FIG. showing a top view of a multilayer device after transferring a first pattern to a fourth layer according to an embodiment of the present invention.

[0023] [Figure 16] FIG. showing a cross-sectional view A of a multilayer device after transferring a first pattern to a fourth layer according to the present embodiment of the present invention.

[0024] [Figure 17] FIG. showing a top view of a multilayer device after forming a third spacer according to an embodiment of the present invention.

[0025] [Figure 18] FIG. showing a cross-sectional view A of a multilayer device after forming a third spacer according to the present embodiment of the present invention.

[0026] [Figure 19] FIG. showing a top view of a multilayer device after forming a second pattern according to an embodiment of the present invention.

[0027] [Figure 20] FIG. showing a cross-sectional view A of a multilayer device after forming a second pattern according to the present embodiment of the present invention.

[0028] [Figure 21]This figure shows a top view of a multilayer device after the third spacer has been removed, according to one embodiment of the present invention.

[0029] [Figure 22] This figure shows a cross-section A of the multilayer device after the third spacer has been removed, according to this embodiment of the present invention.

[0030] [Figure 23] This figure shows a top view of a multilayer device after a pattern has been transferred to the first layer, according to one embodiment of the present invention.

[0031] [Figure 24] This figure shows a cross-section A of a multilayer device after the pattern has been transferred to the first layer, according to this embodiment of the present invention. [Modes for carrying out the invention]

[0032] The following description, with reference to the accompanying drawings, is provided to aid in a comprehensive understanding of the exemplary embodiments of the invention as defined by the claims and their equivalents. While various specific details are included to aid in this understanding, these should be considered merely illustrative. Therefore, those skilled in the art will recognize that various improvements and modifications of the embodiments described herein can be made without departing from the scope of the invention. Furthermore, for clarity and brevity, descriptions of well-known functions and components may be omitted.

[0033] The terms and expressions used in the following description and claims are not limited to their figurative meaning, but are used merely to enable a clear and consistent understanding of the present invention. Accordingly, it will be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention is provided for illustrative purposes only and is not intended to limit the present invention as defined by the appended claims and their equivalents.

[0034] The singular forms "a," "an," and "the" are understood to refer to multiple objects unless the context makes it clear otherwise. Therefore, for example, a reference to "a certain constituent surface" includes a reference to one or more such surfaces unless the context makes it clear otherwise.

[0035] Detailed embodiments of the claimed structure and method are disclosed herein. However, it will be found that the disclosed embodiments are merely illustrative of the claimed structure and method, which can be embodied in various forms. Nevertheless, the present invention may be embodied in many different forms and should not be construed as being limited to the exemplary embodiments described herein. Rather, these exemplary embodiments are provided so that this disclosure is detailed and complete and so that the scope of the present invention may be fully conveyed to those skilled in the art. In this description, details of well-known features and techniques may be omitted to avoid unnecessarily obscuring these embodiments.

[0036] References in this specification such as “one embodiment,” “an embodiment,” and “an example embodiment” indicate that while a described embodiment may include certain features, structures, or characteristics, not all embodiments may include those features, structures, or characteristics. Furthermore, such phrases do not necessarily refer to the same embodiment. Moreover, if a particular feature, structure, or characteristic is described in relation to one embodiment, it is considered within the knowledge of those skilled in the art that such features, structures, or characteristics may be affected in relation to other embodiments, whether explicitly stated or not.

[0037] For illustrative purposes, the terms “upper,” “lower,” “right,” “left,” “vertical,” “horizontal,” “top,” and “bottom,” and their derivatives, refer to the disclosed structures and methods as oriented in the diagrams. The terms “overlying,” “atop,” “on top,” “positioned on,” or “positioned atop” mean that a first element, such as a first structure, is located on a second element, such as a second structure, and intervening elements, such as boundary structures, may be located between the first and second elements. The term “direct contact” means that a first element, such as a first structure, and a second element, such as a second structure, are connected at the interface between the two elements without any intermediate conductive, insulating, or semiconductor layers.

[0038] To avoid ambiguity in describing embodiments of the present invention, some processing steps or operations known in the art may be combined for illustrative purposes and may not be described in detail in the following detailed description. In other examples, some processing steps or operations known in the art may not be described at all. It should be understood that the following description focuses rather on the unique features or elements of various embodiments of the present invention.

[0039] Various embodiments of the present invention are described herein with reference to the relevant drawings. Alternative embodiments can be devised without departing from the scope of the present invention. Note that in the following description and drawings, various connections and positional relationships (e.g., above, below, adjacent, etc.) are described between elements. These connections and / or positional relationships may be direct or indirect unless otherwise specified, and the present invention is not intended to limit them thereto. Thus, the joining of entities may refer to either direct or indirect joining, and the positional relationship between entities may be a direct or indirect positional relationship. As an example of an indirect positional relationship, the herein reference to forming layer "A" above layer "B" includes a situation in which one or more intermediate layers (e.g., layer "C") are between layer "A" and layer "B", provided that the applicable properties and functions of layer "A" and layer "B" are not substantially altered by the intermediate layers.

[0040] The following definitions and abbreviations will be used in the claims and interpretation of this specification. Where used herein, the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having,” “contains,” or any other variations thereof are intended to apply to non-exclusive inclusion. For example, a component, mixture, process, method, article, or apparatus containing a list of elements is not necessarily limited to those elements alone, and may include other elements that are not explicitly listed or specific to such component, mixture, process, method, article, or apparatus.

[0041] Furthermore, the term “exemplary” is used herein to mean “serving as an example, illustration, or demonstration.” No embodiment or design example described herein as “exemplary” should necessarily be construed as being preferable or advantageous to other embodiments or design examples. The terms “at least one” and “one or more” can be understood to include any integer greater than or equal to 1, i.e., 1, 2, 3, 4, etc. The term “a plurality” can be understood to include any integer greater than or equal to 2, i.e., 2, 3, 4, 5, etc. The term “connection” may include both indirect and direct “connections.”

[0042] As used herein, the term “about” when adjusting the amounts of materials, components, or reactants used in the present invention refers to variations in quantity that may arise, for example, from typical measurement and liquid handling procedures used to create concentrations or solutions. Furthermore, variations may also arise from careless errors in measurement procedures, differences in the manufacture, raw materials, or purity of materials used to create components or to perform methods. The terms “about” or “substantially” are intended to include the degree of error associated with the measurement of a particular quantity, based on the equipment available at the time of filing this application. For example, “about” may include a range of ±8%, 5%, or 2% of a given value. In another embodiment, the term “about” means within 5% of the reported value. In another embodiment, the term “about” means within 10%, 9%, 8%, 7%, 6%, 5%, 4%, 3%, 2%, or 1% of the reported value.

[0043] The various processes used to form microchips that are packaged into integrated circuits (ICs) are classified into four common types: deposition, removal / etching, semiconductor doping, and patterning / lithography. Deposition is any process of growing, coating, or otherwise transferring material onto a wafer. Available techniques include, among others, physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE), and more recently, atomic layer deposition (ALD). Removal / etching is any process of removing material from a wafer. Examples include etching processes (wet or dry), reactive ion etching (RIE), and chemical mechanical planarization (CMP). Semiconductor doping is the modification of electrical properties, generally by doping the source and drain of a transistor, for example, by diffusion and / or ion implantation. These doping processes are followed by furnace annealing or rapid thermal annealing (RTA). Annealing helps activate injected dopants. Both conductive (e.g., aluminum, copper, etc.) and insulating (e.g., various forms of silicon dioxide, silicon nitride, etc.) films are used for connecting and separating electrical components. Selective doping of different regions of a semiconductor substrate makes it possible to change the conductivity of the substrate by applying a voltage.

[0044] Next, embodiments of the present invention will be described in detail. Examples are shown in the accompanying drawings, where similar reference numerals consistently refer to similar elements. Self-aligned double patterning (SADP) is a form of double patterning. It is sometimes called pitch-split double patterning, spacer- or sidewall-based double patterning. The SADP process defines spacer-like features using one lithography step and additional deposition and etching steps. In the SADP process, a mandrel is formed on the substrate in the first step, and then its pattern is covered with a deposition layer. The deposition layer is then etched, in turn forming spacers. In SADP, when intermetallic dielectrics are directly patterned using spacers instead of metal features, the number of cut / block masks can be reduced or eliminated in dense patches. This is because the cut / block positions of the core / mandrel features are already patterned in the first mask. After further patterning, there are secondary features that emerge from the gaps between the spacers. The edges between the secondary features and spacers are self-aligned with the adjacent core features.

[0045] When the BEOL pitch is less than 13nm, self-aligned litho-etching (SALELE) becomes extremely difficult. As the scale decreases, the number of defects that occur in the mandrel increases, and therefore, reliably providing mandrels with a pitch equal to or narrower than 30nm has not yet been achieved.

[0046] This invention provides a method for achieving sub-15nm pitch BEOL SALELE by forming a mandrel with SADP-SALE. The invention also provides a structure and method for patterning sub-8nm lines with SALELE without requiring sub-30nm pitch mandrel patterning. This invention utilizes the SADP process as an intermediate process for sub-15nm SALELE. The intermediate SADP pattern is removed after a first litho-etch (LE) to enable SALELE execution. This invention leverages the strict limiting dimension (CD) control of the SADP process and the design flexibility of SALELE. This invention requires fewer EUV steps compared to SAQP, which requires multiple cut steps.

[0047] A method for performing a self-aligned litho-etch (SALE) process comprises the steps of forming a first set of lines in a self-aligned manner along a sacrificial SADP pattern, and forming a second set of lines in a self-aligned manner along the first set of lines. In another embodiment, a first set of lines is formed with SADP, and a second set of lines is formed in a self-aligned manner along the first set of lines.

[0048] Figure 1 shows a top view of a multilayer device 100 according to one embodiment of the present invention. Figure 2 shows a cross-section A of the multilayer device 100 according to this embodiment of the present invention. The multilayer device 100 includes a first layer 105 and a hard mask 107. The first layer 105 may be composed of, for example, Ru, Cu, or another conductive metal. The hard mask 107 is composed of multiple layers such that the hard mask 107 includes a second layer 110, a third layer 115, a fourth layer 120, a fifth layer 125, and a plurality of first mandrels 130. The second layer 110 may be composed of, for example, TiN. The third layer 115 may be composed of, for example, amorphous Si. The fourth layer 120 may be composed of, for example, SiN. The fifth layer 125 may be composed of, for example, amorphous Si. The plurality of first mandrels 130 may be composed of, for example, SiN. The multiple first mandrels 130 have a pitch of 4 × P (i.e., the distance from the left side of one first mandrel to the left side of its adjacent first mandrel), where P is the desired pitch for the final design of the device. Each of the multiple first mandrels 130 has a width of 1.5 × P. By utilizing the multilayer hard mask 107, it becomes possible to gradually form this design on the hard mask 107 before transferring it to the first layer 105.

[0049] Figure 3 shows a top view of a multilayer device 100 after a first spacer 135 has been formed to surround a first mandrel 130, according to one embodiment of the present invention. Figure 4 shows a cross-section A of the multilayer device 100 after a first spacer 135 has been formed to surround a first mandrel 130, according to this embodiment of the present invention. The first spacer 135 is formed on the uppermost surface of the fifth layer 125 and on the exposed surface of the first mandrel 130. The first spacer 135 is etched back so that the first spacer 135 is positioned on the side walls of the multiple first mandrels 130. The first spacer 135 may be made of, for example, TiN.

[0050] Figure 5 shows a top view of the multilayer device 100 after the removal of the first mandrel 130, according to one embodiment of the present invention. Figure 6 shows a cross-section A of the multilayer device 100 after the removal of the first mandrel 130, according to this embodiment of the present invention. The first mandrel 130 is removed without removing the first spacer 135. Trenches created by removing the multiple first mandrels 130 are formed at the locations of the multiple first mandrels 130.

[0051] Figure 7 shows a top view of a multilayer device 100 after a portion of the first spacer 135 has been removed, according to one embodiment of the present invention. Figure 8 shows a cross-section A of the multilayer device 100 after a portion of the first spacer 135 has been removed, according to this embodiment of the present invention. The first spacer 135 is formed as a single continuous element so as to surround each of the plurality of first mandrels 130. A portion of each of the first spacers 135 may be removed so that each of the first spacers 135 is no longer just a single element. As shown in Figure 5, each end of the first spacer 135 is removed as shown by the dashed box 136, resulting in the formation of a plurality of second mandrels 140. The number of the plurality of second mandrels 140 is twice the number of the plurality of first mandrels 130.

[0052] Figure 9 shows a top view of a multilayer device 100 after the formation of a second spacer 145 according to one embodiment of the present invention. Figure 10 shows a cross-section A of the multilayer device 100 after the formation of a spacer 145 according to this embodiment of the present invention. The second spacer 145 is formed on the uppermost surface of the fifth layer 125 and on the exposed surfaces of each of the plurality of second mandrels 140. The second spacer 145 is etched back so that the second spacer 145 is located only on the side walls of each of the plurality of second mandrels 140. The second spacer 145 is made of, for example, TiO x It may be composed of the following. The material used for the first spacer / second mandrel 135, 140 must be different from the material used for the second spacer 145.

[0053] Figure 11 shows a top view of a multilayer device 100 after the first pattern has been formed, according to one embodiment of the present invention. Figure 12 shows a cross-section A of the multilayer device 100 after the first pattern has been formed, according to this embodiment of the present invention. The first pattern of the third mandrel 150 is formed on the fifth layer 125 by depositing a material and etching the material back until a desired pattern is formed, and is positioned to surround the second spacer 145. The third mandrel 150 may be made of, for example, SOG. The third mandrel 150 may have various design configurations to allow design flexibility. For example, the third mandrel 150 may be a straight mandrel of constant width (as shown in the dashed box 150A), or the third mandrel 150 may be a mandrel with varying widths in different parts of the third mandrel (as shown in the dashed box 150B). The third mandrel 150, which has a variable range, may have a first portion having a first width W1 and a second portion having a width W2, where W2 is greater than W1. For example, W2 may be twice the size of W1. W2 can be in the range of approximately 2 to 5 times the size of W1.

[0054] Figure 13 shows a top view of the multilayer device 100 after the removal of the second mandrel 140 and the second spacer 145, according to one embodiment of the present invention. Figure 14 shows a cross-section A of the multilayer device 100 after the removal of the second mandrel 140 and the second spacer 145, according to this embodiment of the present invention. The second mandrel 140 and the second spacer 145 have been removed, and the third mandrel 150 remains located on the fifth layer 125.

[0055] Figure 15 shows a top view of a multilayer device 100 after the first pattern has been transferred to the fourth layer 120, according to one embodiment of the present invention. Figure 16 shows a cross-section A of the multilayer device 100 after the first pattern has been transferred to the fourth layer 120, according to this embodiment of the present invention. The pattern of the third mandrel 150 is transferred to the fourth layer 120 by etching the fifth layer 125 and the fourth layer 120, respectively, to transfer the pattern. The pattern in the fourth layer 120 forms the fourth mandrel 155, where the pattern of the fourth mandrel 155 matches the pattern of the third mandrel 150.

[0056] Figure 17 shows a top view of a multilayer device 100 after the formation of a third spacer 160 according to one embodiment of the present invention. Figure 18 shows a cross-section A of the multilayer device 100 after the formation of a third spacer 160 according to this embodiment of the present invention. The third spacer 160 is formed on the uppermost surface of the third layer 115 and the exposed surface of the fourth mandrel 155. The third spacer 160 is etched back so that it is positioned on the sidewall of the fourth mandrel 155. The third spacer 160 may be made of, for example, TiN.

[0057] Figure 19 shows a top view of a multilayer device 100 after the formation of a second pattern according to one embodiment of the present invention. Figure 20 shows a cross-section A of the multilayer device 100 after the formation of a second pattern according to this embodiment of the present invention. The second pattern of the fifth mandrel 165 is formed on the third layer 115 by depositing a material and etching back the material until the desired pattern is formed. The second pattern of the fifth mandrel 165 is, Third spacer 160 aroundIt is positioned as follows. The second pattern of the fifth mandrel 165 may be formed adjacent to or mixed with the pattern of the fourth mandrel 155. The fifth mandrel 165 may be composed of, for example, SOG. The fifth mandrel 165 may have various design configurations that allow for design flexibility. For example, the fifth mandrel 165 may be a straight mandrel of a constant width (not shown), or the fifth mandrel 165 may be a mandrel in which the width changes in different parts of the fifth mandrel (as shown by the dashed box 165A). The fifth mandrel 165 with a variable width may have a first part having a first width W3 and a second part having a width W4, where W4 is greater than W3. For example, W4 may be twice the size of W3. W4 may be in the range of about twice to about five times the size of W3. The combination pattern of the fifth mandrel 165 and the fourth mandrel 155 becomes the final design pattern of the final design that is transferred to the first layer 105.

[0058] Figure 21 shows a top view of the multilayer device 100 after the third spacer 160 has been removed, according to one embodiment of the present invention. Figure 22 shows a cross-section A of the multilayer device 100 after the third spacer 160 has been removed, according to this embodiment of the present invention. The third spacer 160 has been removed, and the fourth mandrel 155 and the fifth mandrel 165 remain. By removing the third spacer 160, it becomes possible to form a gap between the fifth mandrel 165 and the fourth mandrel 155.

[0059] Figure 23 shows a top view of a multilayer device 100 after the pattern has been transferred to the first layer 105, according to one embodiment of the present invention. Figure 24 shows a cross-section A of the multilayer device 100 after the pattern has been transferred to the first layer 105, according to this embodiment of the present invention. The patterns of the fourth mandrel 155 and the fifth mandrel 165 are transferred to the first layer 105 by etching the third layer 115, the second layer 110, and the first layer 105, respectively, in order to transfer their patterns. The patterns in the first layer 105 form the sixth mandrel 170, where the pattern of the sixth mandrel 170 matches that of the fourth mandrel 155 and the fifth mandrel 165. For example, the sixth mandrel 170 can be a linear mandrel of constant width (as shown in dashed box 170A), or it can be a mandrel whose width changes in different parts (as shown in dashed boxes 170B and 170C). The sixth mandrel 170 located in dashed box 170B corresponds to the design of the third mandrel 150. The sixth mandrel 170 located in dashed box 170C corresponds to the design of the fifth mandrel 165. The overall pattern of the sixth mandrel 170 is a combination pattern of the third mandrel 150 and the fifth mandrel 165. The proposed invention makes it possible to form a sixth mandrel 170 having a pitch of less than 15 nm.

[0060] Although the present invention has been shown and described with reference to certain exemplary embodiments, it will be understood by those skilled in the art that various improvements in form and detail can be made without departing from the scope of the invention as defined by the appended claims and equivalents.

[0061] The descriptions of various embodiments of the present invention are presented for illustrative purposes only, and are not intended to be exhaustive or limitful to the disclosed embodiments. Those skilled in the art will see many modifications and variations that do not deviate from the scope of the described embodiments. The terminology used herein has been selected to best describe the principles, practical applications, or technological improvements over existing technologies in one or more embodiments, or to enable those else skilled in the art to understand the embodiments disclosed herein.

Claims

1. A plurality of conductive metal mandrels, wherein the plurality of conductive metal mandrels have a pitch of less than 15 nm, and the plurality of conductive metal mandrels include a plurality of mandrels having a constant width and a plurality of mandrels having a variable width, wherein the plurality of mandrels having a variable width include mandrels based on a first self-aligned pattern and mandrels based on a second self-aligned pattern arranged in combination with the first self-aligned pattern, and on the upper surface of the semiconductor device, the wider portions of each of the variable widths are arranged non-collinearly with respect to axes intersecting the extending direction of the plurality of conductive metal mandrels. A semiconductor device equipped with the following features.

2. The semiconductor device according to claim 1, wherein each of the plurality of mandrels having a variable width has a first portion having a first width and a second portion having a second width, and the first width and the second width are different, and the first portion can be arranged laterally or vertically adjacent to the second portion.

3. The semiconductor device according to claim 2, wherein the second width is twice the size of the first width.

4. The semiconductor device according to claim 2, wherein the second width is within the range of 2 to 5 times the size of the first width.

5. The step of forming a multilayer hard mask on a conductive metal layer; A step of forming a plurality of first mandrels as the uppermost layer of the multilayer hard mask; The step of forming a first spacer so as to surround each of the plurality of first mandrels; A step of removing the plurality of first mandrels; The step of cutting the first spacers, which are arranged to surround each of the plurality of first mandrels, to form a plurality of second mandrels; The step of forming a second spacer so as to surround each of the plurality of second mandrels; A step of forming a first self-aligning pattern including a plurality of third mandrels, wherein the first self-aligning pattern includes a plurality of third mandrels having a constant width and a plurality of third mandrels having a variable width; The step of removing the plurality of second mandrels and the second spacers; A step of etching the multilayer hard mask to transfer the first self-aligned pattern to the layer beneath the multilayer hard mask; A step in which a second self-aligning pattern is formed, wherein the second self-aligning pattern is mixed with the first self-aligning pattern; The steps of etching the first self-aligned pattern and the second self-aligned pattern onto the conductive metal layer; and Steps to form a plurality of conductive metal mandrels based on the first self-aligning pattern and the second self-aligning pattern. A method for manufacturing a semiconductor device having a plurality of conductive metal mandrels.

6. The manufacturing method according to claim 5, wherein each of the plurality of third mandrels having a variable width has a first portion having a first width and a second portion having a second width, the first width and the second width are different, and the first portion can be arranged horizontally or vertically adjacent to the second portion.

7. The manufacturing method according to claim 6, wherein the second width is twice the size of the first width.

8. The manufacturing method according to claim 7, wherein the second width is within the range of two to five times the size of the first width.

9. The manufacturing method according to claim 5, wherein the step of etching the multilayer hard mask to transfer the first self-aligned pattern to the layer below the multilayer hard mask causes the formation of a plurality of fourth mandrels to be formed in the layer below in the pattern of the first self-aligned pattern.

10. The step of forming a third spacer so as to surround the plurality of fourth mandrels. The manufacturing method according to claim 9, further comprising:

11. The step of forming the second self-aligning pattern is The step of forming a plurality of fifth mandrels adjacent to the third spacer, wherein the plurality of fifth mandrels are mixed with the plurality of fourth mandrels, and the plurality of fifth mandrels include a plurality of fifth mandrels having a constant width and a plurality of fifth mandrels having a variable width. The manufacturing method according to claim 10, having the following characteristics.

12. The manufacturing method according to claim 11, wherein each of the plurality of fifth mandrels having a variable width has a first portion having a first width and a second portion having a second width, and the first width and the second width are different.

13. The manufacturing method according to claim 12, wherein the second width is twice the size of the first width.

14. The manufacturing method according to claim 13, wherein the second width is within the range of two to five times the size of the first width.

15. Step 3 of removing the spacer The manufacturing method according to claim 12, further comprising:

16. The manufacturing method according to claim 15, wherein the plurality of conductive metal mandrels are formed by etching the first self-aligned pattern and the second self-aligned pattern onto the conductive metal layer, and the plurality of conductive metal mandrels have a pitch of less than 15 nm.