Hybrid semiconductor devices
Hybrid semiconductor devices combine silicon and WBG semiconductors to distribute voltage, addressing silicon limitations and enhancing performance and reliability by reducing stress on silicon components.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- TEXAS INSTRUMENTS INC
- Filing Date
- 2021-12-28
- Publication Date
- 2026-07-01
AI Technical Summary
Progress in silicon semiconductor devices has plateaued due to the limitations of silicon materials, necessitating new approaches to enhance performance and efficiency.
Hybrid semiconductor devices are developed by combining a silicon switch element with a wide-bandgap (WBG) semiconductor, utilizing a voltage support structure to distribute applied voltage, thereby reducing stress on the silicon component and increasing the critical voltage of the device.
The hybrid semiconductor devices achieve improved performance and reliability by leveraging the WBG semiconductor to support a significant portion of the applied voltage, allowing for reduced voltage on the silicon switch element and enhanced operational capabilities.
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Abstract
Description
[Technical Field]
[0001] Semiconductor switching devices, such as silicon switching devices, have a wide range of applications. These include diodes, bipolar transistors, and field-effect transistors (FETs). For example, silicon lateral diffusion metal oxide semiconductor (LDMOS) field-effect transistors (FETs) can be used as power switches in the power electronics industry. [Overview of the project]
[0002] In some examples, the semiconductor device includes a switch element, which has a surface and first and second regions, and includes a first semiconductor material having a certain band gap. The first region of the switch element is coupled to a source contact. A floating electrode has first and second ends. The first end of the floating electrode is coupled to a second region of the switch element. A voltage support structure includes a second semiconductor material having a band gap larger than that of the first semiconductor material. The voltage support structure is in contact with the second end of the floating electrode. A drain contact is coupled to the voltage support structure.
[0003] In one example, the semiconductor device includes a source contact. The switch element has a surface. The first semiconductor region has a first doping polarity and includes a channel region. The source region has a second doping polarity and is in contact with the source contact and the first semiconductor region. The drain region has a second doping polarity and is in contact with the first semiconductor region. The gate corresponds to the channel region of the first semiconductor region. The first semiconductor region, the source region, and the drain region each include a first semiconductor material having a band gap. The stray electrode has first and second ends. The first end of the stray electrode is coupled to the drain region of the switch element. The voltage support structure includes a second semiconductor material having a band gap larger than the band gap of the first semiconductor material. The voltage support structure is in contact with the second end of the stray electrode. The drain contact is coupled to the voltage support structure.
[0004] In one example, a method for forming a semiconductor device includes forming a switch element comprising a first semiconductor material having a certain band gap. A floating electrode having first and second ends is formed. The first end of the floating electrode is coupled to the switch element. A voltage support structure is formed. The voltage support structure comprises a second semiconductor material having a band gap larger than that of the first semiconductor material. A source contact is formed and coupled to the switch element. A drain contact is formed and coupled to the voltage support structure. An electric field control element is formed. [Brief explanation of the drawing]
[0005] For detailed explanations of various examples, please refer to the attached drawings.
[0006] [Figure 1] A block diagram of an illustrative hybrid semiconductor device is shown, following the example described.
[0007] [Figure 2] A flowchart illustrating an exemplary method for forming a hybrid semiconductor device is shown.
[0008] [Figure 3] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 4] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 5] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 6] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 7] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 8] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 9] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 10] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described. [Figure 11] The diagrams show cross-sectional views of the structure at various stages in the formation of an illustrative hybrid semiconductor device, following the example described.
[0009] [Figure 12] Figure 11 shows a flowchart illustrating another exemplary method for forming the hybrid semiconductor device.
[0010] [Figure 13] Figure 11 shows a cross-sectional view of another example of a hybrid semiconductor device.
[0011] [Figure 14]Fig. 11 shows another exemplary cross-sectional view of a hybrid semiconductor device.
[0012] [Figure 15] Fig. shows a cross-sectional view of another exemplary hybrid semiconductor device according to the example to be described.
[0013] [Figure 16] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device. [Figure 17] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device. [Figure 18] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device. [Figure 19] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device. [Figure 20] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device. [Figure 21] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device. [Figure 22] Fig. shows cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device.
[0014] [Figure 23] Fig. 22 shows a flowchart of an exemplary method for forming a hybrid semiconductor device.
[0015] [Figure 24] Fig. shows another exemplary hybrid semiconductor device according to the example to be described.
Embodiments for Carrying Out the Invention
[0016] Progress in silicon devices has slowed and is ultimately limited by the properties of silicon materials. After more than 30 years of advancements in silicon processing, the ability to use current semiconductor manufacturing methods paves the way for rapid adoption and improved cost performance when manufacturing semiconductor devices such as lateral diffusion metal oxide semiconductor (LDMOS) field-effect transistors (FETs).
[0017] The examples described include hybrid semiconductor devices and methods for forming hybrid semiconductor devices. The illustrated hybrid semiconductor device includes a source contact, a switch element having a first semiconductor material having a certain bandgap, a voltage support structure including a second semiconductor material having a bandgap larger than that of the first semiconductor material, a floating electrode between the switch element and the voltage support structure that couples the switch element to the voltage support structure, a drain contact coupled to the voltage support structure, and one or more field control elements. The hybrid semiconductor device may combine a reliable switch element, such as a silicon switch element, with a wide-bandgap (WBG) semiconductor. The WBG semiconductor in the hybrid semiconductor device may provide a voltage support region for taking part or most of the applied voltage to the hybrid semiconductor device, so that the voltage applied to other parts of the hybrid semiconductor device, such as the silicon switch element / part, can be reduced. Therefore, the critical voltage of the hybrid semiconductor device can be increased.
[0018] Figure 1 shows a block diagram of an exemplary hybrid semiconductor device according to the example described. The hybrid semiconductor device 100 includes a source contact 110, a switch element 120 having a first semiconductor material having a certain bandgap (i.e., energy bandgap), a voltage support structure 140 including a wide bandgap (WBG) semiconductor material having a bandgap larger than the bandgap of the first semiconductor material of the switch element 120, a floating electrode 130 located between the switch element 120 and the voltage support structure 140 and coupling the switch element 120 to the voltage support structure 140, a drain contact 150 coupled to the voltage support structure 140, and an electric field control element 160. The floating electrode 130 has a first end 131 and a second end 132, the first end 131 of the floating electrode 130 being coupled to the switch element 120 and in ohmic contact with the switch element 120, and the second end 132 of the floating electrode 130 being coupled to the voltage support structure 140 and in ohmic contact with the voltage support structure 140. The floating electrode may electrically couple the first component to the second component without contacting any additional voltage or current terminals other than those of the coupled component. In some examples, the first semiconductor material of the switch element 120 includes at least one of silicon, germanium, or gallium arsenide.
[0019] In some examples, the first end 131 of the floating electrode 130 is in ohmic contact with the second region 122 of the switching element 120, the second end 132 of the floating electrode 130 is in ohmic contact with the voltage support structure 140, and the first region of the switching element 120 is in ohmic contact with the source contact 110. In some examples, the electric field control element 160 extends from the switching element 120 toward the drain contact 150.
[0020] Structures / components 110, 120, 130, 140, 150, and 160 can be configured relative to each other in various directions, such as in-plane direction, out-of-plane direction, and / or any other suitable direction, depending on the application scenario. In one example, the voltage support structure 140 is on the floating electrode 130, and the switch element 120 is along the out-of-plane direction. In another example, the voltage support structure 140 is adjacent to the floating electrode 130, and the switch element 120 is along the in-plane direction.
[0021] The doped semiconductor can be a p-type semiconductor doped with an electron acceptor dopant or an n-type semiconductor doped with an electron donor dopant. Any of the following doping levels can be selected for the components of the hybrid semiconductor device depending on various application scenarios. The doping level of the p-type semiconductor is a p-doping level less than 3×10 16 cm -3 , a p-doping level in the range of 3×10 16 cm -3 ~1×10 19 cm -3 , or a p+ doping level higher than 1×10 19 cm -3 . The doping level of the n-type semiconductor is an n-doping level less than 3×10 16 cm -3 , an n-doping level in the range of 3×10 16 cm -3 ~1×10 19 cm -3 , or an n+ doping level higher than 1×10 19 cm -3 . The doping polarity can refer to p-type doping or n-type doping.
[0022] FIG. 2 shows a flowchart of an exemplary method for forming a hybrid semiconductor device, which will be described hereinafter with reference to FIG. 1.
[0023] In S701, a switch element is formed comprising a first semiconductor material having a certain band gap. In some examples, the switch element (e.g., 120) is formed, for example, by vapor phase growth, ion implantation, and / or etching. In some examples, the switch element 120 comprises at least one of a diode, a bipolar transistor, a field-effect transistor (FET), or an insulated-gate bipolar transistor (IGBT), and the material of the switch element 120 comprises silicon having a certain band gap. In some examples, the field-effect transistor is a p-type field-effect transistor or an n-type field-effect transistor with a gate. In some examples, the switch element comprises a lateral diffusion metal oxide semiconductor (LDMOS) field-effect transistor. In some examples, the switch element comprises an insulated-gate bipolar transistor (IGBT), such as a lateral insulated-gate bipolar transistor (LIGBT).
[0024] In S702, a floating electrode having first and second ends is formed. In some examples, the floating electrode 130 having first and second ends (131, 132) is formed, for example, by deposition, the first end 131 of the floating electrode 130 is coupled to a switch element 120 and in ohmic contact with the switch element 120, and the second end 32 of the floating electrode 130 is coupled to a voltage support structure 140 and in ohmic contact with the voltage support structure 140.
[0025] In S703, a voltage support structure is formed that includes a second semiconductor material having a band gap larger than that of the first semiconductor material. In some examples, the voltage support structure 140 is formed by deposition and / or ion implantation, and the voltage support structure 140 includes a WBG semiconductor material having a band gap larger than that of the first semiconductor material, such as silicon for the switch element 120.
[0026] In S704, a drain contact is formed which is coupled to the voltage support structure. In some examples, the drain contact 150 is formed by deposition and is coupled to the voltage support structure 140, making ohmic contact with the voltage support structure 140.
[0027] In S705, a source contact is formed that is coupled to the switch element. In some examples, the source contact 110 is formed by deposition and is coupled to the switch element 120, making ohmic contact with the switch element 120.
[0028] In S706, an electric field control element is formed. In some examples, the electric field control element 160 includes a field plate, which is formed by deposition. In other examples, the electric field control element 160 includes components of the switch element 120 that are formed during the formation of the switch element 120.
[0029] In this description, the steps or processes may be carried out in any preferred order. In some examples, forming a switch element containing the first semiconductor material (S701) may be carried out before forming a voltage support structure containing the second semiconductor material (S703). In other examples, forming a switch element containing the first semiconductor material (S701) may be carried out after forming a voltage support structure containing the second semiconductor material (S703). For example, after a voltage support structure containing the second semiconductor material has been formed, the switch element containing the first semiconductor material may be formed, for example, through a process for forming an LDMOS FET.
[0030] Figures 3 to 11 show cross-sectional views of the structure at various stages in the formation of the exemplary hybrid semiconductor device 300, and Figure 12 shows the corresponding flowchart of the exemplary method for forming the hybrid semiconductor device 300. Figures 3 to 11 will be explained with reference to the flowchart in Figure 12.
[0031] Figure 3 illustrates a semiconductor layer 310 that includes a source region 320, a drift region 330, a body region 315 including a channel region 316, and a body contact region 340. In Figure 12, this process is represented as step 801 in Figure 12, where the source region, drift region, body region, and body contact region are formed in the semiconductor layer.
[0032] The semiconductor layer 310 has a first surface 311 and an opposing second surface 312. The semiconductor layer 310 may be a substrate or an epitaxial layer grown on a substrate. Figure 3 also shows a coordinate system having X, Y, and Z axes. The X and Y axes are orthogonal to each other and parallel to a certain surface of the semiconductor layer 310, for example, the first surface 311 or the second surface 312. Therefore, the X and Y axes are called the "in-plane direction". The Z axis is perpendicular to the X and Y axes and is therefore perpendicular to the surface of the semiconductor layer 310. Therefore, the Z axis is called the "out-of-plane direction". Along the in-plane direction (X axis), the channel region 316 of the body region 315 is located between the source region 320 and the drift region 330 and acts as a conduction channel between the source region 320 and the drift region 330.
[0033] In some examples, the semiconductor layer 310 is formed by epitaxial growth and / or ion implantation to form a p-type layer, for example, at a p-doping level, and the semiconductor layer 310 includes a body region 315 at a p-doping level. The source region 320, drift region 330, and body contact region 340 can be formed by ion implantation of dopants into the semiconductor layer 310. In the example of Figure 3, the source region 320 is an n-type semiconductor region with an n+ doping level, the drift region 330 is an n-type semiconductor region with an n-doping level, the body region 315 is a p-type semiconductor region with a p-doping level, and the body contact region 340 is a p-type semiconductor region with a p+ doping level. Depending on the various application scenarios, other suitable doping polarities and doping levels may be selected for such structures (e.g., 315, 320, 330, 315, 340). In the example of Figure 3, the body contact region 340 is a recessed body contact region. In other examples, the body contact area is a planar body contact area.
[0034] Figure 4 illustrates a dielectric layer 350 on the second surface 312 of the semiconductor layer 310, and in Figure 12, this process is shown as step 802, where the dielectric layer is added to the semiconductor layer. The material of the dielectric layer 350 may include nitride materials such as silicon nitride and aluminum nitride, and / or oxide materials such as silicon oxide and aluminum oxide. The dielectric layer may be added to the semiconductor layer by vapor phase growth or bonding.
[0035] Figure 5 illustrates a gate (e.g., a gate terminal) 355 on the second surface 312 of the semiconductor layer 310, and in Figure 12, this process is represented as forming the gate on the semiconductor layer, as shown in step S803 of Figure 12. In the example of Figure 5, the gate 355 corresponds to the channel region 316 of the body region 315 and is configured to switch the channel region 316 on and off, and the dielectric portion 351 of the dielectric layer 350 is located between the gate 355 and the second surface 312 of the semiconductor layer 310, thus separating the gate 355 from the second surface 312 of the semiconductor layer 310.
[0036] The gate 355 can be formed by etching a trench (not shown in Figure 5) into the dielectric layer 350 and depositing gate material in the trench. In one example, the gate material of gate 355 may include polysilicon and / or metal. In some examples, dielectric material such as nitride or oxide is further deposited in the trench and on top of gate 355.
[0037] Figure 6 illustrates a trench 356 in the dielectric layer 350, and in Figure 12, this process is represented as forming a trench in the dielectric layer, indicated as step S804 in Figure 12. The trench 356 can be formed by etching and removing a portion of the dielectric layer 350.
[0038] Figure 7 illustrates the floating electrode 360 inside the trench 356 and on the second surface 312 of the semiconductor layer 310. In Figure 12, this process is represented as step S805, where the floating electrode is formed inside the trench and on the semiconductor layer. The floating electrode 360 may also be formed by vapor phase growth such as chemical vapor deposition (CVD).
[0039] The floating electrode 360 has a first end 361 and a second end 362, the first end 361 being coupled to and in contact with the drift region 330. By electrically coupling the first component to the second component using the floating electrode, the first and second components, which include different bandgap materials, can be brought into ohmic contact without a barrier voltage. The doping level of the portions of the first and second components that are in contact with the floating electrode may be higher than that of the other portions of the first and second components. The material of the floating electrode may include at least one of metal or silicide. The floating electrode may be used for an uninterrupted barrier voltage between two components, for example, between two components having materials with different bandgaps or different energy band structures.
[0040] Figure 8 illustrates the voltage support structure 370 in the trench 356 and on the floating electrode 360, and in Figure 12, this process is shown as step S806 in Figure 12, where the voltage support structure is formed on the floating electrode. The voltage support structure 370 may include a WBG semiconductor having a larger band gap than the semiconductor of the semiconductor layer 310. In some examples, the WBG semiconductor of the voltage support structure 370 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor. The voltage support structure 370 may be formed by vapor phase growth such as chemical vapor deposition (CVD) and / or ion implantation.
[0041] Figure 9 illustrates the drain contact 380 within the trench 356 and on the voltage support structure 370, and in Figure 12, this process is shown as step S807, where the drain contact is formed within the trench and on the voltage support structure. In some examples, the drain contact 380 includes a silicide portion that contacts the voltage support structure 370, and an aluminum portion on the silicide portion. The drain contact 380 may be formed using vapor phase growth.
[0042] Figure 10 illustrates a trench 357 in the dielectric layer 350, and in Figure 12, this process is shown as step S808, where the trench is formed within the dielectric layer. The trench 357 can be formed by etching the dielectric layer 350 using a mask.
[0043] Figure 11 illustrates the source contact 390 and field plate 395 within a trench 357, and in Figure 12, this process is shown as step S809, where the source contact and field plate are formed within the trench. The source contact and field plate may be formed by vapor phase growth. In the example in Figure 11, the source contact 390 is in contact with the source region 320 and the body contact region 340. In some examples, the source contact 390 includes a silicide portion and an aluminum portion on the silicide portion, and the field plate includes a silicide portion and an aluminum portion on the silicide portion.
[0044] In the example shown in Figure 11, the field plate 395 and the source contact 390 are structurally integrated as a single piece. In other examples, the field plate and the source contact are structurally separate pieces, and the field plate is electrically coupled to the source contact or another voltage contact.
[0045] Figure 11 shows an exemplary hybrid semiconductor device 300 according to the example described. The hybrid semiconductor device 300 includes a semiconductor layer 310, which has a source region 320, a drift region 330, a body region 315 including a channel region 316, and a body contact region 340. The material of the semiconductor layer 310 may include at least one of silicon, germanium, or gallium arsenide. The semiconductor layer 310 has a first surface 311 and an opposing second surface 312. Along the in-plane direction (X-axis), the channel region 316 of the body region 315 is located between the source region 320 and the drift region 330. The hybrid semiconductor device 300 further includes a dielectric layer 350 and a gate 355 on the second surface 312 of the semiconductor layer 310. The dielectric portion 351 of the dielectric layer 350 lies between the gate 355 and the second surface 312 of the semiconductor layer 310, thus isolating the gate 355 from the second surface 312 of the semiconductor layer 310. The gate 355 extends along the in-plane direction (X-axis) and is configured to switch on and off a channel region 316 between a source region 320 and a drift region 330 along the in-plane direction (X-axis), and therefore the gate 355 is a transverse gate extending along the in-plane direction (X-axis).
[0046] The hybrid semiconductor device 300 further includes a floating electrode 360 on a drift region 330, a voltage support structure 370 on the floating electrode 360, a drain contact 380 on the voltage support structure 370, a source contact 390, and a field plate 395 which is one form of mounting for an electric field control element, such as the electric field control element 160 in Figure 1. The voltage support structure 370 includes a first region 371 which is in ohmic contact with the second end 362 of the floating electrode 360, and a second region 372 which is in ohmic contact with the drain contact 380. In the example of Figure 11, the body region 315 is electrically coupled to the source contact 390 via the body contact region 340 and extends from the region of the source contact 390 or a region near it toward the drain contact 380, for example, roughly along the in-plane direction (X-axis), and the body region 315 acts as one form of mounting for an electric field control element, such as the electric field control element 160 in Figure 1.
[0047] In the example shown in Figure 11, the floating electrode 360 has a first end 361 and a second end 362, the first end 361 being on the drift region 330 and in ohmic contact with the drift region 330, and the voltage support structure 370 being on the floating electrode 360 and in ohmic contact with the second end 362 of the floating electrode 360. The drain contact 380 is on the voltage support structure 370. By arranging the voltage support structure 370 and the floating electrode 360 on the drift region 330 of the semiconductor layer 310 along the out-of-plane direction (Z-axis), for example, the vertical direction, the device size along the in-plane direction (for example, along the X-axis) can be reduced. The source contact 390 is in ohmic contact with the source region 320 and the body contact region 340, and the field plate 395 extends from the source contact 390 toward the drain contact 380 and the voltage support structure 370.
[0048] The voltage support structure 370 may include a WBG semiconductor having a larger band gap than the semiconductor of the semiconductor layer 310. In some examples, the WBG semiconductor of the voltage support structure 370 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor. In some examples, the WBG semiconductor of the voltage support structure 370 includes a nanomaterial having a WBG, such as a silicon carbide nanotube material or any other suitable WBG nanomaterial.
[0049] In the example shown in Figure 11, the hybrid semiconductor device 300 includes a switch element 319, which includes a source region 320, a drift region 330, a body region 315, or a portion of the body region 315 including a channel region 316, a body contact region 340, a gate 355, and a dielectric portion 351 of the dielectric layer 350. The hybrid semiconductor device 300 further includes a source contact 390, a floating electrode 360, a voltage support structure 370, a drain contact 380, a field plate 395, and an electric field control element which includes a body region 315 extending approximately along the in-plane direction (X-axis), for example, from the source contact 390 or a region near it toward the drain contact 380. The voltage support structure 370 is located on the switch element 319 and extends, for example, perpendicularly, in a direction orthogonal to the surface of the switch element 319 (e.g., the second surface 312 of the semiconductor layer 310).
[0050] In some examples, the first end 361 of the floating electrode 360 is in ohmic contact with the drift region 330 of the switch element 319, the second end 362 of the floating electrode 360 is in ohmic contact with the voltage support structure 370, and the body contact region 340 of the switch element 319 is in ohmic contact with the source contact 390. In some examples, regions of the voltage support structure 370 that are in contact with the floating electrode 360 and the drain contact 380 (e.g., 371, 372) are doped with a higher doping level compared to other regions of the voltage support structure 370 to form ohmic contact with the floating electrode 360 and the drain contact 380. Region 331 of the drift region 330 that is in contact with the floating electrode 360 is doped with a higher doping level compared to other regions of the drift region 330 to form ohmic contact with the floating electrode 360.
[0051] Figure 13 shows an illustrative cross-sectional view along A1-A2 of the hybrid semiconductor device 300 of Figure 11, following the example described. In the example of Figure 13, the source contact 390, source region 320, body region 315 including channel region 316, and drift region 330 extend in the in-plane direction (Y-axis) in a striped configuration. Figure 14 shows another illustrative cross-sectional view along B1-B2 of the hybrid semiconductor device 300 of Figure 11, following the example described. In the example of Figure 14, the source contact 390, dielectric layer 350, field plate 395, and voltage support structure 370 extend in the in-plane direction (Y-axis) in a striped configuration.
[0052] In the examples in Figures 13 and 14, specific components of the hybrid semiconductor device 300 (390, 320, 315, 316, 330, 350, 395, etc.) extend in a stripe configuration along the in-plane direction (Y-axis). In another example, specific components of the hybrid semiconductor device 300 (390, 320, 316, 315, 330, 350, 395, 370, etc.) extend in a circular or annular shape in-plane (e.g., parallel to the XY plane). For example, specific components of the hybrid semiconductor device 300 (390, 320, 316, 315, 330, 350, 395, 370, etc.) extend around the axis O1-O2 in a circular or annular configuration.
[0053] Figure 15 shows a cross-sectional view of another exemplary hybrid semiconductor device 400 following the example described. The hybrid semiconductor device 400 includes a semiconductor layer 410, which has a source region 420, a drift region 430, a body region 415 including one or more channel regions 416, and a body contact region 440. The semiconductor layer 410 has a first surface 411 and an opposing second surface 412. Along the out-of-plane direction (Z-axis), the channel region 416 of the body region 415 extends between the source region 420 and the drift region 430. The hybrid semiconductor device 400 further includes a gate 455 and a dielectric layer 451 that separates the gate 455 from the body region 415 of the semiconductor layer 410. The gate 455 extends along the out-of-plane direction (Z-axis) and is configured to switch on and off a channel region 416 along the out-of-plane direction (Z-axis) between the source region 420 and the drift region 430; therefore, the gate 455 is a transverse gate extending along the out-of-plane direction.
[0054] The hybrid semiconductor device 400 further includes a dielectric layer 450 on a second surface 412 of the semiconductor layer 410, a floating electrode 460 on a drift region 430, a voltage support structure 470 on the floating electrode 460, a drain contact 480 on the voltage support structure 470, a source contact 490, and a field plate 495.
[0055] In the example shown in Figure 15, the floating electrode 460 has a first end 461 and a second end 462, the first end 461 is on the drift region 430 and is in ohmic contact with the drift region 430, and the voltage support structure 470 is on the floating electrode 460 and is in ohmic contact with the second end 462 of the floating electrode 460. The drain contact 480 is on the voltage support structure 470. The source contact 490 is in ohmic contact with the source region 420 and the body contact region 440, and the field plate 495 extends from the source contact 490 toward the drain contact 480 and the voltage support structure 470.
[0056] The voltage support structure 470 includes a WBG semiconductor having a larger band gap than the semiconductor of the semiconductor layer 410. In some examples, the WBG semiconductor of the voltage support structure 470 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor. In some examples, the WBG semiconductor of the voltage support structure 470 includes a nanomaterial having a WBG, such as a silicon carbide nanotube material, or any other suitable nanomaterial.
[0057] Figures 16 to 22 show cross-sectional views of the structure at various stages in the formation of another exemplary hybrid semiconductor device 500, and Figure 23 shows the corresponding flowchart of an exemplary method for forming the hybrid semiconductor device 500. Hereinafter, Figures 16 to 22 will be explained with reference to the flowchart in Figure 23.
[0058] Figure 16 illustrates a semiconductor layer 510 that includes a source region 520, a drift region 530, a body region 515 including a channel region 516, and a body contact region 540. In Figure 23, this process is represented as step S901 in Figure 12, where the source region, drift region, body region, and body contact region are formed in the semiconductor layer.
[0059] The semiconductor layer 510 has a first surface 511 and an opposing second surface 512. The material of the semiconductor layer 510 may include at least one of silicon, germanium, or gallium arsenide. Figure 16 also shows a coordinate system having X, Y, and Z axes. The X and Y axes are orthogonal to each other and parallel to the surfaces of the semiconductor layer 510, for example, the first surface 511 or the second surface 512. Thus, the X and Y axes are called the "in-plane direction". The Z axis is perpendicular to the X and Y axes and is therefore perpendicular to the surfaces of the semiconductor layer 510. Thus, the Z axis is called the "out-of-plane direction". Along the in-plane direction (X axis), the channel region 516 of the body region 515 is located between the source region 520 and the drift region 530.
[0060] In some examples, the semiconductor layer 510 is formed by epitaxial growth and / or ion implantation to form a p-type layer, for example, at a p-doping level, and the semiconductor layer 510 includes a body region 515. The source region 520, drift region 530, and body contact region 540 can be formed by ion implantation of dopants into the semiconductor layer 510. In the example of Figure 16, the source region 520 is an n-type semiconductor region with an n+ doping level, the drift region 530 is an n-type semiconductor region with an n-doping level, the body region 515 is a p-type semiconductor region with a p-doping level, and the body contact region 540 is a p-type semiconductor region with a p+ doping level. Other suitable doping polarities and doping levels may be selected for the structure of the hybrid semiconductor device 500 (e.g., 515, 520, 530, 540) depending on various application scenarios. In the example of Figure 16, the body contact region 540 is a recessed body contact region. In other examples, the body contact area is a planar body contact area.
[0061] Figure 17 illustrates the voltage support structure 570 and dielectric layer 575 within the semiconductor layer 510, and in Figure 23, this process is shown as step S902, where the dielectric layer and voltage support structure are formed in the semiconductor layer. The dielectric layer 575 and voltage support structure 570 can be formed by etching and removing a portion of the semiconductor layer 510 to form a trench, forming the dielectric layer 575 by vapor phase growth or oxidation on the inner wall of the trench, and depositing the material for the voltage support structure 570 on the trench and dielectric layer 575. In the example of Figure 17, the voltage support structure 570 is adjacent to the drift region 530 along the in-plane direction (X-axis), for example, in the lateral direction. The dielectric layer 575 is located between the voltage support structure 570 and the body region 515, separating the voltage support structure 570 from the body region 515.
[0062] The voltage support structure 570 may include a WBG semiconductor having a band gap larger than the body region 515 of the semiconductor layer 510. In some examples, the WBG semiconductor of the voltage support structure 570 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor.
[0063] Figure 18 illustrates a floating electrode 560 between the drift region 530 and the voltage support structure 570, and in Figure 23, this process is shown as step S903, where the floating electrode is formed between the drift region and the voltage support structure. The floating electrode 560 can be formed by etching away a portion of the drift region 530, the dielectric layer 575, and the voltage support structure 570 to form a trench, and then depositing the material for the floating electrode 560 into the trench via vapor phase growth such as chemical vapor deposition (CVD). The material for the floating electrode may include at least one of metal or silicide.
[0064] The floating electrode 560 has a first end 561 and a second end 562, the first end 561 being coupled to the drift region 530 and in ohmic contact with the drift region 530, and the second end 562 being coupled to the voltage support structure 570 and in ohmic contact with the voltage support structure 570. In the example of Figure 18, the voltage support structure 570, the drift region 530, and the floating electrode 560 are arranged relative to each other in the in-plane direction (X-axis), for example, the transverse direction.
[0065] Figure 19 illustrates a dielectric layer 550 on a second surface 512 on a semiconductor layer 510, and in Figure 23, this process is shown as step S904, where the dielectric layer is added on top of the semiconductor layer. The material of the dielectric layer 550 may include nitride materials such as silicon nitride and aluminum nitride, and / or oxide materials such as silicon oxide and aluminum oxide. The dielectric layer 550 can be added to the semiconductor layer 510 by vapor phase growth or bonding.
[0066] Figure 20 illustrates a gate (e.g., a gate terminal) 555 on the second surface 512 of the semiconductor layer 510, and in Figure 23, this process is represented as forming the gate on the semiconductor layer 510, and is shown as step S905 in Figure 23. In the example of Figure 20, the gate 555 corresponds to the channel region 516 of the body region 515, and the dielectric portion 551 of the dielectric layer 550 is located between the gate 555 and the second surface 512 of the semiconductor layer 510, thus separating the gate 555 from the second surface 512 of the semiconductor layer 510.
[0067] The gate 555 can be formed by etching a trench into the dielectric layer 550 and depositing gate material in the trench. In one example, the material of the gate 555 may include polysilicon and / or metal. In some examples, dielectric material such as nitride or oxide is further deposited in the trench and on the gate 555.
[0068] Figure 21 illustrates trenches 556 and 557 in the dielectric layer 550, and in Figure 23, this process is shown as step S906, where trenches are formed in the dielectric layer. Trenches 556 and 557 can be formed by etching the dielectric layer 550 using a mask.
[0069] Figure 22 illustrates the source contact 590, field plate 595, and drain contact 580, and in Figure 23, this process is shown as step S907, forming the source contact, field plate, and drain contact. In the example of Figure 22, the source contact 590 is in ohmic contact with the source region 520 and the body contact region 540. In some examples, the source contact 590 includes a silicide portion and an aluminum portion on the silicide portion, and the field plate 595 includes a silicide portion and an aluminum portion on the silicide portion. The drain contact 580 is located on the voltage support structure 570. In some examples, the drain contact 580 includes a silicide portion in contact with the voltage support structure 570 and an aluminum portion on the silicide portion. The source contact 590, field plate 595, and drain contact 580 may be formed using vapor phase growth.
[0070] Figure 22 illustrates an exemplary hybrid semiconductor device 500 according to the example described. The hybrid semiconductor device 500 includes a semiconductor layer 510. The semiconductor layer 510 includes a source region 520, a drift region 530, a body region 515 including a channel region 516, and a body contact region 540. The semiconductor layer 510 has a first surface 511 and an opposing second surface 512.
[0071] The hybrid semiconductor device 500 further includes a voltage support structure 570 and a dielectric layer 575, a floating electrode 560 between the drift region 530 and the voltage support structure 570, a dielectric layer 550 and a gate 555 on the second surface of the semiconductor layer 510, a source contact 590, a field plate 595, and a drain contact 580 in a trench formed in the dielectric layer 550.
[0072] The voltage support structure 570 is adjacent to the drift region 530 along the in-plane direction (X-axis), for example, in the lateral direction. The dielectric layer 575 is located between the voltage support structure 570 and the body region 515, separating the voltage support structure 570 from the body region 515. The voltage support structure 570 may include a WBG semiconductor having a larger band gap than the semiconductors of the source region 520, the drift region 530, the body region 515 including the channel region 516, and the body contact region 540. In some examples, the WBG semiconductor of the voltage support structure 570 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor.
[0073] The floating electrode 560 has a first end 561 and a second end 562. The first end 561 is coupled to the drift region 530 and is in ohmic contact with the drift region 530, and the second end 562 is coupled to the voltage support structure 570 and is in ohmic contact with the voltage support structure 570. The voltage support structure 570, the drift region 530, and the floating electrode 560 are arranged relative to each other in the in-plane direction (X-axis), for example, the transverse direction.
[0074] The gate 555 corresponds to the channel region 516 of the body region 515, and the dielectric portion 551 of the dielectric layer 550 is located between the gate 555 and the second surface 512 of the semiconductor layer 510, thus separating the gate 555 from the second surface 512 of the semiconductor layer 510.
[0075] The source contact 590 is in ohmic contact with the source region 520 and the body contact region 540. In some examples, the source contact 590 includes a silicide portion and an aluminum portion on the silicide portion, and the field plate 595 includes a silicide portion and an aluminum portion on the silicide portion. The field plate 595 extends from the source contact 590 toward the drain contact 580. The drain contact 580 is located on the voltage support structure 570. In some examples, the drain contact 580 includes a silicide portion that contacts the voltage support structure 570 and includes an aluminum portion on the silicide portion.
[0076] In the example shown in Figure 22, the field plate 595 and the source contact 590 are structurally integrated as a single piece. In other examples, the field plate and the source contact are structurally separate pieces, and the field plate is electrically coupled to the source contact or another voltage contact.
[0077] In some examples, specific components of the hybrid semiconductor device 500 (590, 520, 516, 515, 530, 550, 595, 570, etc.) extend in a stripe configuration along the in-plane direction (Y-axis). In another example, specific components of the hybrid semiconductor device 500 (590, 520, 516, 515, 530, 550, 595, 570, etc.) extend in a circular or annular shape in the in-plane direction (e.g., parallel to the XY plane). For example, specific components of the hybrid semiconductor device 500 (590, 520, 516, 515, 530, 550, 595, 570, etc.) extend around the axis O3-O4 in a circular or annular configuration.
[0078] In the example shown in Figure 22, the hybrid semiconductor device 500 includes a switch element 519, which includes a source region 520, a drift region 530, a body region 515, or a portion of the body region 515 including a channel region 516, a body contact region 540, a gate 555, and a dielectric portion 551 of the dielectric layer 550. The hybrid semiconductor device 500 further includes a floating electrode 560, a voltage support structure 570, a drain contact 580, a source contact 590, and an electric field control element including a field plate 595 and a body region 515, which extend from or near the source contact 590 toward the drain contact 580, for example, along substantially in-plane direction (X-axis). The voltage support structure 570 is adjacent to the switch element 519 along the in-plane direction (X-axis) and extends, for example, laterally, in a direction parallel to the surface of the switch element 519 (e.g., a portion of the second surface 512 of the semiconductor layer 510). In some examples, the voltage support structure 570 is at least partially surrounded by the switching element 519.
[0079] In some examples, the first end 561 of the floating electrode 560 is in ohmic contact with the drift region 530 of the switch element 519, the second end 562 of the floating electrode 560 is in ohmic contact with the voltage support structure 570, and the body contact region 540 of the switch element 519 is in ohmic contact with the source contact 590. In some examples, regions of the voltage support structure 570 in contact with the floating electrode 560 and the drain contact 580 (e.g., 571, 572) are doped with a higher doping level than other regions of the voltage support structure 570 to form ohmic contact with the floating electrode 560 and the drain contact 580, and region 531 of the drift region 530 in contact with the floating electrode 560 is doped with a higher doping level than other regions of the drift region 530 to form ohmic contact with the floating electrode 560.
[0080] Figure 24 illustrates another exemplary hybrid semiconductor device 600 following the example described. The hybrid semiconductor device 600 includes a semiconductor layer 610. The semiconductor layer 610 includes a source region 620, a drift region 630, a body region 615 including a channel region 616, and a body contact region 640. The semiconductor layer 610 has a first surface 611 and an opposing second surface 612.
[0081] The hybrid semiconductor device 600 further includes a voltage support structure 670, a floating electrode 660 between the drift region 630 and the voltage support structure 670, a dielectric layer 650 and gate 655 on the second surface 612 of the semiconductor layer 610, a source contact 690, a field plate 695, and a drain contact 680.
[0082] The voltage support structure 670 is adjacent to the drift region 630 along the in-plane direction (X-axis), for example, in the lateral direction. The voltage support structure 670 is in contact with the body region 615. The voltage support structure 670 can be formed by ion implanting a dopant into the semiconductor layer 610 or by etching away a portion of the semiconductor layer 610 to form a trench, and then depositing the material for the voltage support structure 670 into the trench. In some examples, the semiconductor layer 610 is a silicon layer, and the voltage support structure 670 is formed by ion implanting carbon into the semiconductor layer 610 and activating the implanted region to form silicon carbide as the voltage support structure 670. The voltage support structure 670 may include a WBG semiconductor having a larger band gap than the semiconductor of the semiconductor layer 610. In some examples, the WBG semiconductor of the voltage support structure 670 includes silicon carbide, gallium nitride, and / or any other suitable WBG semiconductor.
[0083] Certain components of the hybrid semiconductor device 600 are identical or similar to components of the hybrid semiconductor device described above, and can refer to components of the hybrid semiconductor device described above, such as components of the hybrid semiconductor device 500.
[0084] Without departing from the scope of this Specification, modifications, additions, or omissions may be made to the devices, systems, apparatus, and methods described herein. Furthermore, the operation of the devices, systems, and apparatus described herein may include more, fewer, or other components, and the described methods may include more, fewer, or other steps. The steps may also be performed in any preferred order.
[0085] The term “coupled” is used throughout this specification. This term may encompass connections, communications, or signaling paths that enable a functional relationship consistent with the description in this statement. For example, if device A generates a signal to control device B to perform a certain action, in the first example device A is coupled to device B, or in the second example device A is coupled to device B through an intervening component C, where the intervening component C does not substantially alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.
[0086] Modifications to the described embodiments are permitted within the scope of the claims, and other embodiments are possible.
Claims
1. It is a semiconductor device, A switch element formed on a semiconductor substrate, comprising a surface, a first region coupled to a source contact, and a second region, and including a first semiconductor material having a certain band gap, A floating electrode formed on a second region of the switch element, having a first end connected to the second region of the switch element and a second end, A voltage support structure formed on the floating electrode, comprising a second semiconductor material having a band gap larger than the band gap of the first semiconductor material, and in contact with the second end of the floating electrode, A drain contact coupled to the voltage support structure, Semiconductor devices, including those mentioned above.
2. A semiconductor device according to claim 1, A semiconductor device in which the floating electrode includes at least one of a metal or a silicide.
3. A semiconductor device according to claim 1, A semiconductor device in which the first end of the floating electrode is in ohmic contact with the second region of the switch element, and the second end of the floating electrode is in ohmic contact with the voltage support structure.
4. A semiconductor device according to claim 1, A semiconductor device in which the switching element is at least one of a diode, a bipolar transistor, a field-effect transistor, or an insulated-gate bipolar transistor.
5. A semiconductor device according to claim 1, A semiconductor device comprising a switching element including a field-effect transistor, wherein the field-effect transistor is a p-type field-effect transistor or an n-type field-effect transistor.
6. A semiconductor device according to claim 5, A semiconductor device in which the switching element is a lateral diffusion metal oxide semiconductor field-effect transistor.
7. A semiconductor device according to claim 5, A semiconductor device wherein the aforementioned switching element further has a gate.
8. A semiconductor device according to claim 7, A semiconductor device in which the gate of the switch element extends in a direction perpendicular to the surface of the switch element or in a direction parallel to the surface of the switch element.
9. A semiconductor device according to claim 1, A semiconductor device in which the second semiconductor material includes at least one of silicon carbide or gallium nitride.
10. A semiconductor device according to claim 1, A semiconductor device in which the second semiconductor material includes a nanotube material.
11. A semiconductor device according to claim 1, A semiconductor device in which the first semiconductor material includes at least one of silicon, germanium, or gallium arsenide.
12. A semiconductor device according to claim 1, A semiconductor device further comprising an electric field control element extending toward the drain contact.
13. A semiconductor device according to claim 12, A semiconductor device in which the electric field control element is a field plate electrically coupled to the source contact or another voltage contact.
14. A semiconductor device according to claim 12, A semiconductor device in which the electric field control element is a third region of the switch element, and the third region of the switch element is coupled to the source contact and extends toward the drain contact.
15. A semiconductor device according to claim 1, A semiconductor device in which the voltage support structure extends in a direction perpendicular to the surface of the switch element.
16. It is a semiconductor device, A switch element formed on a semiconductor substrate, A first semiconductor region having a first doping polarity, comprising a channel region, A source region having a second doping polarity, which is in contact with the first semiconductor region, The drift region having the second doping polarity, which is in contact with the first semiconductor region, The gate corresponding to the channel region of the first semiconductor region, The switch element having, A source contact formed on the semiconductor substrate, which contacts the source region of the switch element, A floating electrode formed on the semiconductor substrate, having a first end that is coupled to the drift region of the switch element and a second end, A voltage support structure formed on the semiconductor substrate, the voltage support structure in contact with the second end of the floating electrode, A drain contact formed on the voltage support structure, Includes, A semiconductor device comprising a first semiconductor material in which each of the first semiconductor region, source region, and drift region of the switch element has a first band gap, and the voltage support structure comprises a second semiconductor material having a second band gap larger than the first band gap.
17. A semiconductor device according to claim 16, A semiconductor device in which the voltage support structure extends in a direction parallel to the surface of the switch element, and the voltage support structure is at least partially surrounded by the switch element.
18. A semiconductor device according to claim 17, A semiconductor device further comprising a dielectric layer formed on the first semiconductor region of the switch element and the voltage support structure.
19. A method for forming a semiconductor device, The method involves forming a switch element on a semiconductor substrate, wherein the switch element comprises a first semiconductor material having a certain band gap. Forming a floating electrode on the switch element, wherein the floating electrode has a first end and a second end, and the first end of the floating electrode is coupled to the switch element. Forming a voltage support structure on the floating electrode, wherein the voltage support structure includes a second semiconductor material having a band gap larger than the band gap of the first semiconductor material. Forming a source contact on the switch element, wherein the source contact is coupled to the switch element, Forming a drain contact on the voltage support structure, wherein the drain contact is coupled to the voltage support structure. Forming an electric field control element on the channel of the aforementioned switch element, Methods that include...
20. The method according to claim 19, A method wherein the first semiconductor material comprises at least one of silicon, germanium, or gallium arsenide.