Semiconductor equipment

The semiconductor device with oxide semiconductor materials and a delayed signal input circuit addresses data loss and degradation issues in existing memory technologies, ensuring long-term retention and high-speed operation with reduced power consumption.

JP7883642B2Active Publication Date: 2026-07-01SEMICON ENERGY LAB CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
SEMICON ENERGY LAB CO LTD
Filing Date
2025-05-29
Publication Date
2026-07-01

AI Technical Summary

Technical Problem

Existing semiconductor memory devices face issues with data loss when power is cut off, high power consumption due to refresh operations, limited write cycles, and degradation of memory elements, especially in volatile and non-volatile memory types like DRAM, SRAM, and flash memory.

Method used

A semiconductor device using oxide semiconductor materials with low off-current transistors, combined with a specific circuit design that includes a delay mechanism for signal input and a capacitive element to retain charge, eliminating the need for high voltage writing and reducing off-current, thereby enabling long-term data retention without refresh operations.

Benefits of technology

The device achieves long-term data retention, high-speed operation, and increased reliability by eliminating the need for refresh operations and preventing degradation, allowing for frequent rewriting without limiting the number of write cycles.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a semiconductor device with a novel structure, in which a storage content can be held even under no power supply situations, and writing is possible without limitation on the number of times.SOLUTION: A semiconductor device is formed of a material that can sufficiently reduce an off current of a transistor, for example, an oxide semiconductor material that is a wide-gap semiconductor. By the use of the semiconductor material that can sufficiently reduce the off current of the transistor, the information can be held for a long time. Moreover, timing of changing a potential of a signal line is delayed from timing of changing a potential of a writing word line. Thus, wrong data writing can be prevented.SELECTED DRAWING: Figure 2
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