Semiconductor equipment

Abstract

To provide a semiconductor device that efficiently dissipates heat generated during operation.SOLUTION: A semiconductor device includes: a semiconductor chip which includes a function unit and a control unit; a chip carrier on which the semiconductor element is mounted; and a substrate. The chip carrier has a first surface and a second surface opposite thereto, and the semiconductor chip is mounted on the first surface. The chip carrier has a first through hole that communicates with the first surface from the second surface and exposes the function unit of the semiconductor chip. The substrate has a second through hole that houses the chip carrier on which the semiconductor chip is mounted, and includes a material having a coefficient of thermal conductivity lower than a coefficient of thermal conductivity of the chip carrier. The second through hole of the substrate communicates with a front surface opposite to a back surface of the substrate from the back surface, the first surface of the chip carrier is located on the front surface side of the substrate, and the second surface of the chip carrier is exposed to the back surface side of the substrate.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments relate to semiconductor devices.

Background Art

[0002] Semiconductor devices are required to efficiently dissipate heat generated during their operation and operate stably.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments provide a semiconductor device that efficiently dissipates heat generated during operation.

Means for Solving the Problems

[0005] The semiconductor device according to the embodiment includes a semiconductor chip including a functional unit and a control unit, a chip carrier on which the semiconductor element is mounted, and a substrate. The chip carrier has a first surface and a second surface on the opposite side thereof, and the semiconductor chip is mounted on the first surface. The chip carrier has a first through hole that communicates from the second surface to the first surface and exposes the functional unit of the semiconductor chip. The substrate has a second through hole that houses the chip carrier on which the semiconductor chip is mounted, and includes a material having a lower thermal conductivity than the thermal conductivity of the chip carrier. The second through hole of the substrate communicates from the back surface of the substrate to the opposite surface thereof, the first surface of the chip carrier is located on the surface side of the substrate, and the second surface of the chip carrier is exposed on the back surface side of the substrate.

Brief Description of the Drawings

[0006] [Figure 1] This is a schematic cross-sectional view showing a semiconductor device according to an embodiment. [Figure 2] This is a schematic plan view showing a semiconductor device according to an embodiment. [Figure 3] This is another schematic plan view showing a semiconductor device according to an embodiment. [Figure 4] This is another schematic cross-sectional view showing a semiconductor device according to an embodiment. [Figure 5] This is a schematic cross-sectional view showing a semiconductor device relating to a comparative example. [Modes for carrying out the invention]

[0007] The embodiments will be described below with reference to the drawings. Identical parts in the drawings will be numbered the same, and detailed explanations of those parts will be omitted as appropriate, while different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of sizes between parts, etc., are not necessarily the same as in reality. Furthermore, even when representing the same part, the dimensions and ratios may be depicted differently in different drawings.

[0008] Furthermore, the arrangement and configuration of each part will be explained using the X, Y, and Z axes shown in each figure. The X, Y, and Z axes are mutually orthogonal and represent the X, Y, and Z directions, respectively. In some cases, the Z direction is described as upward and the opposite direction as downward.

[0009] Figure 1 is a schematic cross-sectional view showing a semiconductor device 1 according to an embodiment. The semiconductor device 1 comprises a semiconductor chip 10, a chip carrier 20, and a substrate 30. The semiconductor chip 10 is mounted on the chip carrier 20. The chip carrier 20 on which the semiconductor chip 10 is mounted is mounted on the substrate 30.

[0010] The chip carrier 20 has a first surface 20a and a second surface 20b. The second surface 20b is the back surface opposite to the first surface 20a. The chip carrier 20 is a metal such as copper (Cu). The chip carrier 20 may also be a semiconductor such as polysilicon.

[0011] The semiconductor chip 10 is mounted on the first surface 20a via a connecting member 23. The connecting member 23 is, for example, a conductive paste. Alternatively, the connecting member 23 may be an insulating adhesive. The semiconductor chip 10 has a back surface 10B that is connected to the chip carrier 20, and a front surface 10F opposite to the back surface 10B.

[0012] The chip carrier 20 has a first through-hole 20H that communicates from the first surface 20a to the second surface 20b. The width WH1 of the first through-hole 20H in the direction parallel to the second surface 20b of the chip carrier 20, for example, in the X direction, is wider than the thickness TS in the direction from the second surface 20b to the first surface 20a, for example, in the Z direction. When the chip carrier 20 is viewed from the second surface 20b side, the back surface 10B of the semiconductor chip 10 is exposed in the space within the first through-hole 20H.

[0013] The substrate 30 has a second through-hole 30H that communicates from its back surface 30B to the opposite front surface 30F. The size of the second through-hole 30H in the X and Y directions is larger than the size of the outer edge of the first surface 20a of the chip carrier 20 in the X and Y directions. Also, the size of the second through-hole 30H in the X and Y directions is larger than the size of the surface 10F of the semiconductor chip 10 in the X and Y directions. For example, the width WH2 in the X direction of the second through-hole 30H is wider than the width WC in the X direction of the semiconductor chip 10 (see Figure 2). Also, the width WH2 in the X direction of the second through-hole 30H is wider than the width WCC in the X direction of the first surface 20a of the chip carrier 20 (see Figure 2).

[0014] The chip carrier 20, with the semiconductor chip 10 mounted on it, is inserted into the second through-hole 30H of the substrate 30. The chip carrier 20 is inserted so that the semiconductor chip 10 is exposed on the surface 30F side of the substrate 30. The semiconductor chip 10 is also positioned, for example, to protrude outward from the surface 30F of the substrate 30.

[0015] Furthermore, the chip carrier 20 has a flange-shaped connecting portion 20c on the second surface 20b side. The width of the outer edge of the connecting portion 20c in the direction parallel to the second surface 20c of the chip carrier 20 is wider than the width of the second through hole 30H of the substrate 30 in the same direction. The connecting portion 20c of the chip carrier 20 is connected to the back surface 30B of the substrate 30 via a connecting member 25. The connecting member 25 is, for example, a conductive paste. Alternatively, the connecting member 25 may be an insulating adhesive.

[0016] Figure 2 is a schematic plan view showing a semiconductor device 1 according to an embodiment. Figure 2 is a schematic diagram showing the surface 10F of the semiconductor chip 10 and the surface 30F of the substrate 30. Figure 1 is a cross-sectional view along line AA shown in Figure 2.

[0017] The semiconductor chip 10 includes, for example, a functional unit 13 and a control unit 15. While not limiting the application of the semiconductor device 1, the functional unit 13 functions, for example, as a light sensor, a gas sensor, or a shutter that turns light, electron beams, etc., on and off. The functional unit 13 may also be, for example, a MEMS (Micro Electro Mechanical System). The control unit 15 includes a circuit for controlling the functional unit 13.

[0018] The semiconductor chip 10 includes a plurality of wire pads 17. The wire pads 17 are arranged, for example, along one side of a rectangular semiconductor chip 10. A functional unit 13 is located in the center of the semiconductor chip 10, and a control unit 15 is located between the functional unit 13 and the wire pads 17. Each wire pad 17 is electrically connected to the control unit 15. The wire pads 17 are also electrically connected to the functional unit 13 via the control unit 15.

[0019] The substrate 30 includes, for example, a plurality of wire pads 31. The wire pads 31 are arranged, for example, along one side of the rectangular second through hole 30H. Further, the wire pads 31 are arranged opposite to the wire pads 17 and are electrically connected to the wire pads 17 via a metal wire MW. The wire pads 31 are electrically connected to, for example, a connector not shown.

[0020] FIG. 3 is another schematic plan view showing the semiconductor device 1 according to the embodiment. FIG. 3 shows the second surface 20b of the chip carrier 20 and the back surface 30B of the substrate 30.

[0021] The back surface 10B of the semiconductor chip 10 is exposed inside the first through hole 20H of the chip carrier 20. Further, the functional portion 13 of the semiconductor chip 10 is accessible through the first through hole 20H. That is, the functional portion 13 is exposed to, for example, a predetermined ambient gas through the first through hole 20H. Further, light, an electron beam, an ion beam, etc. can be irradiated to the functional portion 13 through the first through hole 20H.

[0022] As shown in FIG. 3, the second surface 20b of the chip carrier 20 has an outer edge located outside the second through hole 30H of the substrate 30. The connection portion 20c of the chip carrier 20 is provided so as to surround the second through hole 30H and is connected to the back surface 30B of the substrate 30 (see FIG. 1).

[0023] FIG. 4 is another schematic cross-sectional view showing the semiconductor device 1 according to the embodiment. FIG. 4 is a cross-sectional view taken along the line A-A shown in FIG. 2.

[0024] In this example, a metal plate 40 is connected to the second surface 20b of the chip carrier 20. The metal plate 40 is, for example, a heat sink or a cooling plate. That is, when the semiconductor chip 10 operates, the heat generated in the semiconductor chip 10 is transmitted to the metal plate 40 through the chip carrier 20 and dissipated to the outside. The metal plate 40 includes, for example, copper (Cu). The metal plate 40 has, for example, a through hole 40H communicating with the first through hole 20H of the chip carrier 20.

[0025] Figure 5 is a schematic cross-sectional view showing a semiconductor device 2 according to a comparative example. The semiconductor device 2 comprises a semiconductor chip 10, a substrate 30, and a chip carrier 50.

[0026] As shown in Figure 5, the semiconductor chip 10 is mounted on a chip carrier 50. The chip carrier 50 has a first surface 50a and a second surface 50b on the opposite side. The semiconductor chip 10 is mounted on the first surface 50a. The chip carrier 50 has a first through-hole 50H that communicates from the second surface 50b to the first surface 50a, and the back surface 10B of the semiconductor chip 10 is exposed in the space within the first through-hole 50H.

[0027] The chip carrier 50, on which the semiconductor chip 10 is mounted, is mounted on the surface 30F of the substrate 30. The chip carrier 50 is located between the semiconductor chip 10 and the substrate 30. The second through-hole 30H of the substrate 30 communicates with the through-hole 50H of the chip carrier 50. That is, the functional part 13 of the semiconductor chip 10 is accessible from the back surface 30B of the substrate 30 (see Figure 3).

[0028] As shown in Figure 5, when a metal plate 40 is connected to the back surface 30B of the substrate 30, the heat generated during the operation of the semiconductor chip 10 is transferred to the metal plate 40 via the chip carrier 50 and the substrate 30. If the substrate 30 contains materials with low thermal conductivity, such as ceramics or resin, heat conduction from the chip carrier 50 to the metal plate 40 is inhibited. Consequently, the heat dissipation efficiency of the semiconductor device 2 decreases.

[0029] In contrast, in the semiconductor device 1 according to this embodiment, the chip carrier 20 is directly connected to the metal plate 40. The thermal conductivity of the chip carrier 20 is greater than that of the substrate 30, allowing the heat generated in the semiconductor chip 10 to be efficiently dissipated through the metal plate 40.

[0030] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0031] 1, 2… Semiconductor device, 10… Semiconductor chip, 10B, 30B… Back side, 10F, 30F… Front side, 13… Functional part, 15… Control unit, 17, 31… Wire pads, 20, 50… Chip carrier, 20H, 50H… First through hole, 20a, 50a… First surface, 20b, 50b… Second surface, 20c… ​​Connection part, 23… Connecting member, 25… Connecting member, 30… Substrate, 30H… Second through hole, 40… Metal plate, 40H… Through hole, MW… Metal wire

Claims

1. A semiconductor chip including a functional unit and a control unit, A chip carrier having a first surface and a second surface opposite thereto, wherein the semiconductor chip is mounted on the first surface, and the chip carrier has a first through-hole that communicates from the second surface to the first surface and exposes the functional portion of the semiconductor chip, A substrate having a second through-hole for housing the chip carrier on which the semiconductor chip is mounted, and comprising a material having a thermal conductivity lower than that of the chip carrier, Equipped with, The second through-hole of the substrate communicates from the back surface of the substrate to the opposite surface. The first surface of the chip carrier is located on the surface side of the substrate, The second surface of the chip carrier is a semiconductor device exposed on the back side of the substrate.

2. The substrate has a first bonding pad provided on its surface, The semiconductor device according to claim 1, wherein the semiconductor chip has a second bonding pad that is electrically connected to the first bonding pad via a conductive member.

3. The semiconductor device according to claim 2, wherein the functional portion of the semiconductor chip is electrically connected to the second bonding pad via the control unit.

4. The semiconductor device according to claim 1, wherein the chip carrier is provided on the second surface side and has a flange-shaped connecting portion connected to the back surface of the substrate.

5. The semiconductor device according to claim 1, wherein the thickness of the chip carrier in the direction from the second surface toward the first surface is thinner than the width of the first through hole in the direction parallel to the first surface.

6. The chip carrier includes metal or semiconductor, The semiconductor device according to claim 1, wherein the substrate comprises ceramics or resin.

7. The semiconductor device according to claim 1, wherein the semiconductor chip is arranged to protrude outward from the surface of the substrate in the direction from the second surface toward the first surface.

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