Semiconductor manufacturing equipment

Abstract

To provide a semiconductor manufacturing apparatus in which an unnecessary chip is prevented from being scattered at a time of peeling a semiconductor chip.SOLUTION: A semiconductor manufacturing apparatus 101 that peels a semiconductor chip from a dicing sheet to which a neary circular wafer containing a semiconductor chip that is diced and is segmented into a small piece is attached, comprises: a stage 3 having a plurality of projection parts; a dicing sheet holding part 7; and vacuum drawing means of performing a vacuum drawing between the stage 3 and a dicing sheet 13. In the semiconductor manufacturing apparatus 101, the projection part contains: a plurality of first projection parts 10 that includes a taper part that becomes thinner in a cross sectional view, and of which a tip end is arranged at a center part 3a1 as a nearly circular region of a center of the stage 3; and a second projection part 11 that does not include the taper in the cross sectional view, and of which the tip end is arranged at an outer peripheral part 3a2 as a region surrounding the center part 3a1 in a plan view.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] This disclosure relates to semiconductor manufacturing equipment.

Background Art

[0002] In the process of manufacturing semiconductor devices, a technique may be used in which a wafer attached to a dicing sheet is diced to form semiconductor chips, and the formed individual semiconductor chips are picked up from the dicing sheet by a pickup device.

[0003] Patent Document 1 discloses providing a plurality of protrusions on a stage (jig base) that holds semiconductor chips via a dicing sheet (although it is described as an adhesion layer in Patent Document 1, it can also be used as a dicing sheet). The space between the dicing sheet and the stage is evacuated so that the dicing sheet except for the portions where the protrusions are in contact is peeled off from the semiconductor chips, and the semiconductor chips are picked up in a state where the adhesive force between the dicing sheet and the semiconductor chips is reduced.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the technique described in Patent Document 1, unnecessary small pieces of the wafer (hereinafter referred to as unnecessary chips) generated in the outer peripheral region of the wafer during dicing may be peeled off from the dicing sheet when evacuated and scattered onto the semiconductor chips that become products, causing damage.

[0006] This disclosure was made to solve the above-mentioned problems and aims to provide a semiconductor manufacturing apparatus that can promote peeling from the dicing sheet during the peeling of semiconductor chips and suppress the scattering of unwanted chips. [Means for solving the problem]

[0007] The semiconductor manufacturing apparatus according to this disclosure is a semiconductor manufacturing apparatus for peeling semiconductor chips from a dicing sheet on which a substantially circular wafer containing diced and divided semiconductor chips is attached to one side, and comprises a stage having a plurality of protrusions on which the wafer is supported and placed via the dicing sheet; a dicing sheet holding part for holding the dicing sheet; and a vacuum means for vacuuming the space between the stage and the dicing sheet, wherein the protrusions include a plurality of first protrusions having a tapered portion that narrows in cross-section and whose tips are located in the central part which is a substantially circular area in the center of the stage in plan view, and second protrusions that do not have a taper in cross-section and whose tips are located in the outer periphery surrounding the central part in plan view. Furthermore, the second projection is provided in multiple locations and is not continuous in a plan view. . [Effects of the Invention]

[0008] According to this disclosure, the projection provided on the stage includes a plurality of first projections having a tapered portion that narrows in cross-sectional view and whose tips are located in the central part, which is a substantially circular area in the center of the stage in plan view, and second projections that do not have a taper in cross-sectional view and whose tips are located in the outer periphery surrounding the central part in plan view. Furthermore, the second projection is provided in multiple locations and is not continuous in a plan view. This achieves the effect of simultaneously promoting the peeling of semiconductor chips from the dicing sheet in the central part when viewed from above, and suppressing the scattering of unwanted chips in the outer part when viewed from above. [Brief explanation of the drawing]

[0009] [Figure 1] This is a plan view showing a semiconductor manufacturing apparatus according to Embodiment 1. [Figure 2] This is a cross-sectional view showing a semiconductor manufacturing apparatus according to Embodiment 1. [Figure 3] This is a plan view showing a part of the semiconductor manufacturing apparatus according to Embodiment 1. [Figure 4] This is a cross-sectional view showing a part of the semiconductor manufacturing apparatus according to Embodiment 1. [Figure 5] This is a cross-sectional view showing a part of the semiconductor manufacturing apparatus according to Embodiment 1. [Figure 6] This is a cross-sectional view showing the semiconductor manufacturing process according to Embodiment 1. [Figure 7] This is a cross-sectional view showing the semiconductor manufacturing process according to Embodiment 1. [Figure 8] This is a cross-sectional view showing the semiconductor manufacturing process according to Embodiment 1. [Figure 9] This is a cross-sectional view showing the semiconductor manufacturing process according to Embodiment 1. [Figure 10] This is a cross-sectional view showing the semiconductor manufacturing process according to Embodiment 1. [Figure 11] This is a cross-sectional view showing the semiconductor manufacturing process according to Embodiment 1. [Figure 12] This is a plan view showing the schematic of a wafer. [Figure 13] This is a plan view showing a part of the semiconductor manufacturing apparatus according to Embodiment 2. [Figure 14] This is a cross-sectional view showing a part of the semiconductor manufacturing apparatus according to Embodiment 2.

[0010] In this disclosure, the side of the stage on which semiconductor chips and wafers are placed is referred to as the top surface, and the opposite side is referred to as the bottom surface. The direction from the bottom surface of the stage toward the top surface is referred to as the top (upward direction), and the opposite direction is referred to as the bottom (downward direction). The vertical direction is the direction perpendicular to the top surface of the stage, and the horizontal direction is the direction perpendicular to the vertical direction, i.e., the direction parallel to the top surface of the stage. A plan view is a view from a direction perpendicular to the top surface of the stage, and a cross-sectional view is a view from a direction parallel to the top surface of the stage. If protrusions are provided on the top surface of the stage, the direction is defined as a virtual top surface formed by connecting the tips of each protrusion.

[0011] <Embodiment 1> First, the outline of the semiconductor manufacturing apparatus 101 according to Embodiment 1 will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the semiconductor manufacturing apparatus 101, and FIG. 2 is a cross-sectional view taken along the cross-section A - A of the semiconductor manufacturing apparatus 101 in FIG. 1. As shown in FIGS. 1 and 2, the semiconductor manufacturing apparatus 101 includes a housing 1, a stage frame 2 disposed inside the housing 1, a stage 3 disposed inside the stage frame 2, and a dicing sheet holding portion 7 provided at the upper part of the outer periphery of the housing 1. The housing 1, the stage frame 2, the stage 3, and the dicing sheet holding portion 7 are substantially circular in plan view in accordance with the shape of a wafer which is substantially circular. Although not shown, a transfer hand is provided above the stage 3. Details will be described below.

[0012] The stage 3 is a mounting portion on which a wafer divided into a plurality of semiconductor chips by dicing is mounted via a dicing sheet. The upper surface 3a of the stage 3 on which the dicing sheet is mounted extends in the X direction which is the first direction and the Y direction which is the second direction orthogonal to the first direction, and has a substantially circular shape larger than the wafer in plan view. That is, the upper surface 3a of the stage is a substantially circular shape having an outer peripheral end of a circle with a diameter larger than the diameter of the wafer with respect to the substantially circular wafer. In the present disclosure, an example in which the shape of the wafer and the shape of the stage are substantially circular is shown, but the shape is not limited to a substantially circular shape, and may be a polygon, an ellipse, or the like.

[0013] Furthermore, the upper surface 3a of the stage has a central portion 3a1 which is a central region of the substantially circular shape and an outer peripheral portion 3a2 which is an outer peripheral region surrounding the central portion 3a1. As shown in FIG. 2, a first protrusion 10 is disposed in the central portion 3a1 and a second protrusion 11 is disposed in the outer peripheral portion 3a2. Therefore, when the wafer attached to the dicing sheet is placed on the stage 3, the tips of the first protrusion 10 and the second protrusion 11 contact the dicing sheet, and the wafer is supported via the dicing sheet. Details of the first protrusion 10 and the second protrusion ************** will be described later using another figure.

[0014] Stage 3 is provided with a suction port 4 that penetrates from the upper surface 3a of the stage to the lower surface 3b of the stage, which is the opposite surface of the upper surface 3a. The side of the suction port 4 on the upper surface 3a side of the stage is open, and the side on the lower surface 3b side of the stage is connected to one end of a suction tube (not shown). Further, the other end of the suction tube is connected to a vacuum pump (not shown). When the vacuum pump is driven, the air above the upper surface 3a of the stage is sucked. Therefore, when a wafer is placed on stage 3 via a dicing sheet and the vacuum pump is driven, the space between the upper surface 3a of the stage and the dicing sheet is evacuated. Note that even if the suction port 4, the vacuum pump, and the suction tube are not provided, it is sufficient if there is provided evacuation means capable of evacuating the space between the upper surface 3a of the stage and the dicing sheet.

[0015] The stage frame 2 is a frame-shaped, for example, cylindrical housing that surrounds the stage 3. One end of the central axis 5 is connected to the lower part of the stage 3 in the region surrounded by the stage frame 2, and the other end of the central axis 5 is further connected to a stage drive unit 6 incorporating a motor. By driving the motor of the stage drive unit 6, the stage 3 can be moved in the Z direction, which is a third direction orthogonal to the X direction and the Y direction.

[0016] The dicing sheet holding unit 7 is annularly attached to the upper part of the outer periphery of the housing 1. When a dicing sheet with a wafer attached is placed on the stage 3, it holds the dicing sheet and has a function of pulling the dicing sheet in the direction of the outer peripheral end, that is, in the direction outward from the center of the substantially circular stage 3 and the wafer. More specifically described, the dicing sheet holding unit 7 has a frame support part 8, a frame pressing part 9, and a cylinder (not shown) for vertically moving the frame pressing part 9, and can sandwich and hold a frame attached to the outer peripheral part of the dicing sheet with the frame support part 8 and the frame pressing part 9.

[0017] Furthermore, since the position in the Z-direction of the surface of the frame support portion 8 that contacts the dicing sheet is lower than the position of the tips of the first projection 10 and the second projection 11 provided on the upper surface 3a of the stage, when the dicing sheet is held, the position of the frame is held at a position lower than the tips of the first projection 10 and the second projection 11. As a result, the dicing sheet holding portion 7 stretches the dicing sheet in the direction from the center of the stage 3 toward the outer edge.

[0018] Next, the first projection 10 located on the central part 3a1 of the upper surface 3a of the stage and the second projection 11 located on the outer periphery 3a2 will be described in detail. Figure 3 is a plan view showing an enlarged portion of part B in Figure 1, that is, a part of the boundary between the central part 3a1 and the outer periphery 3a2 of the stage 3 as seen from above. Figure 4 is a cross-sectional view of the C-C section in Figure 3, which corresponds to an enlarged view of part D in Figure 2. Note that in Figure 3, the boundary between the central part 3a1 and the outer periphery 3a2 and the outer edge of the outer periphery 3a2 are arcs, but they are simplified and shown as straight lines. The stage frame 2 is not shown.

[0019] As shown in Figures 3 and 4, the multiple first protrusions 10 are provided so that their tips protrude from the central region 3a1 of the stage upper surface 3a. Alternatively, the second protrusions 11 are provided so that their annularly continuous tips protrude from the outer peripheral region 3a2 of the stage upper surface 3a. That is, the tips of the first protrusions 10 and the second protrusions 11 are located in the central region 3a1 and the outer peripheral region 3a2, respectively. Furthermore, the tips of the first protrusions 10 and the second protrusions 11 are at the same height. Here, in this disclosure, the tips of the first protrusions 10 and the second protrusions 11 refer to the tips of each protrusion that protrude from the stage upper surface 3a. Note that the height of the tips of the first protrusions 10 and the second protrusions 11 only needs to provide a flatness sufficient to hold the wafer through the dicing sheet, and it is not necessarily required that all of the first protrusions 10 and the second protrusions 11 be at the same height as each other.

[0020] The first projection 10 located in the central portion 3a1 will be described in more detail. As shown in Figures 3 and 4, the first projection 10 is arranged in a grid pattern with its tip having a pitch Px in the X direction and a pitch Py in the Y direction in a plan view. In this embodiment, Px and Py are equal, and therefore the first projection 10 is arranged in a grid pattern of squares. However, the arrangement position of the first projection 10 in a plan view is not limited to the arrangement shown in Figure 3, and should be determined as appropriate considering the size of the semiconductor chip formed by dicing the wafer, the deformability of the dicing sheet, the adhesive strength, the suction capacity of the vacuum means, etc.

[0021] For example, semiconductor chips used in power semiconductor devices have a chip size of approximately 5mm square to 15mm square. For semiconductor chips of this size, the pitch between the tips of adjacent first protrusions 10 should be 2mm or less, preferably 0.5mm to 1.5mm. If the pitch between the tips of adjacent first protrusions 10 is too large, there will be fewer points supporting a single semiconductor chip, and if it is too small, the spacing between the points supporting a single semiconductor chip will be small. In either case, peeling errors that prevent the semiconductor chip from being peeled off the dicing sheet are more likely to occur. Furthermore, the arrangement is not limited to a rectangular grid including squares; it is sufficient if the chips are arranged at the above pitch.

[0022] The first projection 10 has a square pyramidal shape and, in cross-sectional view, is a tapered portion that narrows towards the tip. Since the tip of the first projection 10 is the part that contacts the dicing sheet, for the purpose of separating the dicing sheet from the semiconductor chip, it is desirable that the contact area with the dicing sheet be as small as possible and that the contact is made at a single point. However, if the tip is pointed, there is a possibility that it will scratch and damage the dicing sheet or semiconductor chip when it comes into contact. For this reason, as shown in Figures 3 and 4, the tip of the first projection 10 may be chamfered to the minimum necessary extent, for example, into a plane parallel to the upper surface 3a of the stage. The chamfer may also be hemispherical or the like.

[0023] As shown in Figures 3 and 4, the first projection 10 has a square pyramidal shape, but is not limited to this, and may be a cone or a pyramidal shape such as a triangular pyramid. Furthermore, the first projection 10 may have a tapered portion that narrows to the shape of a pyramidal or conical part at its tip, and a base portion that is shaped like a prism or cylinder further back from the tapered portion.

[0024] Next, the second projection 11 provided on the outer periphery 3a2 of the stage top surface 3a will be described in detail. As shown in Figures 3 and 4, the second projection 11 is provided on the outer periphery 3a2 of the stage top surface 3a so that its tip protrudes from the stage top surface 3a. In plan view, the second projection 11 has an annular shape surrounding the central part, and in cross-sectional view, it has a rectangular cross-sectional shape without a taper in the Z direction of the drawing. That is, the tip of the second projection 11 has a shape that is parallel to the stage top surface 3a.

[0025] The sizes of the central portion 3a1 on the upper surface 3a of the stage, where the first projection 10 is located, and the outer peripheral portion 3a2 on the outer peripheral portion 3a2, where the second projection 11 is located, may be changed as appropriate depending on the size of the wafer to be manufactured and the size and arrangement of the semiconductor chips formed on the wafer. Specifically, the outer peripheral portion 3a2 can be set to correspond to the location of unwanted chips, which are small pieces of wafer generated on the outer peripheral portion of the wafer by dicing and do not become products, and the area inside that can be set as the central portion 3a1, with the second projection 11 and the first projection 10 arranged in each. Unwanted chips will be described later in the explanation of the operation of this disclosure.

[0026] Currently, wafer sizes used in semiconductor device manufacturing are standardized, and the diameter of the outer edge, which is roughly circular excluding the orientation flat, is, for example, 100mm, 150mm, 200mm, 300mm, or 450mm. In the semiconductor device manufacturing process, for example, the area 3 to 5mm inward from the outer edge of the wafer is prone to generating unwanted chips that will not become products, and it becomes difficult to meet product specifications due to problems such as variations in the manufacturing process. Therefore, semiconductor chips that will become products are sometimes not placed in this area, which is considered an invalid region.

[0027] Considering these factors, as mentioned above, for each standardized wafer size, the central portion 3a1 should be approximately circular with a diameter of 92±2mm, 142±2mm, 192±2mm, 292±2mm, or 442±2mm. The first projections 10 should be positioned such that the tip of the outermost first projection 10 is located within 2mm of the inner edge of the outer circumference of the central portion 3a1, in the direction from the outer circumference towards the center. That is, if the distance between the center of the central portion 3a1 and the tip of the first projection 10 furthest from the center of the central portion 3a1 is defined as the first distance, then the first distance should be one of 45±2mm, 70±2mm, 95±2mm, 145±2mm, or 220±2mm.

[0028] Furthermore, the second projection 11 should be positioned such that, in a plan view, the end of the second projection 11 furthest from the center of the central portion 3a1 is located outside the outer edge of the wafer for each wafer size. That is, if the distance between the center of the central portion 3a1 and the end of the second projection 11 furthest from the center of the central portion 3a1 is called the second distance, then the second distance should be 50 mm or more if the first distance is 45 ± 2 mm, 75 mm or more if it is 70 ± 2 mm, 100 mm or more if it is 95 ± 2 mm, 150 mm or more if it is 145 ± 2 mm, and 225 mm or more if it is 220 ± 2 mm. With these arrangements, the semiconductor chip is placed overlapping the central portion 3a1, and the unnecessary chip is placed overlapping the outer edge 3a2.

[0029] The first projection 10 and the second projection 11 may be provided by attaching separately created projection members to the stage 3, or they may be directly formed by processing the upper surface of the stage 3. If the first projection 10 and the second projection 11 are made as members that can be separated from the stage 3, and the method of attachment to the stage 3 is, for example, by using screws, they can be individually attached to and detached from the stage 3, and the shape, spacing, and number of projections can be changed according to the situation.

[0030] As shown in Figures 3 and 4, the stage 3 is provided with suction ports 4, but multiple suction ports 4 may be provided, distributed over a wide area within the plane of the stage top surface 3a. Distributing them allows for more uniform vacuuming of the space between the stage top surface 3a and the dicing sheet during vacuuming. The shape of the suction ports 4 in plan view may be circular, rectangular, or slit-shaped.

[0031] Furthermore, in order to perform vacuum evacuation more efficiently, vacuum grooves 15 may be provided between each of the first projections 10 and second projections 11 on the upper surface 3a of the stage, which serve as exhaust paths during vacuum evacuation. Figure 5 is a cross-sectional view showing a stage 3 in which vacuum grooves 15 have been added to the stage 3 shown in Figure 4. These vacuum grooves 15 may be provided so as to extend in either the X direction or the Y direction, or they may be provided in a grid pattern. Also, in a cross-sectional view, one vacuum groove 15 may be provided for multiple projections. Details of the function of the vacuum grooves 15 will be described later in the explanation of the method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus 101.

[0032] Finally, the transport hand (not shown) will be described. The transport hand is a pick-up means for picking up semiconductor chips attached to a dicing sheet placed on stage 3. The transport hand has, for example, an arm section with a suction pad attached to its tip, which can pick up semiconductor chips while holding them in place. The transport hand may be provided as part of the semiconductor manufacturing apparatus 101, or it may be incorporated into another apparatus, such as a manufacturing apparatus for the next process, or it may be incorporated into a standalone transport robot.

[0033] In describing the operation and effects of the semiconductor manufacturing apparatus 101 of Embodiment 1, we will first describe a method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus 101. The semiconductor device manufacturing method described here corresponds to a manufacturing process in which individual semiconductor chips formed by dicing are separated from the dicing sheet and the semiconductor chips are picked up.

[0034] Figure 6 is a schematic cross-sectional view showing the manufacturing process after the loading process. Figure 7 is an enlarged cross-sectional view of section E in Figure 6. First, a loading process is performed in which the wafer 12 and dicing sheet 13 are loaded into the semiconductor manufacturing apparatus 101. Although the wafer 12 is shown in a simplified manner in Figure 6, in reality, it is diced in the preceding dicing process while attached to the upper surface of the dicing sheet 13. That is, as shown in Figure 7, the wafer 12 is divided into semiconductor chips 12a that will become products, unwanted chips 12b that are the same size as semiconductor chips 12a but will not become products, and unwanted chips 12c that are smaller than semiconductor chips 12a and will not become products. Unwanted chips 12b are the same size as semiconductor chips 12a, but because they are positioned near the outer edge of the wafer 12, they are not made into products due to quality control risks. In the loading process, these are transported to the semiconductor device 101 while still attached to the dicing sheet 13, and are supported and placed on the first projection 10 and second projection 11 of the stage 3 via the dicing sheet 13.

[0035] The dicing sheet 13 is an adhesive sheet having adhesive properties on one side, and is a resin sheet, for example, made of a base material containing polyolefin to which an acrylic adhesive is applied. The dicing sheet 13 has sufficient adhesive strength to fix the wafer 12 in place during dicing and to prevent the semiconductor chips 12a, unwanted chips 12b, and unwanted chips 12c that have been divided by dicing from peeling off and scattering.

[0036] A frame 14 is attached to the upper surface of the dicing sheet 13 in the area outside the region to which the wafer 12 is attached. This frame 14 is used when transporting the dicing sheet 13 or holding it within the apparatus.

[0037] Figure 8 is a schematic cross-sectional view showing the manufacturing process after the dicing sheet holding process. Figure 9 is an enlarged cross-sectional view of section F in Figure 8. Following the loading process, a dicing sheet holding process is performed in which the dicing sheet 13 is held and pulled outwards. When the dicing sheet 13 is loaded into the apparatus in the loading process, the frame pressing portion 9 of the dicing sheet holding portion 7 attached to the outer periphery of the housing 1 descends, and the dicing sheet 13 is held by sandwiching the frame 14 between the frame support portion 8 and the frame pressing portion 9.

[0038] During the dicing sheet holding process, the dicing sheet 13 is held in place above the stage surface 3a, preventing it from moving. However, because the frame 14 is held at a lower position than the stage surface 3a, the dicing sheet 13 is pulled from the center of the approximately circular stage 3 and wafer towards the outer edge. As a result, the elastic dicing sheet 13 is stretched towards the outer edge, increasing the spacing between adjacent semiconductor chips 12a, unwanted chips 12b, and unwanted chips 12c, thus suppressing the problem of chips interfering with each other during pickup.

[0039] Figure 10 is a schematic cross-sectional view showing the manufacturing process after the peeling process. Figure 11 is an enlarged cross-sectional view of section G in Figure 10. Following the dicing sheet holding process, a peeling process is performed to peel the semiconductor chip 12a from the dicing sheet 13. Figure 10 is a schematic cross-sectional view showing the manufacturing process after the peeling process. Figure 11 is an enlarged cross-sectional view of section G in Figure 10. When the vacuum pump is operated while the dicing sheet 13 is held, the space between the dicing sheet 13 and the upper surface 3a of the stage is evacuated, and as shown in Figure 11, the dicing sheet 13, except for the parts in contact with the tips of the first projection 10 and the second projection 11, is sucked in and deforms in a direction toward the upper surface 3a of the stage.

[0040] Here, the first projection 10 is positioned in the central part 3a1 of the upper surface 3a of the stage, and the semiconductor chip 12a, which will be the final product, is mainly placed in that area. Therefore, when a vacuum is applied, the dicing sheet 13, except for the part in contact with the tip of the first projection 10, deforms in a direction that moves toward the upper surface 3a of the stage, and is peeled away from the back surface of the semiconductor chip 12a.

[0041] If the pitch of the first protrusions 10 is large relative to the size of the semiconductor chip 12a, fewer first protrusions 10 will contact a single semiconductor chip 12a. In such cases, as the dicing sheet 13 deforms, the semiconductor chip 12a may fall into the space between adjacent first protrusions 10 and tilt, potentially leading to failure to peel off the dicing sheet 13. Conversely, if the pitch of the first protrusions 10 is small relative to the size of the semiconductor chip 12a, the area between adjacent first protrusions 10 becomes narrower, suppressing deformation of the dicing sheet 13 and potentially leading to failure to peel off the dicing sheet 13. In the central portion 3a1, since small chips such as unwanted chips 12c are not placed, the spacing of the first protrusions 10 can be optimized to match the size of the semiconductor chip 12a.

[0042] On the other hand, second protrusions 11 are arranged on the outer periphery 3a2 of the upper surface 3a of the stage, and unwanted chips 12b and 12c that do not become products are mainly placed in this area. On the outer periphery 3a2, the dicing sheet 13 does not deform when it comes into contact with the tip surface of the second protrusions 11, and the unwanted chips 12b and 12c are less likely to peel off from the dicing sheet 13. In particular, in this embodiment, the second protrusions 11 are provided in a continuous ring shape and come into contact with the wafer 12 on a flat surface, so even if the size of the unwanted chips 12c is small, they can be held attached to the dicing sheet 13 without peeling off.

[0043] In Figure 11, the dicing sheet 13 is completely adsorbed in the central part 3a1, conforming to the shape of the first projection 10. However, it is not necessary for it to be completely adsorbed in this manner; it is sufficient for the dicing sheet 13 to deform in a direction toward the upper surface 3a of the stage until it is detached from the lower surface of the semiconductor chip 13 in the area other than the part in contact with the tip of the first projection 10.

[0044] If the dicing sheet 13 is completely adsorbed to the stage surface 3a, it may block the suction port 4, leaving a region on the stage surface 3a that is not sufficiently vacuumed. In such cases, providing a vacuum groove 15 as shown in Figure 5 ensures a path for air to be discharged during vacuuming, even if the dicing sheet 13 is completely adsorbed to the first projection 10 in the central part 3a1. By providing this vacuum groove 15 over a wide area of ​​the stage surface 3a, it becomes possible to uniformly vacuum the space between the stage surface 3a and the dicing sheet 13 across the entire surface.

[0045] After the peeling process, a pickup process is performed in which the semiconductor chip 12a is picked up from the dicing sheet 13 and transported out of the apparatus. The pickup process involves, for example, using a transport hand with a suction pad to pick up the upper surface of the semiconductor chip 13, lifting it upwards to peel it off from the dicing sheet 13, and then storing it in a transport rack for the next process. At the time of the peeling process before the pickup, the semiconductor chip 12a and the dicing sheet 13 have been peeled off in areas other than where the tip of the first projection 10 is in contact, and are only attached and held in place at the point where the tip of the first projection 10 is in contact. Therefore, the transport hand can easily pick up the semiconductor chip 12a with little force.

[0046] The operation of the semiconductor manufacturing apparatus 101 of Embodiment 1 will be explained. In this explanation, the configuration of the wafer 12 will be described in detail. Figure 12 is a top view of the wafer 12 that has been attached to the dicing sheet 13 and diced. As shown in Figure 12, in the dicing process of the previous step, the wafer 12 is attached to the upper surface of the dicing sheet 13 and diced along dicing lines extending in the X direction and the Y direction perpendicular to the X direction, and is divided into a rectangular semiconductor chip 12a that will become the product, a rectangular unwanted chip 12b that is the same size as the semiconductor chip 12a but will not become the product, and an unwanted chip 12c that is smaller than the semiconductor chip 12a, is not rectangular, and will not become the product. The region between the semiconductor chip 12a, unwanted chip 12b, and unwanted chip 12c is the dicing line, and after dicing, it becomes an empty space where the wafer 12 has been removed.

[0047] In the manufacturing of semiconductor devices, a roughly circular boundary line 16 is set on the wafer 12, and the central area inside the boundary line 16 becomes the effective area where products can be placed. The outer peripheral area outside this boundary line 16 is an invalid area where product chips cannot be placed due to quality control risks from variations in the manufacturing process. As shown in Figure 12, the unwanted chip 12b is the same size as the semiconductor chip 12a, but all or part of the chip is in the invalid area outside the boundary line 16 and therefore cannot become a product. The unwanted chip 12c is not only located on the outermost periphery of the wafer 12 and in the invalid area outside the boundary line 16, but its chip size is also smaller than that of the semiconductor chip 12a and therefore cannot become a product. The width of the outer peripheral area of ​​the wafer 12 varies depending on the product specifications, but is set to approximately 3 to 5 mm. In other words, the boundary line 16 is set to be roughly circular with a diameter about 6 to 10 mm smaller than the roughly circular wafer 12.

[0048] The semiconductor manufacturing apparatus 101 has a first projection 10 with a tapered portion positioned in the central part 3a1 of the upper surface 3a of the stage, and a second projection 11 without a tapered portion positioned in the outer peripheral part 3a2 of the upper surface 3a of the stage. In the central part 3a1, the first projection 10 makes point contact with the semiconductor chip 12a. As a result, the semiconductor chip 12a is held by the first projection 10 without tilting due to the deformation of the dicing sheet 13, while at the same time, the dicing sheet 13 and the semiconductor chip 12a are more easily separated in the region between the points where the first projection 10 makes contact.

[0049] On the other hand, in the outer peripheral region 3a2, the second projection 11, which does not have a taper, makes surface contact with the unwanted chips 12b and 12c that occur in the outer peripheral region of the wafer 12. This suppresses deformation of the dicing sheet 13 during vacuuming and prevents unintended peeling. In particular, although the unwanted chips 12c are smaller in size than the semiconductor chips 12a, unintended peeling is suppressed because the second projection 11 makes surface contact with them.

[0050] Next, the effects of the semiconductor manufacturing apparatus 101 of Embodiment 1 will be explained. Unwanted chips 12b and 12c generated by dicing are not used as products and are sent to a separate disposal process while still attached to the dicing sheet 13. However, because the unwanted chips 12c are smaller in size than the semiconductor chips 12a, they tend to peel off unintentionally from the dicing sheet 13. In particular, if vacuum is applied while the unwanted chips 12c are supported by contacting a tapered projection as in the conventional technology, they may peel off when the dicing sheet 13 deforms. When unwanted chips 12c peel off, they may scatter onto the surrounding semiconductor chips 12a, which are the products, causing chip scattering defects that damage them.

[0051] The semiconductor manufacturing apparatus 101 of Embodiment 1 is provided with a first projection 10 having a tapered portion on the central part 3a1 of the stage upper surface 3a, corresponding to the central region inside the boundary line 16 of the wafer 12, thereby promoting the peeling of semiconductor chips 12a located in the central region of the wafer 12 from the dicing sheet 13 and suppressing peeling errors. On the other hand, a second projection 11 without a tapered portion is provided on the outer peripheral part 3a2 of the stage upper surface 3a, corresponding to the outer peripheral region outside the boundary line 16, thereby reducing unintended peeling of unwanted chips 12c that occur in the outer peripheral region of the wafer 12 and suppressing chip scattering defects.

[0052] <Embodiment 2> The overview of the semiconductor manufacturing apparatus according to Embodiment 2 will be explained using Figures 13 and 14. Figure 13 is a plan view showing part H, which is a portion of the boundary between the central part 3a1 and the outer peripheral part 3a2 of the stage 3 as seen from above. Part H corresponds to part B in Figure 1 of Embodiment 1, and Figure 13 corresponds to Figure 3 of Embodiment 1. Figure 14 is a cross-sectional view of the I-I section in Figure 13, and corresponds to Figure 4 of Embodiment 1. Note that in Figure 13, the boundary between the central part 3a1 and the outer peripheral part 3a2 and the outer edge of the outer peripheral part 3a2 are arcs, but they are simplified and shown as straight lines.

[0053] The semiconductor manufacturing apparatus of Embodiment 2, like Embodiment 1, vacuums the space between the stage top surface 3a and the dicing sheet 13 to separate the semiconductor chip 12a from the dicing sheet 13. However, while Embodiment 1 has a first projection 10 with a tapered portion at the central part 3a1 of the stage top surface 3a and a second projection 11 that is continuous in an annular shape in plan view and does not have a tapered portion at the outer periphery 3a2, the semiconductor manufacturing apparatus of Embodiment 2 has a first projection 10 with a tapered portion at the central part 3a1 of the stage top surface 3a, similar to Embodiment 1, but also has a plurality of second projections 17 that do not have a tapered portion at the outer periphery 3a2. Details will be explained below. Note that descriptions of similar configurations that overlap with Embodiment 1 may be omitted.

[0054] As shown in Figures 13 and 14, a plurality of first protrusions 10 are provided on the central part 3a1 of the stage top surface 3a, similar to Embodiment 1, with their tips protruding from the stage top surface 3a. The arrangement of the first protrusions 10 is also the same as in Embodiment 1, and the pitch between adjacent first protrusions 10 should be 2 mm or less, preferably 0.5 mm to 1.5 mm.

[0055] On the other hand, multiple second projections 17, each having the shape of a rectangular prism, are provided on the outer periphery 3a2 of the stage surface 3a, with their tips protruding from the stage surface 3a. The gaps between adjacent second projections 17, i.e., the inter-projection gaps Sx and Sy, are 1 mm or less and are smaller than the pitches Px and Py of the first projections 10 in the central part 3a1. Note that the second projections 17 are not limited to rectangular prisms; they may also be cylindrical, triangular, or other rectangular prisms.

[0056] The tips of the first projection 10 and the second projection 17 are, for example, the same height. Hereinafter, the tips of the first projection 10 and the second projection 17 refer to the tips that protrude from the upper surface 3a of the stage of the projection. The height of the tips of the first projection 10 and the second projection 17 only needs to provide a flatness sufficient to hold the wafer 12 through the dicing sheet 13, and it is not necessary for all of the first projection 10 and the second projection 17 to be the same height.

[0057] The arrangement positions of the first projection 10 and the second projection 17 are the same as in Embodiment 1. That is, for each standard size wafer, the arrangement of the first projection 10 can be set to one of the following: 45±2mm, 70±2mm, 95±2mm, 145±2mm, or 220±2mm, which is the distance between the center of the central portion 3a1 and the tip of the first projection 10 that is furthest from the center of the central portion 3a1 in a plan view. The arrangement of the second projection 17 can be set to 50mm or more if the first distance is 45±2mm, 75mm or more if the first distance is 70±2mm, 100mm or more if the first distance is 95±2mm, 150mm or more if the first distance is 145±2mm, or 225mm or more if the first distance is 220±2mm.

[0058] The effects of the semiconductor manufacturing apparatus 102 of Embodiment 2 will now be described. In Embodiment 2, the central portion 3a1 has the same configuration as in Embodiment 1, and in the region where the first projection 10a is in contact, the dicing sheet 13 and the semiconductor chip 12a are easily separated (less likely to occur due to separation errors). Furthermore, in the outer peripheral portion 3a2, the second projection 17, which does not have a taper, is in surface contact with the unwanted chips 12b and 12c that occur in the outer peripheral region of the wafer 12. This suppresses deformation of the dicing sheet 13 that is in contact with the unwanted chips 12b and 12c during vacuuming, thus suppressing unintended separation.

[0059] However, in Embodiment 2, the second projections 17 are not continuously provided on the outer periphery 3a2, and there is a gap between adjacent second projections 17. This gap serves as an exhaust path when vacuuming is performed, suppressing the formation of air pockets on the tip surfaces of the second projections 17, and ensuring that the tip surfaces of the second projections 17 and the dicing sheet 13 are in close contact without gaps, thereby suppressing unintended peeling. If the gap between the second projections 17 is large, the dicing sheet 13 may deform and enter the gap when vacuuming is performed, potentially causing unwanted chips 12b and 12c to peel off unintentionally. Therefore, if the gaps between adjacent second projections 17, i.e., the intervening gaps Sx and Sy, are set to 1 mm or less, the deformation of the dicing sheet 13 is reduced, suppressing the peeling of unwanted chips 12b and 12c, and effectively suppressing chip scattering problems.

[0060] While several embodiments of this disclosure have been described, these embodiments are presented as examples only. Various omissions, substitutions, and modifications can be made without departing from the spirit thereof. Furthermore, each embodiment can be combined. The scope of this disclosure is indicated by the claims rather than the above description, and all modifications are intended to be within the meaning and scope equivalent to the claims.

[0061] The various aspects of this disclosure are summarized below as an appendix.

[0062] (Note 1) A semiconductor manufacturing apparatus for peeling off a semiconductor chip from a dicing sheet on which a substantially circular wafer containing a semiconductor chip that has been diced and divided into small pieces is attached to one side, A stage having multiple protrusions, on which the wafer is supported and placed via the dicing sheet, The dicing sheet holding section holds the dicing sheet, The system includes a vacuum means for vacuuming the space between the stage and the dicing sheet, The semiconductor manufacturing apparatus includes a plurality of first projections, each having a tapered portion that narrows in cross-sectional view and whose tip is located in the central part of the stage, which is a substantially circular area in the center of the stage in plan view, and a second projection, which does not have a taper in cross-sectional view and whose tip is located in the outer periphery, which is an area that surrounds the central part in plan view. (Note 2) The semiconductor manufacturing apparatus as described in Appendix 1, wherein the second projection is provided in a continuous ring shape surrounding the central portion in a plan view. (Note 3) The semiconductor manufacturing apparatus as described in Appendix 1, wherein the second projections are provided in multiple locations and are not continuous in a plan view. (Note 4) The semiconductor manufacturing apparatus as described in Appendix 3, wherein the gap between adjacent second protrusions is 1 mm or less. (Note 5) A semiconductor manufacturing apparatus according to any one of the appendices 1 to 4, wherein the pitch between the tips of adjacent first protrusions is 2 mm or less. (Note 6) A semiconductor manufacturing apparatus according to any one of the appendices 1 to 5, wherein the semiconductor chip is arranged in the central region of the wafer, and unwanted chips, which are small pieces other than the semiconductor chip, are arranged in the outer peripheral region surrounding the central region, and when the wafer is placed on the stage, in a plan view, the tip of at least one of the first protrusions overlaps the semiconductor chip, and the tip of at least one of the second protrusions overlaps the unwanted chip. (Note 7) A semiconductor manufacturing apparatus according to any one of the appendices 1 to 6, wherein the first distance, which is the distance between the center of the central part and the tip of the first projection located furthest from the center of the central part in a plan view, is one of 45±2 mm, 70±2 mm, 95±2 mm, 145±2 mm, or 220±2 mm. (Note 8) The semiconductor manufacturing apparatus as described in Appendix 7, wherein the second distance, which is the distance between the center of the central part and the end of the second projection located furthest from the center of the central part in a plan view, is 50 mm or more when the first distance is 45 ± 2 mm, 75 mm or more when it is 70 ± 2 mm, 100 mm or more when it is 95 ± 2 mm, 150 mm or more when it is 145 ± 2 mm, and 225 mm or more when it is 220 ± 2 mm. (Note 9) The semiconductor manufacturing apparatus according to any one of the appendices 1 to 8, wherein the dicing sheet holding part has the function of stretching the dicing sheet in a direction from the center of the stage toward the outer edge. (Note 10) A semiconductor manufacturing apparatus according to any one of the appendices 1 to 9, having a pickup means for removing the semiconductor chip from the stage. [Explanation of Symbols]

[0063] 3 Stage, 7 Dicing sheet holder, 10 First projection, 11, 17 Second projection, 12 Wafer, 12a Semiconductor chip, 12b, 12c Unnecessary chip, 13 Dicing sheet

Claims

1. A semiconductor manufacturing apparatus for peeling off a semiconductor chip from a dicing sheet on which a substantially circular wafer containing a semiconductor chip that has been diced and divided into small pieces is attached to one side, A stage having multiple protrusions, on which the wafer is supported and placed via the dicing sheet, The dicing sheet holding section holds the dicing sheet, The system includes a vacuum means for vacuuming the space between the stage and the dicing sheet, The projection includes a plurality of first projections having a tapered portion that narrows in cross-sectional view and whose tips are located in the central part, which is a substantially circular area in the center of the stage in plan view, and second projections that do not have a taper in cross-sectional view and whose tips are located in the outer periphery surrounding the central part in plan view. A semiconductor manufacturing apparatus in which the second projections are provided in multiple locations and are not continuous in a plan view.

2. The semiconductor manufacturing apparatus according to claim 1, wherein the second projection is provided in a continuous ring shape surrounding the central portion in a plan view.

3. The semiconductor manufacturing apparatus according to claim 1, wherein the gap between adjacent second protrusions is 1 mm or less.

4. The semiconductor manufacturing apparatus according to claim 1, wherein the pitch between the tips of adjacent first protrusions is 2 mm or less.

5. The semiconductor manufacturing apparatus according to claim 1, wherein the semiconductor chip is arranged in the central region of the wafer, and unwanted chips, which are small pieces other than the semiconductor chip, are arranged in the outer peripheral region surrounding the central region, and when the wafer is placed on the stage, in a plan view, the tip of at least one of the first protrusions overlaps the semiconductor chip, and the tip of at least one of the second protrusions overlaps the unwanted chip.

6. The semiconductor manufacturing apparatus according to any one of claims 1 to 5, wherein the first distance, which is the distance between the center of the central part and the tip of the first projection located furthest from the center of the central part in a plan view, is one of 45±2 mm, 70±2 mm, 95±2 mm, 145±2 mm, or 220±2 mm.

7. The semiconductor manufacturing apparatus according to claim 6, wherein the second distance, in a plan view, is the distance between the center of the central part and the end of the second projection that is furthest from the center of the central part, is 50 mm or more when the first distance is 45 ± 2 mm, 75 mm or more when it is 70 ± 2 mm, 100 mm or more when it is 95 ± 2 mm, 150 mm or more when it is 145 ± 2 mm, and 225 mm or more when it is 220 ± 2 mm.

8. The semiconductor manufacturing apparatus according to any one of claims 1 to 5, wherein the dicing sheet holding portion has the function of stretching the dicing sheet in a direction toward the outer edge from the center of the stage.

9. A semiconductor manufacturing apparatus according to any one of claims 1 to 5, further comprising a pickup means for removing the semiconductor chip from the stage.

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