Digital ASIC for ultrasonic scanning units
The digitized ASIC in ultrasound systems addresses power and data challenges by dynamically adjusting parameters to reduce transmission and consumption, making it suitable for battery-operated, unsupervised applications.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KONINKLIJKE PHILIPS NV
- Filing Date
- 2021-12-02
- Publication Date
- 2026-07-03
AI Technical Summary
Existing ultrasound systems face challenges in power consumption, data volume, and skin heating, particularly in matrix arrays, which are unsuitable for battery-operated, unsupervised applications and point-of-care settings, and require flexible data acquisition and processing schemes.
A digitized ASIC with an array of ADCs, memory module, and control device that dynamically adjusts operating parameters during ultrasonic irradiation cycles, reducing data transmission and power consumption by storing and processing only relevant data.
Enables low-power, cost-effective ultrasound scanning with reduced data transmission, suitable for battery operation and disposable applications, and supports flexible data acquisition and processing.
Smart Images

Figure 0007884516000001 
Figure 0007884516000002 
Figure 0007884516000003
Abstract
Description
[Technical Field]
[0001] The present invention relates to a digital ASIC for an ultrasonic scanning unit of an ultrasonic system, an ultrasonic scanning unit, a master control device for an interface unit of an ultrasonic system, an interface unit for an ultrasonic system, and an ultrasonic system. [Background technology]
[0002] There is a growing demand for ultrasound systems to be used in point-of-care (POC) settings and unsupervised applications such as monitoring. Therefore, there is a need for low-cost ultrasound scanning units compatible with next-generation ultrasound systems, and it is crucial that the ultrasound system can be operated without expert human intervention. In this context, the matrix (2D) array converter is a key component of autonomous ultrasound scanning units, enabling data acquisition of 2D (imaging) planes at any solid angle. The matrix converter is also useful for volume reconstruction / calculation or reconstruction of arbitrary shapes, such as curved tissue boundaries. On the other hand, low power consumption is also an important aspect, particularly for monitoring applications, to allow the scanning unit to operate on battery power for extended periods.
[0003] Power consumption is a constant challenge, especially in matrix arrays. High-resolution and / or high-frame-rate matrix scanning units can consume more than 10W of power, which is extremely difficult to address with battery-controlled scanning units. Furthermore, skin heating can be a problem, particularly in monitoring applications, due to strict regulations on skin heating for long-term monitoring. Moreover, transducer arrays, especially matrix arrays, generate enormous amounts of data (e.g., on the order of 250Gbps). To reduce hardware costs and power consumption, data reduction is required, especially in 2D arrays.
[0004] A known method for limiting data volume is to perform analog microbeamforming in the analog ASIC of the ultrasound scanning unit, as disclosed, for example, in International Patent Publication No. 2018 / 041635A1. However, microbeamforming is rigid, meaning it lacks flexibility to adapt to new data acquisition and / or processing schemes, and it requires many acoustic transmission events, making it unsuitable for high-frame-rate imaging.
[0005] U.S. Patent Application No. 2015 / 031999A1 discloses a portable ultrasonic system and related devices, as well as a method for saving power in such a system. This method includes disabling one or more amplifiers and analog-to-digital converters at the start of first and second pulse repetition intervals. [Overview of the project] [Problems that the invention aims to solve]
[0006] Therefore, the objective of the present invention is to enable ultrasonic scanning that can be performed in a cost-effective manner, with low power consumption of the ultrasonic probe and reduced data transmission volume between the probe and the system. [Means for solving the problem]
[0007] This objective can be satisfied or overcome by the digitized ASIC described in claim 1, the ultrasonic scanning unit described in claim 7, the master control device described in claim 9, the interface unit described in claim 11, and the ultrasonic system described in claim 13.
[0008] According to one aspect of the present invention, a digitized ASIC (Application-Specific Integrated Circuit) for an ultrasonic scanning unit of an ultrasonic system is provided. The digitized ASIC comprises: an array of analog-to-digital converters (ADCs) adapted to receive ultrasonic signals acquired by an ultrasonic converter array, particularly having an associated analog front end, and to convert the ultrasonic signals into digitized ultrasonic data; a memory module operably coupled to the array of analog-to-digital converters and adapted to store the digitized ultrasonic data; a transmitter, particularly a transceiver, operably coupled to the memory module and adapted to transmit the digitized ultrasonic data stored in the memory module to a remote interface unit; and a control device adapted to receive control signals from the interface unit and, in response to the control signals, configure the operation of the components of the ASIC and / or ultrasonic scanning unit by setting operating parameters, wherein the control device is adapted to change the operating parameters of the digitized ASIC and / or ultrasonic scanning unit during an ultrasonic irradiation cycle and / or from one ultrasonic irradiation cycle to the next.
[0009] Therefore, the digitized ASIC allows for rapid, and especially real-time, adaptation of the ASIC's settings, for example, during acquisition and / or in response to evaluations of the interface unit and / or other units connected to the interface unit. For example, this enables closed-loop interaction, in which case the operation of the ASIC and / or ultrasonic scanning unit is adapted to the actual demands determined by the interface unit and / or other units connected to the interface unit, such as the evaluation of transmitted digitized ultrasonic (US) data. Thus, in particularly selected operating modes, it is possible to reduce the amount of data generated and / or transmitted through the digitized ASIC. Accordingly, power consumption of the digitized ASIC and / or the connection between the digitized ASIC and the interface unit is reduced. The control device is configured to change the operating parameters of the ASIC during an ultrasonic irradiation cycle based on pre-programmed instructions, which are either received as control signals or actuated by control signals. An ultrasonic irradiation cycle is defined in particular by the transmission and reception of ultrasound by the US transducer array. In this case, an ultrasonic irradiation cycle begins with the transmission (TX) of US waves and ends with the reception of the reflected signal or with the next transmission. In some ultrasound irradiation schemes, one two-dimensional (2D) or three-dimensional (3D) image, also called a frame or image frame, is acquired in a single ultrasound irradiation cycle. In other ultrasound irradiation schemes, several ultrasound irradiation cycles are required to acquire the ultrasound data for one frame / image. An acquisition or acquisition cycle includes at least one ultrasound irradiation cycle and data selection and / or processing of the digitized data obtained from the at least one ultrasound irradiation cycle. A single acquisition may include multiple ultrasound irradiation cycles, and in particular, related ultrasound data from multiple ultrasound irradiation cycles may be combined or processed together in a digitizing ASIC during a single acquisition.
[0010] According to the present invention, during the ultrasonic irradiation cycle and / or from one ultrasonic irradiation cycle to the next, the operating parameters of the digitizing ASIC and / or the ultrasonic scanning are changed. Thus, the present invention provides an improved hardware architecture that enables dynamic control of its hardware components, allowing data acquisition to be changed for each ultrasonic irradiation cycle and even within a single ultrasonic irradiation cycle, for example based on the data currently being received. Thus, the digitizing ASIC and the corresponding US system can operate in a "data on demand" manner, reducing the amount of data that needs to be transmitted to the interface unit and thereby reducing costs. The interface unit is "remote" in the sense that it is preferably not part of the US scanning unit, but may be part of a US system, such as a cart-based system. The digitizing ASIC is connected to the interface unit via a digital data connection with limited bandwidth despite its high speed, such as a serial data link.
[0011] In some embodiments, the operating parameters are not constant during the ultrasonic irradiation cycle; for example, the resolution of the ADC varies with depth. Preferably, this non-constant pattern is predetermined during one ultrasonic irradiation cycle and is changed by a prompt / control signal from the interface unit from one ultrasonic irradiation cycle to the next.
[0012] Conventional US systems are usually expensive and are mainly used by specialized ultrasonic examiners, but the design of the present invention can provide a next-generation US system in which low-cost US scanners can be used in point-of-care environments and in unsupervised applications such as, for example, pregnancy, hemodynamics, and / or bladder monitoring.
[0013] The present invention also helps to overcome one of the shortcomings of current US systems, namely, excessive power consumption by the US probe (i.e., US scanning unit), which is greatly affected by the generation of acoustic energy for irradiating an object or target, such as a patient's body, and by the transmission of digital data between electrical components, such as between the ultrasound scanning unit and the interface unit. This advantage is achieved, in particular, through the digitized ASIC of the present invention, by: a) acquiring all relevant data of the transmitted event so as not to waste acoustic TX energy, which is made possible in particular by the memory module, because this eliminates the need to transmit data at ultrasound-related acquisition rates, which are costly in terms of hardware and power consumption; and b) transmitting only relevant data to avoid the transmission and / or processing of unnecessary data, which is made possible in particular by a control device configured to receive and apply control signals. Furthermore, the use of an on-chip memory module enables on-chip data compression, thereby reducing the amount of data that needs to be transmitted off-chip. Since the majority of the overall power consumption is for data transmission between devices, it can be expected that the total RX (receive) power consumption can be reduced, for example, to one-half to one-third, in proportion to the data compression ratio achieved. Finally, (c) a power-efficient ultrasonic irradiation scheme is used so as not to generate more transmitted acoustic energy than necessary, which is made possible by a control device that dynamically adapts the operating parameters. Furthermore, digitized ASICs and their corresponding US scanning units can often be implemented at low cost and low power consumption, and therefore can be used, for example, in (semi-)disposable scanners such as monitoring patches or catheters. Catheters, for example, are semi-disposable in the sense that they can be sterilized and reused several times.
[0014] The ADC array comprises, for example, 8 to 1024, preferably 32 to 256 ADCs. The ADCs have a programmable resolution of 4 to 20 bits, preferably 8 to 12 bits. The ADC array may be preceded by an analog front end, which may also be included in the digitization ASIC. The analog front end is located between the ADC array and the ultrasonic transducer array, in particular between the ADC array and an analog ASIC that comprises and / or controls the ultrasonic transducer array and transfers the acquired ultrasonic signals, also called RF (radio frequency) signals, to the digitization ASIC. The analog front end comprises a programmable amplifier, a programmable anti-aliasing and / or harmonic selective filter, and / or a single-to-differential converter. The single-to-differential converter may be part of the amplifier or integrated into the amplifier, for example, the amplifier is configured to receive a single-ended signal and output a differential signal. In particular, the amplifier is configured to amplify the ultrasonic signal. The anti-aliasing filter is located between the amplifier and the ADC array. An anti-aliasing filter is adapted to filter out, for example, the highest frequencies, and in particular functions as or comprises a low-pass filter. This is useful when imaging deeper tissues, which are often associated with lower frequencies. Alternatively, the anti-aliasing filter may be configured to function as or comprise a high-pass filter. The amplifier and / or anti-aliasing filter are controlled by a control device, and for example, the gain of the amplifier and / or the bandpass range of the anti-aliasing filter are operating parameters controlled by the control device. For each ADC in an array of ADCs, there may be one amplifier and / or one anti-aliasing filter. In other words, there may be an array of amplifiers and / or anti-aliasing filters corresponding to the array of ADCs. Accordingly, there may be an array of analog channels, in which case each analog channel comprises an amplifier, an anti-aliasing filter, and / or an ADC.Each analog channel corresponds to one signal channel, and one signal channel is configured to transfer the (processed) signals of one or more transducer elements. For example, a plurality of clustered transducer elements are included in one signal channel.
[0015] The memory module is adapted to store digitized data associated with one or more ultrasound irradiation / ultrasound irradiation cycles, for example, 1 to 5 times, preferably 1 to 3 times. In particular, the memory capacity is large enough to store digitized data associated with one or more ultrasound irradiations. The control unit is adapted to direct the processing of digitized data associated with multiple acquisitions, for example, to selectively process the data and transfer it to the interface unit for further processing. On the other hand, to enable data transmission from the digitized ASIC to the interface unit at a data rate lower than the acquisition rate of the entire transducer array, for example, during the dead time between two ultrasound irradiation cycles (at least partially), the memory module may be adapted to store digitized data for a single ultrasound irradiation. This is particularly useful when the data connection between the digitized ASIC and the interface unit does not allow for higher data rates. Providing additional high-speed or ultra-high-speed data connections can be costly and result in high power consumption. For this reason, applying the memory module within the ASIC as, for example, on-chip memory may reduce the cost of data connections and overall power consumption. Without a memory module, if the data rate between the digitized ASIC and the interface unit is lower than the acquisition rate—for example, if the bandwidth of the serial data link between the digitized ASIC and the interface unit is insufficient to stream all the digitized data in real time—it would be necessary to collect and transmit all the required data by repeating the same ultrasonic irradiation multiple times, for example using a signal multiplexer, and transmitting only a portion of the ultrasonic data each time. However, this method requires additional ultrasonic irradiation, resulting in increased power consumption due to the repeated generation of acoustic energy. Therefore, a memory module helps reduce power consumption and keep hardware costs low by utilizing all available data from an ultrasonic irradiation event without having to discard any portion of it due to an insufficient data rate.Furthermore, the memory module advantageously allows for the selection and / or processing of digitized data on the digitized ASIC in the form of additional data filtering, such as data compression or RF bandpass (or lowpass) filtering. Therefore, the control unit is adapted to control operational parameters related to data compression or filtering of data temporarily stored in the memory module. Data processing associated with a single ultrasonic irradiation is sometimes referred to as "fast-time" data processing. On the other hand, to process continuous data, particularly for filtering for RF changes, the memory module can be adapted to store digitized data from several or more ultrasonic irradiations, e.g., two or three irradiations. This is sometimes referred to as "slow-time" data processing. For example, subtraction or addition is performed on a series of signals, but only the result of this operation is transferred to the interface unit. Therefore, the control unit is adapted to control the execution of mathematical operations on the digitized data. By performing data processing of digitized data corresponding to a series of ultrasonic signals, for example, in the form of comparative data processing, e.g., signal subtraction or (weighted) addition, the amount of data that needs to be transferred to the interface unit can be further reduced. Furthermore, it is conceivable to process data across multiple signal channels, particularly in digital microbeamforming, for example, by combining or comparing data related to different signal channels. Since a large portion of the overall power consumption may be based on data transmission between the ultrasonic scanning unit and the interface unit, the total power consumption may be reduced proportionally to the amount of data reduced by compression and / or other methods, for example, through data selection. The digitized ASIC according to the present invention advantageously allows for the transmission of only relevant data, avoiding the transmission of unnecessary data. Thus, it is conceivable to achieve, for example, a reduction in power consumption of 2 to 1 / 3.
[0016] Data processing is performed by an on-chip processor and / or a processor that is coupled to or part of a memory module.
[0017] A memory module may consist of a single memory unit or multiple memory units, and in particular, there may be one memory unit for each signal channel. The memory capacity may be on the order of 10 to 1000 kilobits per signal channel, preferably 30 to 100 kilobits. The memory module may be SRAM (Static Random Access Memory) or DRAM (Dynamic Random Access Memory).
[0018] The transmitter coupled to the memory module is specifically a transceiver, i.e., a combination of a transmitter and a receiver, such as a Gigabit transceiver. In this case, the transceiver is adapted to transfer digitized data at a rate of up to 5 Gigabits per second. In addition or alternatively, the transceiver may be adapted to receive control signals from an interface unit and direct the control signals to a control device. The transceiver is connected to a serial link configured to transmit data between the digitized ASIC and the interface unit, for example, via low-cost digital cable, via UTP, and / or optical fiber. The transceiver includes, or is connected to, an encoder and / or serializer configured to encode and / or serialize the digitized data, for example, in 8B / 10B encoding.
[0019] According to one embodiment, the control device is adapted to configure the operation of an array of analog-to-digital converters, memory modules, and / or transceivers in response to a control signal. The control device may also be configured, additionally or alternatively, to control the converter array, in particular, which converter elements are activated during ultrasonic irradiation and / or which signal channels transmit echo signals to the digitizing ASIC. Thus, it is possible to use a power-efficient ultrasonic irradiation scheme, for example, to avoid generating more acoustic energy than necessary.
[0020] The control device controls the following operating parameters of the analog-to-digital converter during and / or between ultrasonic irradiation cycles: The analog front end of an analog-to-digital converter, particularly the operating parameters of amplification and / or filtering of analog input signals. Selection of an analog-to-digital converter to operate, Sampling frequency or random sampling scheme, Resolution of analog-to-digital converters, particularly the change in resolution during a single ultrasonic irradiation cycle. The system is adapted to modify one or more of the following: acquisition delay and / or acquisition period.
[0021] The operating parameters of the analog front-end include analog channel settings such as gain, bias, and / or bias current; analog filter settings such as signal bandwidth settings; equivalent circuit noise level and / or slew rate characteristics, and / or dynamic range, which are affected by the analog front-end and therefore can be reduced by reducing the gain. In particular, as mentioned above, the filters are anti-aliasing filters and / or bandpass filters. Since the dynamic range of the ultrasonic echo signal decreases over time due to the effects of attenuation and diffraction by tissue, it is advantageous to match the dynamic range of the analog circuit to these effects. Further parameters such as the ADC resolution and / or digital word width, i.e., the number of bits in the data unit during data processing in the ASIC, also help in this correction. It is particularly advantageous if these parameters are fitted based on instantaneous signal characteristics in a closed loop, for example, as described above. Furthermore, the control device is fitted to operate the front-end only during active acquisition of the ultrasonic signal, for example by applying a bias, and to turn off the front-end otherwise, for example by turning off the bias current. Similarly, the selection of the ADC to operate can be understood as operating the ADC only during active acquisition of the ultrasonic signal. Furthermore, a single channel of the analog front end (especially an unused channel), and / or a single, especially unused, ADC, may be turned on or off depending on the requirements of the current measurement. The ADC operates at a sampling frequency higher than the basic ultrasonic frequency, for example, 2 to 10 times higher, often about 5 times higher. Oversampling is beneficial to support harmonic imaging and to simplify signal interpolation associated with beamforming. The sampling frequency of the ADC is, for example, in the range of 1 to 1000 MHz, preferably 5 to 100 MHz, more preferably 12 to 40 MHz. The control unit modifies the sampling frequency depending on the current requirements. For example, the sampling frequency may be lowered to match the bandwidth of lower frequency signals. To perform subsampling and / or resolution scaling, the resolution of the ADC may be modified, for example, as a function of penetration depth and / or during a single acquisition.In particular, for observation areas where high resolution is not required to recognize all important details, the resolution may be lower. Conversely, the resolution may be increased in more important areas. It is advantageous to increase the resolution in some observation areas and / or decrease it in others during a single ultrasound irradiation cycle. Standard resolutions are, for example, in the range of 8 to 16 bits, preferably 10 to 12 bits, and can be increased or decreased depending on current requirements.
[0022] Acquisition delay can be understood as the timing of the delay in data acquisition for an ultrasound irradiation event. For example, it is advantageous to wait a predetermined amount of time for the ultrasound to reflect back from the object being observed. Acquisition delay is particularly dependent on the position of the object being observed. On the other hand, the acquisition period in each ultrasound irradiation cycle depends, for example, on the size of the observation area.
[0023] According to the present invention, the control device is adapted to control the selection and / or processing of digitized ultrasonic data, particularly by an on-chip digital signal processor of a digitized ASIC, wherein the selection and / or processing is: Compressing digitized ultrasound data, Subsampling digitized ultrasound data, Combining digitized ultrasonic data from several transducer elements and / or different ultrasonic irradiation cycles, particularly by weighted summation, Adjust the word width. Adjusting the digital gain, Signal clipping, Filtering and decimation, Reinterpolation of digitized ultrasound data, This includes one or more of the following: normalization of digitized ultrasound data.
[0024] The selection, subsampling, or compression of digitized ultrasonic data, particularly the compression of the amount of data to be transferred to the interface unit, is achieved by linear and / or nonlinear data processing. Additional subsampling includes selecting and retaining only some signal channels by omitting data, for example, by subsampling as described later. Furthermore, processing includes enabling or operating one or more functions, such as subtraction, addition, multiplication, filtering, delay, and summation. For example, data from different transducer elements, and / or different signal channels, and / or different, particularly consecutive ultrasonic irradiation cycles, are combined by applying mathematical functions in particular. For example, by combining data from multiple, i.e., two or more transducer elements and / or multiple signal channels (e.g., standard microbeamforming), the total amount of data is reduced by the number of elements or channels being added together. Correspondingly, data from the same transducer element and / or signal channel, but from different ultrasonic irradiation cycles, are combined, in some cases by weighted summation, particularly by addition or subtraction. Therefore, for example, if only the difference between consecutive signals is important to the current measurement, the amount of data transmitted to the interface unit is reduced by applying subtraction before data transmission and transmitting only the difference. Even if the original signal is important, it is possible to transmit only the difference if a reference signal is transmitted first. Such steps are particularly enabled by the memory module on the digitized ASIC and the processor on the digitized ASIC, which are controlled by the control unit. In general, when the frequency components of the signal are limited, filtering the signal before transmitting the data is attractive. In many types of filtering, it is possible to invert the filtering function on the interface unit side (for example, many FIR filter functions can be inverted by IIR filter functions).
[0025] A word is a unit of data containing several bits, and the number of bits is the word width. Therefore, reducing the number of bits is one option, for example, when a higher number of bits is not necessarily required. For example, one option is to retain or omit the least significant bit (LSB) or most significant bit (MSB) of a word. For example, in the case of a relatively weak signal, the most significant bit contains no information or any relevant information and is therefore omitted without significant disadvantage. In some cases, the LSB is omitted because it is not needed, for example, when the noise level of the signal is dominant to the quantization level of the ADC, or because the requirements of the current application are not very high. Furthermore, another option is to clip the signal (apply clipping) by setting all numbers higher than a predetermined value to that value, thereby reducing higher-bit signals to lower-bit signals. When applying word width reduction from the MSB side, clipping can be effective in avoiding signal overflow. Clipping also prevents overflow after the sum of signals, i.e., when two unsigned 8-bit words are summed, the value may exceed 255. Clipping the resulting word to 255 allows the resulting word width to maintain 8 bits without causing signal overflow. For example, if an ADC acquires US data at a certain sampling frequency, but that data is required in a different (usually lower) sampling frequency format, re-interpolation of the digitized ultrasonic data is performed to convert the sampling rate. Data normalization can refer to, for example, adjusting the dynamic range, i.e., the range between the maximum and minimum values of the data. The control unit also determines the timing, e.g., the duration and / or time frame for the application of any of the means described above, and / or the time frame in which the data is selected and / or processed. One or all of these data processing functions are programmed into the ASIC and configured to be operated by the control unit, which may, in some cases, freely or within a predetermined range, selects variables.
[0026] According to one embodiment, the control device is adapted to select, in response to a control signal, a portion of the digitized ultrasonic data to be stored in a memory module, and / or a portion of the digitized ultrasonic data stored in the memory module to be transmitted to an interface unit. Preferably, the control device is adapted to select only the relevant data and not process and / or transmit unnecessary data. Data selection is performed particularly in the ADC by adapting the sampling scheme by processing and / or selecting the data after the ADC and before the memory module, and / or on or after the memory module. Advantageously, the relevance of the data is determined by the interface unit, particularly the master control device of the interface unit, and sent to the control device via a control signal. This embodiment enables real-time adaptive data selection provided by a digitized ASIC combined with an intelligent master control device, which may be located in a data processing unit (DPU).
[0027] According to one embodiment, the digitized ASIC is adapted to apply multiple control modes sequentially, each control mode including a set of operating parameters, and the next control mode is activated after a predetermined time or in response to the detection of an internal or external trigger event. Trigger events are, for example, signals received from an interface unit, particularly from a master control unit, which are based, for example, on data evaluation and / or instantaneous signal characteristics, such as particularly low or high signal intensity and / or particularly strong changes resulting from, for example, movement of the US scanning unit. In one embodiment, several control modes are applied sequentially during a single ultrasonic irradiation cycle, in which case these several control modes include different values / settings with respect to the set of operating parameters they contain. This allows the operation of the digitized ASIC to be changed during a single ultrasonic irradiation cycle. Furthermore, the control modes include different settings in consecutive ultrasonic irradiation cycles, and in some embodiments, the control mode to be applied in the next ultrasonic irradiation cycle is changed during the current ultrasonic irradiation cycle. The control modes allow for the storage of a predetermined appropriate set of operating parameters for various operating conditions of the US scanning unit.
[0028] The set of operating parameters includes any of the operating parameters described above. Preferably, the digitized ASIC is configured to indicate and / or determine the length of time the ASIC remains in a particular control mode, particularly in terms of clock cycles. Timing may be stored in the control unit, or in a memory module or additional memory. Alternatively, timing may be part of the operating parameters provided by some or all of the control modes. Timing may also depend on an external trigger; i.e., the ASIC may be configured to apply a control mode until an external trigger is received. At least one control mode may be applied for a predetermined time, and at least one other control mode may be applied until a trigger event is received. For example, at least one control mode, and possibly all of the control modes, are configured to determine the gain, bandwidth, and bias in the analog front end of the digitized ASIC, the activation of individual ADCs and the setting of the ADC resolution of the ADC array, the applied word width, digital gain, function activation, and clipping, and the timing and / or duration of application of the operating parameters. The control unit and / or ASIC are configured to cycle through the set of control modes until they receive a new control signal giving new instructions. For example, there are 2 to 100 control modes, preferably 5 to 50, and more preferably 5 to 15.
[0029] According to one embodiment, the digitized ASIC comprises at least two register banks, the at least two register banks configured to store operating parameters, and the digitized ASIC is adapted to apply the operating parameters of the first register bank in particular during the current ultrasonic irradiation cycle, thereby overwriting the operating parameters of the second register bank to be used during the next ultrasonic irradiation cycle and / or data processing. The set of operating parameters stored in one register bank may be one control mode or a set of control modes. For example, during the current cycle, the timing for the next cycle is programmed by an interface unit, particularly the master control unit of the interface unit, and stored in a currently unused register bank. An intermediate-speed programming interface is configured to perform programming or reprogramming of the ASIC, particularly the register banks of the ASIC. For example, an intermediate-speed programming interface is an SPI interface, particularly one operating at a programming speed of about 20 MHz. The register banks thus make it possible to maintain a high acquisition rate.
[0030] In one embodiment, the memory module and the array of analog-to-digital converters are clocked from a first clock domain, and the transceiver is clocked from a second clock domain. In particular, the transceiver is configured to control the encoding and / or serialization from the second clock domain. Because the data links involved can be very fast, a very stable clock is crucial in some embodiments. The ASIC includes an on-chip PLL (phase-locked loop) or on-chip FLL (frequency-locked loop) configured to generate the clock domain clocks from a lower frequency clock. Preferably, a handshake mechanism is provided between the two clock domains. During the handshake, a listener (slave), e.g., the transceiver, indicates that new data is ready, and a talker (master), e.g., the memory module, provides the data. If properly received, the slave indicates that the data has been received. The handshake mechanism is useful in providing data integrity. For example, an elastic buffer exists between the first and second clock domains, which in particular enables the handshake between the clock domains. The elastic buffer is configured to allow for the temporary storage of more or less data before streaming it externally, depending on the clock frequency used. This, combined with the available memory capacity of the memory module, enables the separation of data acquisition bandwidth and serial data link bandwidth between the ASIC and the interface unit. Using these separated clock domains provides flexibility in selecting the ADC frequency relative to the link speed. The (maximum) link speed is determined by the entire system, and the ADC frequency may be more strongly linked to the frequency of the ultrasound used.
[0031] In many cases, the bandwidth of the data stream for data acquisition is higher than the bandwidth from the ASIC to the interface unit. Therefore, data acquisition is synchronized with the ultrasonic irradiation event, while, after data acquisition is complete, potentially slower data transmission continues until all selected and / or processed data has been transmitted to the interface unit. After transmission is complete, a new ultrasonic irradiation cycle is started, or there is a waiting period. Alternatively, several ultrasonic irradiation cycles may be performed, the corresponding data stored in a memory module, and then, during a waiting period when no ultrasonic irradiation occurs, the processed and / or selected data is transferred to the interface unit until all relevant data has been transmitted. For example, the data acquisition bandwidth is in the range of 30-60 Gbps, e.g., 50 Gbps, with an ADC sampling frequency in the range of 12-40 MHz, while the data link bandwidth is in the range of 3-6 Gbps, e.g., 5 Gbps.
[0032] Another aspect of the present invention is an ultrasonic scanning unit comprising an ultrasonic transducer array and a digitizing ASIC described herein. The ultrasonic transducer is, for example, a 2D matrix array transducer, and possibly a biplane transducer. For example, a MEMS (micro-electromechanical system) transducer array can be arranged monolithically on top of an analog ASIC, in which case the analog ASIC is connected to the digitizing ASIC. Preferably, the ultrasonic scanning unit is a low-cost component. For example, the ultrasonic scanning unit is adapted to be disposable. In particular, the ultrasonic scanning unit is configured for in vivo use, such as disposable catheter ultrasonic scanners, such as intracardiac echocardiography (ICE-) ultrasonic scanners and / or transesophageal echocardiography (TEE-) ultrasonic scanners and / or intravascular ultrasound (IVUS) scanners. In this context, disposable may mean that it can only be used once or a few times. Alternatively, the ultrasonic scanning unit may also be used in high-end systems to reduce power consumption and optimize data transmission with respect to a selected operating mode, for example. The ultrasonic scanning unit includes an EPROM (erasable programmable read-only memory) for storing calibrations and / or specifications related to the ultrasonic scanning unit, and / or optical components, such as a VCSEL (vertical cavity surface-emitting laser), for enabling optical connection to an interface unit, for example, via optical fiber. The ultrasonic scanning unit also further includes a transducer head with a transducer array, a transducer handle, and / or a transducer housing or casing, further electronic equipment, and / or a battery. All the advantages and features of a digitized ASIC also apply to the ultrasonic scanning unit, and vice versa.
[0033] According to one embodiment, components of an ultrasonic scanning unit, particularly an ultrasonic transducer array, an analog ASIC, and / or a digital ASIC, are arranged on a wearable patch. The transducer array, the analog ASIC, and the digital ASIC, along with optionally optical components, such as a VCSEL and / or EPROM, are combined on a wearable patch, particularly a semi-disposable wearable patch.
[0034] According to one embodiment, the ultrasonic scanning unit includes at least one analog ASIC adapted to control the transducer elements of an ultrasonic transducer array and / or to actuate the transducer elements of the ultrasonic transducer array and receive RF data signals from the transducer elements of the ultrasonic transducer array, wherein the transducer elements are adapted to perform ultrasonic irradiation and acquire ultrasonic signals according to an ultrasonic irradiation scheme, and at least one analog ASIC is adapted to transmit the acquired ultrasonic signals to a digitizing ASIC. The transducer elements are integrated on top of the analog ASIC. For example, the analog ASIC and the digitizing ASIC are connected side by side or 3D stacked by TSVs (Through-Silicon Vias). The TSV may be, for example, simply part of a mechanical silicon carrier, but the TSV may also be part of an ASIC. For example, a cMUT transducer array or image sensor with function acting on one side (up) of a wafer requires many connections to a second chip located beneath the sensor. In this case, it is advantageous to use TSVs, which are part of ASIC technology. Alternatively, the analog ASIC and the digitizing ASIC may be combined as a single mixed-signal ASIC. In particular, the control device of the ASIC is adapted to configure an ultrasonic irradiation scheme via an analog ASIC. The analog ASIC is configured to apply microbeamforming and / or other signal reduction methods to the acquired ultrasonic signal. The number of signal channels between the analog ASIC and the digitized ASIC is in the range of 16 to several thousand, preferably in the range of 16 to 1024, more preferably in the range of 32 to 256, especially when the analog ASIC is adapted to combine transducer signals, particularly to perform microbeamforming. The analog ASIC includes a high-voltage (HV) pulser for stimulating individual transducer elements and / or a low-noise amplifier for buffering echo signals. The HV pulser and low-noise amplifier are integrated into one analog ASIC or into two different analog ASICs, particularly two analog ASICs connected in series.
[0035] According to one embodiment, the ultrasonic scanning unit comprises a plurality of analog ASICs and / or a plurality of digitized ASICs, in which case two or more digitized ASICs are connected to one analog ASIC, and / or one digitized ASIC is connected to two or more analog ASICs. For example, two digitized ASICs having 64 signal channels may be connected to one analog ASIC having 128 output signal channels, or conversely, two analog ASICs having 32 signal channels may be connected to one digitized ASIC having 64 signal channels.
[0036] According to one embodiment, the functions of an analog ASIC and a digitized (digital) ASIC are combined in a single mixed-signal ASIC. Such an ASIC includes both high-voltage transistors for operation and advanced low-voltage transistors for efficient data processing.
[0037] Another aspect of the present invention is a master control device for an interface unit of an ultrasonic system, the interface unit being adapted to be coupled to at least one ultrasonic scanning unit, particularly as described herein, the master control device comprising or being part of a data processing unit (DPU), and providing control signals for controlling the digitization ASIC of at least one ultrasonic scanning unit. (1) Digitized ultrasonic data received by the interface unit from at least one ultrasonic scanning unit, and / or (2) The interface unit is configured to dynamically generate and transmit data based on data generated from digitized ultrasonic data received from at least one ultrasonic scanning unit. All the advantages and features of the digitized ASIC and ultrasonic scanning unit also apply to the master control unit, and vice versa.
[0038] Therefore, by having the master control unit work in conjunction with the control unit of the digitized ASIC, dynamic updates of data acquisition and / or processing of the digitized ASIC become possible based on the data currently being received. The data processing unit (DPU) is, for example, a field-programmable gate array (FPGA), a composite programmable logic device (CPLD), or a more general-purpose processor such as a tablet, smartphone, PDA, or PC processor. The data processing unit may also be used for additional data processing, particularly application-specific data processing, such as beamforming or processing related to the interpretation of measured readings such as flow rate or heart rate. The use of FPGA / CPLD is advantageous because it allows for flexible modification of the digital hardware. Alternatively, the DPU may be a GPU (graphics processing unit). The GPU provides increased flexibility by enabling a wider range of software data processing. In particular, the control signals can carry instructions such as those described for the digitized ASIC and ultrasonic scanning unit. The master control unit can access or include information regarding the storage capacity of the memory module of the digitized ASIC, the acquisition rate of the ultrasonic scanning unit, and / or the transmission rate between the ultrasonic scanning unit and the interface unit, and is configured to take this information into account when generating control signals.
[0039] According to one embodiment, the master control unit is configured to generate and send control signals related to the next ultrasonic irradiation cycle while data acquisition is underway for the current ultrasonic irradiation cycle. Thus, circuit fitting is performed in a dynamic manner, particularly by fitting to instantaneous signal characteristics. For example, during a first acquisition, particularly including the first or current ultrasonic irradiation cycle, the master control unit is configured to request all data with one or more predetermined operating parameters, for example, at a predetermined resolution. Furthermore, the master control unit is configured to determine specific measurements, such as the average signal amplitude of a group of signal channels as a function of depth and / or time. Based on these values, the master control unit is configured to fit analog circuit parameters such as gain and signal bandwidth, ADC array resolution, and / or digital word width for the next acquisition, particularly including the next ultrasonic irradiation cycle. It is also conceivable to configure the master control unit to skip data from individual signal channels, i.e., not to transmit or combine them with the interface unit. This is advantageous, for example, when the signal bandwidth is limited and the pitch of the transducer elements can be increased, and the additional information obtained from individual channels or transducer elements is insufficient. Such dynamic control loops maintain operation over a period of time, particularly by anticipating instantaneous changes resulting from the movement of the observed object, e.g., tissue, and / or the ultrasound scanning unit. On larger time scales, this is advantageous because it can further reduce the total amount of data for power savings or allow for higher frame rates. On smaller time scales, this also leads to instantaneous reductions in data volume, for example, when the amplitude of a group of signals is close to zero.
[0040] Another aspect of the present invention is an interface unit for an ultrasonic system, the interface unit being adapted to be coupled to at least one ultrasonic scanning unit, in particular an ultrasonic scanning unit as described herein, and comprising a master control device as described herein. The interface unit may be, for example, a separate unit, or part of a system such as a tablet, smartphone, PDA, or general-purpose PC, or part of a cart-based US system. A separate interface unit may comprise a power management unit (PMU) and a battery. The connection between the interface unit and the system may be wireless or via a data cable. All the advantages and features of the digitized ASIC, ultrasonic scanning unit, and master control device also apply to the interface unit, and vice versa.
[0041] According to one embodiment, the interface unit is adapted to be coupled to multiple ultrasound scanning units, and the master control unit is adapted to control multiple ultrasound scanning units. Coupling multiple ultrasound scanning units has the advantage of being able to measure various areas simultaneously, for example, for the purpose of observing peripheral vascular (PV) blood flow at multiple locations or monitoring the heart rate of twin fetuses. If there are M ultrasound scanning units, each having N serial links, and each being connected to the interface unit, then there may be M × N high-speed lanes from the interface unit, particularly the interface unit's DPU, and / or the master control unit, for connecting to the M ultrasound scanning units.
[0042] Another aspect of the present invention comprises an interface unit, as particularly described herein, and at least one ultrasonic scanning unit operably coupled to the interface unit, as particularly described herein, wherein the at least one ultrasonic scanning unit comprises an ultrasonic transducer array and a digitization ASIC, the digitization ASIC comprising an array of analog-to-digital converters adapted to receive ultrasonic signals acquired by the ultrasonic transducer array and to convert the ultrasonic signals into digitized ultrasonic data; a memory module operably coupled to the array of analog-to-digital converters and adapted to store the digitized ultrasonic data; a transceiver operably coupled to the memory module and adapted to transmit the digitized ultrasonic data stored in the memory module to a remote interface unit; and a control device adapted to receive control signals from the interface unit and, in response to the control signals, select portions of the digitized ultrasonic data to be stored in the memory module and / or select portions of the digitized ultrasonic data stored in the memory module to be transmitted to the interface unit. All the advantages and features of the digitization ASIC, ultrasonic scanning unit, master control device, and interface unit also apply to an ultrasonic system and vice versa. The ultrasound system further comprises a control station, such as a tablet, smartphone, PDA, or computer, to which the generated and processed data is transmitted, and the control station comprises a user interface, particularly a probe user interface, and a screen for displaying ultrasound images.
[0043] This aspect of the present invention particularly comprises a low-cost, modular, and / or possibly disposable US system having an improved hardware architecture that enables dynamic control of hardware components to allow data acquisition to be modified per ultrasonic irradiation cycle or even within a single ultrasonic irradiation cycle based on the currently received data.
[0044] The ultrasonic system includes a high-speed serial link between the ultrasonic scanning unit and the ultrasonic interface unit, particularly consisting of one or more data lanes. Preferably, the lanes can be understood as signal paths in the connecting cable, particularly digital or analog signal paths. The lanes are preferably implemented as conductors, but may also be optical signal lanes, such as optical fibers. If the lanes are electrical signal paths, they are implemented, for example, as coaxial cables or twisted pairs. The number of data lanes is one or several, particularly in low-cost and / or low-frame-rate applications, such as monitoring purposes.
[0045] According to one embodiment, the ultrasonic system is configured to transmit all necessary digitized ultrasonic data acquired from the ultrasonic scanning unit during the current ultrasonic irradiation cycle to the interface unit before starting the next ultrasonic irradiation cycle.
[0046] Data transmission between the ultrasonic scanning unit and the interface unit is configured to occur electrically, for example via UTP, or optically, for example via optical fiber. In the latter case, the ultrasonic scanning unit also includes optical components, such as a VCSEL, and the interface unit includes a high-speed optical receiver for detecting optical signals.
[0047] In another embodiment, the present invention is An encoding unit, which is operationally coupled to or part of an ultrasonic scanning unit and is adapted to convert analog or digitized ultrasonic data into a compressed, particularly subsampled, ultrasonic data array, The present invention provides an ultrasonic system comprising: a decoding unit which is part of the data processing unit of the ultrasonic system, in particular part of the interface unit described herein, and which has a trained algorithm adapted to approximately reconstruct ultrasonic data based on a compressed ultrasonic data array received from an encoding unit.
[0048] In particular, the encoding unit, The ultrasound data is divided into an array of data blocks across the entire range of digitized ultrasound data. By applying a subsampling pattern, each data block is subsampled so that only the samples of ultrasound data within the block that coincide with the location of the subsampling pattern are retained. The system is configured to obtain a compressed ultrasonic data array based on the samples held in each data block.
[0049] This means that, according to this aspect of the present invention, the amount of data that needs to be transmitted from the digitized ASIC to a data processing unit, such as a beamforming system or an interface unit as described herein, is reduced. This is particularly useful when such a data processing unit is located outside the ultrasonic scanning unit, for example, when it is part of a US system such as a cart-based US system. In particular, the compression system comprises a light encoder and a heavier decoder.
[0050] Ultrasonic systems, ultrasonic scanning units, and / or interface units are specifically described herein. Therefore, all the advantages and features of the digitization ASICs, ultrasonic scanning units, master control devices, interface units, and methods described herein also apply to encoding and decoding units, and vice versa. For example, an encoding unit is part of a digitization ASIC described herein. Alternatively, an encoding unit may be an additional component in an ultrasonic scanning unit, and / or part of the transmitter or transceiver of an ultrasonic scanning unit. For example, an encoding unit is the encoder described above in relation to a digitization ASIC. However, encoding units are also generally applicable to other ultrasonic systems having other components not described herein.
[0051] Preferably, the encoding unit is essentially a subsampling unit, that is, it selects specific samples of ultrasonic data according to a particular subsampling pattern. Other data samples are rejected and not transmitted to the decoding unit, thereby reducing the amount of digitized ultrasonic data. This process requires relatively little processing power and can therefore be performed, for example, on an ultrasonic scanning unit, such as a digitization ASIC described herein. In this case, the purpose of the encoding unit is to reduce the amount of ultrasonic data (RF data) so that the digital front end only needs to perform simple operations. Thus, this embodiment contributes to reducing the amount of data that needs to be transmitted from the ultrasonic scanning unit to the beamforming and / or visualization system via an interface unit, such as one described herein.
[0052] The ultrasound data to be compressed is divided into multiple data blocks across the entire range of digitized ultrasound data, and such data blocks typically have at least one dimension of fast time (t) and a second dimension of the number of transducer elements (x). For example, RF data acquired during one ultrasound irradiation cycle (which may correspond to one image frame) is divided into such data blocks. The blocks consist of discrete values on these axes, for example, taking the shape of a t×x block, and the number of samples is usually equal in both directions, i.e., t=x. Preferably, the number of samples in both directions is in the range of 2 to 48, more preferably 2 to 16, and most preferably 4 or 8. For example, a 4×4 block would have a total of 16 samples. Preferably, the size and / or dimensions of the blocks are equal for all blocks. In the case of a matrix transducer, the data block has a third dimension y, i.e., the data block has the shape of t×x×y, where x×y is the number of transducer elements of the 2D matrix transducer. The term "across the entire range of digitized ultrasound data" may specifically mean that all digitized US data and / or all parts of digitized US data are part of and / or assigned to one of the data blocks.
[0053] The encoding unit includes a subsampling unit configured to select specific samples from each block of the element-time RF data array. This is done according to a specific subsampling pattern defined for each data block. To reduce the size of the RF data array, unselected samples are discarded.
[0054] On the other hand, the decoding unit uses greater processing power because it is preferably part of a remote data processing unit (i.e., not part of the US scanning unit), which may be part of an interface unit or any other host system (usually cart-based) that has a high-performance processor (e.g., a GPU or CPU) available. The decoding unit has a trained algorithm, for example, an artificial neural network (NN), such as a convolutional neural network. Thus, the encoding unit can be seen as a "light encoder," for example, an encoder that does not require much processing power and energy, while the decoding unit can be seen as a "heavier decoder," for example, a decoder that can provide greater processing power.
[0055] In an autoencoder, input data is encoded by an encoder network from the input domain, e.g., an image or a corresponding data array, into a latent domain, typically with a much smaller number of values. The decoder network then reconstructs the input based on these latent domain values. Both the encoder and decoder networks have numerous weights and / or parameters, which are trained by feeding input data to the network and by modifying the weights to minimize the reconstruction error, i.e., the difference between the input and the reconstructed output. This method produces, for example, data-specific types of compression, i.e., compression specific to the type of data that has been trained using this method. In this case, ultrasonic data (digitized and possibly normalized and / or microbeamformed) is used as input, and the decoding unit is trained on one or more specific subsampling patterns applied by the encoding unit.
[0056] In one embodiment, the subsampling pattern is the same for each data block in the array of data blocks. In other words, the subsampling pattern for each block is repeated for a complete RF signal data array, for example, an RF signal data array acquired over t fast time values for x elements or x channels (or x × y channels / elements in the case of a 2D converter) in one ultrasonic irradiation cycle. This makes it possible to obtain a relatively uniform sampling density compared to, for example, sampling in a completely random manner. Furthermore, this enables efficient processing by trained algorithms, such as fully convolutional neural networks, because the subsampling pattern is the same for each block, and as a result it becomes block-shift invariant.
[0057] In other embodiments, different data blocks in an array of data blocks, associated with a single frame or acquired in a single ultrasonic irradiation cycle, may have different subsampling patterns. For example, data blocks acquired later on a fast time axis are expected to belong to the region furthest from the transducer array and therefore have the weakest signal. Thus, the last data blocks may use a subsampling pattern in which fewer or more samples are retained than data blocks acquired earlier along the t-axis. In other words, the subsampling rate may vary, for example, along a fast time axis, across ultrasonic data acquired in a single ultrasonic irradiation cycle. Such variations may be predetermined, and the decoding unit is trained to reconstruct the ultrasonic data subsampled with different subsampling patterns. In some cases, it is possible to assign different subsampling patterns to all data blocks. In this case, the NN is trained to reconstruct an array of such blocks. For example, the NN may be configured or trained to analyze the zero values of the data and apply a corresponding interpolation routine. Thus, the decoding unit is adapted to handle multiple and / or different subsampling patterns.
[0058] According to a preferred embodiment, the subsampling pattern is determined based on other factors rather than by training. For example, it may be entirely predetermined. The subsampling pattern may also be dynamically adapted to the ultrasound data. For example, the decoding unit is trained on several different subsampling patterns used by the encoding unit, and the encoding unit uses one of these subsampling patterns depending on the received ultrasound data or based on the current ultrasound irradiation scheme. For example, the subsampling pattern may depend on the amount of energy (mean squared RF value in the block), and subsampling may be reduced in areas with above-average energy than in areas with little energy. In one embodiment, the subsampling pattern is determined / selected within the encoding unit, and therefore the decoding unit needs to know which samples have been transmitted, for example, which of the predetermined subsampling patterns is being used. This information is therefore transmitted from the encoding unit to the decoding unit. According to an alternative embodiment, a control device located in the US system, particularly in the DPU or interface unit, is configured to send encoding information, i.e., the subsampling pattern, to the encoding unit and the decoding unit. As a result, the encoding unit will apply this subsampling pattern, and the decoding unit will be able to reconstruct the data based on this subsampling pattern. In particular, the decoding unit will know how to readjust the input values before decoding.
[0059] In one embodiment, the encoding unit converts analog ultrasonic data into a compressed ultrasonic data array, also called an RF signal, by sharing an ADC among multiple transducer elements. In particular, the ultrasonic scanning unit comprises an array of transducer elements in which several transducer elements can be alternately connected to an ADC, so that the ultrasonic data to be digitized (RF signal) is switched among multiple transducer elements. Such switching may occur between two ultrasonic irradiation cycles or may be possible within a single ultrasonic irradiation cycle. Accordingly, one, more, or all analog-to-digital converters (ADCs) of the digitization ASIC are shared among multiple RF signals of the analog ASIC, respectively. In particular, the ultrasonic scanning unit is configured to switch the RF signals connected to the ADC. Furthermore, the ultrasonic scanning unit is configured to subsample the ultrasonic data by connecting and / or disconnecting predetermined RF signals and the ADC. A selection and / or multiplexing function is realized between the analog input and the ADC by using the ADC in a quasi-static manner, for example, by switching only between two ultrasonic irradiation cycles. The ultrasonic scanning unit is adapted to rapidly switch the ADC between two input signals, i.e., RF signals, for example, to switch each ADC between two input / RF signals. Preferably, the input / RF signals should contain only frequency components that do not exceed half the sampling frequency. According to an alternative embodiment, the ultrasonic scanning unit is configured to share only a portion of the ADC, for example, the ADC includes two sampling circuits. The sampled signals are, for example, multiplexed and provided to the rest of the ADC via, for example, a comparator and / or a decision circuit.
[0060] An artificial neural network (NN) is based on a collection of connected artificial neurons called nodes, where each connection (also called an edge) can transmit signals from one node to another. Each artificial neuron that receives a signal processes it and transmits the signal to further artificial neurons connected to it. In useful embodiments, the artificial neurons are arranged in layers. Input signals travel from a first layer, also called the input layer, to the final layer, which is the output layer. In useful embodiments, the NN of the decoding unit is a feedforward network. The neural network preferably comprises several layers, including hidden layers, and is therefore preferably a deep network.
[0061] In one embodiment, the NN is trained based on machine learning techniques, particularly deep learning, for example, by backpropagation. The NN may be provided in the form of a software program or it may be implemented in hardware. Furthermore, the trained NN may be provided in the form of a trained function, which is not necessarily structured in exactly the same way as a trained neural network.
[0062] According to a preferred embodiment, the decoding unit's neural network (NN) comprises at least one convolutional layer. The convolutional layer applies a relatively small filter kernel across its entire input layer, so that the neurons in the layer are connected only to small regions of the preceding layer. Each filter kernel is replicated across the entire input layer. In a useful embodiment, the parameters of the convolutional layer comprise a set of learnable filter kernels, which have small receptive fields but can be extended across the entire depth of the input volume. As it passes through the convolutional layer, each filter kernel is convolved across the width and height of the input volume, and the dot product between the entry of the filter kernel and the input is calculated to generate a feature map of that filter. By stacking the feature maps of all filter kernels along the depth dimension, the entire output volume of the convolutional layer is formed. All entries in the output layer, which contain several feature maps or combinations of feature maps, can therefore be interpreted as the outputs of neurons that see small regions of the input, sharing neurons and parameters in the same feature map.
[0063] According to a preferred embodiment, the NN of the decoding unit is a fully convolutional deep neural network. In this regard, fully convolutional means that there are no fully connected layers. A deep convolutional neural network comprises at least two convolutional layers. The NN comprises at least one layer that includes an activation function, preferably a nonlinear activation function. For example, the result of each convolutional layer is passed through a nonlinear activation function.
[0064] According to one embodiment, the decoding unit comprises a convolutional layer and an upsampling layer, or a neural network (NN) consisting of these. For example, the NN comprises at least one unit comprising 1 to 4 convolutional layers, preferably 2 to 3 layers, followed by 1 upsampling layer. The NN may further comprise a transposed convolutional layer, which is a combination of a convolution step and an upsampling step. The input samples to such a decoding unit are arranged as follows: Uncompressed RF data is configured as a tensor having shape [Batch, Elements, Time, Channels]. "Batch" is the number of batches processed in parallel, for example, data from several frames being processed simultaneously in several batches. "Elements" refers to the number x of transducer elements in the ultrasonic scanning unit. Time is the fast time axis, i.e., the number t of time samples acquired in a single transmission event. "Channels" is the number of channels, for example, one for a plain RF signal, or two for an IQ-coded RF signal, i.e., one for the imaginary part and one for the real part. As described above, this RF data is divided into an array of data blocks and subsampled according to a subsampling pattern defined for each data block, which may be the same for each data block or vary within its tensor. When this RF data array is subsampled at Q samples per x x t data block (corresponding to a subsampling rate of Q / (x x t)), the tensor input to the decoding unit has the shape [Batch, Elements / x, Time / t, Channels*Q]. The decoding unit upscales this block by x x t times, gradually reducing the number of channels from Q to the number of input channels (e.g., 1 for monochrome images). Preferably, the upsampling layer in the NN provides upsampling with coefficient n, in which case the total subsampling rate on both the high-speed time (t) and transducer element (x) axes is 1 / n.For example, a subsampling rate of 1 / 4 means that every fourth data point / sample is retained, while other data points are discarded during subsampling. For example, if n=4, two upsampling layers are used, each with an upsampling factor of 2. In some embodiments, the number of upsampling layers is equal to n.
[0065] According to another embodiment, the decoding unit comprises a neural network (NN) having an encoder-decoder architecture. In other words, the NN has an encoder section consisting of a convolutional layer and a downsampling layer, and a decoder section consisting of a convolutional layer and an upsampling layer. In this embodiment, the input and output layers of the decoding unit have the same size. The input is a tensor having the original / final size as described above, e.g., [Batch, Elements, Time, Channels], with zeros at unsampled positions and sampled values at their corresponding positions. As a result, the NN is trained to re-interpolate missing / zero values. The advantage of such an encoder-decoder architecture is that the input tensor still has a uniform size even if it has been subsampled with different subsampling patterns and / or subsampling rates across the range of ultrasonic data. A suitable example of a neural network is a u-net-based network, such as the one disclosed in [U-Net: Convolutional Networks for Biomedical Image Segmentation, Olaf Ronneberger, Philipp Fischer, Thomas Brox, Medical Image Computing and Computer-Assisted Intervention (MICCAI), Springer, LNCS, Vol.9351: pp. 234-241, 2015, available at https: / / arxiv.org / abs / 1505.04597].
[0066] According to one embodiment, the subsampling pattern differs for at least two different data blocks across the entire range of ultrasound data. For example, the coding unit is configured to change the subsampling pattern block by block between different parts, regions, and / or zones of the complete ultrasound data. The coding unit is particularly configured to change the subsampling pattern according to control signals received from external units, such as interface units, especially master control units. Adapting the subsampling pattern block by block makes it possible to accommodate the characteristics of the object being inspected, especially since there may be a direct correlation between the location of an object in the real world and its resulting placement in the array of US data. For example, more aggressive subsampling, i.e., subsampling at a lower subsampling rate, can be applied to blocks corresponding to less important regions of interest than to blocks corresponding to more important regions of interest. This is particularly possible when using data supply techniques such as those used in u-net based decoders. In this case, non-zero input values may be supplied at a higher or lower density, for example, depending on the region. Preferably, the coding unit is programmable at the block level, for example, the coding unit is configured to select individual subsampling patterns block by block. Alternatively, the encoding unit may be configured so that a mask is selected for the complete ultrasound data, particularly for the array of ultrasound data, and only the masked sample values are transmitted. The subsampling pattern is determined in the host / system, e.g., the interface unit and / or master control unit. This allows for a configuration where the encoding unit does not send information about which subsampling pattern was used. The decoding unit also receives information about the mask / subsampling pattern used from the host / system.
[0067] In another embodiment, the decoding unit is trained to detect zero / missing values in the received data block, recognize the specific subsampling pattern used, and then apply the corresponding upsampling / interpolation routine as part of its trained algorithm. As a result of this training, the decoding unit can handle multiple different subsampling patterns simultaneously.
[0068] Determining the specific subsampling pattern to be used for each data block is performed in a feedback loop and / or closed loop with the control unit or master control unit, as follows: After obtaining the initial image, the master control unit or other parts of the data processing unit (DPU) calculate an image importance map (e.g., high within the region of interest and low outside, or corresponding to image intensity). Because there is a direct relationship between the image position and the position in the acquired RF data, the DPU can apply rules to calculate which subsampling pattern should be applied to each data block of the complete RF data, while reducing the application of subsampling, especially in the most important areas. This pattern is then transmitted to the ultrasound scanning unit, in particular to its control unit, and used in the next ultrasound irradiation cycle, thereby effectively creating a closed-loop system.
[0069] If the scene is stationary or moving slowly, the US data will change slowly from one ultrasound irradiation cycle in which one frame is captured to the next cycle. This knowledge is utilized by combining ultrasound data from two or more subsequent ultrasound irradiation events. According to one embodiment, the subsampling patterns of the same data block are different with respect to two or more consecutive ultrasound irradiation cycles, in particular, in this case the first subsampling pattern is complementary to and / or interleaved with the following, for example, second subsampling pattern. For example, the encoding unit is configured to apply the subsampling patterns alternately. Complementary or interleaved may mean, in particular, that all samples maintained during the first subsampling pattern are different from the samples maintained during the subsequent subsampling pattern. Thus, there is no overlap between the first subsampling pattern and the subsequent subsampling pattern. According to one embodiment, the first frame is sampled with the first subsampling pattern, and the next frame is sampled with the next subsampling pattern.
[0070] For example, interleaving two consecutive frames, each with a subsampling rate of 1 / 4, will appear (at least in static scenarios) as a combined subsampling pattern with a rate of effectively 1 / 2. If the decoding unit is configured to consider both frames, i.e., the interleaved frames, to reconstruct the frame, this makes it possible to achieve a better signal-to-noise ratio and / or improve the reconstruction performance of the decoding unit. According to one embodiment, the decoding unit is configured to reconstruct a first number of consecutive frames, e.g., one or two frames, from a second number of consecutive input frames that have been specifically subsampled in a complementary subsampling pattern, where the second number is greater than the first number, e.g., 2 to 6 consecutive input frames. Preferably, the reconstructed frame is the central frame in the consecutive order of all the subsampled input frames. For example, if there are six consecutive subsampled frames, the reconstructed frames are frames 3 and 4. The decoding unit is trained in particular to use similarities between consecutive frames to improve data reconstruction. In this case, the decoding unit is not explicitly trained to predict motion, i.e., there is no output for motion values, but it may have already learned to detect motion and use it to provide improved frame predictions, in which case the prediction of the output frame will be improved. Thus, by considering multiple frames with each reconstruction, it is possible to further improve the reconstruction. The decoding unit is configured and / or trained to shift the input frames according to the size of the first number for the next reconstruction. For example, initially the input consists of frames 1-6, which corresponds to the second number 6, and the output reconstructs frames 3 and 4, which are the central frames and correspond to the first number 2. In the next step, the second input now consists of frames 3-8, i.e., shifted by only 2 frames, and the output reconstructs frames 5 and 6. This scheme can be continued as appropriate. In this way, stream-based processing becomes possible.
[0071] According to one embodiment, consecutive frames are subsampled in a complementary subsampling pattern, and the decoding unit comprises a first decoder and a second decoder, in which case the first decoder reconstructs a third number, in particular three, latent frames from a second number, in particular six consecutive input frames, by processing in particular two consecutive input frames into one latent frame. In other words, the first decoder comprises a third number (e.g., three) of first decoders, each of which processes two or more consecutive input frames into one latent frame. The second decoder reconstructs a first number, in particular two, reconstructed frames, in particular a pair of reconstructed frames, from the third number of latent frames. Preferably, the second number is greater than the third number, and the third number is greater than the first number. The first decoder is configured to reconstruct each latent frame from a fourth number, for example two, in particular consecutive frames. Preferably, the second number is the product of the third and fourth numbers, i.e., each input frame is used for only one latent image frame. In particular, two consecutive sampled frames are input to the first decoder to create one latent frame. The coding unit is configured, for example, to use some or all of the latent frames for the reconstruction of multiple pairs of reconstructed frames. Thus, each latent frame is reconstructed only once, but may be used for the reconstruction of two or more consecutive frames to be reconstructed. The decoding unit is configured and / or trained to shift the latent frames according to the size of the first number for the next reconstruction. For example, if the third number is 3, there are latent frames numbers 1-3 used for the reconstruction of frame number 2, while latent frames numbers 2-4 are used for the reconstruction of frame number 3, and so on. In particular, it has been found that a decoding unit with two decoders is more computationally efficient for the reconstructed image because it requires fewer operations, especially due to the reuse of latent frames.
[0072] In a preferred embodiment, the ultrasonic system is an encoding unit that is operationally coupled to or part of a digitizing ASIC of an ultrasonic scanning unit and is adapted to convert digitized ultrasonic data received from the digitizing ASIC into a compressed ultrasonic data array. Digitized ultrasound data is divided into an array of data blocks across the entire range of digitized ultrasound data, By applying a subsample pattern, each data block is subsampled so that only the digitized ultrasound data samples within the block that correspond to the positions of the subsample pattern are retained. An encoding unit configured to obtain a compressed ultrasonic data array based on the samples held in each data block, The interface unit comprises a decoding unit which is part of the interface unit and includes a trained algorithm that approximately reconstructs digitized ultrasonic data based on a compressed ultrasonic data array received from an encoding unit.
[0073] According to one embodiment, the ultrasound scanning unit is configured to normalize the ultrasound data, particularly by a local amplitude map. Normalizing the ultrasound data makes it possible to reduce the dynamic range of the ultrasound data, which in some cases further improves the fit with a trained algorithm in the decoding unit, such as a neural network. Furthermore, the digitized ultrasound data to be subsampled may already be microbeamformed.
[0074] The present invention also provides a method for operating an ultrasonic system which includes an ultrasonic scanning unit and a data processing unit which may not be part of the ultrasonic scanning unit, (a) A step of acquiring ultrasound data, (b) A step of converting analog or digitized ultrasound data into a compressed, in particular subsampled ultrasound data array, (c) The method also includes the step of applying a trained algorithm to approximately reconstruct ultrasound data based on a compressed ultrasound data array.
[0075] Preferably, step c is performed on an ultrasonic scanning unit, and step c is performed by a data processing unit. The method is performed using an encoding unit and a decoding unit as described herein. All features and advantages described herein with respect to ultrasonic systems, encoding units and decoding units, digitizing ASICs, ultrasonic scanning units, and interface units are applicable to the above method and vice versa.
[0076] The present invention is also directed to a computer program or computer program product comprising program code that, when executed by an ultrasonic system, causes the ultrasonic system to perform the methods described herein. The present invention is also directed to a computer-readable medium on which such a computer program is stored.
[0077] Another aspect of the present invention is a method for controlling an ultrasonic scanning unit, particularly an ultrasonic scanning unit, by a master control device, particularly a master control device as described herein, The master control unit transmits a request to acquire and process specific ultrasonic data to the digitized ASIC in the form of a control signal. The steps include: an ultrasonic scanning unit acquiring the requested data, The digital ASIC selects and processes data acquired according to the control signals of the master control unit, and transmits that data to the master control unit. The master control unit interprets the received data, The steps include: the master control unit adapting data selection and processing criteria, as well as optionally the ultrasonic irradiation scheme, based on data interpretation and incorporated control algorithms, and transmitting the correspondingly updated request with updated control signals to the digitized ASIC; The steps include: an ultrasonic scanning unit acquiring data according to an updated request, The present invention relates to a method comprising the steps of: a digitized ASIC selecting and processing newly acquired data in accordance with updated control signals from a master control unit, and transmitting the data to the master control unit.
[0078] Preferably, the above steps are performed in the order described. In particular, the last four steps are repeated multiple times. By repeating the last four steps in this manner, real-time adaptable data selection and / or processing in a closed-loop configuration is achieved. All the advantages and features of the digitized ASIC, ultrasonic scanning unit, master control unit, interface unit, and ultrasonic system also apply to this method, and vice versa. In particular, the master control unit transmits control signals to set the control parameters as described above. Preferably, the master control unit transmits control signals related to the next ultrasonic irradiation cycle while acquiring data for the current ultrasonic irradiation cycle.
[0079] According to one embodiment of the method, the first request and control signals of the master control unit instruct the system to irradiate a target object, such as the heart, with ultrasound while using all channel data for the entire field of view, for example, 128 channels, by using the same plane wave transmission. A moderate resolution is required, for example, to limit the amount of data. Interpretation of the data by the master control unit includes detection of fast-moving areas, such as the valves of the heart. Thus, the first four steps can be summarized as acquisition and interpretation of scout images. The updated request and control signals then include a focused transmission beam and data acquisition with a limited number of signal channels, but in some cases with relatively high resolution. Furthermore, data acquisition is performed within a limited depth range, for example, acquisition starts 50 μs after the ultrasound irradiation event and continues for 20 μs. As a result, the region of interest is observed with higher resolution. For example, transmission of data for the entire field of view (scout images) takes about 1000 μs, but transmission of data for the region of interest takes only 100 μs. Thus, it is possible to scan the region of interest at a higher frame rate and / or with less power consumption. Ultrasound irradiation across the entire field of view, such as plane wave ultrasound, and ultrasound irradiation of a region of interest, i.e., targeted ultrasound, are generated using a regular time-interleaved method. However, the interleaving can also be irregular and / or dynamic, and may be triggered by instantaneous signal characteristics such as the movement speed of multiple regions of interest or objects being observed. Artificial intelligence is used to recognize these instantaneous signal characteristics and support intelligent image formation or data detection.
[0080] According to another embodiment of this method, in particular to match the loss of dynamic range over time, the master control unit requests all data of the observed object at a predetermined resolution as a first request by a first control signal. The master control unit then determines the signal characteristics of the channel group as a function of depth / time. Based on this information, the master control unit adapts the parameters of the analog circuit, e.g., gain and / or signal bandwidth, at least one parameter relating to the ADC array, e.g., resolution, and digital word width for the next acquisition. The master control unit also requests to skip or combine channel data, for example, if the additional information provided by individual channels may be insufficient. Through these adaptations, i.e., according to the last four steps of the method described above, the dynamic control loop maintains an operational state over a period of time, anticipating instantaneous scenes. This method is advantageous because the amplitude and dynamic range of the ultrasonic echo signal decrease over time, particularly as a result of the effects of attenuation and diffraction by tissue. The loss of amplitude can be partially corrected by controlling the gain over time. The loss of dynamic range in the signal is compensated for by dynamically adjusting the dynamic range of the analog circuit, such as the resolution of the ADC and the digital word width, to match the signal characteristics. As a result, unnecessary power consumption and increased hardware costs are prevented.
[0081] The present invention will now be described by means of embodiments with reference to the following attached drawings. [Brief explanation of the drawing]
[0082] [Figure 1] This figure schematically illustrates an ultrasonic system according to one embodiment of the present invention. [Figure 2] This is a block diagram of a digitized ASIC according to one embodiment of the present invention. [Figure 3] This figure shows a concept of connection between a digitized ASIC and a master control device according to one embodiment of the present invention. [Figure 4]This is an example timing diagram for data acquisition. [Figure 5] This flowchart shows the application of the principle of the present invention according to an exemplary embodiment. [Figure 6] This figure shows the operating parameters in a register bank having various control modes according to one embodiment of the present invention. [Figure 7] This is a sketch of an ultrasonic system according to one embodiment of the present invention. [Figure 8] This is a schematic example of four data blocks in an array of data blocks, each containing 4x4 samples. [Figure 9] This figure shows a schematic structure of a decoding unit in the form of an upsampling network according to one embodiment of the present invention. [Figure 10] This figure shows a schematic structure of a decoding unit in the form of a u-net-based network according to one embodiment of the present invention. [Figure 11] This figure shows a comparison between the original plot and the reconstructed plot of 2D RF data. [Figure 12] This figure shows different subsampling patterns with varying subsampling rates. [Figure 13] This figure shows two different subsampling patterns and an interleaved subsampling pattern which is a combination of the two different subsampling patterns. [Figure 14] This figure illustrates the concept of a decoding unit that uses two interleaved subsampling patterns from consecutive US frames. [Figure 15] This diagram illustrates the operating principle of a decoding unit comprising a first decoder and a second decoder. [Modes for carrying out the invention]
[0083] Throughout the figures, the same or corresponding features / elements in various embodiments are designated by the same reference numerals.
[0084] Figure 1 schematically shows an ultrasonic system 1 according to one embodiment of the present invention. In this embodiment, the system comprises a computer 12, an interface unit 6 having a master control device 7, and three ultrasonic scanning units 2 connected to the interface unit 6. Each ultrasonic scanning unit 2 comprises an analog ASIC 8 having a transducer array 21. The transducer array 21 is an integral part of the analog ASIC 8, or one or more transducer arrays 21 are connected to the analog ASIC 8. For example, the transducer array 21 may be a matrix transducer array 21 monolithically arranged on top of the analog ASIC 8. The analog ASIC 8 is connected to a digital ASIC 3 of the ultrasonic scanning unit 2. The connection between the ASIC 8 and the ASIC 3 can be, for example, a side-by-side connection or a stacked configuration using through-silicon vias (TSVs). Alternatively, the functions of the analog and digital ASICs may be integrated into a single mixed-signal ASIC.
[0085] The digitized ASIC 3 includes a control device 33 adapted to control various operating parameters of the ultrasonic scanning unit 2, particularly the digitized ASIC 3. Furthermore, the digitized ASIC 3 includes an array of ADCs 31 configured to digitize RF ultrasonic signals from the analog ASIC 8. The digitized ultrasonic data is then stored in the memory module 32 of the digitized ASIC 3, in on-chip memory such as SRAM or DRAM, and optionally processed. According to the instructions of the control device 33, the data is filtered, selected, and / or processed, particularly in real time, before or after being stored in the memory module 32. Thus, the data is compressed on the digitized ASIC 3, thereby reducing the amount of data that needs to be transmitted to the interface unit 6. A serial link 11, consisting of multiple data lanes, exists between each ultrasonic scanning unit 2 and the interface unit 6 to transmit the selected and processed digitized ultrasonic data. The digitized ultrasonic data is encoded and / or serialized via an encoder / serializer 43 and transmitted by a transceiver 44. The digitized ASIC 3 also includes an encoding unit 343 configured to subsample the data. The encoding unit 343 is configured to subsample the data after it has been stored in the memory module 32. However, the encoding unit 343 may also be configured to subsample the data before it is stored in the memory module 32, and possibly before it is digitized by the ADC array 31. Optionally, the ultrasonic scanning unit 2 includes a VCSEL 24 to enable optical connection to the interface unit 6, for example, via optical fiber. Alternatively, the digitized ultrasonic data may also be transmitted electrically, for example, via UTP. The connection between the analog ASIC 8 and the digitized ASIC 3 is designed to allow the use of multiple digitized ASIC 3s with one analog ASIC 3, or vice versa.Furthermore, the ultrasonic scanning unit 2 shown in Figure 1 is equipped with an EPROM 25 for storing calibration and / or specifications related to the ultrasonic scanning unit 2.
[0086] The interface unit 6 includes a data processing unit 61 which includes a beamformer 62 and a master control unit 7. The master control unit 7 is adapted to send control signals to the control unit 33 in response to data analysis performed by the data processing unit 61. After beamforming and possibly additional processing of the data on the interface unit, the data is transmitted to a computer 12 which has a user interface 13. In this case, the interface unit 6 includes a battery 63 and a power management unit (PMU) 64 so that it can operate independently. Therefore, the connection between the interface unit 6 and the computer 12 may be wireless.
[0087] Figure 2 shows a block diagram of a digitized ASIC 3 according to one embodiment of the present invention. The digitized ASIC comprises an array of ADCs 31, where each ADC 39 is combined with an anti-aliasing filter 38, an amplifier 37, and optionally a single-to-differential converter (not shown). The anti-aliasing filter 38, amplifier 37, and single-to-differential converter are part of the analog front end of the digitized ASIC 3. In this schematic example, the array 31 consists of four ADCs 39, but in reality, there are many more ADCs 39, e.g., 32 to 256 ADCs 39. In particular, there is one ADC 39 for each signal channel of the analog ASIC. Alternatively, as described above, two or more signal lines / channels may share one ADC 39. Before storing the data in the memory module 32, the data is subjected to digital data selection 53, filtering and / or processing 54, such as filtering by time or channel, which are controlled by the control unit 33. The processing may be changed during acquisition, for example, from one ultrasonic irradiation cycle to the next, and may also be application-specific. For example, the resolution or the sampling frequency of the ADC may be changed during a single acquisition to perform subsampling, resolution scaling, etc., as part of an intelligent data reduction algorithm. The control unit 33 also controls analog front-end modules, such as an amplifier 37 and an anti-aliasing filter 38. These modules are biased, for example, only when actively acquiring the associated echo signal, and are otherwise turned off, i.e., the bias current is turned off. In this embodiment, the memory module 32 consists of multiple memory units 41, one for each ADC 39 in particular. The memory capacity is preferably sufficient to store RF data associated with one or more ultrasonic irradiation events, for example, the memory capacity is on the order of 30 to 100 kilobits per signal channel.After the relevant data is stored in the memory module 32, the control unit 33 instructs additional data selection 53, filtering, and normalization and / or clipping processes 54, and then transfers the data to the interface unit 6 via the transmitter 44 or transceiver and a serial link 11 having multiple lanes of serial data format. In this way, the control unit 33 is adapted to control the operating parameters of the ADC array 31, the memory module 32, and / or the transmitter / transceiver 44. Furthermore, the data is encoded, for example, in 8B / 10B encoding, and / or serialized by the encoder and serializer 44. The memory module 32 and the ADC array 31 are clocked from a first clock domain 45, and the encoder and serializer 43 are clocked from a second clock domain 46. The elastic buffer 42 acts as a handshake mechanism between the two clock domains to ensure data integrity. The separation into two clock domains, i.e., the separation of the data acquisition bandwidth and the serial data link bandwidth, is made possible by the memory module 32. This allows for compensation of a much faster data acquisition bandwidth compared to the often fixed, slower serial data link speed 11, although the data acquisition bandwidth (ADC sampling frequency, resolution, and number of operating channels) may change even during the ultrasonic irradiation cycle. Data acquisition should be synchronized with the ultrasonic irradiation event, but data transmission to the interface unit 6 can continue afterward until all selected data has been transmitted. Two clock domains 45 and 46 generate a low-frequency reference clock via a PLL 47 (phase-locked loop).
[0088] Figure 3 illustrates a conceptual connection between a digitized ASIC and a master control unit according to one embodiment of the present invention. Based on a control signal 71 from the master control unit 7, the control unit 33 is adapted to change the operating parameters of the digitized ASIC 3. In this embodiment, the operating parameters include analog signal selection 51, such as filtering the analog US signal; digitization 52, such as setting the gain, ADC sampling frequency, bandwidth, and / or resolution; digital data selection 53, such as additional subsampling of data stored in the memory module 32; and filtering and processing 54, such as setting the word width, digital gain, and applying a function. and The filtered and processed data is then transferred to the interface unit 6 and analyzed by the master control unit 7 to determine the next control signal 71.
[0089] Figure 4 shows an exemplary timing diagram for data acquisition. The digitized ASIC 3 is pre-programmed with acquisition delays (e.g., T1A_B1, T2A_B1) and acquisition period parameters (e.g., T1B_B1, T2B_B1), where the second letter indicates a signal channel or converter element (1…x). Timing parameters related to data acquisition for the next ultrasonic irradiation event are programmed during data acquisition for the current event. This is made possible by using a bank-switchable register table (indicated by subscripts B1, B2). After a trigger event 91 from the master control unit, a predetermined acquisition delay 92 is applied to wait, for example, for the ultrasonic waves after irradiation to be received by the converter and transmitted to the digitized ASIC 3. Following the delay 92, data acquisition takes place for an acquisition period 93. Different signal channels of the ADC array 31, i.e., different ADCs 39 (ADC1, …ADCX), have different timing parameters. In this example, the first channel 95 (ADC1) and an additional channel 96 (ADCX) are shown representing all channels. The timing of the first bank 97 is shown on the left side of the figure (the timing parameters are also indicated by the subscript B1). After another trigger event 91 is received, the timing of the second bank 98 is applied (the timing parameters are indicated by the subscript B2). The stream of serial data 94 transferred to the interface unit 6 is shown at the bottom of the figure. Here, the upper line represents the (maximum) stream of serial data 94, and the lower line represents a pause in the data stream. As can be seen, the serial stream continues even after the acquisition period 93 of the signal channel has ended (during the dead time). In this case, the data is temporarily stored in the memory module 32 to compensate for the fact that the speed of the serial link 11 to the interface unit 6 is slower compared to the acquisition and processing speed. The next acquisition is timed so that the acquisition period of the second bank 98 is set only after the serial data 94 corresponding to the first bank 97 has been completely transferred.In this case, after the transfer of data acquired by the operating parameters of the first bank 97 is completed, a brief pause occurs in the serial data 94 stream before the stream of data acquired by the operating parameters of the second bank 98 is transferred. This operating principle continues through several banks.
[0090] Figure 5 shows a flowchart illustrating the application of the principle of the present invention according to an exemplary embodiment. A first control mode 101, in which the operating parameters 110 are set according to the instructions of a control signal from a master control device, is initiated by an external trigger event 91 (not shown). This trigger event is synchronized with, but not necessarily the same as, an ultrasonic irradiation event. The first mode 101 is used, for example, as a hold mode. There may be no new data acquisition and the ADC 39 does not perform analog-to-digital conversion. Available "old data" in the memory module 32 is transmitted to the master control device 7. A comma is inserted in the encoded data to ensure word synchronization. After a predetermined time monitored by a timeout monitor 111, a second control mode 102 is activated and the operating parameters 110 are set. This may be the initial data acquisition mode, in which the ADC 39 is supplied with a selected sampling clock and the digitization of the analog input ultrasonic signal begins. The gain of the analog input is relatively low, and the resolution of the ADC is high. The digital word width is similarly high. Here again, after the monitored timing 111, the next control mode, namely the third control mode 103, is activated and new operating parameters are set 110. The third control mode 103 is the second data acquisition mode, and the analog input settings are adapted, as is the number of ADC channels in operation. Normally, the amplitude and dynamic range of the analog signal tend to decrease over time, but these can be matched. However, previous learning of the system evaluated by the master control unit may have shown different results, and therefore individual dynamic adjustments may be applied. It is also possible to adjust the operating parameters to observe special areas of interest. After the timeout 111 of the third control mode 103, the operating parameters 110 of the fourth control mode 104 are set 110. The fourth control mode 104 is the final data acquisition mode, and the analog front-end settings are optimized for the weaker signal at this point, and the dynamic range of the signal is low, as is the signal amplitude, but this can be compensated for / matched.For example, if the analog front-end 48 is dominant in terms of signal noise, it may not make sense to further increase the analog gain. However, it may make sense to transmit only the relevant data bits, such as the LSB (least significant bit) of the signal. Furthermore, the sampling frequency is lowered to match the bandwidth of lower frequency signals. After the timeout 111 of the fourth control mode 104, the fifth control mode 105 is used to transmit pre-collected data while the analog front-end 48 and ADC 39 are turned off. The digitized ASIC 8 remains in this mode until the acquired data is transmitted to the master control unit 7. For example, a trigger event 91, sent from the master control unit 7 to the control unit and recognized by the trigger reception monitor 112, then terminates the fifth control mode 105 and initiates the register bank switching. Thus, after the detection of the trigger 91, the selected register bank is swapped, and the functions of the analog ASIC 8 and the digitized ASIC 3 are prepared for new data acquisition. Next, the read and / or write pointers of the memory module 32 are reset, and a special comma is inserted into the 8B / 10B encoded data.
[0091] Figure 6 shows the operating parameters in different register banks for a control mode according to one embodiment of the present invention. In this embodiment, the analog front end 48 of the digitized ASIC 3 is programmed using a set of analog parameters, namely gain 121, analog filter settings, in this case bandwidth 122, circuit slew rate characteristics, and circuit bias current 123. Programming of the ADC 39 includes selecting the ADC channel 124 to operate, i.e., enabling the ADC 124, controlling the ADC resolution 125, and optionally the sampling frequency. Unused ADC channels, including the associated analog front end 48, are switched off to minimize power consumption. The functions of the digital processing 115 are programmed to select specific data, choose a specific word width 126, apply a digital gain 127, and perform specific data processing, e.g., signal clipping 129, signal filtering, and / or functions, e.g., signal summation activation 128. Mode-related programming parameters also indicate the period 116 (expressed as clock cycles) during which the ASIC will remain in a particular operating mode, as well as the timing 130 for individual delays and acquisitions. Period 116 is controlled by timing in the first control mode 101, second control mode 102, third control mode 103, and fourth control mode 104. The ASIC switches to the next control mode when the associated counter times out. The fifth mode 105 is an exception. The digitized ASIC 3 will remain in the fifth mode 105 until it receives an external trigger 91 or a reset. At this point, the digitized ASIC is configured to switch back to the first mode 101, which may belong to another register bank, and the mode cycle repeats.
[0092] Figure 7 shows a sketch of an ultrasonic system 1 according to one embodiment of the present invention. The ultrasonic system 1 comprises an ultrasonic scanning unit 2, an interface unit 6 with a master control device 7, a beamformer 62, and a battery 63. The ultrasonic system 1 further comprises a computer having a user input device 16 and a screen configured to display visualized data 14.
[0093] Figure 8 shows a schematic example of a complete RF signal data array 301, consisting of four repeating data blocks 302, each containing 4x4 samples 303. Each data block 302 has an x-axis relating to the transducer elements, i.e., four transducer elements in this case, and a t-axis relating to fast time, i.e., four discrete-time values in this example, each data block 303. Each data block 302 is subsampled by the coding unit 43 by selecting specific samples 304 to be preserved. Circles indicate preserved samples 304, and empty boxes indicate omitted samples 305. Consequently, the subsampling rate in this case is equally 1 / 4 for all data blocks, i.e., every second sample is preserved. Furthermore, one subsampling pattern is repeated for all data blocks, resulting in a uniform sampling density. This allows for efficient processing by trained algorithms, such as fully convolutional neural networks, because the subsampling pattern is the same for each data block, resulting in block-shift invariance.
[0094] Figure 9 shows a schematic structure of a decoding unit 310 in the form of an upsampling network according to one embodiment of the present invention. In particular, the upsampling network, which is a neural network, consists of a convolutional layer 307 and an upsampling layer 308. As can be seen, in this embodiment, three convolutional layers 307 and one upsampling layer 308 are arranged alternately, and the data is upsampled a total of three times. For example, data from a US frame subsampled at a subsampling rate of 1 / 4 is input and upsampled to the original frame size, i.e., at a rate of 1 / 1. This is carried out in particular progressively, especially with a coefficient of 2, in which case the x-axis and t-axis samples increase in each upsampling layer, i.e., from [Elements / 4, Time / 4] to [Elements / 2, Time / 2] and then to [Elements / 1, Time / 1], the latter being the original size.
[0095] Figure 10 shows a schematic structure of a decoding unit 310 in the form of a u-net-based neural network (NN) according to one embodiment of the present invention. This structure includes a downsampling (encoder) section in which three convolutional layers 307 and one downsampling layer 309 are alternately arranged so that the input data is downsampled a total of three times. Furthermore, this structure includes an upsampling (decoder) section following the downsampling layer in which three convolutional layers 307 and one upsampling layer 309 are alternately arranged so that the input data is upsampled a total of three times. A tensor with the original (and therefore final) size can be used as input, in which case the values at unsampled positions are set to zero, while the sampled values are set to their corresponding positions. The decoding unit 310 of this embodiment is trained to re-interpolate missing values, i.e., values set to zero. Furthermore, the neural network of the decoding unit 310 includes skip connections 319, i.e., connections that act as shortcuts and allow skipping several intermediate layers. The skip connection 319 is useful when training a neural network to mitigate the vanishing gradient problem. The weights of the decoding unit can be determined by training the NN decoding unit 310 in Figure 9 or Figure 10 together with the encoding unit 343 to reconstruct the complete RF signal data used as input, for example, as when training an autoencoder. In particular, different weights can be obtained by retraining for each selected subsampling pattern.
[0096] Experiments were conducted using a Verasonics setup combined with an L7-4 probe. The Verasonics setup captures the raw RF signal, and the sample rate converts the RF data into four samples per sound wavelength. The ultrasound probe is typically used in synthetic aperture mode, i.e., obtaining RF signals from all transducer elements, such as in plane wave imaging / multi-angle plane wave. In either case, beamforming and additional signal / image processing were performed in dedicated data processing units such as DSPs, GPUs, or AI accelerators, which can be implemented with state-of-the-art low-voltage MOSFET technology using extremely small feature sizes (e.g., FinFET technology, 5nm). Typically, analog front-end ASICs (e.g., ASIC technology with high-voltage and low-voltage MOS transistors, with large feature sizes of 180nm) and / or digital front-end / digitalized ASICs (e.g., mature low-voltage ASIC technology, 40nm) are used. Thus, the amount of computing power available to high-end GPUs or embedded GPUs in data processing units is generally much greater with more advanced CMOS process technology.
[0097] Figure 11 shows a comparison of the original and reconstructed plots of 2D RF data, where only one out of four pixels is sampled. Here, the horizontal axis represents the fast time axis corresponding to the image depth, and the vertical axis represents the 128 elements of the converter. The original RF data plot is shown in the top image, and the reconstructed version is shown in the middle image. The difference, or error, between the original and reconstructed data is shown in the bottom image. As can be seen in the bottom image, there is a visible error to some extent; that is, the signal is not zero. Therefore, this method is a lossy compression method.
[0098] Further analysis revealed that the error is larger in regions with large signal amplitudes. However, when subsampling with a coefficient of 4, reconstructing the RF signal using a neural network, and performing beamforming to obtain the resulting image, and examining the artifacts produced by this lossy compression, it was found that the difference between the beamformed image and the reconstructed image was very small, almost imperceptible to the human eye. Calculating the difference reveals that the difference between the original and reconstructed images is actually very random and has very little correlation with the image content.
[0099] It has been found that reconstruction quality is directly proportional to the number of sampling points. Therefore, distortion increases with lower data rates. As a result, fewer sampling points lead to a lower peak signal-to-noise ratio (PSRN) in the beamformed image. To compare the reconstruction results with well-known interpolation methods, the grid data interpolation method from scipy (https: / / docs.scipy.org / doc / scipy / reference / generated / scipy.interpolate.griddata.html) was applied. This method performs bicubic interpolation on an irregular grid. Subsampling was performed on the IQ-encoded RF data. With subsampling using a coefficient of 4, i.e., a subsampling rate of 1 / 4, using bicubic interpolation (20.4 dB) resulted in a decrease of approximately 6 dB in PSNR (26.5 dB) compared to using the neural network-based interpolation described above. Thus, NN-based decoding performs considerably better than bicubic interpolation.
[0100] Figure 12 shows different subsampling patterns for a single data block 302, where the subsampling rate is varied, i.e., R=1 / 2, 1 / 4, and 1 / 8. At a subsampling rate of R=1 / 2, the PSNR of the beamformed b-mode image was 42 dB; at a rate of R=1 / 4, the PSNR was 26.5 dB; and at a rate of R=1 / 8, the PSNR was 20 dB.
[0101] When the scene is stationary or moving slowly, this finding (i.e., that a certain frame will be significantly similar to the previous and next frames) can be utilized by sampling with slightly different patterns, namely phase-shifted patterns and / or interleaved patterns. FIG. 13 shows two different subsampling patterns (left and center figures), as well as an interleaved subsampling pattern within one data block 302 (right figure) where two different subsampling patterns are combined. In the left figure, samples are maintained according to the first pattern 304, and in the center figure, samples are maintained according to the second pattern 314. The subsampling rate for both patterns is 1 / 4. The first pattern 304 and the second pattern 314 taken for consecutive image frames are combined in the right figure to form an interleaved pattern with an apparent subsampling rate of 1 / 2. As explained with respect to FIG. 12, a higher subsampling rate such as R = 1 / 2, and thus presumably also this combined pattern, can result in a much better PSNR than a lower subsampling rate such as R = 1 / 4, i.e., the individual patterns. Using this finding, a more advanced reconstruction algorithm can be constructed, for example, as shown in FIG. 14. Starting from six consecutive original or complete frames 311 (F -2 , F -1 , F +0 , F +1 , F +2 , and F +3 ), the encoding unit 343 alternately applies subsampling patterns in the array of data blocks 301, as shown on the left side of FIG. 14. Next, six of these subsampled frames 312 (F -2 A [[ID=...... (The original text seems to be incomplete here, but this is the complete translation based on what's provided.) , F -1 [[ID=...... (The original text seems to be incomplete here, but this is the complete translation based on what's provided.) B , F +0 A , F +1 B [[ID=...... (The original text seems to be incomplete here, but this is the complete translation based on what's provided.) , F+2 A F +3 B ) is used as input to the neural network, for example, as an additional channel. The numbers A and B represent the first and second subsampling patterns, respectively (see the left illustration in Figure 14). The decoding unit 310, i.e., the neural network, takes the two central frames and reconstructs the frame 313 (F) from the subsampled frame 312. +0 and F +1 The NN is trained to reconstruct the entire RF signal or frame, and further improves the reconstruction by learning how to predict and use motion, i.e., how to deal with motion in the scene. The decoding unit 310 is trained to effectively achieve stream-based processing by shifting this procedure to just two frames, i.e., (F+0, F+1, F+2, F+3, F+4, F+5 in this case), applying it again to obtain the output (F+2, F+3), and continuing this process. The PSNR of the image generated from the interleaved pattern, which has an apparent subsampling rate of 1 / 2 obtained from two individual patterns, i.e., 1 / 4 rate, as shown on the right side of Figure 13, is found to be 35.8–40.4 dB. This represents a significant improvement in the individual PSNRs of patterns with a subsampling rate of 1 / 4 (e.g., the center figure in Figure 12, and the left and center figures in Figure 13), while being only slightly worse than the 42 dB achieved with a "real" subsampling rate of 1 / 2 (e.g., shown in the left figure in Figure 12).
[0102] Figure 15 shows the operating principle of an alternative decoding unit 310 comprising a first decoder 315 and a second decoder 316. Both the first and second decoders are neural networks or comprise a neural network. The first decoder 315 extracts a latent representation 317(Z) from a subsampled frame 312. -1 , Z0, and Z +1) is configured to calculate. In particular, in this embodiment, the first decoder 315 calculates the first two subsampled frames 312(F -2 A and F -1 B ) from the first latent expression 317(Z -1 ) is configured to generate such that the subsampled frames 312 have different, in particular complementary, subsampled patterns, namely patterns A and B, respectively. Similarly, the third and fourth subsampled frames (F -0 A and F +1 B A second latent representation (Z0) is generated from ) and the fifth and sixth subsampled frames (F +2 A and F +3 B ) to the third latent representation (Z +1 ) is generated. Latent representation 317 is then reconstructed frame 313(F +0 and F +1 To output ), the two frames are combined (e.g., concatenated) and decoded by a second decoder 316. The frame is divided into two subsampled frames and one latent frame, i.e., (Z0, Z +1 , Z +2 By shifting to ), the decoding unit 310 determines two of the latent frames, namely Z0 and Z +1 Reusing the second decoder 316, the next two reconstructed frames 313(F +2 and F +3 To generate ), Z is sent via the first decoder 315. +2 Only the calculation is performed. This scheme is continued to generate a series of reconstructed frames 313. The calculation of the latent representation 317 is performed only once, and they are used for multiple reconstructed frames 313, resulting in fewer calculations being required in total because it is no longer necessary to fully process the six input frames, i.e., the subsampled frames 312, each time.
[0103] The above discussion is intended merely to illustrate the present invention and should not be construed as limiting the appended claims to any particular embodiment or group of embodiments. Therefore, although the system has been described in particular detail with reference to exemplary embodiments, it should be understood that numerous modifications and alternative embodiments can be devised by those skilled in the art without departing from the broader intended spirit and scope of the system as defined in the subsequent claims. Thus, this specification and the drawings should be considered illustrative and are not intended to limit the scope of the appended claims. [Explanation of Symbols]
[0104] 1. Ultrasonic System 2. Ultrasonic scanning unit 3. Digital ASICs 6 Interface Units 7 Master control unit 8 Analog ASIC 11 Serial Link (Lane) 12 Computers / Systems 13 User Interface 14. Visualized Data 15 screens 16 User Input Devices 21 Converter Array 24 VCSEL 25 EPROM 31. Array of Analog-to-Digital Converters 32 memory modules 33 Control device 36 Transmitter 37 Amplifier 38 Anti-aliasing filter 39 Analog-to-Digital Converter 41 memory units 42 Elastic buffer 43 Encoders and Serializers 44 Transmitter / Receiver / Buffer 45. First Clock Domain 46. Second Clock Domain 47 PLL 48 Analog Front End 51 Selection of Analog Signals 52 Digitalization 53 Digital Data Selection 54 Filtering and Processing 61 Interface Unit Data Processing Unit 62 Data Processors / Beamformers 63 batteries 64 Power Management Unit (PMU) 71 Control signals 91 Triggers (Events) 92 Acquisition delay 93. Acquisition period 94 Serial Data 95. First Channel / ADC Data Acquisition 96 Further Channel / ADC Data Acquisition 97 The First Register Bank 98 The Second Register Bank 101 First control mode 102 Second control mode 103 Third control mode 104 Fourth control mode 105 Fifth control mode 110 Setting Operating Parameters 111 Timeout Monitoring 112 Trigger Receive Monitoring 113. Switching Register Banks 115 Digital Processing 116 period 121 Gain 122 bandwidth 123 Bias Enable 124 ADC 125 ADC resolution 126 word width 127 Digital Gain 128 Activating Features 129 clips 130 Timing 301 Data Block Array 302 data blocks 303 samples 304 sustained samples (first pattern) 305 Sample omitted 307 Convolutional Layer 308 upsampling layers 309 Downsampling Layers 310 Decoding Unit 311 Complete Frame 312 subsampled frames 313 Reconstructed Frame 314 sustained samples (second pattern) 315 First Decoder 316 Second Decoder 317 Latent expression 318 Combined Latent Expressions 319 Skip connection section 343 coding units
Claims
1. A digital ASIC for an ultrasonic scanning unit in an ultrasonic system, An array of analog-to-digital converters that receives ultrasonic signals acquired by an ultrasonic converter array and converts the ultrasonic signals into digitized ultrasonic data, A memory module operably coupled to the array of analog-to-digital converters and storing the digitized ultrasonic data, A component including a transceiver operably coupled to the memory module and transmitting the digitized ultrasonic data stored in the memory module to a remote interface unit, The system includes a control device that receives control signals from the interface unit, sets operating parameters for the operation of the components of the digital ASIC in response to the control signals, thereby configuring the operation of the components of the digital ASIC, and also controls the ultrasonic transducer array, The control device changes the operating parameters of the digitized ASIC and / or the ultrasonic scanning unit during an ultrasonic irradiation cycle and / or from one ultrasonic irradiation cycle to the next, wherein the ultrasonic irradiation cycle is defined by the transmission and reception of ultrasound by the ultrasonic transducer array. The control device controls the processing of the digitized ultrasonic data using the on-chip digital signal processor of the digitized ASIC. The digitized ASIC further comprises at least two register banks for storing operating parameters, wherein the digitized ASIC applies the operating parameters of a first register bank during the current ultrasonic irradiation cycle, while overwriting them with the operating parameters of a second register bank to be used during the next ultrasonic irradiation cycle and / or data processing.
2. The control device controls the processing of the digitized ultrasonic data, and the processing is performed by: Compressing the digitized ultrasonic data, Subsampling the digitized ultrasonic data, Combining digitized ultrasonic data from several transducer elements, and / or from different signal channels, and / or from different ultrasonic irradiation cycles, by weighted summation. Adjust the word width. Adjusting the digital gain, Signal clipping, Reinterpolation of the digitized ultrasonic data, A digitized ASIC according to claim 1, comprising one or more of filtering and decimation.
3. The control device controls the following operating parameters of the analog-to-digital converter during and / or between ultrasonic irradiation cycles: Operating parameters for amplification and / or filtering of the analog input signal of an analog-to-digital converter. Selection of an analog-to-digital converter to operate, Sampling frequency, Change in resolution during one ultrasonic irradiation cycle of an analog-to-digital converter, The digitized ASIC according to claim 1 or 2, which modifies one or more of the acquisition delay and / or acquisition period.
4. The digitized ASIC according to any one of claims 1 to 3, wherein the control device, in response to the control signal, selects a portion of the digitized ultrasonic data to be stored in the memory module, and / or selects a portion of the digitized ultrasonic data stored in the memory module to be transmitted to the interface unit.
5. The digitized ASIC according to any one of claims 1 to 4, wherein the digitized ASIC applies a plurality of control modes in succession, each control mode comprising a set of operating parameters, and the next control mode is activated after a predetermined time or in response to the detection of an internal or external trigger event.
6. The digitized ASIC according to any one of claims 1 to 5, wherein the memory module and the analog-to-digital converter array are clocked from a first clock domain, and the transceiver is clocked from a second clock domain.
7. An ultrasonic scanning unit comprising an ultrasonic transducer array and a digitized ASIC according to any one of claims 1 to 6.
8. The ultrasonic scanning unit according to claim 7, wherein the ultrasonic transducer array, analog ASIC, and / or the digitized ASIC of the ultrasonic scanning unit are arranged on a wearable patch.
9. A master control device for an interface unit of an ultrasonic system, wherein the interface unit is coupled to at least one ultrasonic scanning unit as described in claim 7 or 8, The master control device comprises or is part of a data processing unit and provides control signals for controlling the digitized ASIC of at least one ultrasonic scanning unit. (1) Digitized ultrasonic data received by the interface unit from the at least one ultrasonic scanning unit, and / or (2) A master control device that dynamically generates and transmits data based on the digitized ultrasonic data received from the at least one ultrasonic scanning unit by the interface unit.
10. The master control device according to claim 9, wherein the master control device generates and transmits a control signal related to the next ultrasonic irradiation cycle while acquiring data for the current ultrasonic irradiation cycle.
11. An interface unit for an ultrasonic system coupled to an ultrasonic scanning unit according to at least one claim 7 or 8, An interface unit comprising the master control device described in claim 9 or 10.
12. The interface unit according to claim 11, wherein the interface unit is coupled to a plurality of ultrasonic scanning units, and the master control device controls the plurality of ultrasonic scanning units.
13. An ultrasonic system comprising an interface unit for an ultrasonic system according to claim 11 or 12, and at least one ultrasonic scanning unit according to claim 7 or 8, operably coupled to the interface unit, The at least one ultrasonic scanning unit comprises an ultrasonic transducer array and a digital ASIC, and the digital ASIC is An array of analog-to-digital converters receives ultrasonic signals acquired by an ultrasonic transducer array and converts the ultrasonic signals into digitized ultrasonic data, A memory module operably coupled to the array of analog-to-digital converters and storing the digitized ultrasonic data, A transceiver operably coupled to the memory module and transmitting the digitized ultrasonic data stored in the memory module to a remote interface unit, A control device that receives a control signal from the interface unit, and in response to the control signal, selects a portion of the digitized ultrasonic data to be stored in the memory module, and / or selects a portion of the digitized ultrasonic data stored in the memory module to be transmitted to the interface unit, An ultrasonic system equipped with [the necessary components].
14. The aforementioned ultrasonic system, An encoding unit, which is operationally coupled to or part of the ultrasonic scanning unit, compresses the received analog or digitized ultrasonic data into a compressed ultrasonic data array. A decoding unit which is part of the data processing unit of the ultrasonic system, comprising a trained algorithm for approximately reconstructing the digitized ultrasonic data based on the compressed ultrasonic data array received from the encoding unit, The ultrasonic system according to claim 13, comprising: