Liquid dispensing device and head unit

Abstract

To provide a liquid discharge device which can improve liquid discharge characteristics.SOLUTION: A liquid discharge device includes: a discharge head which includes a driving element driven by a driving signal and discharges a liquid by driving of the driving element; a discharge control circuit which has a driving circuit for outputting the driving signal based on a fundamental driving signal including a plurality of driving data; a main control circuit for outputting a discharge control signal including the fundamental driving signal to the discharge control circuit; and a cable which communicably connects the discharge control circuit and the main control circuit, and propagates the discharge control signal therethrough, wherein the discharge control signal includes the fundamental driving signal, and a determination signal corresponding to the fundamental driving signal.SELECTED DRAWING: Figure 16

Description

Technical Field

[0001] The present invention relates to a liquid ejection device and a head unit.

Background Art

[0002] In an inkjet printer, which is an example of a liquid ejection device, a control signal generated by a control circuit or the like provided in the inkjet printer main body is propagated to a print head having nozzles from which ink is ejected, and the print head controls the ejection timing of the ink based on the input control signal, thereby printing an image, a document, or the like on a medium. This technology is known.

[0003] For example, in Patent Document 1, a head control unit provided in the main body of a liquid ejection device performs signal processing on an image signal input from an external device, outputs the signal subjected to the signal processing to a head unit, and the head unit generates a drive signal for ejecting ink from nozzles and a control signal for controlling the ejection of ink from the nozzles based on the signal input from the head control unit. Thereby, a liquid ejection device is disclosed in which the occurrence of distortion in the waveform of the drive signal for ejecting ink from the nozzles is reduced and the ejection characteristics of the ink are improved.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, from the viewpoint of further improving the ejection characteristics of the liquid from the head unit, the technology described in Patent Document 1 is not sufficient, and there is room for further improvement.

Means for Solving the Problems

[0006] One embodiment of the liquid dispensing device according to the present invention is: A discharge head includes a drive element driven by a drive signal, and the discharge head discharges liquid by driving the drive element, A discharge control circuit having a drive circuit that outputs a drive signal based on a base drive signal that includes multiple drive data, A main control circuit that outputs a discharge control signal including the aforementioned drive signal to the discharge control circuit, The discharge control circuit and the main control circuit are connected in a manner that enables communication, and the cable through which the discharge control signal is propagated, Equipped with, The discharge control signal includes the base drive signal and a determination signal corresponding to the base drive signal.

[0007] One embodiment of the head unit according to the present invention is: A discharge head includes a drive element driven by a drive signal, and the discharge head discharges liquid by driving the drive element, A drive circuit has a drive circuit that outputs a drive signal based on a base drive signal that includes multiple drive data, and a discharge control circuit that receives a discharge control signal that includes the base drive signal, Equipped with, The discharge control signal includes the base drive signal and a determination signal corresponding to the base drive signal. [Brief explanation of the drawing]

[0008] [Figure 1] This is a side view showing the structure of a liquid dispensing device. [Figure 2] This is a side view showing the surrounding structure of the printing section of a liquid dispensing device. [Figure 3] This is a front view showing the surrounding structure of the printing section of a liquid dispensing device. [Figure 4] This is a perspective view showing the surrounding structure of the printing section of a liquid dispensing device. [Figure 5] This diagram shows the functional configuration of a liquid dispensing device. [Figure 6] This is a diagram showing the configuration of the ink ejection surface. [Figure 7]It is a diagram showing the schematic configuration of the ejection unit. [Figure 8] It is a diagram showing an example of the signal waveforms of the drive signals COMA and COMB. [Figure 9] It is a diagram showing an example of the signal waveform of the drive signal VOUT. [Figure 10] It is a diagram showing the configuration of the drive signal selection circuit. [Figure 11] It is a diagram showing the decoding content in the decoder. [Figure 12] It is a diagram showing the configuration of the selection circuit. [Figure 13] It is a diagram for explaining the operation of the drive signal selection circuit. [Figure 14] It is a diagram showing an example of the relationship between the base drive signal input to the drive circuit and the drive signal output by the drive circuit. [Figure 15] It is a diagram showing an example of the configuration of the drive circuit. [Figure 16] It is a diagram for explaining the configuration and operation of the ejection control circuit. [Figure 17] It is a diagram for explaining the operation of the conversion circuit.

Embodiments for Carrying Out the Invention

[0009] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. The drawings used are for convenience of explanation. Note that the embodiments described below do not unduly limit the content of the present invention described in the claims. Also, not all of the configurations described below are essential constituent elements of the present invention.

[0010] 1. Structure of the Liquid Ejection Device The structure of the liquid ejection device 1 in this embodiment will be described with reference to FIGS. 1 to 4. FIG. 1 is a side view showing the structure of the liquid ejection device 1. As shown in FIG. 1, the liquid ejection device 1 includes a control unit 2, a feeding unit 3, a support unit 4, a conveyance unit 5, and a printing unit 6. Here, in the following description, the width direction of the liquid ejection device 1 is referred to as the X direction, the depth direction of the liquid ejection device 1 is referred to as the Y direction, the height direction of the liquid ejection device 1 is referred to as the Z direction, and the direction in which the medium P is conveyed in the liquid ejection device 1 may be referred to as the conveyance direction F. Also, in FIGS. 1 to 4, the illustrated X direction, Y direction, and Z direction are directions orthogonal to each other, and the conveyance direction F is described as a direction intersecting the X direction, but it is not limited to the case where various components included in the liquid ejection device 1 are arranged orthogonally.

[0011] The control unit 2 is fixed inside the liquid ejection device 1. The control unit 2 generates various signals for controlling the liquid ejection device 1 and outputs them to each component included in the liquid ejection device 1 including the feeding unit 3, the support unit 4, the conveyance unit 5, and the printing unit 6. That is, the control unit 2 controls each component of the liquid ejection device 1 including the feeding unit 3, the support unit 4, the conveyance unit 5, and the printing unit 6.

[0012] The feeding unit 3 has a holding member 31. The holding member 31 rotatably holds a roll body 32 around which the medium P is wound. The roll body 32 held by the holding member 31 rotates in one direction under the control of the control unit 2. Due to the rotation of this roll body 32, the medium P is unwound from the roll body 32. Then, the medium P unwound from the roll body 32 is fed to the support unit 4. That is, the feeding unit 3 feeds the medium P from the roll body 32 toward the support unit 4.

[0013] The support unit 4 has a support member 41, a support member 42, and a support member 43. The support member 41 The first guides the medium P dispensed from the dispensing unit 3 toward the support member 42. The support member 42 supports the medium P on which printing is to be performed. The support member 43 guides the printed medium P downstream in the transport direction F. These support members 41, 42, and 43 are positioned in the order of support member 41, support member 42, and support member 43, moving from the upstream side to the downstream side along the transport direction F where the medium P is transported. In other words, the support members 41, 42, and 43 support the medium P and constitute a transport path through which the medium P is transported.

[0014] The conveying unit 5 conveys the medium P along the conveying direction F. The conveying unit 5 has a rotating mechanism 51, a conveying roller 52, and a driven roller 53. The rotating mechanism 51 includes a motor, a speed reducer, etc. (not shown) that rotates under the control of the control unit 2. The rotating mechanism 51 applies the driving force generated by the rotation of the motor, speed reducer, etc. to the conveying roller 52. The conveying roller 52 is located below along the Z direction of the conveying path through which the medium P is conveyed, and the driven roller 53 is located above along the Z direction of the conveying path through which the medium P is conveyed. That is, the conveying path through which the medium P is conveyed is located between the conveying roller 52 and the driven roller 53 along the Z direction. The conveying roller 52 and the driven roller 53 grip the medium P as it is conveyed along the conveying path. When driving force is applied from the rotating mechanism 51 to the conveying roller 52 configured as described above, the conveying roller 52 rotates. As a result, the medium P, which is held between the transport roller 52 and the driven roller 53, is transported along the transport direction F while being supported by the transport path.

[0015] The printing unit 6 forms an image on the medium P by ejecting ink onto the medium P. Figure 2 is a side view showing the peripheral structure of the printing unit 6 of the liquid ejection device 1. Figure 3 is a front view showing the peripheral structure of the printing unit 6 of the liquid ejection device 1. Figure 4 is a perspective view showing the peripheral structure of the printing unit 6 of the liquid ejection device 1. As shown in Figures 2, 3, and 4, the printing unit 6 includes a carriage 71, a heat dissipation case 81, a guide member 62, and a moving mechanism 61.

[0016] The carriage 71 comprises a carriage body 72 and a carriage cover 73. The carriage body 72 has a roughly L-shaped cross-section when viewed from the X direction, and at least a portion of it is positioned to face the medium P. The carriage cover 73 is detachably attached to the carriage body 72. When the carriage cover 73 is attached to the carriage body 72, a closed space is formed in the carriage 71.

[0017] Five ejection heads 400 are located inside the enclosed space of the carriage 71. Each of the five ejection heads 400 is arranged at equal intervals along the X direction such that its lower end is exposed to the outside of the enclosed space of the carriage 71 from the underside of the carriage body 72. The lower ends of the ejection heads 400 that protrude outward from the enclosed space of the carriage 71 face the medium P. Multiple nozzles 651 for ejecting ink, an example of a liquid, are located at the lower ends of these ejection heads 400.

[0018] The heat dissipation case 81 houses the discharge control circuit board 21 and five drive circuit boards 30. The front end of the heat dissipation case 81 is fixed to the upper rear end of the carriage 71. In other words, the discharge control circuit board 21 and the five drive circuit boards 30 are mounted on the carriage 71 via the heat dissipation case 81.

[0019] A connector 29 is provided on the discharge control circuit board 21. One or more cables 82 are connected to the connector 29 to enable communication between the control unit 2 and the discharge control circuit board 21. In other words, the cables 82 enable communication between the discharge control circuit board 21, which is mounted on a carriage 71 that moves back and forth along the X direction, and the control unit 2, which is fixed to the liquid discharge device 1. That is, the cables 82 deform as the carriage 71 moves.

[0020] Five drive circuit boards 30 are arranged vertically in a row along the X direction above the ejection control circuit board 21 in the Z direction. The five drive circuit boards 30 are connected to the ejection control circuit board 21 via connectors 83, such as BtoB (Board to Board) connectors, enabling communication between them.

[0021] Connectors 84 and 85 are provided at the front end of each of the five drive circuit boards 30. Connectors 84 and 85 are exposed from the front of the heat dissipation case 81 into the enclosed space of the carriage 71. One end of cable 86 is connected to connector 84, and one end of cable 87 is connected to connector 85. In addition, a connection board 74 is provided on the upper surface of each of the five discharge heads 400 mounted on the carriage 71. The connection board 74 is electrically connected to the discharge heads 400 via connectors 75 such as BtoB connectors. Connectors 76 and 77 are also provided on the connection board 74. The other end of the aforementioned cable 86 is connected to connector 76, and the other end of the aforementioned cable 87 is connected to connector 77. In this way, the five drive circuit boards 30 and the five discharge heads 400 corresponding to the five drive circuit boards 30 are communicated with each other via cables 86 and 87.

[0022] The guide member 62 extends along the X direction and supports the carriage 71. Specifically, the guide member 62 has a guide rail portion 63 extending in the X direction at its lower front surface, and the carriage 71 has a carriage support portion 64 at its lower rear surface. The carriage support portion 64 is slidably supported on the guide rail portion 63. This allows the carriage 71 to reciprocate along the X direction relative to the guide member 62.

[0023] The moving mechanism 61 has a motor (not shown) that is driven by the control unit 2. The moving mechanism 61 controls the motor to rotate in the forward and reverse directions under the control unit 2, and converts the rotational force generated by the motor into a force that moves the carriage 71 along the X direction. As a result, the carriage 71 moves back and forth along the X direction with the five discharge heads 400, five drive circuit boards 30, and discharge control circuit board 21 mounted on it.

[0024] As described above, in the liquid dispensing device 1 of this embodiment, the control unit 2 fixed to the main body of the liquid dispensing device 1 generates various signals to control the operation of the liquid dispensing device 1. This controls the reciprocating movement of the carriage 71 along the X direction and the transport of the medium P along the transport direction F. The control unit 2 also outputs various signals via the cable 82 to the dispensing control circuit board 21 mounted on the carriage 71 to dispense ink from the dispensing head 400. Based on the various signals it receives, the dispensing control circuit board 21 controls the operation of the drive circuit board 30 and the dispensing head 400 mounted on the carriage 71.

[0025] In other words, the operation of various components, including the ejection control circuit board 21, the drive circuit board 30, and the ejection head 400 mounted on the carriage 71, is controlled by the control unit 2 along with the transport of the medium P along the transport direction F and the movement of the carriage 71 along the X direction. Specifically, the control unit 2 controls the transport of the medium P along the transport direction F in the liquid ejection device 1, the movement of the carriage 71 equipped with the ejection head 400 along the X direction, and the timing of ink ejection from the ejection head 400. As a result, the ink ejected by the ejection head 400 lands at the desired position on the medium P. Therefore, a desired image is formed on the medium P.

[0026] In Figures 1 to 4, the liquid dispensing device 1 is described as comprising five drive circuit boards 30 and five dispensing heads 400. However, the number of drive circuit boards 30 and dispensing heads 400 in the liquid dispensing device 1 is not limited to five.

[0027] 2. Functional configuration of the liquid dispensing device Next, the functional configuration of the liquid dispensing device 1 will be described. Figure 5 is a diagram showing the functional configuration of the liquid dispensing device 1. As shown in Figure 5, the liquid dispensing device 1 has a head control unit 10 and a head unit 20.

[0028] The head control unit 10 has a main control circuit 100 which constitutes at least a part of the control unit 2 described above. Such a main control circuit 100 is configured as one or more integrated circuit (IC) devices including a processor. The head control unit 10 controls the operation of the liquid dispensing device 1, including the head unit 20, based on an image signal PDATA input from an external device such as a host computer (not shown) located outside the liquid dispensing device 1.

[0029] Specifically, the main control circuit 100 generates a transmission signal Tx by applying predetermined signal processing to the image signal PDATA input from an external device (not shown). The signal processing applied by the main control circuit 100 to the image signal PDATA includes color conversion processing, which converts the color tone of the image information defined by the image signal PDATA to the color tone of the ink ejected by the liquid ejection device 1, and halftone processing, which generates a signal for each pixel that includes information on whether or not ink is ejected from that pixel, based on the image information based on the image signal PDATA. The main control circuit 100 then outputs the transmission signal Tx generated based on the image signal PDATA to the head unit 20. Note that the signal processing performed by the main control circuit 100 is not limited to color conversion processing and halftone processing, and may also include, for example, nozzle interpolation processing and interlacing processing. Furthermore, some of the above-described signal processing may be performed by the head control circuit 200, which will be described later.

[0030] Furthermore, the main control circuit 100 generates a control signal Ctrl-P to control the transport of the medium P and outputs it to the rotating mechanism 51. The rotating mechanism 51 controls the aforementioned motors, etc., according to the input control signal Ctrl-P. This controls the transport of the medium P by the transport unit 5. The main control circuit 100 also generates a control signal Ctrl-C to control the reciprocating movement of the carriage 71 and outputs it to the moving mechanism 61. The moving mechanism 61 controls the aforementioned motors, etc., according to the control signal Ctrl-C. This controls the movement of the carriage 71.

[0031] The head unit 20 has a discharge control circuit 23 and n discharge heads 400. The discharge control circuit 23 also includes a head control circuit 200 and n drive signal output circuits 300. Here, in the following description, when distinguishing between the n drive signal output circuits 300, the n drive signal output circuits 300 will be referred to as drive signal output circuits 300-1 to 300-n, and when distinguishing between the n discharge heads 400, the n discharge heads 400 will be referred to as discharge heads 400-1 to 400-n. Furthermore, in the following description, it will be assumed that drive signal output circuit 300-i (i=1 to n) and discharge head 400-i are provided in correspondence.

[0032] The ejection control circuit 23 is located on the ejection control circuit board 21 mentioned above. The ejection control circuit 23 receives the transmission signal Tx output by the main control circuit 100. Based on the transmission signal Tx output by the main control circuit 100, the ejection control circuit 23 generates print data signals SI1~SIn, latch signals LAT1~LATn, change signals CH1~CHn, base drive signals dA1~dAn, dB1~dBn, and clock signal SCK, and outputs them to the corresponding drive signal output circuits 300-1~300-n.

[0033] Furthermore, the discharge control circuit 23 generates a received signal Rx that includes a signal indicating that the transmit signal Tx input from the main control circuit 100 has been successfully received, and outputs it to the main control circuit 100. ru.

[0034] Each of the drive signal output circuits 300-1 to 300-n is provided on the aforementioned drive circuit board 30. Drive signal output circuit 300-1 includes drive circuits 310a and 310b, and a reference voltage signal output circuit 320. The base drive signal dA1 is input to drive circuit 310a. Drive circuit 310a then converts the input base drive signal dA1 from a digital to an analog signal, and generates a drive signal COMA1 by class D amplification of the converted analog signal, which is then output to the ejection head 400-1. Similarly, the base drive signal dB1 is input to drive circuit 310b. Drive circuit 310b then converts the input base drive signal dB1 from a digital to an analog signal, and generates a drive signal COMB1 by class D amplification of the converted analog signal, which is then output to the ejection head 400-1.

[0035] The reference voltage signal output circuit 320 generates a reference voltage signal VBS1, which serves as the reference for driving the piezoelectric element 60 (described later) that is driven based on the drive signals COMA1 and COMB1, and outputs it to the discharge head 400-1. This reference voltage signal VBS1 may be a DC voltage signal with a constant potential, such as 6V or 5.5V, or it may be a signal at ground potential.

[0036] In addition, the drive signal output circuit 300-1 also receives the print data signal SI1, latch signal LAT1, change signal CH1, and clock signal SCK output by the head control circuit 200. The print data signal SI1, latch signal LAT1, change signal CH1, and clock signal SCK propagate through the drive circuit board 30 on which the drive signal output circuit 300-1 is located, and are input to the ejection head 400-1.

[0037] Here, the drive signal output circuits 300-1 to 300-n have a similar configuration. Specifically, the drive signal output circuit 300-i receives the base drive signals dAi and dBi. The drive signal output circuit 300-i then generates the drive signals COMAi and COMBi and the reference voltage signal VBSi, and outputs them to the ejection head 400-i. The drive circuit board 30 on which the drive signal output circuit 300-i is provided also propagates the print data signal SIi, the latch signal LATi, the change signal CHi, and the clock signal SCK. The print data signal SIi, the latch signal LATi, the change signal CHi, and the clock signal SCK propagated through the drive circuit board 30 on which the drive signal output circuit 300-i is provided are then input to the ejection head 400-i.

[0038] The discharge head 400-1 comprises m discharge modules 410. Each of the m discharge modules 410 has a drive signal selection circuit 420 and p discharge units 600. The drive signal selection circuit 420 in each of the m discharge modules 410 is configured, for example, as an integrated circuit device. That is, the discharge head 400-1 has m drive signal selection circuits 420 and m × p discharge units 600.

[0039] Each of the m drive signal selection circuits 420 in the ejection head 400-1 receives the print data signal SI1, latch signal LAT1, change signal CH1, clock signal SCK, and drive signals COMA1 and COMB1 as inputs. The m drive signal selection circuits 420 in the ejection head 400-1 generate a drive signal VOUT by selecting or deselecting the signal waveforms of the input drive signals COMA1 and COMB1 according to the print data signal SI1 at the timings defined by the latch signal LAT1 and change signal CH1. The drive signal VOUT generated by the m drive signal selection circuits 420 in the ejection head 400-1 is supplied to one end of the piezoelectric element 60 in the corresponding ejection unit 600.

[0040] At this time, a reference voltage signal VBS1 is supplied to the other end of the m × p piezoelectric elements 60 of the discharge head 400-1. The piezoelectric elements 60 of the m × p discharge section 600 of the discharge head 400-1 are driven by drive signals COMA1, COMB1. It is driven based on the potential difference between VOUT and the reference voltage signal VBS1. As a result, an amount of ink corresponding to the drive of the piezoelectric element 60 is ejected from the corresponding ejection unit 600.

[0041] Here, the ejection heads 400-1 to 400-n all have the same configuration. Specifically, the ejection head 400-i receives the print data signal SIi, the latch signal LATi, the change signal CHi, the clock signal SCK, and the drive signals COMAi and COMBi. The m drive signal selection circuits 420 in the ejection head 400-i each generate a drive signal VOUT based on the drive signals COMAi and COMBi. The drive signals VOUT generated by the m drive signal selection circuits 420 in the ejection head 400-i are supplied to one end of the corresponding piezoelectric element 60 included in the ejection head 400-i. At this time, a reference voltage signal VBSi is supplied to the other end of the corresponding piezoelectric element 60 included in the ejection head 400-i. Therefore, the piezoelectric elements 60 included in the m ejection modules 410 in the ejection head 400-i are driven according to the potential difference between the drive signal VOUT based on the drive signals COMAi and COMBi and the reference voltage signal VBSi. As a result, an amount of ink corresponding to the drive of the piezoelectric element 60 is dispensed from the m × p dispensing units 600 contained in the m dispensing modules 410 contained in the dispensing head 400-i.

[0042] 3. Configuration and operation of the discharge head Next, the configuration and operation of the ejection head 400 will be described. In the following description, it will be assumed that the ejection head 400 receives the following inputs: print data signals SI as print data signals SI1 to SIn, latch signals LAT1 to LATn as latch signals LAT, change signals CH as change signals CH1 to CHn, clock signal SCK, drive signals COMA1 to COMAn as drive signals COMA, drive signals COMB1 to COMBn as drive signals COMB, and reference voltage signals VBS1 to VBSn as reference voltage signals VBS.

[0043] Figure 6 shows the configuration of the ink ejection surface 650 of the ejection head 400, which is provided with a plurality of nozzles 651 from which ink is ejected. As shown in Figure 6, the ejection head 400 has four ejection modules 410 arranged in a staggered pattern. Each of the four ejection modules 410 has p nozzles 651 arranged in two rows along the Y direction. That is, the ink ejection surface 650 of the ejection head 400 is provided with 4p nozzles 651. The ejection head 400 is positioned so that the ink ejection surface 650 protrudes from below the carriage 71 and faces the medium P. Note that the number of ejection modules 410 in the ejection head 400 is not limited to four.

[0044] Next, the structure of the p ejection units 600 of the ejection module 410 will be described. Figure 7 is a diagram showing the schematic configuration of the ejection unit 600. In addition to the ejection unit 600, Figure 7 also shows the reservoir 641 and the ink supply port 661.

[0045] As shown in Figure 7, the discharge unit 600 includes a piezoelectric element 60, a diaphragm 621, a cavity 631, and a nozzle 651. The diaphragm 621 is displaced in conjunction with the driving of the piezoelectric element 60, which is located on the upper surface in Figure 7. The diaphragm 621 functions as a diaphragm that expands and contracts the internal volume of the cavity 631. The cavity 631 is filled with ink. The cavity 631 functions as a pressure chamber whose internal volume changes due to the displacement of the diaphragm 621 caused by the driving of the piezoelectric element 60. The nozzle 651 is formed in the nozzle plate 632 and is an opening that communicates with the cavity 631. As the internal volume of the cavity 631 changes, the ink stored inside the cavity 631 is discharged from the nozzle 651.

[0046] The piezoelectric element 60 has a structure in which a piezoelectric body 601 is sandwiched between a pair of electrodes 611 and 612. In the piezoelectric element 601 structure, the electrodes 611, 612, and the central portion of the diaphragm 621 bend vertically in the direction shown in Figure 7 relative to the ends, depending on the potential difference between electrodes 611 and 612. Specifically, a drive signal VOUT is supplied to electrode 611, which is one end of the piezoelectric element 60, and a reference voltage signal VBS is supplied to electrode 612, which is the other end. Then, as the piezoelectric element 60 bends upward in accordance with the voltage value of the drive signal VOUT, the diaphragm 621 is displaced upward, and as a result, the internal volume of the cavity 631 expands. Therefore, the ink stored in the reservoir 641 is drawn into the cavity 631. On the other hand, as the piezoelectric element 60 bends downward in accordance with the voltage value of the drive signal VOUT, the diaphragm 621 is displaced downward, and as a result, the internal volume of the cavity 631 shrinks. Therefore, an amount of ink corresponding to the degree of reduction in the internal volume of the cavity 631 is ejected from the nozzle 651. As described above, the ejection head 400 includes a piezoelectric element 60, and ejects ink onto the medium by driving the piezoelectric element 60. Note that the piezoelectric element 60 is not limited to the illustrated structure; any type that can eject ink in accordance with the displacement of the piezoelectric element 60 is acceptable.

[0047] Here, we will explain an example of the waveforms of the drive signals COMA and COMB, which form the basis of the drive signal VOUT supplied to the electrode 611 of the piezoelectric element 60, and an example of the waveform of the drive signal VOUT.

[0048] Figure 8 shows an example of the signal waveforms of the drive signals COMA and COMB. As shown in Figure 8, the drive signal COMA is a signal waveform formed by combining a trapezoidal waveform Adp1, which is positioned during the period T1 from when the latch signal LAT rises until when the change signal CH rises, and a trapezoidal waveform Adp2, which is positioned during the period T2 from when the change signal CH rises until the latch signal LAT rises. When the trapezoidal waveform Adp1 is supplied to one end of the piezoelectric element 60, a predetermined amount of ink is ejected from the ejection unit 600 corresponding to the piezoelectric element 60. When the trapezoidal waveform Adp2 is supplied to the other end of the piezoelectric element 60, a larger amount of ink than the predetermined amount is ejected from the ejection unit 600 corresponding to the piezoelectric element 60.

[0049] Furthermore, the drive signal COMB is a signal waveform formed by continuously combining a trapezoidal waveform Bdp1, which is set to occur during period T1, and a trapezoidal waveform Bdp2, which is set to occur during period T2. When the trapezoidal waveform Bdp1 is supplied to one end of the piezoelectric element 60, no ink is ejected from the ejection unit 600 corresponding to the piezoelectric element 60. At this time, the ejection unit 600 prevents an increase in ink viscosity by vibrating the ink near the opening of the nozzle 651. Also, when the trapezoidal waveform Bdp2 is supplied to one end of the piezoelectric element 60, a predetermined amount of ink is ejected from the ejection unit 600 corresponding to the piezoelectric element 60, similar to when the trapezoidal waveform Adp1 is supplied.

[0050] In the following explanation, the amount of ink ejected from the nozzle 651 when a trapezoidal waveform Adp1 and a trapezoidal waveform Bdp2 are supplied to one end of the piezoelectric element 60 may be referred to as a small amount, and the amount of ink ejected from the nozzle 651 when a trapezoidal waveform Adp2 is supplied to one end of the piezoelectric element 60 may be referred to as a medium amount. In addition, the action of vibrating the ink near the opening of the corresponding nozzle 651 when a trapezoidal waveform Bdp1 is supplied to one end of the piezoelectric element 60 may be referred to as a micro-vibration.

[0051] In the drive signals COMA and COMB, which include the signal waveforms described above, the voltage values ​​at the start and end timings of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 are all the same, at voltage Vc. That is, each of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 is a signal waveform that starts and ends at voltage Vc. The period Ta, consisting of periods T1 and T2, corresponds to the printing period for forming dots on the medium P.

[0052] Note that in Figure 8, the case where trapezoidal waveform Adp1 and trapezoidal waveform Bdp2 are signal waveforms of the same shape. Although the example shown is provided, the trapezoidal waveform Adp1 and the trapezoidal waveform Bdp2 may have different shapes. Furthermore, while the explanation assumes that a small amount of ink is ejected from the corresponding nozzle 651 in both cases—when the trapezoidal waveform Adp1 is supplied to the piezoelectric element 60 and when the trapezoidal waveform Bdp2 is supplied to the piezoelectric element 60—the explanation is not limited to this. In other words, the signal waveforms of the drive signals COMA and COMB are not limited to the example shown in Figure 8, and various signal waveforms may be used depending on the movement speed of the carriage 71 on which the ejection head 400 is mounted, the properties of the ink ejected from the ejection head 400, the material of the medium P to which the ink lands, etc. Furthermore, the shapes of the signal waveforms of the drive signals COMA and COMB supplied to each of the multiple ejection heads 400 may be different from each other. In other words, the shapes of the signal waveforms of the drive signals COMAi and COMBi supplied to the ejection head 400-i may be different from the shapes of the signal waveforms of the drive signals COMAi+1 and COMBi+1 supplied to the ejection head 400-i+1.

[0053] Figure 9 shows an example of the signal waveform of the drive signal VOUT corresponding to the "large dot LD," "medium dot MD," "small dot SD," and "non-recorded ND" formed on the medium P.

[0054] As shown in Figure 9, the drive signal VOUT corresponding to the "large dot LD" has a signal waveform that consists of a trapezoidal waveform Adp1 placed in period T1 and a trapezoidal waveform Adp2 placed in period T2, in a continuous sequence during period Ta. When this drive signal VOUT is supplied to one end of the piezoelectric element 60, a small amount of ink and a medium amount of ink are ejected from the ejection unit 600 corresponding to the piezoelectric element 60 during period Ta. As a result, the inks land on the medium P and combine to form a large dot LD.

[0055] The drive signal VOUT corresponding to the "medium dot MD" is a signal waveform that, in period Ta, consists of a trapezoidal waveform Adp1 positioned in period T1 and a trapezoidal waveform Bdp2 positioned in period T2 in succession. When this drive signal VOUT is supplied to one end of the piezoelectric element 60, a small amount of ink is ejected twice from the ejection unit 600 corresponding to the piezoelectric element 60 in period Ta. As a result, the medium dot MD is formed on the medium P by the respective inks landing and combining.

[0056] The drive signal VOUT corresponding to the "small dot SD" is a signal waveform that, in period Ta, consists of a trapezoidal waveform Adp1 placed in period T1 and a signal waveform with a constant voltage Vc placed in period T2, in a continuous sequence. When this drive signal VOUT is supplied to one end of the piezoelectric element 60, a small amount of ink is ejected once from the ejection unit 600 corresponding to the piezoelectric element 60 in period Ta. As a result, this ink lands on the medium P and a small dot SD is formed.

[0057] The drive signal VOUT corresponding to "non-recording ND" is a signal waveform that, in period Ta, consists of a trapezoidal waveform Bdp1 positioned in period T1 and a signal waveform with a constant voltage Vc positioned in period T2, in a continuous sequence. When this drive signal VOUT is supplied to one end of the piezoelectric element 60, in period Ta, only the ink near the opening of the nozzle 651 of the ejection unit 600 corresponding to the piezoelectric element 60 vibrates, and no ink is ejected from the ejection unit 600. Therefore, no ink lands on the medium P, and no dots are formed on the medium P.

[0058] Here, a waveform with a constant voltage value Vc is the signal waveform that occurs when none of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 are selected as the drive signal VOUT, and the immediately preceding voltage Vc is held by the capacitive component of the piezoelectric element 60. In other words, when the drive signal selection circuit 420 does not select any of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 as the drive signal VOUT, the electrode 611 of the piezoelectric element 60 has A signal waveform with a constant voltage value Vc is supplied as the drive signal VOUT.

[0059] Next, the configuration and operation of the drive signal selection circuit 420, which generates the drive signal VOUT by selecting the signal waveforms of the drive signals COMA and COMB, will be described. Figure 10 is a diagram showing the configuration of the drive signal selection circuit 420. As shown in Figure 10, the drive signal selection circuit 420 includes a selection control circuit 430 and a plurality of selection circuits 440.

[0060] The selection control circuit 430 receives the print data signal SI, the latch signal LAT, the change signal CH, and the clock signal SCK. Furthermore, the selection control circuit 430 is provided with a set of a shift register (S / R) 432, a latch circuit 434, and a decoder 436, corresponding to each of the p ejection units 600. That is, the drive signal selection circuit 420 includes the same number of sets of shift registers 432, latch circuits 434, and decoders 436 as there are corresponding p ejection units 600.

[0061] The print data signal SI input to the drive signal selection circuit 420 is a signal synchronized with the clock signal SCK and is a 2p-bit signal containing 2 bits of print data [SIH,SIL] for selecting one of the following for each of the p ejection units 600: "large dot LD", "medium dot MD", "small dot SD", and "no recording ND". The print data signal SI is held in the shift register 432 for each 2 bits of print data [SIH,SIL] contained in the print data signal SI, corresponding to the ejection unit 600. Specifically, the p-stage shift registers 432 corresponding to the ejection units 600 are connected in cascaded order, and the serially input print data signals SI are sequentially transferred to subsequent stages according to the clock signal SCK. In Figure 10, the shift registers 432 are labeled as 1st stage, 2nd stage, ..., p-stage in order from the upstream side where the print data signal SI is input, in order to distinguish them.

[0062] Each of the p latch circuits 434 latches the 2-bit print data [SIH,SIL] held in each of the p shift registers 432 on the rising edge of the latch signal LAT.

[0063] Figure 11 shows the decoding process in decoder 436. Decoder 436 outputs selection signals S1 and S2 of logic levels corresponding to the latched 2-bit print data [SIH,SIL] to selection circuit 440. For example, if the latched 2-bit print data [SIH,SIL] is [1,0], decoder 436 outputs selection signal S1, which is at H,L levels during periods T1 and T2, and selection signal S2, which is at L,H levels during periods T1 and T2, to selection circuit 440.

[0064] The selection circuit 440 is provided in correspondence to each of the dispensing units 600. That is, the number of selection circuits 440 in the drive signal selection circuit 420 is the same as the number of corresponding dispensing units 600, which is p. Figure 12 is a diagram showing the configuration of the selection circuit 440 corresponding to one dispensing unit 600. As shown in Figure 12, the selection circuit 440 has inverters 442a, 442b and transfer gates 444a, 444b, which are NOT circuits.

[0065] The selection signal S1 is input to the positive control terminal of transfer gate 444a that is not marked with a circle, while being logically inverted by inverter 442a and input to the negative control terminal of transfer gate 444a that is marked with a circle. In addition, the drive signal COMA is supplied to the input terminal of transfer gate 444a. The selection signal S2 is input to the positive control terminal of transfer gate 444b that is not marked with a circle, while being logically inverted by inverter 442b and input to the negative control terminal of transfer gate 444b that is marked with a circle. In addition, the drive signal COMB is supplied to the input terminal of transfer gate 444b. Then, the output of transfer gates 444a and 444b The power terminals are connected in common and output as the drive signal VOUT.

[0066] Specifically, when a high-level selection signal S1 is input to the transfer gate 444a, the input and output terminals of the transfer gate 444a become conductive, and when a low-level selection signal S1 is input to the transfer gate 444a, the input and output terminals of the transfer gate 444a become non-conductive. Similarly, when a high-level selection signal S2 is input to the transfer gate 444b, the input and output terminals of the transfer gate 444b become conductive, and when a low-level selection signal S2 is input to the transfer gate 444b, the input and output terminals of the transfer gate 444b become non-conductive. The selection circuit 440 configured as described above controls the conduction state of the input and output terminals of the transfer gates 444a and 444b based on the logic levels of the selection signals S1 and S2, thereby selecting or deselecting the signal waveforms of the drive signals COMA and COMB supplied to the input terminals. As a result, the selection circuit 440 generates a drive signal VOUT based on the drive signals COMA and COMB, and outputs it from the drive signal selection circuit 420.

[0067] Here, we will explain the details of the operation of the drive signal selection circuit 420 using Figure 13. Figure 13 is a diagram illustrating the operation of the drive signal selection circuit 420. The print data signal SI is input serially in synchronization with the clock signal SCK and is sequentially transferred in p shift registers 432 corresponding to the ejection unit 600. When the input of the clock signal SCK stops, the p shift registers 432 hold 2 bits of print data [SIH, SIL] corresponding to each of the ejection units 600.

[0068] Then, when the latch signal LAT rises, each of the latch circuits 434 simultaneously latches the 2-bit print data [SIH,SIL] held in the corresponding shift register 432. Note that LT1, LT2, ..., LTp shown in Figure 13 represent the 2-bit print data [SIH,SIL] latched by the latch circuit 434, corresponding to the 1st, 2nd, ..., pth stage shift registers 432.

[0069] The decoder 436 outputs the logic levels of the selection signals S1 and S2 in the manner shown in Figure 11, for each of the periods T1 and T2, according to the size of the dot defined by the latched 2-bit print data [SIH, SIL].

[0070] in particular, When the input print data [SIH,SIL] is [1,1], the decoder 436 sets the logic level of selection signal S1 to H,H level during periods T1 and T2, and the logic level of selection signal S2 to L,L level during periods T1 and T2. In this case, the selection circuit 440 selects trapezoidal waveform Adp1 during period T1 and trapezoidal waveform Adp2 during period T2. As a result, the drive signal selection circuit 420 outputs the drive signal VOUT corresponding to the "large dot LD" shown in Figure 9.

[0071] Furthermore, when the input print data [SIH,SIL] is [1,0], the decoder 436 sets the logic level of selection signal S1 to H and L levels during periods T1 and T2, and the logic level of selection signal S2 to L and H levels during periods T1 and T2. In this case, the selection circuit 440 selects trapezoidal waveform Adp1 during period T1 and trapezoidal waveform Bdp2 during period T2. As a result, the drive signal selection circuit 420 outputs the drive signal VOUT corresponding to the "Middle Dot MD" shown in Figure 9.

[0072] Furthermore, when the input print data [SIH,SIL] is [0,1], the decoder 436 sets the logic level of selection signal S1 to H,L level during periods T1 and T2, and the logic level of selection signal S2 to L,L level during periods T1 and T2. In this case, the selection circuit 4 In step 40, the trapezoidal waveform Adp1 is selected during period T1, and neither the trapezoidal waveform Adp2 nor Bdp2 is selected during period T2. As a result, the drive signal VOUT corresponding to the "small dot SD" shown in Figure 9 is generated.

[0073] Furthermore, when the input print data [SIH,SIL] is [0,0], the decoder 436 sets the logic level of selection signal S1 to L,L level during periods T1 and T2, and the logic level of selection signal S2 to H,L level during periods T1 and T2. In this case, the selection circuit 440 selects the trapezoidal waveform Bdp1 during period T1, and does not select either the trapezoidal waveform Adp2 or Bdp2 during period T2. As a result, the drive signal VOUT corresponding to "Non-Recorded ND" shown in Figure 9 is generated.

[0074] As described above, the drive signal selection circuit 420 selects the waveforms of the drive signals COMA and COMB based on the print data signal SI, the latch signal LAT, the change signal CH, and the clock signal SCK, and outputs them as the drive signal VOUT. In other words, the drive signal selection circuit 420 controls the supply of the drive signals COMA and COMB to the piezoelectric element 60. As a result, the ejection head 400 ejects ink. That is, the ejection head 400 includes a piezoelectric element 60 that is driven by the drive signal VOUT based on the drive signals COMA and COMB, and ejects liquid by driving the piezoelectric element 60.

[0075] 4. Configuration and operation of the drive circuit Next, the structure and operation of the drive circuits 310a and 310b, which output drive signals COMA and COMB, will be described. Here, the drive circuit 310a, which outputs drive signal COMA, and the drive circuit 310b, which outputs drive signal COMB, have the same configuration and operation, differing only in the input signals and output signals. Therefore, in the following, only the configuration and operation of the drive circuit 310a, which outputs drive signal COMA, will be described, and the configuration and operation of the drive circuit 310b, which outputs drive signal COMB, will be omitted.

[0076] Figure 14 shows an example of the relationship between the base drive signal dA input to the drive circuit 310a and the drive signal COMA output by the drive circuit 310a. In addition, in Figure 14, the signals input to and output by the drive circuit 310b that outputs the drive signal COMB are shown together in parentheses.

[0077] As shown in Figure 14, the base drive signal dA input to the drive circuit 310a includes multiple drive data adt. The drive data adt is input to the drive circuit 310a at intervals Δt. The drive circuit 310a then outputs a signal with a voltage value defined by the drive data adt input at intervals Δt as the drive signal COMA.

[0078] Specifically, at any given time t1, when drive data adt defining voltage v1 is input to the drive circuit 310a, the drive circuit 310a outputs a drive signal COMA whose voltage value is voltage v1. Then, at time t1 following time t0, when drive data adt defining voltage v2 is input to the drive circuit 310a, the drive circuit 310a outputs a drive signal COMA whose voltage value is voltage v2. In other words, the drive circuit 310a outputs a drive signal COMA whose voltage value changes from voltage v1 to voltage v2 as time t1 transitions from time t0.

[0079] In detail, the head control circuit 200 outputs a base drive signal dA containing drive data adt at intervals Δt that are sufficiently smaller than the period Ta. Therefore, the drive circuit 310a receives drive data adt that defines the voltage value of the drive signal COMA at intervals Δt. The drive circuit 310a outputs a signal with a voltage value defined by the input drive data adt as the drive signal COMA. That is, the instantaneous voltage of the drive signal COMA output by the drive circuit 310a The pressure is defined by the drive data adt, and the signal waveform of the drive signal COMA in period Ta is defined by the base drive signal dA which includes multiple drive data adt. In other words, the drive circuit 310a outputs a drive signal COMA based on the base drive signal dA which includes multiple drive data adt.

[0080] Similarly, the head control circuit 200 outputs a base drive signal dB containing drive data bdt at intervals Δt that are sufficiently smaller than the period Ta. Therefore, the drive circuit 310b receives drive data bdt that defines the voltage value of the drive signal COMB at intervals Δt. The drive circuit 310b outputs a signal with a voltage value defined by the input drive data bdt as the drive signal COMB. In other words, the instantaneous voltage of the drive signal COMB output by the drive circuit 310b is defined by the drive data bdt, and the signal waveform of the drive signal COMB in period Ta is defined by a base drive signal dB containing multiple drive data bdt. In other words, the drive circuit 310b outputs a drive signal COMB based on a base drive signal dB containing multiple drive data bdt.

[0081] Here, the drive data adt and bdt may be data that defines the difference between the voltage values ​​of the drive signals COMA and COMB at any time t1 and the voltage values ​​of the drive signals COMA and COMB at time t2 following time t1, or they may be data that defines the voltage values ​​of the drive signals COMA and COMB themselves at any time t1.

[0082] Next, a specific example of the configuration of the drive circuit 310a will be explained using Figure 15. Figure 15 is a diagram showing an example of the configuration of the drive circuit 310a.

[0083] As shown in Figure 15, the drive circuit 310a includes an integrated circuit 500 containing a modulation circuit 510, an amplification circuit 550, a demodulation circuit 560, and feedback circuits 570, 572.

[0084] The integrated circuit 500 has multiple terminals, including terminal In, terminal Bst, terminal Hdr, terminal Sw, terminal Gvd, terminal Ldr, terminal Gnd, and terminal Vbs. The integrated circuit 500 also includes a DAC (Digital to Analog Converter) 511, a modulation circuit 510, and a gate drive circuit 520.

[0085] The DAC511 converts the drive data adt, which is the base drive signal dA that defines the waveform of the drive signal COMA, into the base drive signal ao of the analog signal. The DAC511 then outputs the base drive signal ao to the modulation circuit 510.

[0086] The modulation circuit 510 generates a modulated signal Ms by modulating the base drive signal ao and outputs it to the gate drive circuit 520. The modulation circuit 510 includes adders 512, 513, a comparator 514, an inverter 515, an integral attenuator 516, and an attenuator 517.

[0087] The integrating attenuator 516 attenuates and integrates the drive signal COMA input via terminal Vfb and supplies it to the negative input terminal of adder 512. The base drive signal ao is input to the positive input terminal of adder 512. Adder 512 subtracts the voltage value input to the negative input terminal from the voltage value input to the positive input terminal and supplies the integrated voltage signal to the positive input terminal of adder 513. Here, the maximum voltage amplitude of the base drive signal ao is, for example, about 2V, while the maximum voltage of the drive signal COMA is 25V or more, and may exceed 40V. The integrating attenuator 516 attenuates the voltage of the drive signal COMA input via terminal Vfb in order to match the amplitude ranges of both voltages when calculating the deviation.

[0088] The attenuator 517 supplies a voltage signal obtained by attenuating the high-frequency components of the drive signal COMA input via terminal Ifb to the negative input terminal of the adder 513. The voltage signal output from adder 512 is input to this. Adder 513 then outputs a voltage signal Os to comparator 514, which is obtained by subtracting the voltage signal input to the - input terminal from the voltage signal input to the + input terminal.

[0089] The comparator 514 outputs a modulated signal Ms obtained by pulse modulating the voltage signal Os output from the adder 513. Specifically, the comparator 514 outputs a modulated signal Ms that is at an H level when the voltage value of the voltage signal Os output from the adder 513 is rising and is equal to or greater than a predetermined threshold Vth1, and at an L level when the voltage value of the voltage signal Os is falling and is less than or equal to a predetermined threshold Vth2. Here, the thresholds Vth1 and Vth2 are set such that threshold Vth1 > threshold Vth2.

[0090] The modulated signal Ms output from comparator 514 is supplied to gate driver 521 included in gate drive circuit 520. Furthermore, the modulated signal Ms is also supplied to gate driver 522 included in gate drive circuit 520 after its logic level is inverted by inverter 515. In other words, the logic levels of the signal supplied to gate driver 521 and the logic levels of the signal supplied to gate driver 522 are mutually exclusive.

[0091] Here, the logic level of the signal supplied to gate driver 521 and the logic level of the signal supplied to gate driver 522 do not need to be high at the same time. For example, the timing at which the logic level of the signal supplied to gate driver 521 becomes high and the timing at which the logic level of the signal supplied to gate driver 522 becomes high may be controlled by a timing circuit (not shown). In other words, mutually exclusive relationships mean that the logic levels of the signals supplied to gate driver 521 and gate driver 522 will not be high at the same time. More specifically, this means that transistors M1 and M2 included in the amplification circuit 550, which will be described later, will not be turned on at the same time.

[0092] The gate drive circuit 520 includes gate driver 521 and gate driver 522. Gate driver 521 level-shifts the modulation signal Ms output from comparator 514 and outputs it as an amplification control signal Hgd from terminal Hdr. The high-voltage side of the power supply voltage for gate driver 521 is supplied via terminal Bst, and the low-voltage side is supplied via terminal Sw. Terminal Bst is connected to one end of capacitor C5 and the cathode of diode D1 for reverse current prevention. Terminal Sw is connected to the other end of capacitor C5, and the anode of diode D1 is connected to terminal Gvd. As a result, the anode of diode D1 is supplied with a voltage Vm from a power supply circuit (not shown). Therefore, the potential difference between terminal Bst and terminal Sw is the potential difference across capacitor C5, which is approximately equal to the voltage Vm. That is, gate driver 521 outputs an amplification control signal Hgd from terminal Hdr with a voltage value that is Vm larger than terminal Sw according to the input modulation signal Ms.

[0093] The gate driver 522 operates at a lower potential than the gate driver 521. The gate driver 522 level-shifts the signal obtained by inverting the logic level of the modulated signal Ms output from the comparator 514 by the inverter 515, and outputs it as an amplified control signal Lgd from terminal Ldr. The higher side of the power supply voltage for the gate driver 522 is supplied with voltage Vm, and the lower side is supplied with a ground potential of, for example, 0V via terminal Gnd. As a result, the gate driver 522 outputs an amplified control signal Lgd from terminal Ldr with a voltage value that is Vm larger than terminal Gnd, according to the signal obtained by inverting the logic level of the input modulated signal Ms.

[0094] The amplification circuit 550 includes transistors M1 and M2. The drain of transistor M1 is supplied with an amplification voltage VHV, which is, for example, a DC voltage of 42V. The gate of transistor M1 is electrically connected to one end of resistor R1, and the other end of resistor R1 is electrically connected to terminal Hdr of integrated circuit 500. That is, the gate of transistor M1 is supplied with an amplification control signal Hgd output from terminal Hdr of integrated circuit 500. The source of transistor M1 is electrically connected to terminal Sw of integrated circuit 500.

[0095] The drain of transistor M2 is electrically connected to terminal Sw of integrated circuit 500. That is, the drain of transistor M2 and the source of transistor M1 are electrically connected to each other. The gate of transistor M2 is electrically connected to one end of resistor R2, and the other end of resistor R2 is electrically connected to terminal Ldr of integrated circuit 500. That is, the gate of transistor M2 is supplied with the amplification control signal Lgd output from terminal Ldr of integrated circuit 500. The source of transistor M2 is supplied with ground potential.

[0096] In the amplifier circuit 550 configured as described above, when transistor M1 is controlled to be off and transistor M2 is controlled to be on, the voltage value at the node to which terminal Sw is connected becomes the ground potential. Therefore, voltage Vm is supplied to terminal Bst. On the other hand, when transistor M1 is controlled to be on and transistor M2 is controlled to be off, the voltage value at the node to which terminal Sw is connected becomes the amplified voltage VHV. Therefore, a signal with a voltage value of amplified voltage VHV + voltage Vm is supplied to terminal Bst.

[0097] In other words, the gate driver 521 that drives transistor M1 uses capacitor C5 as a floating power supply, and in accordance with the operation of transistors M1 and M2, the potential of terminal Sw changes to 0V or the amplification voltage VHV. This generates an amplification control signal Hgd where the L level is voltage Vm and the H level is the amplification voltage VHV + voltage Vm, and supplies it to the gate of transistor M1.

[0098] On the other hand, the gate driver 522 that drives transistor M2 generates an amplification control signal Lgd, whose L level is ground potential and whose H level is voltage Vm, regardless of the operation of transistors M1 and M2, and supplies it to the gate of transistor M2.

[0099] The amplifier circuit 550 described above amplifies the modulated signal Ms, which is obtained by modulating the base drive signals dA and ao between transistors M1 and M2, based on the amplification voltage VHV. As a result, an amplified modulated signal AMs is generated at the connection point where the source of transistor M1 and the drain of transistor M2 are connected in common. The amplifier circuit 550 then outputs the generated amplified modulated signal AMs to the demodulation circuit 560.

[0100] The demodulation circuit 560 generates a drive signal COMA by demodulating the amplified modulation signal AMs output by the amplification circuit 550, and outputs it from the drive circuit 310a.

[0101] The demodulation circuit 560 includes an inductor L1 and a capacitor C1. One end of the inductor L1 is connected to one end of the capacitor C1. The other end of the inductor L1 is input to the amplified modulation signal AMs, and the other end of the capacitor C1 is supplied with ground potential. In other words, the inductor L1 and capacitor C1 of the demodulation circuit 560 constitute a low-pass filter. The demodulation circuit 560 smooths the amplified modulation signal AMs output by the amplifier circuit 550 using this low-pass filter. The signal is demodulated, and the demodulated signal is output as the drive signal COMA.

[0102] The feedback circuit 570 includes resistors R3 and R4. One end of resistor R3 is supplied with the drive signal COMA, and the other end is connected to terminal Vfb and one end of resistor R4. The other end of resistor R4 is supplied with the amplification voltage VHV. As a result, the drive signal COMA, which has passed through the feedback circuit 570, is fed back to terminal Vfb in a pulled-up state with the amplification voltage VHV.

[0103] The feedback circuit 572 includes capacitors C2, C3, and C4, and resistors R5 and R6. One end of capacitor C2 is supplied with the drive signal COMA, and the other end is connected to one end of resistor R5 and one end of resistor R6. The other end of resistor R5 is supplied with ground potential. As a result, capacitor C2 and resistor R5 function as a high-pass filter. The cutoff frequency of this high-pass filter is set to, for example, approximately 9 MHz. The other end of resistor R6 is connected to one end of capacitor C4 and one end of capacitor C3. The other end of capacitor C3 is supplied with ground potential. As a result, resistor R6 and capacitor C3 function as a low-pass filter. The cutoff frequency of this low-pass filter is set to, for example, approximately 160 MHz. In other words, the feedback circuit 572, equipped with a high-pass filter and a low-pass filter, functions as a band-pass filter that allows signals in a predetermined frequency range included in the drive signal COMA to pass through.

[0104] The other end of capacitor C4 is connected to terminal Ifb of integrated circuit 500. As a result, terminal Ifb receives a signal from which the DC component of the high-frequency component of the drive signal COMA, which has passed through the feedback circuit 572 (which functions as a bandpass filter), has been cut off.

[0105] Incidentally, the drive signal COMA is a signal obtained by smoothing the amplified modulated signal AMs based on the base drive signal dA by the demodulation circuit 560. The drive signal COMA is then integrated and subtracted via terminal Vfb and fed back to the adder 512. Therefore, the drive circuit 310a self-oscillates at a frequency determined by the feedback delay and the feedback transfer function. However, because the feedback path via terminal Vfb has a large delay, the self-oscillation frequency may not be high enough to ensure sufficient accuracy of the drive signal COMA with only feedback via terminal Vfb. Therefore, in addition to the path via terminal Vfb, a path is provided via terminal Ifb to feed back the high-frequency components of the drive signal COMA, thereby reducing the overall delay of the circuit. As a result, the frequency of the voltage signal Os can be increased to a level that ensures sufficient accuracy of the drive signal COMA compared to the case where the path via terminal Ifb does not exist.

[0106] 5. Configuration and operation of the discharge control circuit As described above, the liquid ejection device 1 of this embodiment includes a head unit 20 having an ejection head 400 that ejects ink by driving a piezoelectric element 60 driven by a drive signal VOUT based on drive signals COMA and COMB, and a drive circuit 310a that outputs a drive signal COMA based on a base drive signal dA including a plurality of drive data adt, and a drive circuit 310b that outputs a drive signal COMB based on a base drive signal dB including a plurality of drive data bdt, and a head unit 20 having an ejection control circuit 23 to which a transmission signal Tx including base drive signals dA and dB is input, and a head control unit 10 having a main control circuit 100 that outputs a transmission signal Tx including base drive signals dA and dB to the ejection control circuit 23, and a cable 82 that connects the ejection control circuit 23 and the main control circuit 100 so as to be communicative and through which the transmission signal Tx is propagated. In this liquid ejection device 1, the ejection control circuit 23 receives a transmission signal Tx output by the main control circuit 100 of the head control unit 10, and controls the ejection of ink from the ejection head 400 based on the transmission signal Tx. The configuration and operation of this ejection control circuit 23 will be described below.

[0107] Figure 16 is a diagram illustrating the configuration and operation of the discharge control circuit 23. In addition to the discharge control circuit 23, Figure 16 also shows the main control circuit 100, which outputs a transmission signal Tx to the discharge control circuit 23, and the cable 82 that connects the discharge control circuit 23 and the main control circuit 100 in a communication manner.

[0108] As shown in Figure 16, the main control circuit 100 of the head control unit 10 has a conversion circuit 110 and a photoelectric conversion circuit 130, and the ejection control circuit 23 of the head unit 20 has a head control circuit 200 and drive circuits 310a and 310b. The head control circuit 200 also includes a conversion circuit 210, a photoelectric conversion circuit 230, and determination circuits 250a and 250b. The main control circuit 100 and the head control circuit 200 of the ejection control circuit 23 are communicated together by two optical cables 170a and 170b, which constitute cable 82. That is, cable 82, which communicates between the main control circuit 100 and the head control circuit 200 of the ejection control circuit 23, includes optical cables 170a and 170b, and the transmitted signal Tx and received signal Rx propagating through optical cables 170a and 170b between the main control circuit 100 and the head control circuit 200 of the ejection control circuit 23 are optical signals. For example, optical fiber cables can be used as such optical cables 170a and 170b.

[0109] The conversion circuit 110 generates an electrical image signal ePDATA1 by applying the aforementioned color conversion process and halftone processing to the image signal PDATA supplied from a host computer (not shown). In other words, the conversion circuit 110 converts the image signal PDATA to the image signal ePDATA. The conversion circuit 110 then outputs the image signal ePDATA1 to the photoelectric conversion circuit 130. The conversion circuit 110 also receives a response signal eREP2 as input. The response signal eREP2 includes a signal indicating that the image signal ePDATA1 output by the conversion circuit 110 has been successfully propagated to the corresponding head unit 20.

[0110] The photoelectric conversion circuit 130 includes an E / O circuit 131 and an O / E circuit 132. The E / O circuit 131 includes, for example, a light-emitting element, and converts an electrical signal into an optical signal. Specifically, the E / O circuit 131 receives an electrical signal, the image signal ePDATA1, from the conversion circuit 110. The E / O circuit 131 then converts the input image signal ePDATA1 into an optical signal, the image signal oPDATA, and outputs it. This image signal oPDATA output by the E / O circuit 131 propagates through the optical cable 170a and is input to the head unit 20.

[0111] The O / E circuit 132 includes, for example, a photodetector and converts the input optical signal into an electrical signal. Specifically, the O / E circuit 132 receives a response signal oREP, which is an optical signal output by the head unit 20 and propagating through the optical cable 170b. The O / E circuit 132 then converts the input response signal oREP into an electrical response signal eREP2 and outputs it to the conversion circuit 110. The conversion circuit 110 may output a new image signal ePDATA1 depending on the information contained in the input response signal eREP2, or it may inform an external device such as a host computer (not shown) of the information contained in the response signal eREP2.

[0112] Here, the image signal oPDATA, which is an optical signal output by the E / O circuit 131, corresponds to the transmission signal Tx mentioned above, and the response signal oREP, which is an optical signal input to the O / E circuit 132, corresponds to the reception signal Rx mentioned above.

[0113] The photoelectric conversion circuit 230 included in the head control circuit 200 includes an O / E circuit 231 and an E / O circuit 232. The O / E circuit 231 includes a photodetector and other components and converts an optical signal into an electrical signal. Specifically, the O / E circuit 231 receives an image signal oPDATA propagating through the optical cable 170a. The O / E circuit 231 then converts the input optical signal oPDATA into an electrical signal, which is an image signal ePDATA2, and outputs it to the conversion circuit 210. .

[0114] The E / O circuit 232 includes, for example, a light-emitting element, and converts an electrical signal into an optical signal. Specifically, the E / O circuit 232 receives a response signal eREP1, which is an electrical signal, from the conversion circuit 210. The E / O circuit 232 then converts the input response signal eREP1 into a response signal oREP, which is an optical signal, and outputs it. This response signal oREP output by the E / O circuit 232 propagates through the optical cable 170b and is input to the O / E circuit 132. In other words, the output control circuit 23 of the head unit 20 includes a photoelectric conversion circuit 230 that converts an optical signal into an electrical signal.

[0115] The conversion circuit 210 converts the image signal ePDATA2 into a parallel signal including a print data signal SI, a latch signal LAT, a change signal CH, a clock signal SCK, a base drive signal dA, dB, and judgment data chka, chkb. In other words, the conversion circuit 210 in the ejection control circuit 23 includes a deserializer.

[0116] Specifically, the conversion circuit 210 generates a print data signal SI, a latch signal LAT, a change signal CH, a clock signal SCK, a base drive signal dA, dB, and a determination data chka, chkb by deserializing the input image signal ePDATA2. In other words, the image signal ePDATA2 input to the conversion circuit 210 serially includes the print data signal SI, a latch signal LAT, a change signal CH, a clock signal SCK, a base drive signal dA, dB, and a determination data chka, chkb. Therefore, the optical signal image signal oPDATA, which corresponds to the electrical signal image signal ePDATA2, and the electrical signal image signal ePDATA1, which corresponds to the optical signal image signal oPDATA, are also signals that serially include the print data signal SI, a latch signal LAT, a change signal CH, a clock signal SCK, a base drive signal dA, dB, and a determination data chka, chkb.

[0117] In other words, the conversion circuit 110 included in the main control circuit 100 performs predetermined signal processing on various signals, including the image signal PDATA, to generate a print data signal SI, a latch signal LAT, a change signal CH, a clock signal SCK, a base drive signal dA, dB, and judgment data chka, chkb. It then outputs a signal containing the print data signal SI, latch signal LAT, change signal CH, clock signal SCK, base drive signals dA, dB, and judgment data chka, chkb in serial format as the image signal ePDATA1. In other words, the conversion circuit 110 includes a serializer.

[0118] In this embodiment, it is explained that the image signals ePDATA1, oPDAT, and ePDATA2 all serially include the print data signal SI, latch signal LAT, change signal CH, clock signal SCK, base drive signals dA, dB, and determination data chka, chkb. However, at least one of the print data signal SI, latch signal LAT, change signal CH, and clock signal SCK may not be included in the image signals ePDATA1, oPDAT, and ePDATA2. In this case, any of the print data signal SI, latch signal LAT, change signal CH, and clock signal SCK that are not included in the image signals ePDATA1, oPDAT, and ePDATA2 may be input to the head unit 20 as an electrical signal.

[0119] The conversion circuit 210 outputs the print data signal SI, latch signal LAT, change signal CH, and clock signal SCK from the signals generated by deserialization to the corresponding ejection head 400 via the corresponding drive circuit board 30.

[0120] Furthermore, the conversion circuit 210 deserializes the signal, and from that, it deserializes the drive data adt included in the base drive signal dA and the determination data chka corresponding to the drive data adt. The following is output to the determination circuit 250a at intervals Δt. The determination circuit 250a determines whether the input drive data adt is normal or not based on the input determination data chka. Specifically, the determination data chka is checksum data corresponding to the drive data adt, and the determination circuit 250a calculates the checksum of the input drive data adt and compares the calculated checksum with the determination data chka. In this way, the determination circuit 250a determines whether the input drive data adt is normal or not.

[0121] The determination circuit 250a outputs the input drive data adt to the drive circuit 310a if the input drive data adt is normal, and outputs an abnormal signal Era to the conversion circuit 210 if the input drive data adt is not normal. As a result, the drive circuit 310a generates a drive signal COMA based on the normal drive data adt and outputs it to the discharge head 400.

[0122] Similarly, the conversion circuit 210 outputs the drive data bdt included in the base drive signal dB from the signal generated by deserialization, and the judgment data chkb corresponding to the drive data bdt, to the judgment circuit 250b at intervals Δt. The judgment circuit 250b determines whether the input drive data bdt is normal or not based on the input judgment data chkb. Specifically, the judgment data chkb is checksum data corresponding to the drive data bdt, and the judgment circuit 250b calculates the checksum of the input drive data bdt and compares the calculated checksum with the judgment data chkb. In this way, the judgment circuit 250b determines whether the input drive data bdt is normal or not.

[0123] The determination circuit 250b then outputs the input drive data bdt to the drive circuit 310b if the input drive data bdt is normal, and outputs an abnormal signal Erb to the conversion circuit 210 indicating that the input drive data bdt is abnormal if the input drive data bdt is abnormal. As a result, the drive circuit 310a generates a drive signal COMB based on the normal drive data bdt and outputs it to the discharge head 400.

[0124] In other words, the discharge control circuit 23 includes a determination circuit 250a that determines whether multiple drive data adt are normal using determination data chka, and a determination circuit 250b that determines whether multiple drive data bdt are normal using determination data chkb.

[0125] The conversion circuit 210 generates a response signal eREP1 based on the abnormal signal Era input from the determination circuit 250a and the abnormal signal Erb input from the determination circuit 250b, and outputs it to the E / O circuit 232 included in the photoelectric conversion circuit 230. The E / O circuit 232 converts the input response signal eREP1 into a response signal oREP, which is an optical signal, and outputs it. The response signal oREP output by the E / O circuit 232 then propagates through the optical cable 170b and is input to the O / E circuit 132.

[0126] Here, the judgment data chka,chkb may include an authentication code in place of, or in addition to, the checksum data described above. Furthermore, the judgment circuits 250a,250b may have a function to correct errors in the drive data adt,bdt based on the input judgment data chka,chkb.

[0127] Next, we will explain specific examples of the operation of the determination circuits 250a and 250b. Note that determination circuits 250a and 250b perform similar operations, differing only in the input and output signals. Therefore, the operation of determination circuit 250a will be explained below, and the operation of determination circuit 250b will be omitted.

[0128] Figure 17 is a diagram illustrating the operation of the determination circuit 250a. The determination circuit 250a is, The circuit has a memory area not shown, such as a register. The memory area of ​​this determination circuit 250a stores input drive data adt-in, output drive data adt-out, and an error flag Chkf. At a predetermined timing before the image signal ePDATA2 is input to the conversion circuit 210, the determination circuit 250a initializes the input drive data adt-in, output drive data adt-out, and error flag Chkf stored in the memory area (step S110). Here, along with the initialization of the input drive data adt-in and output drive data adt-out, the determination circuit 250a holds data for outputting the voltage value of voltage Vc as a drive signal COMA, for example, as input drive data adt-in and output drive data adt-out, and along with the initialization of the error flag Chkf, it holds the error flag Chkf as "0".

[0129] Subsequently, the determination circuit 250a acquires the drive data adt output by the conversion circuit 210 and the determination data chka corresponding to the acquired drive data adt. That is, the determination circuit 250a acquires the drive data adt and the determination data chka from the conversion circuit 210 (step S120). Then, the determination circuit 250a holds the acquired drive data adt as input drive data adt-in (step S130). Here, for the determination circuit 250a to acquire from the conversion circuit 210 includes the conversion circuit 210 outputting the desired data to the determination circuit 250a at a predetermined timing.

[0130] Subsequently, the determination circuit 250a performs a determination to determine whether the input drive data adt-in is normal or not (step S140). That is, the determination circuit 250a determines whether the drive data adt held as the input drive data adt-in is normal or not. Specifically, as described above, the determination data chka includes the checksum data of the corresponding drive data adt, and the determination circuit 250a calculates the checksum of the drive data adt held as the input drive data adt-in, and then compares the calculated checksum with the determination data chka to determine whether the input drive data adt-in is normal or not.

[0131] Then, if the determination circuit 250a determines that the input drive data adt-in is normal (Y in step S140), that is, if the determination circuit 250a determines that the drive data adt held as the input drive data adt-in is normal, the determination circuit 250a sets the abnormality flag Chkf to "0" (step S150) and holds the input drive data adt-in as the output drive data adt-out (step S160). In other words, if the determination circuit 250a determines that the drive data adt is normal, it holds the drive data adt that would otherwise be held as the input drive data adt-in as the output drive data adt-out.

[0132] Then, the determination circuit 250a outputs the output drive data adt-out as drive data adt (step S170). That is, the input drive data adt is output to the drive circuit 310a. As a result, the drive circuit 310a outputs a drive signal COMA based on the drive data adt input to the determination circuit 250a. In other words, if the determination circuit 250a determines that the input drive data adt among multiple drive data adts is normal, the drive circuit 310a outputs a drive signal COMA based on the input drive data adt.

[0133] Subsequently, the determination circuit 250a determines whether the drive data adt following the drive data adt output to the drive circuit 310a is held in the conversion circuit 210 (step S180). If the drive data adt following the input drive data adt is held in the conversion circuit 210 (Y in step S180), the determination circuit 250a obtains the new drive data adt and the determination data chka corresponding to the new drive data adt from the conversion circuit 210 (step S120), and continues the above process. Meanwhile, the input drive data adt If the subsequent drive data adt is not held in the conversion circuit 210 (N in step S180), the determination circuit 250a stops operation.

[0134] Furthermore, if the determination circuit 250a determines that the input drive data adt-in is not normal (N in step S140), that is, if the determination circuit 250a determines that the drive data adt held as the input drive data adt-in is not normal, the determination circuit 250a determines whether the abnormality flag Chkf it holds is "0" or not (step S190).

[0135] Then, if the abnormality flag Chkf held by the determination circuit 250a is "0" (Y in step S190), the determination circuit 250a sets the abnormality flag Chkf to "1" (step S200), generates an abnormality signal Era indicating that the input drive data adt is abnormal, and outputs it to the conversion circuit 210 (step S210). Then, the determination circuit 250a outputs the output drive data adt-out it holds as drive data adt (step S170).

[0136] At this time, the output drive data adt-out held by the determination circuit 250a holds the drive data adt that was most recently determined to be normal among the drive data adt input to the determination circuit 250a. In other words, if the determination circuit 250a determines that the input drive data adt-in is not normal, the determination circuit 250a outputs the drive data adt that was most recently determined to be normal to the drive circuit 310a. As a result, the drive circuit 310a outputs a drive signal COMA based on the drive data adt that was most recently determined to be normal. In other words, if the determination circuit 250a determines that the input drive data adt is not normal among multiple drive data adt, the drive circuit 310a outputs a drive signal COMA based on the drive data adt that was most recently determined to be normal.

[0137] Furthermore, if the abnormality flag Chkf held by the determination circuit 250a is "1" (N in step S190), the determination circuit 250a determines that the drive data adt input to the determination circuit 250a is continuously abnormal. Then, if continuously abnormal drive data adt is input to the determination circuit 250a, it generates an abnormality signal Era containing information to stop the output of the drive signal COMA in the drive circuit 310a and outputs it to the conversion circuit 210 (step S220), and also outputs drive data adt to the drive circuit 310a to cause the drive circuit 310a to stop the output of the drive signal COMA (step S230), and then stops operation.

[0138] In other words, if the determination circuit 250a determines that any drive data adt following a drive data adt that has been determined to be abnormal among multiple drive data adts is also abnormal, the drive circuit 310a stops outputting the drive signal COMA, and the determination circuit 250a outputs an abnormal signal Era containing abnormal information.

[0139] Here, the drive data adt that causes the drive circuit 310a to stop operation may be, for example, data that causes the drive circuit 310a to output a signal with a constant voltage value at voltage Vc as the drive signal COMA, or it may be data that causes the drive circuit 310a to sweep the voltage value of the signal output as the drive signal COMA toward voltage Vc, and then output a signal with a constant voltage value at voltage Vc after reaching voltage Vc.

[0140] As described above, the determination circuit 250a determines whether the drive data adt input from the conversion circuit 210 is normal or not based on the determination data chka. If the input drive data adt is normal, the determination circuit 250a outputs the input drive data adt to the drive circuit 310a. If the input drive data adt is not normal, it outputs the drive data adt that was most recently determined to be normal to the drive circuit 310a. Furthermore, if the determination circuit 250a determines that the input drive data adt is continuously not normal, The operation of the drive circuit 310a is stopped. In the example of the operation of the determination circuit 250a shown in Figure 17, the operation of the drive circuit 310a is stopped when the input drive data adt is determined to be abnormal two times in a row. However, this is not the only option, and the operation of the drive circuit 310a may be stopped when the input drive data adt is determined to be abnormal a predetermined number of times or more in a row.

[0141] Here, the piezoelectric element 60 is an example of a driving element, and the driving signal VOUT that drives the piezoelectric element 60 is an example of a driving signal. Furthermore, considering that the driving signal VOUT is generated by selecting the signal waveforms of the driving signals COMA and COMB, the driving signals COMA and COMB are also examples of driving signals. Furthermore, at least one of the print data signal SI, latch signal LAT, change signal CH, and clock signal SCK is an example of a print signal; judgment data chka and chkb corresponding to the base drive signals dA and dB are an example of a judgment signal; multiple drive data adt and bdt included in the base drive signals dA and dB that form the basis of drive signals COMA and COMB are an example of multiple drive data; and a transmission signal Tx that serially includes the base drive signals dA and dB that form the basis of drive signals COMA and COMB, the judgment data chka and chkb corresponding to the base drive signals dA and dB, the print data signal SI, latch signal LAT, change signal CH, and clock signal SCK, and an image signal oPDATA which is an optical signal corresponding to the transmission signal Tx is an example of an output control signal. Furthermore, among the multiple drive data adt and bdt included in the base drive signals dA and dB, the drive data adt and bdt that the determination circuits 250a and 250b determine to be normal are examples of first drive data. Following the drive data adt and bdt corresponding to the first drive data, the drive data adt and bdt that the determination circuits 250a and 250b determine to be abnormal are examples of second drive data. Following the drive data adt and bdt corresponding to the second drive data, the drive data adt and bdt that the determination circuits 250a and 250b determine to be abnormal are examples of third drive data.

[0142] 6. Effects As described above, in the liquid ejection device 1 of this embodiment, the transmission signal Tx output by the head control unit 10 and input to the head unit 20, and the image signal oPDATA which is an optical signal corresponding to the transmission signal Tx, include base drive signals dA, dB which are the basis for the drive signals COMA, COMB that drive the piezoelectric element 60 included in the ejection head 400, and determination data chka, chkb corresponding to the base drive signals dA, dB. As a result, the head unit 20 can determine whether the signal input from the main control circuit 100 is normal in the ejection control circuit 23, which is provided in the head unit 20 and is communicated with the main control circuit 100 via cable 82, thereby reducing the risk of unintended signals being supplied to each component of the head unit 20. In other words, the risk of malfunction in the head unit 20 due to the supply of unintended signals is reduced, and as a result, the ink ejection characteristics from the head unit 20 are further improved.

[0143] Furthermore, in the liquid ejection device 1 of this embodiment, the control unit 2, which includes a head control unit 10 having a main control circuit 100, is fixed inside the liquid ejection device 1, and the ejection head 400 included in the head unit 20 and the ejection control circuit 23 are mounted on the carriage 71. That is, the ejection control circuit 23 is located closer to the ejection head 400 than the main control circuit 100. This shortens the propagation path of the drive signals COMA and COMB output by the ejection control circuit 23, and as a result, the risk of distortion occurring in the signal waveforms of the drive signals COMA and COMB is reduced. Therefore, the accuracy of the drive signal VOUT supplied to the piezoelectric element 60 is improved, and the driving accuracy of the piezoelectric element 60 is improved. Thus, the ejection accuracy of the ink ejected by the driving of the piezoelectric element 60 is improved.

[0144] However, because the discharge control circuit 23 is located closer to the discharge head 400 than the main control circuit 100, the discharge control circuit 23 and the main control circuit 100 are connected in a way that allows them to communicate with each other. As a result, the length of the cable 82 through which the transmission signal Tx propagates becomes longer. That is, the length of cable 82 becomes longer than the length of the propagation path through which the drive signals COMA and COMB propagate from the ejection control circuit 23 to the ejection head 400. Therefore, there is a risk that noise may be superimposed on the transmission signal Tx in cable 82, potentially degrading the ink ejection characteristics from the head unit 20. However, in this embodiment, the liquid ejection device 1 can reduce the risk of malfunction in the head unit 20 due to unintended signals being supplied to the head unit 20. Therefore, even when the length of cable 82 is longer than the length of the propagation path through which the drive signals COMA and COMB propagate from the ejection control circuit 23 to the ejection head 400, the risk of deterioration in the ink ejection characteristics from the head unit 20 can be reduced.

[0145] Furthermore, by using the optical image signal oPDATA as the transmission signal Tx propagated through cable 82, the data transfer rate between the ejection control circuit 23 and the main control circuit 100 can be increased, enabling faster ink ejection speeds in the liquid ejection device 1 and the head unit 20. In other words, the image formation speed on the medium P can be increased. However, when the optical image signal oPDATA is used as the transmission signal Tx propagated through cable 82, the ejection control circuit 23 and the main control circuit 100 need to convert the electrical signal to an optical signal and then convert the optical signal back to an electrical signal.

[0146] In other words, the number of signal conversions performed by the discharge control circuit 23 and the main control circuit 100 increases. Therefore, when the image signal oPDATA, which is an optical signal, is used as the transmission signal Tx propagated through cable 82, the possibility of errors occurring in the transmission signal Tx and the image signal oPDATA increases due to the signal conversion. In contrast, in the liquid discharge device 1 of this embodiment, the risk of malfunction in the head unit 20 due to the supply of unintended signals can be reduced, and therefore, as the transmission signal Tx propagated through cable 82, Even when using the optical image signal oPDATA, the risk of deterioration in ink ejection characteristics from the head unit 20 can be reduced.

[0147] Furthermore, in the liquid dispensing device 1 and head unit 20 of this embodiment, the dispensing control circuit 23 has determination circuits 250a and 250b that determine whether the input base drive signals dA and dB are normal based on a plurality of drive data adt and bdt included in the base drive signals dA and dB, and determination data chka and chkb. The determination circuits 250a and 250b output the input drive data adt and bdt to the drive circuits 310a and 310b if the input drive data adt and bdt are normal, and do not output the input drive data adt and bdt to the drive circuits 310a and 310b if the input drive data adt and bdt are not normal, but instead output the drive data adt and bdt that was most recently determined to be normal to the drive circuits 310a and 310b.

[0148] This improves the reliability of the drive data adt and bdt input to the drive circuits 310a and 310b, and improves the waveform accuracy of the drive signals COMA and COMB output by the drive circuits 310a and 310b. As a result, the drive accuracy of the piezoelectric element 60 driven by the drive signals COMA and COMB is improved, and the ejection accuracy of the ink ejected by the drive of the piezoelectric element 60 is further improved.

[0149] Furthermore, if the continuously input drive data adt and bdt are not normal, the judgment circuits 250a and 250b will not output the input drive data adt and bdt to the drive circuits 310a and 310b, but will instead output drive data adt and bdt to the drive circuits 310a and 310b to stop the operation of the drive circuits 310a and 310b. This reduces the risk of continuous malfunction in the drive circuits 310a and 310b.

[0150] Although embodiments have been described above, the present invention is not limited to these embodiments. Furthermore, it is possible to implement the invention in various forms without departing from its essence. For example, the above embodiments can be combined as appropriate.

[0151] The present invention includes configurations that are substantially identical to those described in the embodiments (for example, configurations with the same function, method, and result, or configurations with the same purpose and effect). Furthermore, the present invention includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. Furthermore, the present invention includes configurations that produce the same effects or achieve the same purpose as those described in the embodiments. Furthermore, the present invention includes configurations that add known technology to the configurations described in the embodiments.

[0152] The following conclusions can be drawn from the embodiments described above.

[0153] One embodiment of a liquid dispensing device is: A discharge head includes a drive element driven by a drive signal, and the discharge head discharges liquid by driving the drive element, A discharge control circuit having a drive circuit that outputs a drive signal based on a base drive signal that includes multiple drive data, A main control circuit that outputs a discharge control signal including the aforementioned drive signal to the discharge control circuit, The discharge control circuit and the main control circuit are connected in a manner that enables communication, and the cable through which the discharge control signal is propagated, Equipped with, The discharge control signal includes the base drive signal and a determination signal corresponding to the base drive signal.

[0154] In this liquid dispensing device, the dispensing control signal input to the dispensing control circuit, which has a drive circuit that outputs a drive signal based on a base drive signal containing multiple drive data, is input from the main control circuit. The dispensing control signal input to the dispensing control circuit includes a base drive signal and a determination signal corresponding to the base drive signal. As a result, the dispensing control circuit can determine whether the input dispensing control signal is normal or not based on the base drive signal and the determination signal. This improves the accuracy of the drive signal output by the drive circuit based on the base drive signal containing multiple drive data. And as the accuracy of the drive signal improves, the drive accuracy of the drive element driven by the drive signal improves, and the dispensing accuracy of the liquid dispensed from the dispensing head by the drive of the drive element improves.

[0155] In one embodiment of the liquid dispensing device, The length of the cable may be longer than the length of the propagation path through which the drive signal is transmitted from the discharge control circuit to the discharge head.

[0156] With this liquid dispensing device, even if the length of the cable is longer than the length of the propagation path through which the drive signal propagates from the dispensing control circuit to the dispensing head, the dispensing control circuit can determine whether the input dispensing control signal is normal or not based on the base drive signal and the determination signal. As a result, the accuracy of the drive signal output by the drive circuit based on the base drive signal, which includes multiple drive data, is improved, and the drive accuracy of the drive element driven by the drive signal is also improved. Consequently, the dispensing accuracy of the liquid dispensed from the dispensing head by the drive of the drive element is improved.

[0157] In one embodiment of the liquid dispensing device, The aforementioned discharge control signal is an optical signal, The cable may include an optical cable through which the optical signal propagates.

[0158] According to this liquid dispensing device, even if the dispensing control signal is an optical signal and the cable includes an optical cable that propagates the optical signal, the dispensing control circuit will not malfunction if the input dispensing control signal is normal. Because it is possible to determine whether or not something is present based on the base drive signal and the determination signal, the accuracy of the drive signal output by the drive circuit based on the base drive signal which contains multiple drive data is improved, and the drive accuracy of the drive element driven by the drive signal is also improved. As a result, the discharge accuracy of the liquid discharged from the discharge head by the drive of the drive element is improved.

[0159] In one embodiment of the liquid dispensing device, The discharge control signal may serially include the base drive signal, the determination signal, and a print signal that defines the amount of liquid discharged from the discharge head.

[0160] According to this liquid dispensing device, the dispensing control signal serially includes a base drive signal, a determination signal, and a printing signal that specifies the amount of liquid to be dispensed from the dispensing head. This reduces the number of cables that connect the dispensing control circuit and the main control circuit for communication, and as a result, the liquid dispensing device 1 can be made smaller.

[0161] In one embodiment of the liquid dispensing device, The discharge control circuit may include a determination circuit that determines whether the plurality of drive data are normal or not using the determination signal.

[0162] In one embodiment of the liquid dispensing device, If the determination circuit determines that the first drive data among the plurality of drive data is normal, the drive circuit may output the drive signal based on the first drive data.

[0163] In one embodiment of the liquid dispensing device, If the determination circuit determines that the second drive data following the first drive data is not normal among the plurality of drive data, the drive circuit may output the drive signal based on the first drive data.

[0164] In these liquid dispensing devices, if the judgment circuit determines that the input drive data is normal, the drive circuit outputs a drive signal based on the input drive data. If the judgment circuit determines that the input drive data is abnormal, the drive circuit outputs a drive signal based on the most recently determined normal drive data. In other words, the risk of distortion in the signal waveform of the drive signal output by the drive circuit due to unintended drive data being input to the drive circuit is reduced. Consequently, the risk of a decrease in the drive accuracy of the drive element driven by the drive signal is reduced, and as a result, the risk of a decrease in the discharge accuracy of the liquid discharged from the discharge head by the drive of the drive element is reduced.

[0165] In one embodiment of the liquid dispensing device, If the determination circuit determines that the third drive data following the second drive data among the plurality of drive data is abnormal, the drive circuit may stop outputting the drive signal, and the determination circuit may output abnormal information.

[0166] According to this head unit, if the judgment circuit determines that the input drive data is abnormal multiple times in a row, the drive circuit stops outputting the drive signal. This reduces the risk of unintended distortion occurring in the signal waveform of the drive signal output by the drive circuit, and as a result, the risk of unintended stress being continuously applied to the drive element to which the drive signal is supplied.

[0167] One form of head unit is: A discharge head includes a drive element driven by a drive signal, and the discharge head discharges liquid by driving the drive element, The drive circuit has a drive signal that outputs a drive signal based on a base drive signal that includes multiple drive data, A discharge control circuit to which the discharge control signal including the aforementioned drive signal is input, Equipped with, The discharge control signal includes the base drive signal and a determination signal corresponding to the base drive signal.

[0168] According to this head unit, the discharge control signal input to the discharge control circuit, which has a drive circuit that outputs a drive signal based on a base drive signal containing multiple drive data, includes a base drive signal and a determination signal corresponding to the base drive signal. As a result, the discharge control circuit can determine whether the input discharge control signal is normal or not based on the base drive signal and the determination signal. This improves the accuracy of the drive signal output by the drive circuit based on a base drive signal containing multiple drive data. And as the accuracy of the drive signal improves, the drive accuracy of the drive element driven by the drive signal improves, and the discharge accuracy of the liquid discharged from the discharge head by the drive of the drive element improves.

[0169] In one embodiment of the head unit, The discharge control circuit may include a determination circuit that uses the determination signal to determine whether the plurality of drive data are normal or not.

[0170] In one embodiment of the head unit, If the determination circuit determines that the first drive data among the plurality of drive data is normal, the drive circuit may output the drive signal based on the first drive data.

[0171] In one embodiment of the head unit, If the determination circuit determines that the second drive data following the first drive data is not normal among the plurality of drive data, the drive circuit may output the drive signal based on the first drive data.

[0172] According to this head unit, if the judgment circuit determines that the input drive data is normal, the drive circuit outputs a drive signal based on the input drive data. If the judgment circuit determines that the input drive data is abnormal, the drive circuit outputs a drive signal based on the most recently determined normal drive data. In other words, the risk of distortion in the signal waveform of the drive signal output by the drive circuit due to unintended drive data being input to the drive circuit is reduced. Consequently, the risk of a decrease in the drive accuracy of the drive elements driven by the drive signal is reduced, and as a result, the risk of a decrease in the discharge accuracy of the liquid discharged from the discharge head due to the drive of the drive elements is reduced.

[0173] In one embodiment of the head unit, If the determination circuit determines that the third drive data following the second drive data among the plurality of drive data is abnormal, the drive circuit may stop outputting the drive signal, and the determination circuit may output abnormal information.

[0174] According to this head unit, if the judgment circuit determines that the input drive data is abnormal multiple times in a row, the drive circuit stops outputting the drive signal. This reduces the risk of unintended distortion occurring in the signal waveform of the drive signal output by the drive circuit, and as a result, the risk of unintended stress being continuously applied to the drive element to which the drive signal is supplied.

[0175] In one embodiment of the head unit, The aforementioned discharge control signal is an optical signal, The discharge control circuit may include a photoelectric conversion circuit that converts the optical signal into an electrical signal.

[0176] According to this head unit, even when the discharge control signal is an optical signal, the discharge control circuit can determine whether the input discharge control signal is normal or not based on the base drive signal and the determination signal. As a result, the accuracy of the drive signal output by the drive circuit based on the base drive signal which includes multiple drive data is improved, and the drive accuracy of the drive element driven by the drive signal is also improved. Consequently, the discharge accuracy of the liquid discharged from the discharge head by the drive of the drive element is improved.

[0177] In one embodiment of the head unit, The discharge control circuit may include a deserializer. [Explanation of symbols]

[0178] 1...Liquid dispensing device, 2...Control unit, 3...Feeding unit, 4...Support unit, 5...Conveying unit, 6...Printing unit, 10...Head control unit, 20...Head unit, 21...Dispensing control circuit board, 23...Dispensing control circuit, 29...Connector, 30...Drive circuit board, 31...Holding member, 32...Roll body, 41, 42, 43...Support members, 51...Rotating mechanism, 52...Conveying roller, 53...Driven roller, 60...Piezoelectric element, 61...Moving mechanism, 62...Guide member, 63...Guide rail section, 64...Carriage support section, 71...Carriage, 72...Carriage body, 73...Carriage cover, 74...Connection board, 75,76,77...Connectors, 81...Heat dissipation case, 82...Cable, 83,84,85...Connectors, 86,87...Cable, 100...Main control circuit, 110...Conversion circuit, 130...Photoelectric conversion circuit, 131...E / O circuit, 132...O / E circuit, 170a,170b...Optical cable, 200...Head control circuit, 210...Conversion circuit, 230...Photoelectric conversion circuit, 231...O / E circuit, 232...E / O circuit, 250a,250b...Determination circuit, 300...Drive signal output circuit, 310a, 310b…Drive circuit, 320…Reference voltage signal output circuit, 400…Discharge head, 410…Discharge module, 420…Drive signal selection circuit, 430…Selection control circuit, 432…Shift register, 434…Latch circuit, 436…Decoder, 440…Selection circuit, 442a,442b…Inverter, 444a,444b…Transfer gate, 500…Integrated circuit, 510…Modulation circuit, 512,513…Adder, 514…Comparator, 515…Inverter, 516…Integrating attenuator, 517…Attenuator, 520…Gate drive Eve circuit, 521, 522… Gate driver, 550… Amplifier circuit, 560… Demodulation circuit, 570, 572… Feedback circuit, 600… Discharge section, 601… Piezoelectric element, 611, 612… Electrode, 621… Diaphragm, 631… Cavity, 632… Nozzle plate, 641… Reservoir, 650… Ink ejection surface, 651… Nozzle, 661… Ink supply port, C1, C2, C3, C4, C5… Capacitors, D1… Diode, L1… Inductor, M1, M2… Transistor, P… Medium, R1, R2, R3, R4, R5, R6… Resistors

Claims

1. A discharge head includes a drive element driven by a drive signal, and the discharge head discharges liquid by driving the drive element, A discharge control circuit having a drive circuit that outputs a drive signal based on a base drive signal that includes multiple drive data, A main control circuit that outputs a discharge control signal including the aforementioned drive signal to the discharge control circuit, The discharge control circuit and the main control circuit are connected in a manner that enables communication, and the cable through which the discharge control signal is propagated, Equipped with, The discharge control signal includes the base drive signal and a determination signal corresponding to the base drive signal. The discharge control circuit has a determination circuit that determines whether the plurality of drive data are normal or not using the determination signal, If the determination circuit determines that the first drive data among the plurality of drive data is normal, the drive circuit outputs the drive signal based on the first drive data. If the determination circuit determines that the second drive data following the first drive data is not normal among the plurality of drive data, the drive circuit outputs the drive signal based on the first drive data. A liquid dispensing device characterized by the following features.

2. The length of the cable is longer than the length of the propagation path through which the drive signal is transmitted from the discharge control circuit to the discharge head. The liquid dispensing device according to feature 1.

3. The aforementioned discharge control signal is an optical signal, The cable includes an optical cable through which the optical signal propagates. The liquid dispensing device according to feature 1 or 2.

4. The discharge control signal comprises the base drive signal, the determination signal, and the liquid from the discharge head. The print signal specifying the output volume is included serially. A liquid dispensing device according to any one of claims 1 to 3.

5. If the determination circuit determines that the third drive data following the second drive data among the plurality of drive data is abnormal, the drive circuit stops outputting the drive signal, and the determination circuit outputs abnormal information. A liquid dispensing device according to any one of claims 1 to 4.

6. A discharge head includes a drive element driven by a drive signal, and the discharge head discharges liquid by driving the drive element, A drive circuit has a drive circuit that outputs a drive signal based on a base drive signal that includes multiple drive data, and a discharge control circuit that receives a discharge control signal that includes the base drive signal, Equipped with, The discharge control signal includes the base drive signal and a determination signal corresponding to the base drive signal. The discharge control circuit includes a determination circuit that determines whether the plurality of drive data are normal or not using the determination signal, If the determination circuit determines that the first drive data among the plurality of drive data is normal, the drive circuit outputs the drive signal based on the first drive data. If the determination circuit determines that the second drive data following the first drive data is not normal among the plurality of drive data, the drive circuit outputs the drive signal based on the first drive data. A head unit characterized by the following features.

7. If the determination circuit determines that the third drive data following the second drive data among the plurality of drive data is abnormal, the drive circuit stops outputting the drive signal, and the determination circuit outputs abnormal information. The head unit according to feature 6.

8. The aforementioned discharge control signal is an optical signal, The discharge control circuit includes a photoelectric conversion circuit that converts the optical signal into an electrical signal. The head unit according to claim 6 or 7, characterized by the features described above.

9. The discharge control circuit includes a deserializer, The head unit according to any one of claims 6 to 8, characterized by the features described herein.

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