Electronic circuit module

Abstract

An electronic circuit module (10) is for mounting on a motherboard (91) having an electric power supply source. The electronic circuit module (10) comprises: a photoelectric conversion unit (40) that performs conversion between an optical signal and an electric signal; a processor unit (20) that performs a computing process using the electric signal; an electric power conversion unit (50) that converts and supplies electric power from the electric power supply source to the photoelectric conversion unit (40) and the processor unit (20); and a package substrate (60) on which the photoelectric conversion unit (40), the processor unit (20), and the electric power conversion unit (50) are mounted. The photoelectric conversion unit (40), the processor unit (20), and the electric power conversion unit (50) are connected only through a conductor pattern formed on the package substrate (60).

Description

Technical Field

[0004] ,

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[0001] The present invention relates to an electronic circuit module including an optoelectronic conversion unit that converts an optical signal and an electrical signal, a processor unit, and a power conversion unit.

Background Art

[0002] Patent Document 1 describes a circuit unit including an optical package element, a processor element, an electronic device, an electronic circuit element, and an interposer. The optical package element and the processor element are connected through an electronic device or an electronic circuit element in the interposer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a conventional device as shown in Patent Document 1, the information transmission efficiency and the power supply efficiency may not be sufficient. [[ID=​​​​​​​​​An electronic circuit module according to an embodiment of this invention is an electronic circuit module mounted on a motherboard equipped with a power supply source. The electronic circuit module comprises a photoelectric conversion unit that converts optical signals to electrical signals, a processor unit that performs arithmetic processing using electrical signals, a power conversion unit that converts power from the power supply source to supply power to the photoelectric conversion unit and the processor unit, and a package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted. The photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through conductive patterns formed on the package substrate.

[0007] In this configuration, the photoelectric conversion unit and the processor unit are connected solely by conductive patterns formed on the package substrate, without going through the motherboard. This improves information transmission efficiency. Furthermore, since the photoelectric conversion unit, processor unit, and power conversion unit are connected solely by conductive patterns formed on the package substrate, without going through the motherboard, the power supply efficiency from the power conversion unit to the photoelectric conversion unit and processor unit is improved. [Effects of the Invention]

[0008] This invention makes it possible to achieve high information transmission efficiency and high power supply efficiency. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 is a functional block diagram showing an example of the circuit configuration of an electronic circuit module according to the first embodiment. [Figure 2] Figure 2 is a side view showing the configuration of an electronic circuit module according to the first embodiment. [Figure 3] Figure 3 is a side view showing the electronic circuit module according to the first embodiment mounted on a motherboard. [Figure 4] Figure 4 is a side view showing the configuration of an electronic circuit module according to the second embodiment. [Figure 5]Figure 5 is a side view showing the configuration of an electronic circuit module according to the third embodiment. [Figure 6] Figure 6(A) is a plan view showing the configuration of an electronic circuit module according to the fourth embodiment, Figure 6(B) is a side view taken along line A-A' of Figure 6(A), and Figure 6(C) is a cross-sectional view taken along line B-B' of Figure 6(A). [Figure 7] Figure 7(A) shows an example of a wiring pattern for a data communication system in an electronic circuit module according to the fourth embodiment, and Figure 7(B) shows an example of a wiring pattern for a power supply system in an electronic circuit module according to the fourth embodiment. [Figure 8] Figure 8(A) is a plan view showing the configuration of an electronic circuit module according to the fifth embodiment, Figure 8(B) is a diagram showing an example of a wiring pattern for a data communication system in an electronic circuit module according to the fifth embodiment, and Figure 8(C) is a diagram showing an example of a wiring pattern for a power supply system in an electronic circuit module according to the fifth embodiment. [Figure 9] Figure 9(A) is a plan view showing the configuration of an electronic circuit module according to the sixth embodiment, Figure 9(B) is a diagram showing an example of a wiring pattern for a data communication system in an electronic circuit module according to the sixth embodiment, and Figure 9(C) is a diagram showing an example of a wiring pattern for a power supply system in an electronic circuit module according to the sixth embodiment. [Figure 10] Figure 10(A) is a plan view showing the configuration of an electronic circuit module according to the seventh embodiment, Figure 10(B) is a diagram showing an example of a wiring pattern for a data communication system in an electronic circuit module according to the seventh embodiment, and Figure 10(C) is a diagram showing an example of a wiring pattern for a power supply system in an electronic circuit module according to the seventh embodiment. [Figure 11] Figures 11(A) and 11(B) are plan views showing the configuration of an electronic circuit module according to the eighth embodiment. [Figure 12]FIG. 12(A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the eighth embodiment, and FIG. 12(B) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the eighth embodiment. [Figure 13] FIG. 13(A) is a plan view showing the configuration of an electronic circuit module according to the ninth embodiment, and FIGS. 13(B) and 13(C) are diagrams showing different examples of the C-C' cross section of FIG. 13(A). [Figure 14] FIG. 14(A) is a diagram showing an example of a wiring pattern of a data communication system in an electronic circuit module according to the ninth embodiment, and FIG. 14(B) is a diagram showing an example of a wiring pattern of a power supply system in an electronic circuit module according to the ninth embodiment.

MODE FOR CARRYING OUT THE INVENTION

[0010] [First Embodiment] An electronic circuit module according to the first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a functional block diagram showing an example of the circuit configuration of an electronic circuit module according to the first embodiment. FIG. 2 is a side view showing the configuration of an electronic circuit module according to the first embodiment. FIG. 3 is a side view showing a state where an electronic circuit module according to the first embodiment is mounted on a motherboard. In FIGS. 2 and 3, the wiring patterns formed in the substrate are also shown by solid lines.

[0011] (Circuit Configuration of Electronic Circuit Module 10) As shown in FIG. 1, the electronic circuit module 10 includes a processor unit 20, a memory 30, an optoelectronic conversion unit 40, and a power conversion unit 50.

[0012] The processor unit 20 is connected to the memory 30 through an information processing bus Lpm. The processor unit 20 is connected to the optoelectronic conversion unit 40 through a data transmission line Lop. The optoelectronic conversion unit 40 is connected to the outside through an optical waveguide OTL.

[0013] The processor unit 20 performs predetermined arithmetic processing based on the electrical signal input from the photoelectric conversion unit 40 through the data transmission line Lop. At this time, the processor unit 20 performs arithmetic processing using the memory 30 connected by the information processing bus Lpm.

[0014] The processor unit 20 outputs the arithmetic result as an electrical signal and inputs it to the photoelectric conversion unit 40 through the data transmission line Lop.

[0015] The photoelectric conversion unit 40 converts the optical signal input from the optical waveguide OTL into an electrical signal and outputs it to the processor unit 20 through the data transmission line Lop. Further, the photoelectric conversion unit 40 converts the electrical signal input from the processor unit 20 through the data transmission line Lop into an optical signal and outputs it to the outside through the optical waveguide OTL.

[0016] The power conversion unit 50 is connected to the processor unit 20 through the processor power supply line Lpwp, connected to the memory 30 through the memory power supply line Lpwm, and connected to the photoelectric conversion unit 40 through the photoelectric conversion unit power supply line Lpwo.

[0017] The power conversion unit 50 converts the input power from the power supply of the external (motherboard described later) into power for the processor unit 20, the memory 30, and the photoelectric conversion unit 40 and supplies it to them.

[0018] In this way, by using optical signals, the information transmission speed can be increased compared to the case where everything is an electrical signal.

[0019] (Configuration of the electronic circuit module 10) As shown in FIG. 2, the electronic circuit module 10 includes a processor unit 20, a memory 30, a photoelectric conversion unit 40, a power conversion unit 50, and a package substrate 60.

[0020] The processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50 are each mounted electronic components, comprising a housing of a predetermined shape and a plurality of terminal conductors. Functional parts for realizing each unit are formed in the housing. The plurality of terminal conductors are arranged in a predetermined pattern on the bottom surface of the housing.

[0021] The package substrate 60 comprises a first substrate 61 and a second substrate 62. The first substrate 61 and the second substrate 62 are both flat plates. For example, the planar area of ​​the second substrate 62 (area viewed in the z-axis direction in Figures 2 and 3) is smaller than the planar area of ​​the first substrate 61. Furthermore, the planar areas of the first substrate 61 and the second substrate 62 are smaller than the planar area of ​​the motherboard 91 on which the electronic circuit module 10 is mounted.

[0022] The processor unit 20, memory 30, and photoelectric conversion unit 40 are mounted on the surface of the second substrate 62.

[0023] The data transmission line Loop connecting the processor unit 20 and the photoelectric conversion unit 40 is composed solely of conductive patterns formed on the second substrate 62. In other words, the data transmission line Loop is formed without passing through the motherboard 91 on which the electronic circuit module 10 is mounted. This allows the data transmission line Loop to be shortened. Therefore, the transmission loss and delay of the data transmission line Loop can be reduced.

[0024] Similarly, the information processing bus Lpm connecting the processor unit 20 and the memory 30, like the data transmission line Lop, is composed solely of conductive patterns formed on the second substrate 62. In other words, the information processing bus Lpm is constructed without passing through the motherboard 91 on which the electronic circuit module 10 is mounted. This allows the information processing bus Lpm to be shortened. Therefore, the transmission loss and delay of the information processing bus Lpm can be reduced.

[0025] Furthermore, it is preferable that the processor unit 20 and the photoelectric conversion unit 40 are located in close proximity. The distance between the processor unit 20 and the photoelectric conversion unit 40 should be as short as possible. For example, it is preferable that the processor unit 20 and the photoelectric conversion unit 40 be located as close together as possible in terms of the accuracy of pattern formation on the second substrate 62 and the mounting accuracy of the processor unit 20 and the photoelectric conversion unit 40. For example, the distance should be less than or equal to the length of the longer side of the processor unit 20 or the photoelectric conversion unit 40, and more preferably less than or equal to half the length of the longer side or the length of the shorter side. If the processor unit 20 and the photoelectric conversion unit 40 are square in plan view, the distance should be less than or equal to one side, preferably less than or equal to half the length of one side.

[0026] In this way, by shortening the physical distance between the processor unit 20 and the photoelectric conversion unit 40, it becomes easier to shorten the data transmission line loop.

[0027] Furthermore, it is preferable that the conductor pattern constituting the data transmission line Loop is formed on the surface of the second substrate 62. As a result, the data transmission line Loop does not have a portion that extends in the thickness direction of the second substrate 62, thereby reducing transmission loss and delay.

[0028] Furthermore, the data transmission line Loop should connect the processor unit 20 and the photoelectric conversion unit 40 by the shortest distance in a plan view. Specifically, for example, the conductor patterns constituting the data transmission line Loop should each be conductor patterns that connect the terminals of the processor unit 20 and the terminals of the photoelectric conversion unit 40 in a straight line in a plan view. This can further reduce the transmission loss and delay of the data transmission line Loop.

[0029] Furthermore, it is preferable that the processor unit 20 and the memory 30 are located in close proximity, similar to the relationship between the processor unit 20 and the photoelectric conversion unit 40, and that the information processing bus Lpm is also short, similar to the data transmission line Lop. This helps to suppress transmission loss and transmission delay between the processor unit 20 and the memory 30.

[0030] Furthermore, it is preferable that the second substrate 62 has a high wiring density of conductor patterns. This allows for an increase in the number of conductor patterns per unit area. Consequently, the degree of freedom in the wiring patterns of the processor unit 20, the photoelectric conversion unit 40, the data transmission line Lop, and the information processing bus Lpm connecting the processor unit 20 and the memory 30 is improved, making it easier to form shorter conductor patterns to connect them.

[0031] Furthermore, the second substrate 62 is made of a material that has lower high-frequency signal loss than the motherboard 91 (see Figure 3) on which the electronic circuit module 10 is mounted (for example, a material mainly composed of resin such as Si or a dielectric with a low dielectric loss tangent). As a result, transmission loss due to the data transmission line Lop and transmission loss due to the information processing bus Lpm are further suppressed.

[0032] Furthermore, the second substrate 62 has a power supply line Lpwp for the processor, a power supply line Lpwm for the memory, and a power supply line Lpwo for the photoelectric conversion unit. The power supply line Lpwp for the processor, the power supply line Lpwm for the memory, and the power supply line Lpwo for the photoelectric conversion unit penetrate the second substrate 62 in the thickness direction. The power supply line Lpwp for the processor connects the electrodes on the surface of the second substrate 62 on which the processor unit 20 is mounted to the power supply terminals for the processor on the back of the second substrate 62. The power supply line Lpwm for the memory connects the electrodes on the surface of the second substrate 62 on which the memory 30 is mounted to the power supply terminals for the memory on the back of the second substrate 62. The power supply line Lpwo for the photoelectric conversion unit connects the electrodes on the surface of the second substrate 62 on which the photoelectric conversion unit 40 is mounted to the power supply terminals for the photoelectric conversion unit on the back of the second substrate 62.

[0033] The power supply lines Lpwp for the processor, Lpwm for the memory, and Lpwo for the photoelectric conversion unit are preferably as straight as possible. In other words, they are preferably formed such that most of them extend in the thickness direction of the second substrate 62. Since the thickness of the second substrate 62 is significantly smaller than that of the other dimensions, this configuration allows the power supply distance to be shortened. Therefore, a decrease in power supply efficiency is suppressed. Furthermore, the portions of the processor power supply line Lpwp, memory power supply line Lpwm, and photoelectric conversion unit power supply line Lpwo that extend in the thickness direction are preferably larger in cross-sectional area than the data transmission line Loop and the information processing bus Lpm. This improves power supply efficiency.

[0034] The second substrate 62 and the power conversion unit 50 are mounted on the surface of the first substrate 61.

[0035] Multiple power supply lines Lpw are formed on the first substrate 61. The multiple power supply lines Lpw are conductive patterns and are connected to electrodes on which the power conversion unit 50 is mounted, electrodes on which the processor power supply terminals of the second substrate 62 are mounted, electrodes on which the memory power supply terminals are mounted, and electrodes on which the photoelectric conversion unit power supply terminals are mounted, respectively.

[0036] With this configuration, the power supply from the power conversion unit 50 to the processor unit 20 can be completed by a conductor pattern (power supply line Lpw) on the first substrate 61, which is smaller than the motherboard 91, and a conductor pattern (processor power supply line Lpwp) extending in the thickness direction of the second substrate 62. As a result, the electronic circuit module 10 can supply power to the processor unit 20 with high efficiency.

[0037] Similarly, the power supply from the power conversion unit 50 to the photoelectric conversion unit 40 can be completed by a conductor pattern (power supply line Lpw) in the first substrate 61, which is smaller than the motherboard 91, and a conductor pattern (power supply line Lpwo for the photoelectric conversion unit) extending in the thickness direction of the second substrate 62. As a result, the electronic circuit module 10 can supply power to the photoelectric conversion unit 40 with high efficiency.

[0038] Similarly, power supply from the power conversion unit 50 to the memory 30 can be completed by a conductor pattern (power supply line Lpw) in the first substrate 61, which is smaller than the motherboard 91, and a conductor pattern (power supply line Lpwm for memory) extending in the thickness direction of the second substrate 62. As a result, the electronic circuit module 10 can supply power to the memory 30 with high efficiency.

[0039] Furthermore, the second substrate 62 and the power conversion unit 50 are mounted adjacent to each other. In other words, no other mounted electronic components are mounted between the second substrate 62 and the power conversion unit 50. Also, the second substrate 62 and the power conversion unit 50 are located in close proximity. For example, the distance between the processor unit 20 and the power conversion unit 50 on the second substrate 62 is preferably less than or equal to the length of the longer side of the processor unit 20 and the power conversion unit 50, and more preferably less than or equal to half of the longer side or the length of the shorter side. If the processor unit 20 and the power conversion unit 50 are square when viewed from above, the distance is preferably less than or equal to one side, preferably less than or equal to half of one side.

[0040] This shortens the power supply distance from the power conversion unit 50 to the processor unit 20, memory 30, and photoelectric conversion unit 40, thereby suppressing a decrease in power supply efficiency.

[0041] The first substrate 61 is formed from a material that is easier to obtain and manufacture compared to the second substrate 62.

[0042] Multiple external connection terminals BP61 are formed on the back surface of the first substrate 61.

[0043] The width and cross-sectional area of ​​the multiple power supply lines Lpw are preferably as large as possible. This suppresses a decrease in power supply efficiency. In particular, in this configuration, the first substrate 61 does not have any data communication conductor patterns, and only the multiple power supply lines Lpw are formed on it. Therefore, the wiring and shape of the multiple power supply lines Lpw can be easily determined. That is, the multiple power supply lines Lpw can be made wider and have a smaller cross-sectional area and a shorter length than when they are formed on the same substrate (e.g., a motherboard) as the data communication conductor patterns, as in the conventional method. Therefore, the electronic circuit module 10 can realize power supply lines Lpw with high power supply efficiency.

[0044] In particular, the processor unit 20 requires low voltage and high current. Therefore, by shortening the power supply line Lpw from the power conversion unit 50 to the processor unit 20 and the power supply line Lpwp for the processor, the electronic circuit module 10 can supply power more efficiently.

[0045] Furthermore, since the power supply line Lpw extends linearly from the power conversion unit 50 to the processor unit 20 along a direction perpendicular to the thickness direction of the first substrate 61, and the processor power supply line Lpwp extends linearly in the thickness direction of the second substrate 62, the line connecting the power conversion unit 50 and the processor unit 20 is the shortest possible distance. As a result, power transmission loss can be further suppressed, and the electronic circuit module 10 can supply power with higher efficiency.

[0046] A power input line 652 is formed on the first substrate 61. The power input line 652 connects the electrode on which the power conversion unit 50 is mounted to the external connection terminal BP61 for power input. The power input line 652 is shaped to extend in the thickness direction of the first substrate 61. It is preferable that the power input line 652 be as straight as possible. In other words, it is preferable that they are formed so that the majority of them extend in the thickness direction of the first substrate 61. Since the thickness of the first substrate 61 is significantly smaller than other dimensions, this configuration allows the power supply distance to be shortened. Therefore, a decrease in the efficiency of external power input is suppressed. Furthermore, it is preferable that the portion of the power input line 652 that extends in the thickness direction has a large cross-sectional area. This improves the efficiency of external power input.

[0047] With this configuration, the electronic circuit module 10 can achieve high information transmission efficiency and high power supply efficiency.

[0048] The electronic circuit module 10 with this configuration is then mounted on the motherboard 91, as shown in Figure 3. The motherboard 91 is equipped with a power supply that converts power from a commercial power supply or the like into DC power, and power is supplied from this power supply to the electronic circuit module 10 through the power line 92P of the motherboard 91.

[0049] Furthermore, the surface of the motherboard 91 has multiple mounting lands 93 formed therein, and a socket mechanism 94 is provided.

[0050] Multiple external connection terminals BP61 of the electronic circuit module 10 contact multiple mounting lands 93 of the motherboard 91. In this state, the socket mechanism 94 fixes the electronic circuit module 10 by pressing it against the surface of the motherboard 91. This ensures a stable electrical and mechanical connection between the electronic circuit module 10 and the motherboard 91.

[0051] It is also possible to mount the electronic circuit module 10 to the motherboard 91 using a conductive bonding material such as solder. However, by providing the socket mechanism 94 described above, the installation and replacement of the electronic circuit module 10 become easier. Furthermore, although this embodiment shows a configuration using the socket mechanism 94, other structures can be used as long as they allow the electronic circuit module 10 to be detachably fixed to the motherboard 91.

[0052] Furthermore, in the electronic circuit module 10, the processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50 are mounted using solder or the like, but a detachable structure using a socket mechanism 94 or the like can also be adopted for these components. Moreover, a detachable structure using a socket mechanism 94 or the like can also be adopted for the structure that fixes the second board 62 to the first board 61.

[0053] Furthermore, in the above-described embodiment, the processor unit 20 and the photoelectric conversion unit 40 are shown to be connected only by a conductor pattern within the electronic circuit module 10. However, the processor unit 20 may also be connected, together with the photoelectric conversion unit 40 within the electronic circuit module 10, to another photoelectric conversion unit implemented on the motherboard 91 in a complementary manner.

[0054] Similarly, in the above-described embodiment, the processor unit 20 and the power conversion unit 50 were shown to be connected only by a conductive pattern within the electronic circuit module 10. However, the processor unit 20 may be connected, together with the power conversion unit 50 in the electronic circuit module 10, to another power conversion unit implemented on the motherboard 91 in a complementary manner.

[0055] Furthermore, in the above-described embodiment, the photoelectric conversion unit 40 and the power conversion unit 50 are shown to be connected only by a conductor pattern within the electronic circuit module 10. However, the photoelectric conversion unit 40 may be connected together with the power conversion unit 50 within the electronic circuit module 10 to another power conversion unit implemented on the motherboard 91 in a complementary manner.

[0056] [Second Embodiment] An electronic circuit module according to a second embodiment of the present invention will be described with reference to the figures. Figure 4 is a side view showing the configuration of the electronic circuit module according to the second embodiment.

[0057] As shown in Figure 4, the electronic circuit module 10A according to the second embodiment differs from the electronic circuit module 10 according to the first embodiment in that it is equipped with a heat dissipation mechanism. The other components of the electronic circuit module 10A are the same as those of the electronic circuit module 10, and a description of the similar parts will be omitted.

[0058] The electronic circuit module 10A includes a heat sink 71 and a thermal conductive gel 710. The heat sink 71 is a flat plate made of a highly thermally conductive material such as metal. When viewed from above, the heat sink 71 overlaps the processor unit 20, the memory 30, the photoelectric conversion unit 40, and the power conversion unit 50.

[0059] The heat sink 71 is connected to the processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50 via a thermal conductive gel 710.

[0060] With this configuration, the electronic circuit module 10 can effectively dissipate heat from the processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50 to the outside.

[0061] The thermal conductive gel 710 can be omitted. However, even if the top surface of the heat dissipation target is not flush (for example, if the top surface of the power conversion unit 50 in Figure 4 is lower than the other top surfaces), a common heat sink 71 can be connected to multiple units via a high thermal conduction path.

[0062] Furthermore, although the above description uses a common heat sink 71 for the processor unit 20, memory 30, photoelectric conversion unit 40, and power conversion unit 50, each unit may be provided with its own individual heat sink. If individual heat sinks are provided, it is preferable that the processor unit 20 and power conversion unit 50, which generate particularly high amounts of heat, be provided with at least one heat sink.

[0063] However, by using a common heat sink 71, the number of components in the electronic circuit module 10A can be reduced, making it easier to increase the heat dissipation area.

[0064] [Third Embodiment] An electronic circuit module according to a third embodiment of the present invention will be described with reference to the figures. Figure 5 is a side view showing the configuration of the electronic circuit module according to the third embodiment.

[0065] As shown in Figure 5, the electronic circuit module 10B according to the third embodiment differs from the electronic circuit module 10 according to the first embodiment in the configuration of its power supply system. The other configurations of the electronic circuit module 10B are the same as those of the electronic circuit module 10, and the explanation of the similar parts will be omitted.

[0066] The electronic circuit module 10B includes a package substrate 60B. The package substrate 60B includes a first substrate 61B and a second substrate 62.

[0067] The first substrate 61B is made of the same material as the first substrate 61 according to the first embodiment. The planar area of ​​the first substrate 61B is approximately the same as the planar area of ​​the second substrate 62. Multiple power conversion units 51B are mounted on the back surface of the first substrate 61B, that is, the surface of the first substrate 61B that faces the surface on which the second substrate 62 is mounted.

[0068] Multiple power conversion units 51B are provided according to the power supply target. The electronic circuit module 10B includes a power conversion unit 51B for the memory 30 and power conversion units 51B for the processor unit 20 and the photoelectric conversion unit 40.

[0069] An external power connector 52 is mounted on the back of the first circuit board 61B. An external power cable PL is connected to the external power connector 52. As a result, the electronic circuit module 10B is powered from an external source.

[0070] Here, viewing the electronic circuit module 10B from a plan view, the area where the multiple power conversion units 51B are located overlaps with the area where the processor unit 20, memory 30, and photoelectric conversion unit 40 are located.

[0071] Therefore, the electronic circuit module 10B can have a smaller planar area compared to the electronic circuit module 10.

[0072] Note that the configuration in Figure 5 shows a configuration in which the device is connected to the motherboard using a connector or the like. However, it is also possible to adopt a structure in which multiple terminal electrodes are formed on the side edge of the package substrate 60B, and these multiple terminal electrodes are inserted into the connector on the motherboard.

[0073] The electronic circuit module 10B includes a heat sink 71B, a heat sink 72B, a thermal conductive gel 710B, and a thermal conductive gel 720B.

[0074] The heat sink 71B is thermally connected to the processor unit 20, memory 30, and photoelectric conversion unit 40 via the thermal conductive gel 710B. This allows the processor unit 20, memory 30, and photoelectric conversion unit 40 to efficiently dissipate heat.

[0075] The heat sink 72B is thermally connected to multiple power conversion units 51B via a thermal conductive gel 720B. This allows the multiple power conversion units 51B to efficiently dissipate heat.

[0076] Furthermore, in this configuration, the processor unit 20, which generates relatively high heat, and the multiple power conversion units 51B are each provided with separate heat sinks 71B and 72B. This allows the electronic circuit module 10B to achieve even higher heat dissipation efficiency. In addition, the heat sinks 71B and 72B are located on different sides via the package substrate 60B. This makes it difficult for the heat from the heat sink 71B and the heat sink 72B to combine, improving the heat dissipation effect of the electronic circuit module 10B.

[0077] Furthermore, since the electronic circuit module 10B does not need to be mounted on the motherboard 91, it can accommodate a wider range of usage scenarios.

[0078] [Fourth Embodiment] An electronic circuit module according to a fourth embodiment of the present invention will be described with reference to the figures. Figure 6(A) is a plan view showing the configuration of the electronic circuit module according to the fourth embodiment, Figure 6(B) is a side view taken along line A-A' of Figure 6(A), and Figure 6(C) is a cross-sectional view taken along line B-B' of Figure 6(A). Figure 7(A) is a diagram showing an example of the wiring pattern of the data communication system in the electronic circuit module according to the fourth embodiment, and Figure 7(B) is a diagram showing an example of the wiring pattern of the power supply system in the electronic circuit module according to the fourth embodiment.

[0079] Note that the components in each embodiment from this embodiment (the fourth embodiment) onward are the same as those in the first embodiment described above, except for the details shown below, and this part will be omitted from the explanation. Also, in this embodiment and onward, the terminals of each component are not shown in the illustration.

[0080] As shown in Figures 6(A), 6(B), and 6(C), the electronic circuit module 10C comprises a plurality of processor units 20, a plurality of memories 30, a plurality of photoelectric conversion units 40, a power conversion unit 50, and a package substrate 60C.

[0081] Multiple processor units 20, multiple memory units 30, multiple photoelectric conversion units 40, and power conversion units 50 are mounted on the first surface (front) of the package substrate 60C. That is, multiple processor units 20, multiple memory units 30, multiple photoelectric conversion units 40, and power conversion units 50 are mounted on a single common package substrate 60C. The package substrate 60C is formed of a material that has lower high-frequency signal loss than the motherboard 91, at least in the mounting areas of the multiple processor units 20, multiple memory units 30, and multiple photoelectric conversion units 40.

[0082] The second side (back side) of the package substrate 60C is mounted on the motherboard 91.

[0083] Multiple processor units 20 are arranged in the center of the first surface. Multiple memory units 30 and power conversion units 50 are arranged in a first direction parallel to the first surface (the x-axis direction in the figure), with the arrangement area of ​​the multiple processor units 20 in between them. The arrangement area of ​​the multiple processor units 20 and the arrangement area of ​​the multiple memory units 30 are adjacent and close to each other. The arrangement area of ​​the multiple processor units 20 and the power conversion units 50 are adjacent and close to each other.

[0084] Multiple photoelectric conversion units 40 are arranged in a second direction (y-axis direction in the figure) parallel to the first plane and perpendicular to the first direction (x-axis direction in the figure), with the arrangement area of ​​multiple processor units 20 in between them. The arrangement area of ​​multiple processor units 20 and the multiple photoelectric conversion units 40 are adjacent and in close proximity.

[0085] With this configuration, as shown in Figure 7(A), the electronic circuit module 10C can shorten the data transmission line Loop (the line connecting the multiple processor units 20 and the multiple photoelectric conversion units 40). Furthermore, the electronic circuit module 10C allows for a simple and easy wiring configuration of the data transmission line Loop. Therefore, the electronic circuit module 10C can suppress transmission loss and delay caused by the data transmission line Loop.

[0086] Furthermore, the electronic circuit module 10C can shorten the information processing bus Lpm (the line connecting multiple processor units 20 and multiple memory 30). Additionally, the electronic circuit module 10C allows for a simpler and easier wiring configuration of the information processing bus Lpm. Therefore, the electronic circuit module 10C can suppress transmission loss and delay caused by the information processing bus Lpm.

[0087] Furthermore, as shown in Figure 7(B), the electronic circuit module 10C can shorten the power supply line Lpwp for the processor, the power supply line Lpwm for the memory, and the power supply line Lpwo for the photoelectric conversion unit from the power conversion unit 50, thereby achieving a simpler configuration. Consequently, the electronic circuit module 10C can achieve high power supply efficiency.

[0088] Furthermore, in this configuration, the multiple memory 30s and the power conversion unit 50 are spaced apart, with the placement area of ​​the multiple processor units 20 in between. This allows the electronic circuit module 10C to suppress the superposition of power supply noise onto the multiple memory 30s.

[0089] [Fifth Embodiment] An electronic circuit module according to a fifth embodiment of the present invention will be described with reference to the figures. Figure 8(A) is a plan view showing the configuration of the electronic circuit module according to the fifth embodiment, Figure 8(B) is a diagram showing an example of the wiring pattern of the data communication system in the electronic circuit module according to the fifth embodiment, and Figure 8(C) is a diagram showing an example of the wiring pattern of the power supply system in the electronic circuit module according to the fifth embodiment.

[0090] As shown in Figures 8(A), 8(B), and 8(C), the electronic circuit module 10D according to the fifth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the arrangement pattern of each component and the wiring pattern. The other components of the electronic circuit module 10D are the same as those of the electronic circuit module 10C, and the explanation of the similar parts will be omitted.

[0091] Multiple memory units 30 are arranged on both sides of the package substrate 60D in the first direction (x-axis direction in the figure), with the arrangement area of ​​multiple processor units 20 in between. Multiple photoelectric conversion units 40 are arranged on both sides of the package substrate 60D in the second direction (y-axis direction in the figure), with the arrangement area of ​​multiple processor units 20 in between.

[0092] Multiple power conversion units 50 are arranged at the corners of the outer shape formed by the arrangement of multiple memory units 30 and multiple photoelectric conversion units 40.

[0093] Multiple processor units 20 and multiple memory units 30 are adjacent and close in a first direction. Multiple processor units 20 and multiple photoelectric conversion units 40 are adjacent and close in a second direction.

[0094] With this configuration, as shown in Figure 8(B), the electronic circuit module 10D can shorten the data transmission line Loop and the information processing bus Lpm. Furthermore, the electronic circuit module 10D allows for a simple and easy wiring configuration of the data transmission line Loop and the information processing bus Lpm. Therefore, the electronic circuit module 10D can suppress transmission loss and delay caused by the data transmission line Loop and the information processing bus Lpm.

[0095] Furthermore, each of the multiple power conversion units 50 is adjacent to or near the processor unit 20, the memory 30, and the photoelectric conversion unit 40. Therefore, as shown in Figure 8(C), the electronic circuit module 10D can shorten the power supply lines Lpwp for the processor, Lpwm for the memory, and Lpwo for the photoelectric conversion unit from the power conversion unit 50, thereby achieving a simpler configuration. Consequently, the electronic circuit module 10D can achieve high power supply efficiency.

[0096] Furthermore, the area efficiency of the multiple processor units 20, multiple memory units 30, multiple photoelectric conversion units 40, and multiple power conversion units 50 on the package substrate 60D is good. Therefore, the electronic circuit module 10D can be miniaturized.

[0097] Furthermore, the multiple power conversion units 50 are positioned at the corners of the areas where the multiple processor units 20, multiple memory units 30, and multiple photoelectric conversion units 40 are located. Therefore, the heat generated by the multiple power conversion units 50 has less impact on the multiple processor units 20, and the electronic circuit module 10D can easily dissipate this heat to the outside.

[0098] [Sixth Embodiment] An electronic circuit module according to the sixth embodiment of the present invention will be described with reference to the figures. Figure 9(A) is a plan view showing the configuration of the electronic circuit module according to the sixth embodiment, Figure 9(B) is a diagram showing an example of the wiring pattern of the data communication system in the electronic circuit module according to the sixth embodiment, and Figure 9(C) is a diagram showing an example of the wiring pattern of the power supply system in the electronic circuit module according to the sixth embodiment.

[0099] As shown in Figures 9(A), 9(B), and 9(C), the electronic circuit module 10E according to the sixth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the arrangement pattern of each component and the wiring pattern. The other components of the electronic circuit module 10E are the same as those of the electronic circuit module 10C, and the explanation of the similar parts will be omitted.

[0100] Multiple memory units 30 are arranged on both sides of the package substrate 60E in the first direction (x-axis direction in the figure), with the arrangement area of ​​multiple processor units 20 in between. Multiple photoelectric conversion units 40 are arranged on both sides of the package substrate 60E in the second direction (y-axis direction in the figure), with the arrangement area of ​​multiple processor units 20 in between.

[0101] Multiple power conversion units 50E1 are arranged between multiple memory units 30 aligned in a second direction, and are adjacent and in close proximity. Multiple power conversion units 50E2 are arranged between multiple photoelectric conversion units 40 aligned in a first direction, and are adjacent and in close proximity.

[0102] Multiple processor units 20 and multiple memory units 30 are adjacent and close in the first direction. Multiple processor units 20 and multiple photoelectric conversion units 40 are adjacent and close in the second direction. Multiple processor units 20 and multiple power conversion units 50E1 are adjacent and close in the first direction. Multiple processor units 20 and multiple power conversion units 50E2 are adjacent and close in the second direction.

[0103] With this configuration, as shown in Figure 9(B), the electronic circuit module 10E can shorten the data transmission line Loop and the information processing bus Lpm. Furthermore, the electronic circuit module 10E allows for a simple and easy wiring configuration of the data transmission line Loop and the information processing bus Lpm. Therefore, the electronic circuit module 10E can suppress transmission loss and delay caused by the data transmission line Loop and the information processing bus Lpm.

[0104] Furthermore, the multiple power conversion units 50E1 and 50E2 are adjacent to or near the processor unit 20, the memory 30, and the photoelectric conversion unit 40, respectively. Therefore, as shown in Figure 9(C), the electronic circuit module 10E can shorten the power supply lines Lpwp for the processor, Lpwm for the memory, and Lpwo for the photoelectric conversion unit from the power conversion units 50E1 and 50E2, thereby achieving a simpler configuration. Consequently, the electronic circuit module 10E can achieve high power supply efficiency.

[0105] Furthermore, this configuration offers good symmetry in the arrangement of the multiple memory units 30, the multiple photoelectric conversion units 40, and the multiple power conversion units 50E1 and 50E2. The electronic circuit module 10E enables a configuration that facilitates the design of wiring patterns for the data transmission line Lop, the information processing bus Lpm, the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo.

[0106] Furthermore, the multiple memory units 30 are arranged on both sides of the power conversion unit 50E1, and the multiple photoelectric conversion units 40 are arranged on both sides of the power conversion unit 50E2. This allows the electronic circuit module 10E to symmetrically supply power to the multiple memory units 30 and the multiple photoelectric conversion units 40.

[0107] Furthermore, the electronic circuit module 10E can separate and distance the power supply from the power conversion unit 50E1 to the multiple memories 30 and the power supply from the power conversion unit 50E2 to the multiple photoelectric conversion units 40. This allows the electronic circuit module 10E to suppress interference between these power supply lines (the power supply line Lpwm for the memories and the power supply line Lpwo for the photoelectric conversion units).

[0108] Furthermore, the electronic circuit module 10E can isolate the power supply line Lpwo for the photoelectric conversion unit from other power supply lines, thereby suppressing the superposition of noise onto the power supply line Lpwo for the photoelectric conversion unit.

[0109] [Seventh Embodiment] An electronic circuit module according to the seventh embodiment of the present invention will be described with reference to the figures. Figure 10(A) is a plan view showing the configuration of the electronic circuit module according to the seventh embodiment, Figure 10(B) is a diagram showing an example of the wiring pattern of the data communication system in the electronic circuit module according to the seventh embodiment, and Figure 10(C) is a diagram showing an example of the wiring pattern of the power supply system in the electronic circuit module according to the seventh embodiment.

[0110] As shown in Figures 10(A), 10(B), and 10(C), the electronic circuit module 10F according to the seventh embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the arrangement pattern of each component and the wiring pattern. The other components of the electronic circuit module 10F are the same as those of the electronic circuit module 10C, and the explanation of the similar parts will be omitted.

[0111] The power conversion unit 50 is positioned in the center of the first surface of the package substrate 60F. The multiple processor units 20 are positioned to surround the power conversion unit 50. The multiple processor units 20 are adjacent to and close to the power conversion unit 50.

[0112] Multiple memory units 30 are arranged on both sides of the package substrate 60F in the first direction (x-axis direction in the figure), with the power conversion unit 50 and the arrangement area for the multiple processor units 20 in between. Multiple photoelectric conversion units 40 are arranged on both sides of the package substrate 60F in the second direction (y-axis direction in the figure), with the power conversion unit 50 and the arrangement area for the multiple processor units 20 in between.

[0113] Multiple processor units 20 and multiple memory units 30 are adjacent and close in a first direction. Multiple processor units 20 and multiple photoelectric conversion units 40 are adjacent and close in a second direction.

[0114] With this configuration, as shown in Figure 9(B), the electronic circuit module 10F can shorten the data transmission line Loop and the information processing bus Lpm. Furthermore, the electronic circuit module 10F allows for a simple and easy wiring configuration of the data transmission line Loop and the information processing bus Lpm. Therefore, the electronic circuit module 10F can suppress transmission loss and delay caused by the data transmission line Loop and the information processing bus Lpm.

[0115] Furthermore, this configuration offers good symmetry in the arrangement of the multiple memory units 30, multiple photoelectric conversion units 40, and multiple power conversion units 50. This allows the electronic circuit module 10E to achieve a configuration where the wiring patterns for the data transmission line Lop and the information processing bus Lpm are easy to design. In addition, the central placement of the power conversion unit 50 allows for versatility in the wiring patterns for the processor power supply line Lpwp, the memory power supply line Lpwm, and the photoelectric conversion unit power supply line Lpwo. That is, the power supply lines for the multiple memory units 30, multiple photoelectric conversion units 40, and multiple power conversion units 50 can be separate or common, depending on their power supply specifications. If each is supplied by a separate line, the electronic circuit module 10F can improve the power quality for the multiple memory units 30, multiple photoelectric conversion units 40, and multiple power conversion units 50. If the power supply lines are common, the electronic circuit module 10F can reduce the space required for power supply, enabling miniaturization.

[0116] Furthermore, in this configuration, the power conversion unit 50 and the multiple processor units 20 are adjacent and in close proximity. Therefore, the electronic circuit module 10F can shorten the processor power supply line Lpwp and improve the power supply efficiency to the multiple processor units 20.

[0117] [Eighth Embodiment] An electronic circuit module according to the eighth embodiment of the present invention will be described with reference to the figures. Figures 11(A) and 11(B) are plan views showing the configuration of the electronic circuit module according to the eighth embodiment, with Figure 11(A) showing the first side and Figure 11(B) showing the second side. Figure 12(A) is a diagram showing an example of the wiring pattern of the data communication system in the electronic circuit module according to the eighth embodiment, and Figure 12(B) is a diagram showing an example of the wiring pattern of the power supply system in the electronic circuit module according to the eighth embodiment.

[0118] As shown in Figures 11(A) and 11(B), the electronic circuit module 10G according to the eighth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the arrangement pattern of each component and the wiring pattern. The other components of the electronic circuit module 10G are the same as those of the electronic circuit module 10C, and the explanation of the similar parts will be omitted.

[0119] Multiple processor units 20 are arranged in the center of the first surface of the package substrate 60G. Multiple memory units 30 are arranged on both sides of the arrangement area of ​​the multiple processor units 20 in the first direction (x-axis direction in the figure) of the package substrate 60G. Multiple photoelectric conversion units 40 are arranged on both sides of the arrangement area of ​​the multiple processor units 20 in the second direction (y-axis direction in the figure) of the package substrate 60G.

[0120] Multiple processor units 20 and multiple memory units 30 are adjacent and close in a first direction. Multiple processor units 20 and multiple photoelectric conversion units 40 are adjacent and close in a second direction.

[0121] The power conversion unit 50 is positioned on the second surface of the package substrate 60G. Viewed in a direction perpendicular to the first and second surfaces (the z-axis direction in the figure), the power conversion unit 50 overlaps with multiple processor units 20, multiple memory units 30, and multiple photoelectric conversion units 40.

[0122] With this configuration, as shown in Figure 12(A), the electronic circuit module 10G can shorten the data transmission line Loop and the information processing bus Lpm. Furthermore, the electronic circuit module 10G allows for a simple and easy wiring configuration of the data transmission line Loop and the information processing bus Lpm. Therefore, the electronic circuit module 10G can suppress transmission loss and delay caused by the data transmission line Loop and the information processing bus Lpm.

[0123] Furthermore, in this configuration, the power supply line Lpwp for the processor, the power supply line Lpwm for the memory, and the power supply line Lpwo for the photoelectric conversion unit are formed by conductive patterns extending in the thickness direction of the package substrate 60G. As a result, the electronic circuit module 10G can have shorter processor power supply lines Lpwp, memory power supply lines Lpwm, and photoelectric conversion unit power supply lines Lpwo. Therefore, the electronic circuit module 10G can achieve high power supply efficiency.

[0124] Furthermore, this configuration allows for a larger area for the power conversion unit 50. Therefore, the electronic circuit module 10G offers greater design flexibility for the power conversion unit 50.

[0125] [Ninth Embodiment] An electronic circuit module according to the ninth embodiment of the present invention will be described with reference to the figures. Figure 13(A) is a plan view showing the configuration of the electronic circuit module according to the ninth embodiment, and Figures 13(B) and 13(C) show different examples of the C-C' cross section of Figure 13(A), respectively. Note that Figure 13(A) shows the state with the heat sink and thermal conductive gel removed. Figure 14(A) shows an example of the wiring pattern of the data communication system in the electronic circuit module according to the ninth embodiment, and Figure 14(B) shows an example of the wiring pattern of the power supply system in the electronic circuit module according to the ninth embodiment.

[0126] As shown in Figures 13(A), 13(B), and 13(C), the electronic circuit module 10H according to the ninth embodiment differs from the electronic circuit module 10C according to the fourth embodiment in the arrangement pattern of each component and the wiring pattern. The other components of the electronic circuit module 10H are the same as those of the electronic circuit module 10C, and the explanation of the similar parts will be omitted.

[0127] Multiple processor units 20 are arranged in the center of the first surface of the package substrate 60H. Multiple photoelectric conversion units 40 are arranged around the arrangement area of ​​the multiple processor units 20. The arrangement area of ​​the multiple processor units 20 and the multiple photoelectric conversion units 40 are adjacent and close to each other in a direction parallel to the first surface.

[0128] Multiple power conversion units 50 are arranged at the corners of the outer shape formed by the arrangement of the multiple photoelectric conversion units 40.

[0129] The memory 30 is positioned above the multiple processor units 20 so as to overlap their arrangement area. In other words, the memory 30 is positioned opposite the package substrate 60H, with the multiple processor units 20 in between. The memory 30 and the multiple processor units 20 are adjacent and close to each other in a direction perpendicular to the first surface.

[0130] With this configuration, as shown in Figure 14(A), the electronic circuit module 10H can shorten the data transmission line Loop and the information processing bus Lpm. Furthermore, in the electronic circuit module 10H, the main wiring directions of the data transmission line Loop and the information processing bus Lpm are orthogonal, making wiring easier and, as a result, shortening each wiring. Therefore, the electronic circuit module 10H can suppress transmission loss and delay caused by the data transmission line Loop and the information processing bus Lpm.

[0131] Furthermore, in a plan view of the electronic circuit module 10H, the multiple power conversion units 50 are adjacent to or close to the processor unit 20, the memory 30, and the photoelectric conversion unit 40, respectively. Therefore, as shown in Figure 14(B), the electronic circuit module 10H can shorten the power supply lines Lpwp for the processor, Lpwm for the memory, and Lpwo for the photoelectric conversion unit from the power conversion unit 50, thereby achieving a simpler configuration. Consequently, the electronic circuit module 10H can achieve high power supply efficiency.

[0132] Furthermore, this configuration allows for a larger planar area of ​​the memory 30. Therefore, the electronic circuit module 10H can increase the capacity of the memory 30 without increasing its overall shape.

[0133] Furthermore, as shown in Figures 13(B) and 13(C), in this configuration, the configuration of the heat sink can be appropriately adjusted by the height of the multiple photoelectric conversion units 40.

[0134] In the case of Figure 13(B), the height of the photoelectric conversion unit 40 is approximately the same as the height of the processor unit 20 and the memory 30. In this case, the electronic circuit module 10H is equipped with a heat sink 71H. The heat sink 71H overlaps the multiple photoelectric conversion units 40 and the memory 30 and is thermally connected to the multiple photoelectric conversion units 40 and the memory 30 via a thermal conductive gel 710H.

[0135] In the case of Figure 13(C), the height of the photoelectric conversion unit 40 is approximately the same as the height of the processor unit 20. In this case, the electronic circuit module 10H includes a heat sink 71H and a heat sink 72H. The heat sink 71H overlaps the memory 30 and is thermally connected to the memory 30 via a thermal conductive gel 710H. The heat sink 72H overlaps the multiple photoelectric conversion units 40 and is thermally connected to the multiple photoelectric conversion units 40 via a thermal conductive gel 720H.

[0136] <1> An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, An electronic circuit module in which the photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through conductive patterns formed on the package substrate.

[0137] <2> The aforementioned package substrate is The first circuit board on which the power conversion unit is mounted, A second substrate mounted on the first substrate on which the photoelectric conversion unit and the processor unit are mounted, Equipped with, <1> The electronic circuit module described above.

[0138] <3> An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, A package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted and which has a portion with lower high-frequency signal loss than the motherboard, An electronic circuit module equipped with the following features.

[0139] <4> The aforementioned package substrate is The first circuit board on which the power conversion unit is mounted, The photoelectric conversion unit and the processor unit are mounted on a second substrate which is mounted on the first substrate, Equipped with, The loss of the high-frequency signal in the first substrate is lower than the loss of the high-frequency signal in the motherboard. <3> An electronic circuit module.

[0140] <5> The photoelectric conversion unit and the processor unit are powered by a common power conversion unit. <1> ~ <4> One of the following electronic circuit modules.

[0141] <6> The photoelectric conversion unit and the processor unit are powered by one of the power conversion units. <5> An electronic circuit module.

[0142] <7> The photoelectric conversion unit and the processor unit are thermally connected to a shared heat sink. <1> ~ <6> One of the following electronic circuit modules.

[0143] <8> The photoelectric conversion unit, the processor unit, and the power conversion unit are thermally connected to the shared heat sink. <7> An electronic circuit module.

[0144] <9> The aforementioned package substrate is mounted on the motherboard in a manner that allows it to be attached to and detached from it. <1> ~ <8> One of the following electronic circuit modules.

[0145] <10> The package substrate has a socket mechanism on the mounting surface to the motherboard. <9> An electronic circuit module.

[0146] <11> At least one of the photoelectric conversion unit, the processor unit, and the power conversion unit is mounted on the package substrate in a manner that allows it to be attached to or detached from the package substrate. <9> or <10> An electronic circuit module.

[0147] <12> The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The memory and the power conversion unit are arranged with the processor unit in between in a first direction parallel to the first surface. The multiple photoelectric conversion units are arranged with the processor unit in between in a second direction parallel to the first plane and perpendicular to the first direction. <1> ~ <4> One of the following electronic circuit modules.

[0148] <13> The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The multiple memories are arranged in a first direction parallel to the first surface, with the processor unit in between them. The multiple photoelectric conversion units are arranged with the processor unit in between in a second direction parallel to the first plane and perpendicular to the first direction. The multiple power conversion units are arranged at the corners of the outer shape formed by the arrangement of the multiple memory and the multiple photoelectric conversion units. <1> ~ <4> One of the following electronic circuit modules.

[0149] <14> The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The multiple memories are arranged in a first direction parallel to the first surface, with the processor unit in between them. The multiple photoelectric conversion units are arranged with the processor unit in between in a second direction parallel to the first plane and perpendicular to the first direction. The multiple power conversion units are arranged between the multiple memories and between the multiple photoelectric conversion units. <1> ~ <4> One of the following electronic circuit modules.

[0150] <15> The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The power conversion unit is positioned in the center of the first surface, Multiple processor units are arranged in a position surrounding the power conversion unit. The multiple memories are arranged in a first direction parallel to the first surface, with the processor unit and the power conversion unit in between them. The plurality of photoelectric conversion units are arranged in a second direction parallel to the first plane and perpendicular to the first direction, with the processor unit and the power conversion unit sandwiched between them. <1> ~ <4> One of the following electronic circuit modules.

[0151] <16> The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, and the memory are mounted on the first surface of the package substrate. The power conversion unit is mounted on the second surface of the package substrate, Viewed in a direction perpendicular to the first and second surfaces, The power conversion unit overlaps, at least in part, with the photoelectric conversion unit, the processor unit, and the memory. <1> ~ <4> One of the following electronic circuit modules.

[0152] <17> The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, Multiple photoelectric conversion units are arranged in a position surrounding the processor unit. The multiple power conversion units are arranged at the corners of the outer shape formed by the arrangement of the multiple photoelectric conversion units. The memory is positioned such that, when viewed in a direction perpendicular to the first surface, it overlaps the processor unit and faces the package substrate with the processor unit in between. <1> ~ <4> One of the following electronic circuit modules. [Explanation of Symbols]

[0153] 10, 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H: Electronic circuit modules 20: Processor Unit 30: Memory 40: Photoelectric conversion unit 50, 51B, 50E1, 50E2: Power conversion unit 52: External power connector 60, 60B, 60C, 60D, 60E, 60F, 60G, 60H: Package substrate 61, 61B: First board 62: Second board 71, 71B, 71H, 72B, 72H: Heat sink 91: Motherboard 92P: Power lines 93: Land for implementation 94: Socket mechanism 652: Power input line 710, 710B, 710H, 720B, 720H: Thermal conductive gel BP61: External connection terminal Lop: Data transmission line LPM: Information Processing Bus Lpw: Power supply line Lpwm: Power supply line for memory Lpwo: Power supply line for photoelectric conversion unit Lpwp: Power supply line for processor OTL: Optical waveguide PL: Power Cable

Claims

1. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through conductive patterns formed on the package substrate. The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, and the memory are mounted on the first surface of the package substrate. The power conversion unit is mounted on the second surface of the package substrate, Viewed in a direction perpendicular to the first and second surfaces, The power conversion unit overlaps, at least in part, with the photoelectric conversion unit, the processor unit, and the memory. Electronic circuit module.

2. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are connected only through conductive patterns formed on the package substrate. The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, Multiple photoelectric conversion units are arranged in a position surrounding the processor unit. The multiple power conversion units are arranged at the corners of the outer shape formed by the arrangement of the multiple photoelectric conversion units. The memory is positioned such that, when viewed in a direction perpendicular to the first surface, it overlaps the processor unit and faces the package substrate with the processor unit in between. Electronic circuit module.

3. The aforementioned package substrate is The first circuit board on which the power conversion unit is mounted, A second substrate mounted on the first substrate on which the photoelectric conversion unit and the processor unit are mounted, Equipped with, The electronic circuit module according to claim 1 or claim 2.

4. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, A package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted and which has a portion with lower high-frequency signal loss than the motherboard, Equipped with, The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, and the memory are mounted on the first surface of the package substrate. The power conversion unit is mounted on the second surface of the package substrate, Viewed in a direction perpendicular to the first and second surfaces, The power conversion unit overlaps, at least in part, with the photoelectric conversion unit, the processor unit, and the memory. Electronic circuit module.

5. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, A package substrate on which the photoelectric conversion unit, the processor unit, and the power conversion unit are mounted and which has a portion with lower high-frequency signal loss than the motherboard, Equipped with, The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, Multiple photoelectric conversion units are arranged in a position surrounding the processor unit. The multiple power conversion units are arranged at the corners of the outer shape formed by the arrangement of the multiple photoelectric conversion units. The memory is positioned such that, when viewed in a direction perpendicular to the first surface, it overlaps the processor unit and faces the package substrate with the processor unit in between. Electronic circuit module.

6. The aforementioned package substrate is The first circuit board on which the power conversion unit is mounted, The photoelectric conversion unit and the processor unit are mounted on a second substrate which is mounted on the first substrate, Equipped with, The loss of the high-frequency signal in the first substrate is lower than the loss of the high-frequency signal in the motherboard. The electronic circuit module according to claim 4 or claim 5.

7. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are each individually composed of mounted electronic components. The electronic components constituting the photoelectric conversion unit and the electronic components constituting the processor unit are arranged adjacent to each other without the electronic components constituting the power conversion unit in between. The photoelectric conversion unit, the processor unit, and the multiple electronic components constituting the power conversion unit are connected only through conductive patterns formed on the package substrate. The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The power conversion unit is arranged in a first direction parallel to the first plane, alongside the processor unit. The multiple photoelectric conversion units are arranged in a second direction parallel to the first plane and perpendicular to the first direction, sandwiching the processor unit. Electronic circuit module.

8. The photoelectric conversion unit and the processor unit are powered by a common power conversion unit. An electronic circuit module according to any one of claims 1, 2, 4, 5, or 7.

9. The photoelectric conversion unit and the processor unit are powered by one of the power conversion units. The electronic circuit module according to claim 8.

10. The photoelectric conversion unit and the processor unit are thermally connected to a shared heat sink. An electronic circuit module according to any one of claims 1, 2, 4, 5, or 7.

11. The photoelectric conversion unit, the processor unit, and the power conversion unit are thermally connected to the shared heat sink. The electronic circuit module according to claim 10.

12. The aforementioned package substrate is mounted on the motherboard in a manner that allows it to be attached to and detached from it. An electronic circuit module according to any one of claims 1, 2, 4, 5, or 7.

13. The package substrate has a socket mechanism on the mounting surface to the motherboard. The electronic circuit module according to claim 12.

14. At least one of the photoelectric conversion unit, the processor unit, and the power conversion unit is mounted on the package substrate in a manner that allows it to be attached to and detached from the package substrate. The electronic circuit module according to claim 12.

15. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are each individually composed of mounted electronic components. The electronic components constituting the photoelectric conversion unit and the electronic components constituting the processor unit are arranged adjacent to each other without the electronic components constituting the power conversion unit in between. The photoelectric conversion unit, the processor unit, and the multiple electronic components constituting the power conversion unit are connected only through conductive patterns formed on the package substrate. The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The memory and the power conversion unit are arranged with the processor unit in between in a first direction parallel to the first surface. The multiple photoelectric conversion units are arranged with the processor unit in between in a second direction parallel to the first plane and perpendicular to the first direction. Electronic circuit module.

16. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are each individually composed of mounted electronic components. The electronic components constituting the photoelectric conversion unit and the electronic components constituting the processor unit are arranged adjacent to each other without the electronic components constituting the power conversion unit in between. The photoelectric conversion unit, the processor unit, and the multiple electronic components constituting the power conversion unit are connected only through conductive patterns formed on the package substrate. The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The multiple memories are arranged in a first direction parallel to the first plane, with the processor unit in between them. The multiple photoelectric conversion units are arranged with the processor unit in between in a second direction parallel to the first plane and perpendicular to the first direction. The multiple power conversion units are arranged at the corners of the outer shape formed by the arrangement of the multiple memory and the multiple photoelectric conversion units. Electronic circuit module.

17. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are each individually composed of mounted electronic components. The electronic components constituting the photoelectric conversion unit and the electronic components constituting the processor unit are arranged adjacent to each other without the electronic components constituting the power conversion unit in between. The photoelectric conversion unit, the processor unit, and the multiple electronic components constituting the power conversion unit are connected only through conductive patterns formed on the package substrate. The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The processor unit is positioned in the center of the first surface, The multiple memories are arranged in a first direction parallel to the first plane, with the processor unit in between them. The multiple photoelectric conversion units are arranged with the processor unit in between in a second direction parallel to the first plane and perpendicular to the first direction. The multiple power conversion units are arranged between the multiple memories and between the multiple photoelectric conversion units. Electronic circuit module.

18. An electronic circuit module mounted on a motherboard equipped with a power supply source, A photoelectric conversion unit that converts optical signals to electrical signals, A processor unit that performs calculations using the aforementioned electrical signals, A power conversion unit that converts power from the power source and supplies power to the photoelectric conversion unit and the processor unit, The photoelectric conversion unit, the processor unit, and the power conversion unit are mounted on a package substrate, Equipped with, The photoelectric conversion unit, the processor unit, and the power conversion unit are each individually composed of mounted electronic components. The electronic components constituting the photoelectric conversion unit and the electronic components constituting the processor unit are arranged adjacent to each other without the electronic components constituting the power conversion unit in between. The photoelectric conversion unit, the processor unit, and the multiple electronic components constituting the power conversion unit are connected only through conductive patterns formed on the package substrate. The processor unit is equipped with memory connected to the aforementioned processor unit, The photoelectric conversion unit, the processor unit, the power conversion unit, and the memory are mounted on the first surface of the package substrate. The power conversion unit is positioned in the center of the first surface, Multiple processor units are arranged in a position surrounding the power conversion unit. The multiple memories are arranged in a first direction parallel to the first surface, with the processor unit and the power conversion unit in between them. The plurality of photoelectric conversion units are arranged in a second direction parallel to the first plane and perpendicular to the first direction, with the processor unit and the power conversion unit sandwiched between them. Electronic circuit module.

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