AIII-BV single crystal or wafer

By offsetting the seed crystal position and extending the seed channel in the crucible design, combined with controlled temperature fields, the method effectively reduces dislocation density in semiconductor wafers, enhancing the quality and yield of high-power-density components.

JP7886910B2Inactive Publication Date: 2026-07-08FREIBERGER COMPOUND MATERIALS GMBH

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
FREIBERGER COMPOUND MATERIALS GMBH
Filing Date
2024-06-24
Publication Date
2026-07-08
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Existing semiconductor wafers, particularly those made from AIII-BV compounds like gallium arsenide and indium phosphide, suffer from residual stress and dislocations that affect the quality and yield of high-power-density optical and electrical components, despite efforts to reduce dislocation density through lattice-hardening dopants.

Method used

The method involves using a crucible with a specific design that offsets the seed crystal position and extends the seed channel, minimizing dislocations by positioning the seed crystal away from the central axis and allowing for post-processing to remove dislocated edge regions, combined with controlled temperature fields during crystallization.

Benefits of technology

This approach results in single crystals with significantly reduced dislocation density, enabling higher yield and improved performance of optical and electrical components like edge-emitting semiconductor lasers and vertical cavity surface-emitting semiconductor lasers.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007886910000006
    Figure 0007886910000006
  • Figure 0007886910000007
    Figure 0007886910000007
  • Figure 0007886910000008
    Figure 0007886910000008
Patent Text Reader

Abstract

To provide a single crystal of which dislocation density and residual stress are reduced, and to provide a single crystal or wafer obtained therefrom.SOLUTION: An AIII-BV-single crystal or wafer is obtained by separation from an AIII-BV-single crystal (14) or a single crystal (14), where average density of dislocation of the crystal provided as average edge pit density (EPDav) within a cross-sectional area of the single crystal (14) which is perpendicular to the central axis (M) thereof is 1000 cm-2 or less and charge carrier concentration including lattice hardening dopants is 7x1016Atoms / cm3 or less.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to a wafer manufactured by freezing, i.e., solidifying, a molten semiconductor material using a seed crystal formed from the same semiconductor material as the semiconductor single crystal to be manufactured, from an AIII-BV single crystal, particularly a gallium arsenide single crystal or indium phosphide single crystal free of residual stress and dislocations. [Background technology]

[0002] For example, in applications of gallium arsenide or indium phosphide substrate wafers for manufacturing high-power-density light-emitting components such as edge-emitting semiconductor lasers and vertical cavity surface-emitting semiconductor lasers, dislocations act as non-luminescent recombination centers, becoming defects that affect yield and lifetime, respectively. Therefore, low-dislocation AIII-BV substrate wafers are used today for such applications. In this specification, AIII-BV single crystals or wafers refer to crystals from compounds selected from groups III and V of the periodic system. Dislocations develop based on the elasticity and plasticity of the material, as well as the presence of curvature of the temperature field, which leads to stress during the cooling of the crystal (after solidification). As for growth methods, due to the relatively small curvature of the temperature field, only the vertical Bridgman (VB) or vertical temperature gradient solidification (VGF) method can be substantially considered, or thermally similar methods can be considered (see, for example, M. Jurisch et al., "Handbook of Crystal Growth Bulk Crystal Growth: Basic Techniques VOLUME II, Part A, Second Edition, Chapter 9 “Vertical Bridgman Growth of Binary Compound Semiconductors”, 2015)).

[0003] DE 199 12 486 A1 describes an apparatus for growing gallium arsenide crystals. The apparatus includes a crucible placed in a furnace. The apparatus is configured to contain the molten material within a first section, which includes a first cross-sectional region having a larger diameter approximately corresponding to the diameter of the final single crystal, and a second section, which has a relatively smaller diameter and is called a seed channel, specifically for containing a seed crystal that serves as the starting point for crystallization of the molten material. The seed crystal itself has a diameter of approximately 8 mm and a length of approximately 40 mm, corresponding to the diameter of the seed channel. The method proposed in the above document (where the seed crystal is free to exist within the seed channel, and the space between the seed crystal and the crucible in the seed channel section is filled with liquid boron oxide (B2O3)) results in a 1,000–10,000 cm² cross-sectional region of the grown crystal. -2 A dislocation density within this range is achieved.

[0004] Dislocation formation can be inhibited by adding so-called lattice-hardening dopants (e.g., boron, silicon, zinc, sulfur). See, for example, AGElliot et al., Journal of Crystal Growth 70 (1984) 169-178 or B. Pichaud et al., Journal of Crystal Growth 71 (1985) 648-654. For example, US 2006 / 0081306 A1 or US 7,214,269 B2 describe the production of silicon-doped gallium arsenide single crystals according to the vertical Bridgman (VB) method or vertical temperature gradient solidification (VGF) method. Thus, the crucible used is formed from pBN (pyrolysis boron nitride) and has a diameter of 80 mm and a length of 300 mm, with a seed channel having a diameter of 10 mm. By adding silicon, the average dislocation density in the cross-sectional region of the crystal is 5,000 cm⁻¹. -2 This will be achieved.

[0005] Today, regarding the production of silicon-doped GaAs, for wafers with a diameter of 100 mm or 150 mm, 100 cm -2 For wafers with a diameter of 200 mm, an average dislocation density of less than 5,000 cm² is considered to be within 5,000 cm².-2 An average dislocation density of less than is typically achieved. (For example, download from M. Morishita et al., "Development of Si-doped 8-inch GaAs substrates," Conference Proceedings CS MANTECH 2018, http: / / csmantech2018.conferencespot.org / 65967-gmi-1.4165182 / t0017-1.4165620 / f0017-1.4165621 / 0128-0199-000053-1.4165656 / ap074-1.4165657; or download from the product catalog by DOWA Electronics Co., Ltd., Tokyo, Japan, http: / / www.dowa-electronics.co.jp / semicon / e / gaas / gaas.html#semi; or from the product catalog by AXT, Inc., Freemont, CA or Sumitomo Electric Industries, Ltd., Osaka, Japan). If no lattice-hardening dopant is added, wafers with a diameter of 100 mm to 150 mm will have a hardness of 1,500 to 10,000 cm². -2 This is the average dislocation density in the range of 12,000 cm², and for a wafer with a diameter of 200 mm, it is 12,000 cm². -2 The average dislocation density is less than (see the references above).

[0006] There is a standard measurement method for determining the dislocation density (SEMI M83: Test method for determination of dislocation etch pit density in monocrystals of III-V compound semiconductors, SEMI M36 - Test method for measuring etch pit density (EPD) in low dislocation density gallium arsenide wafers). For wafers with a surface orientation that does not differ by more than 15° from the crystal orientation {100}, dislocations can be visualized by selective etching. As a result, etch pits extending about 30 - 60 μm develop, and these can be counted using an optical microscope (magnification of about 50x - 200x). For materials with a low dislocation density, typically, a measurement field with an area in the range of 0.25 mm 2 ~1 mm 2 is applied. Thereby, for example, the entire wafer surface considering a 1 mm edge exclusion is analyzed. The quantity measured for each measurement field is the local etch pit density EPD L . The calculation means of the local etch pit density calculates the average etch pit density EPD av of the wafer. Furthermore, the relative amount of the number of measurement fields having a value of EPD L below a predetermined limit value with respect to the total number of measurement fields is defined as, for example, the relative amount of the measurement field having a local etch pit density of 0 cm -2 (measurement field without dislocations), as P(EPD L = 0 cm -2 ). For materials with very low dislocations, it may be meaningful to identify the total number of dislocation etch pits included in a measurement field such as EPC (etch pit count). When the measurement field covers the entire wafer surface, the total number of dislocations EPC total(Total etch pit count) may be obtained. To determine the dislocation density of a single crystal, it is measured on a plurality of wafers, or at least one wafer in any case, at the beginning (the region of the crystal that freezes or solidifies first) and at the end (the region of the crystal that freezes or solidifies last).

[0007] In US 2006 / 0081306 A1 or US 7,214,269 B2, the disclosed properties of a substrate wafer manufactured from a crystal are 5,000 cm -2 at the following dislocation density (0.1 - 5.0)·10 18 cm -3 and include a charge carrier concentration of. However, for electrical and / or optical components having high electrical and optical power densities, an even lower dislocation density is required.

[0008] The dislocation density of a semiconductor crystal can be reduced by adding dopants that affect the hardening of the crystal lattice. In JP 2000 - 086398 A, a method is disclosed in which the dislocation density of a p - conductive zinc - doped gallium arsenide crystal can be reduced to a value of 500 cm -2 or less by further doping with silicon and boron.

[0009] A method for further reducing the dislocation density is disclosed in US 2004 / 0187768 A1. When indium is further doped into the crystal in addition to elements isoelectronically incorporated into the crystal lattice of gallium arsenide, such as silicon (Si), zinc (Zn), boron (B), and the specific and harmonious concentration of dopant atoms is maintained, the dislocation density of a p - conductive gallium arsenide crystal can be reduced to a value of 100 cm -2 or less. The charge carrier concentration of the thus - obtained single crystal becomes 1.0·10 17 ~6.0·10 18 cm -3 .

[0010] A single crystal produced according to the VB method according to one embodiment of US 2004 / 0187768 A1 (see FIG. 4 of this document) has a diameter of about 3 inches (75 mm) and a length of 180 mm (cylindrical region). To measure the local dislocation density, the wafer is separated from the GaAs single crystal and its surface is exposed to a KOH etching solution. The surface is placed within a rectangular measurement grid with a grid width of 5 mm with respect to the number of etch pits formed during etching, and each measurement field of size 1x1 mm 2 was measured. Dislocations were not detected in 134 out of 177 measurement fields of size 1x1 mm 2 . The average dislocation density was 28 cm -2 . In a comparative example where indium was not added as a dopant (see FIG. 5 of the above document), dislocation-free measurement fields were detected in only 58 out of 177 measurement fields of size 1x1 mm 2 . Therefore, the average dislocation density was 428 cm -2 .

[0011] However, these crystals and the wafers manufactured therefrom, which reflect the values described in the literature, still exhibit a perceptible amount of residual stress as shown below. This can result from the dislocation results, and can further interact with the original or inherent defects, and in turn can affect the properties of each of the manufactured electrical and / or optical components. Therefore, it is also desirable to significantly reduce the amount of residual stress. A sensitive and efficient method for quantifying the amount of residual stress in wafers formed from semiconductor crystals is disclosed, for example, in Geiler, H.D. et al., "Photoelastic characterization of residual stress in GaAs-wafers", Materials Science, Semiconductor Processing 9 (2006) pp. 345 - 350, and is generally called the SIRD method (SIRD: rapid scanning infrared transmission polarimeter).

[0012] The SIRD method provides a full-surface shear stress image for each crystal or wafer, with a typical lateral resolution of 100 μm. A linearly polarized laser beam in the infrared wavelength range (1.3 μm) is directed perpendicularly to the surface of the crystal / wafer and passes through it. Due to stress-induced birefringence in the crystal / wafer, the electric field vector splits into two mutually orthogonal components: an ordinary ray and an extraordinary ray. The material and thickness-dependent phase transition between the two ray components, present after leaving the crystal / wafer, is measured. The measured phase transition can be used to evaluate the shear stress given a given physical relationship to the surface. With appropriate equipment, the laser beam can be directed to any number of points on the surface of the crystal / wafer, thereby allowing the shear stress to be determined at each location. [Prior art documents] [Patent Documents]

[0013] [Patent Document 1] DE 199 12 486 A1 [Patent Document 2] US 2006 / 0081306 A1 [Patent Document 3] US 7,214,269 B2 [Patent Document 4] JP 2000-086398 A [Patent Document 5] US 2004 / 0187768 A1 [Patent Document 6] US9,368,585 B2 [Non-patent literature]

[0014] [Non-Patent Document 1] Handbook of Crystal Growth Bulk Crystal Growth: Basic Techniques VOLUME II, Part A, Second Edition, Chapter 9 “Vertical Bridgman Growth of Binary Compound Semiconductors”, 2015 [Non-Patent Document 2] Journal of Crystal Growth 70 (1984) 169-178 [Non-Patent Document 3] Journal of Crystal Growth 71 (1985) 648-654 [Non-Patent Document 4] Development of Si-doped 8-inch GaAs substrates, Conference Proceedings CS MANTECH 2018, http: / / csmantech2018.conferencespot.org / 65967-gmi-1.4165182 / t0017-1.4165620 / f0017-1.4165621 / 0128-0199-000053-1.4165656 / ap074-1.4165657 [Non-Patent Document 5] http: / / www.dowa-electronics.co.jp / semicon / e / gaas / gaas.html#semi [Non-Patent Document 6] SEMI M83: Test method for determination of dislocation etch pit density in monocrystals of III-V compound semiconductors [Non-Patent Document 7] SEMI M36: Test method for measuring etch pit density (EPD) in low dislocation density gallium arsenide wafers [Overview of the project] [Problems that the invention aims to solve]

[0015] The object of the present invention is to provide a single crystal, preferably a GaAs single crystal, which is capable of achieving further significant improvements in the quality of single crystals and wafers manufactured from single crystals, with or without the use of lattice hardening dopants such as boron, silicon, zinc, sulfur, and indium, and which forms the basis for manufacturing components having improved electrical and / or optical power density. [Means for solving the problem]

[0016] The above objective is achieved by the single crystal or wafer described in claim 1.

[0017] This invention is based on the realization that dislocations located locally close to the outer edge of a crystal or wafer, and dislocations located at its center (around the axis of symmetry), can arise from two different effects. At the crystal edge, thermal and contact stresses occur in contact with the crucible, causing dislocations to develop due to displacement in a crystallinely favorable plane. Typically, these dislocations extend several millimeters into the crystal (compare this with the cross-sectional region of single crystal 14a schematically shown in Figure 7). Dislocations at the center originate from the seed location (compare this with the cross-sectional region of single crystal 14b schematically shown in Figure 8). At the center, thermal shock occurs when the seed crystal and molten material come into contact, which in turn leads to dislocation formation. Some of these dislocations extend into a conical region as the crystallization front or solidification front progresses, and then into an adjacent cylindrical region of the crystal.

[0018] According to a first embodiment of the present invention, an apparatus for producing crystals from a molten raw material comprises a crucible configured to contain a molten material, the crucible having a first section having a first cross-sectional region and a second section having a second cross-sectional region and configured to contain a seed crystal, wherein the second cross-sectional region is smaller than the first cross-sectional region, and the first and second sections are connected to each other directly or via a third section tapering from the first section to the second section, thereby enabling crystallization into the molten material that freezes, i.e., solidifies, starting from the seed crystal in a directed temperature field. The second section is also called a seed channel. The first section of the crucible includes a central axis, and the second section is positioned laterally, offset from the central axis of the first section.

[0019] In this embodiment, each contact zone between the seed crystal located in the second section or seed channel and the molten material, i.e., the seed position, is offset from the central position around the central axis of the crucible toward the edge region, preferably the outermost edge of the crucible cross-section. As a result, a relatively large portion of the cross-sectional area of ​​the molten material freezing, i.e., solidifying into a single crystal, is maintained in a substantially dislocation-free state. Edge regions that are more strongly affected by dislocations may be removed, for example, by grinding, polishing, cutting, or by alternative methods of removing the material. In other words, a single crystal with almost no dislocations can be obtained with this apparatus. For example, the desired effect can be further enhanced by adding lattice hardening dopants such as boron, silicon, zinc, sulfur, indium (for gallium arsenide), and gallium (for indium phosphide) to the molten material, individually or in combination, in addition to the above measures.

[0020] According to a second embodiment of the present invention, as in the first embodiment, an apparatus for producing crystals from a molten raw material comprises a crucible configured to contain a molten material, the crucible having a first section having a first cross-sectional region and a second section having a second cross-sectional region and configured to contain a seed crystal, wherein the second cross-sectional region is smaller than the first cross-sectional region, and the first and second sections are connected to each other directly or via a third section tapering from the first section to the second section, thereby enabling crystallization into a molten material that freezes, i.e., solidifies, starting from a seed crystal in a directed temperature field.

[0021] As is common in semiconductor manufacturing, the apparatus is configured to produce single crystals having a nominal diameter, which is achieved in post-processing after such growth process is complete. Here, in this embodiment, the first section has an inner diameter associated with its cross-sectional region perpendicular to the central axis. The inner diameter is 2 mm or more, preferably 3 mm or more, and more preferably 5 mm or more, than the nominal diameter. At the same time, this inner diameter may be up to 10 mm or up to 20 mm larger than the nominal diameter.

[0022] One advantage of this embodiment is that, given a given nominal diameter of the single crystal to be manufactured, such a grown crystal is initially formed with an oversize of, for example, 2-10 mm, 3-10 mm, or 5-10 mm. Such oversized portions can be removed in a process after a suitable growth step, such as drilling, polishing, grinding, lapping, or similar method steps, in order to obtain the nominal diameter.

[0023] As mentioned above, since the vast majority of dislocations are located within the edge regions thus removed from the single crystal, it is possible to obtain single crystals with a nominal diameter that are nearly or completely free of dislocations. In the prior art, pre-processing oversizes may be known, which are only up to 1 mm and clearly smaller than 2 mm in any case. Of course, obtaining a larger diameter increases the number of processes in post-processing. Nevertheless, single crystals that are nearly or completely free of dislocations at their nominal diameter justify such increased processes and the resulting costs.

[0024] A particularly advantageous embodiment of the present invention relates to a combination of the first two embodiments. Thereafter, dislocations arising from the interaction between the crucible wall and the crystallizing molten material, as well as dislocations arising from seed locations, develop in the edge region of the grown single crystal, but this edge region can be removed in a subsequent process in consideration of oversize in order to achieve the nominal diameter.

[0025] According to a third embodiment of the present invention, an apparatus for producing crystals from a molten raw material comprises a crucible configured to contain a molten material, as in the embodiments described above, including a first section having a first cross-sectional region and a second section having a second cross-sectional region and configured to contain a seed crystal, wherein the second cross-sectional region is smaller than the first cross-sectional region, and the first and second sections are connected to each other directly or via a third section tapering from the first section to the second section, thereby enabling crystallization of a solidifying molten material starting from a seed crystal in a directed temperature field.

[0026] The second section of this embodiment has a length along or parallel to the direction of the central axis, the length of which is 10 mm to 100 mm, preferably 20 mm to 75 mm, and more preferably 30 mm to 50 mm (including boundary values).

[0027] The advantage of this embodiment arises from the fact that the second section or seed channel includes a significantly extended length compared to seed channels known from the prior art. Therefore, the seed crystal placed therein is positioned, considering its corresponding size or degree, deeper within the seed channel, i.e., further away from the first section of the crucible from which an economically usable portion of a single crystal having a nominal diameter plus any oversize is obtained during growth.

[0028] This is because it was discovered that dislocations within the crystal start at the seed location and extend at a certain angle with respect to the central axis. Due to the extended seed channel, at least most dislocations that have a large angle with respect to the central axis (in this case, the seed channel) terminate at the crucible wall still within the seed channel and therefore do not extend further toward the first section of the crucible, which is the economically usable portion of the grown single crystal.

[0029] Further advantageous embodiments arise from methods associated with each of the above-mentioned apparatuses for producing single crystals.

[0030] The apparatus may include one or more heating devices. These heating devices generate a directed temperature field, and a crucible is placed within this directed temperature field, thereby enabling subsequent crystallization of the molten material, starting from a seed crystal. The present invention is not limited to any particular arrangement of heating devices. The heating devices may include, for example, heating elements based on thermal radiation, high-frequency generators, magnetic field heaters, etc. However, the temperature field should be arranged such that a substantially planar (or slightly curved) interface is formed during crystal growth.

[0031] The apparatus described above may be configured to carry out growth by employing a movable crucible or furnace in the vertical Bridgman (VB) method, or by employing the vertical temperature gradient solidification (VGF) method. Nevertheless, the present invention is not limited to these specific methods. For example, the present invention may also be applied to methods such as the floating zone method.

[0032] The crucible may be formed from graphite, boron nitride, or thermally analyzed boron nitride, or from other commonly applicable materials selected to suit the type of molten material and the corresponding molten temperature. The crucible and / or heating device may be further equipped with a liner, sheath, or envelope, for example, made of quartz glass.

[0033] Furthermore, the embodiments are not limited to the production of gallium arsenide single crystals or indium single crystals. For example, single crystals (GaP-, GaSb-, InSb-, InAs-, etc.) are also included. The embodiments of this apparatus generally relate to the ability to produce AIII-BV single crystals.

[0034] A further embodiment of the present invention provides the use of a seed crystal in which dislocations do not propagate at all or very little in the direction toward the first section of the crucible, i.e., into the economically usable portion of the grown single crystal.

[0035] Since the dislocation density is closely related to the impurity concentration, including the dopant concentration, without the addition of these materials, it can only be reduced to a conditional degree, in consideration of the other possibilities described in this method. However, if the dopant concentration ≤ 5 x 10⁻¹⁰ 16 atoms / cm 3 If present, dislocation density ≤ 500 cm -2 It was found that this could be achieved.

[0036] Further embodiments of the present invention provide single crystals, particularly AIII-BV single crystals, and even more particularly, gallium arsenide (GaAs) or indium phosphide (InP) single crystals. These single crystals contain a lattice-hardening dopant and have an average etch pit density (EPD) within a cross-sectional region of the single crystal perpendicular to its central axis. av The average dislocation density obtained from this is 10 cm -2 Preferably 5 cm -2 More preferably 3cm -2 More preferably, 1 cm -2The following applies, and more preferably, there are no dislocations at all. For wafers with a diameter of 150 mm, the total number of etch pits is EPC. total This value may be less than 2,000, preferably less than 900, more preferably less than 360, and even zero.

[0037] Further embodiments of the present invention provide single crystals, in particular AIII-BV single crystals, and more particularly AIII-BV single crystals comprising gallium arsenide (GaAs) or indium phosphide (InP). These single crystals are free of lattice hardening dopants and have an average etch pit density (EPD) within a cross-sectional region of the single crystal perpendicular to its central axis. av The average dislocation density in the atomic lattice of the crystal is 700 cm³. -2 The following is preferably 500 cm -2 Below, more specifically 200cm -2 The following applies:

[0038] When the dislocation density of a single crystal is particularly low, there are regions in the cross-section perpendicular to the central axis of the single crystal that are completely free of dislocations. This proportion can be determined by the standard measurement method according to SEMI M83, and is the portion of the cross-section of the single crystal that is completely free of dislocations within a measurement grid that completely covers the cross-section. 2 The ratio P(EPD) of the measurement area to the total area of ​​the cross-sectional region. L= 0cm -2 ) is 95% or more. However, 97% or more is preferable, and 99% or more is particularly preferable.

[0039] As a result, the yield in the manufacture of components with higher electrical and / or optical power densities, such as edge-emitting semiconductor lasers or vertical cavity surface-emitting semiconductor lasers, increases significantly, thereby improving the economic efficiency of component manufacturing.

[0040] Single crystals may contain lattice-hardening dopants, although this is not mandatory. In the case of gallium arsenide (GaAs), for example, dopants such as silicon (Si), sulfur (S), tellurium (Te), tin (Sn), selenium (Se), zinc (Zn), carbon (C), beryllium (Be), cadmium (Cd), lithium (Li), germanium (Ge), magnesium (Mg), manganese (Mn), boron (B), aluminum (Al), antimony (Sb), phosphorus (P), and indium (In) may be added to the original molten material in small amounts, individually, or in partial combinations, as described in US 2004 / 0187768 A1 (see paragraphs 10 and 11 of that document). [Brief explanation of the drawing]

[0041] [Figure 1] This is a schematic diagram of a first embodiment of an apparatus for producing single crystals from a raw molten material according to the present invention, showing that the seed channel of the crucible is extended or lengthened (top: side cross-sectional view, bottom: top view). [Figure 2] This is a schematic diagram of a second embodiment of the apparatus for producing single crystals from a raw molten material according to the present invention, showing how the seed channel is offset toward the outer edge of the diameter (top: side cross-sectional view, bottom: top view). [Figure 3] This is a schematic diagram of a third embodiment of the apparatus for producing single crystals from a raw molten material according to the present invention, which is derived from the second embodiment (having a short seed channel) and shows how the oversize is intended to be reduced asymmetrically toward the nominal diameter (top: side cross-sectional view, bottom: top view). [Figure 4] This is a schematic diagram of a fourth embodiment of the apparatus for producing single crystals from a raw molten material according to the present invention, which is derived from the third embodiment and, similar to the first embodiment, shows that the seed channel is extended or lengthened (top: side cross-sectional view, bottom: top view). [Figure 5] Figure 3 shows a schematic diagram of an embodiment of a multi-crucible arrangement consisting of three devices, each having seed channels offset toward a common central axis Z. [Figure 6] Figure 3 shows a schematic diagram of an embodiment of a multiple crucible arrangement similar to that shown in Figure 5, consisting of five devices. [Figure 7] A schematic diagram of a cross-sectional region of a single crystal showing edge dislocations is shown. [Figure 8] A schematic diagram of a single crystal cross-sectional region showing dislocations extending from or propagating from seed channels located on the central axis of a crucible is shown. [Figure 9] The grayscale image shows the distribution of dislocation density values ​​in the atomic lattice of crystals, obtained from spatially resolved measurements within a cross-sectional area of ​​the wafer perpendicular to its own central axis M, for comparative examples using conventional grown single crystals or wafers, each having a diameter of 150 mm. [Figure 10] The distribution of shear stress values ​​obtained from spatially resolved measurements for the comparative example in Figure 9 is shown as a grayscale image. [Figure 11] In a corresponding embodiment of the present invention, the distribution of dislocation density values ​​within the atomic lattice of the crystal, obtained from spatially resolved measurements, is shown in a grayscale image as in Figure 9. [Figure 12] For the corresponding embodiment of the present invention shown in Figure 11, the distribution of the respective shear stress values ​​obtained from spatially resolved measurements is shown in a grayscale image as in Figure 10. [Figure 13] The following is an example of a figure showing the distribution of shear stress (frequency PW of the shear stress τ values ​​at each interval) measured based on the SIRD method for three comparative examples ("wafer 22", "wafer 27", and "wafer 37"), following the prior art published in "Photoelastic characterization of residual stress in GaAs-wafers" by Geiler, H.; Karge, H.; Wagner, M.; Eichler, St.; Jurisch, M.; Kretzer U. Scheffer-Czygan, M. in Materials Science in Semi-conductor Processing 9 (2006), pp. 345-350. [Figure 14]Figures 12 and 13 show embodiments of a single crystal grown according to the present invention or a wafer separated from that single crystal, similar to Figure 13. [Modes for carrying out the invention]

[0042] Embodiments having further features, advantages, and objectives will be described in more detail below, along with drawings, by including non-limiting embodiments relating to preferred embodiments.

[0043] Figure 1 shows a first embodiment of an apparatus for producing a single crystal from a raw molten material according to the present invention. The apparatus 1 includes a crucible 2 and a heating device 10 having heating elements arranged in an annular pattern surrounding the crucible. The upper part of Figure 1 shows a cross-sectional view, and the lower part shows a top view of the crucible 2 with the heating device 10 omitted. The crucible may be housed in a quartz glass container (not shown) and closed off from the outside environment. This arrangement may correspond to an apparatus for crystal growth according to the vertical temperature gradient solidification (VGF) method.

[0044] Crucible 2 is formed from boron nitride or thermally analyzed boron nitride (pBN). Crucible 2 comprises a first cylindrical section 4 for containing the raw molten material 16 (specified as gallium arsenide GaAs), a second section 6 formed as a seed channel, and a third section 8 forming a transition between the first section 4 and the second section 6 and connecting these sections. In the region of the second section, crucible 2 has an inner diameter of at least 152 mm. This inner diameter of 152 mm of crucible 2 consists of a nominal diameter d of 150 mm meticulously brought and achieved for the finished single crystal, and an oversize of up to 2 mm conventionally added during the growth process, which is for (and removed in) a subsequent grinding process applied to the outer cylindrical shell portion of the single crystal to be manufactured. The grinding process is intended to provide the wafers to be subsequently separated with a positionally accurate and high-quality cylindrical surface required for the subsequent alignment process.

[0045] In this particular embodiment, the seed channel or the second section 6 is also cylindrical, for example, having a diameter of 10 mm and a length k' of 100 mm. The seed channel according to the present invention may also require a spatial shape other than a cylinder, and the present invention is not limited to the above-described shape. The seed channel may also have a cubic shape, and its cross-section may be polygonal or oval, etc.

[0046] The seed crystal 12 (formed herein from GaAs) is housed within the second section 6 and has a diameter of less than 10 mm (e.g., 8 or 9 mm) and a length of 20 mm, ensuring that there is a distance from the crucible wall in the seed channel. The gap in the seed channel may be filled with liquid boron oxide (B2O3) so that the molten material and crystals are suspended in the liquid during crystallization. Because the length of the seed crystal 12 and the length k' of the seed channel are considerably different, the seed crystal 12 is positioned deep at the bottom of the second section 6. Thus, the upper surface of the seed face of the seed crystal is 80 mm away from the upper end of the second section 6 or the seed channel, respectively. Therefore, the ratio of length to inner diameter of the free space portion not occupied by the seed crystal is 8:1.

[0047] In the state shown in Figure 1, the raw molten material 16, consisting of gallium arsenide, is supplied to the crucible 2 and has already crystallized into a doped GaAs single crystal 14, which extends from the seed plane or seed position in the seed crystal 12 within the seed channel, through each of the conical transition zones or third section 8, into the cylindrical second section 6. Furthermore, lattice-hardening dopants such as silicon, boron, indium, zinc, and sulfur are added to the molten material.

[0048] In the corresponding method (VGF), for example, a certain amount of silicon is added to the molten material (or its small or granular precursor) before or after heating. A layer 18 of liquid (molten) diboron trioxide (B2O3) exists above the raw molten material 16 and between the crystal and the crucible wall, due to its lower density, and serves to protect the underlying GaAs molten material as described above. A directed temperature field T is generated by the heating device using a control device (not shown) (the arrow in Figure 1 points upward from the seed crystal 12 towards higher temperatures). As the seed crystal 12 begins to melt, the cooling of the raw molten material 16 is started (with further control of the heating device 10) while maintaining the temperature gradient, and the single crystal 14 begins to grow upward (initially still within the second section 6 or seed channel, respectively), starting from the seed surface of the seed crystal 12.

[0049] Due to the large ratio of the free length available for crystallization to the narrow inner diameter in the seed channel, the central dislocation 101 shown in Figure 8, which is unavoidable for such a seeding process, propagates during the crystallization process at an acute angle with respect to the central axis M of the crucible (which in this embodiment also coincides with the central axis of the seed channel) and collides with the crucible wall before reaching the crystallization front between the original molten material 16 and the single crystal 14, which reaches the upper end of the seed channel (second section 6). As a result, the dislocations thus generated do not further affect further growth. Generally, dislocations propagate perpendicular to slightly curved interfaces.

[0050] Dislocation 101 disappears from the cross-sectional region of the single crystal in the second section 6 (seed channel) of crucible 2, and then moves to the edge region (80 cm). 2 )The crystallization front, which is virtually free of dislocations after considering exclusion, propagates further, causing the single crystal 14 to grow. Table 1 lists the relevant parameters for several samples. In Table 1, sample 1a is a GaAs single crystal produced using a conventional crucible with a seed channel. Sample 1a is a comparative example. On the other hand, samples 2-5 were produced by the method of the present invention in the crucible shown in Figure 1 (these are also GaAs). The parameters EPD listed in Table 1 av and EPCtotal The values ​​were obtained from wafers after separation from the grown single crystals. The sample diameter was 150 mm.

[0051] [Table 1]

[0052] Figure 2 shows apparatus 1' of a second embodiment according to the present invention. To avoid repetition, the same reference numerals as in Figure 1 indicate the same or similar features, and below, only relevant modifications of the apparatus from the first embodiment are described. Other features described for the first embodiment are also valid for the second embodiment and subsequent embodiments.

[0053] Similar to the first embodiment, the crucible 2' of the second embodiment includes a first section 4' for containing the raw molten material 16, a second section 6' that functions as a seed channel, and a third section 8' that functions as a transition region between the seed channel and the first section 4'. The second section 6' has a diameter of 10 mm, similar to the first embodiment, but its length k is 30 mm, for example, as in a conventional crystal growth apparatus, and the seed surface of a 20 mm long seed crystal 12 inserted into the seed channel is only 10 mm from the upper end of the seed channel 12. Without general limitations, the seed channel in this embodiment is also formed in a cylindrical shape, for example. The third section, in consideration of the offset v of the second section 6', is no longer rotationally symmetric with respect to the first section 4', but rather tapers laterally outward asymmetrically from the cylindrical first section 4' with a larger inner diameter to the second section 6' with a smaller diameter.

[0054] Instead, the second section 6' is positioned laterally offset with respect to the central axis M of the first section. In other words, the central axis M' of the second section is parallel to the central axis M of the first section 4' based on the mutual offset v between them. In this embodiment, the offset v is sufficiently sized so that the central axis M' of the second section 6' or each of the seed channels extends through the edge exclusion region of the cross-sectional area of ​​the first section 4' if such a central axis M' is extended into the first section 4'.

[0055] In the second embodiment, the first section has an inner diameter d''' of 172 mm. However, the nominal diameter d of the single crystal 14 to be manufactured is only 152 mm in this embodiment as well. Therefore, crucible 2' has a significantly larger diameter d''' compared to crucible 2 of the first embodiment for manufacturing a single crystal having a given nominal diameter, and also compared to a conventional crucible. In the second embodiment, the (extended) central axis M' of each of the second section 6' or seed channels therefore extends through the edge region of the cross-sectional area shown in Figure 2 (the edge region is outside and beyond the nominal diameter d of the single crystal 14 to be manufactured) (since the seed channel has an inner diameter of 10 mm, the central axis M' is 5 mm away from the crucible wall. To ensure that growth is not obstructed in the actual direction, the central axis M' passes entirely through the cross-sectional area of ​​the crucible when projected along the central axis M (see bottom of Figure 2)). The lateral offset v in this embodiment is 80 mm.

[0056] The method for producing the single crystal is similar to that in the embodiments described above (for example, including adding one or more lattice-hardening dopants to the molten material). However, the subsequent grinding step, which is a post-treatment to smooth and finish the cylindrical surface of the GaAs single crystal 14 which may be doped by the prior art, is supplemented or even replaced by a further step. There, the oversize of 20 mm in diameter (or 10 mm in radius) as specified herein is reduced or eliminated by drilling or other steps that can more effectively remove material from the cylindrical surface of the single crystal. Thus, in the second embodiment, the material is removed from the cylindrical surface of the single crystal 14 symmetrically with respect to the central axis of the single crystal 14 (which coincides with the central axis M of the first section of the crucible 2'). Advantageously, edge regions of the single crystal 14 that are close to the wall during growth and therefore exposed to a relatively high dislocation density during production, as shown in Figure 7, are removed. In particular, in connection with this, the edge dislocation 102 shown in Figure 7 of the schematicly shown single crystal 14b is removed.

[0057] Furthermore, due to specific arrangements or offsets v, dislocations 101 (see Figure 8) generated from the seed process that have propagated to the edge region are removed in the post-processing step, resulting in a dislocation-free or at least substantially dislocation-free single crystal 14. Table 2 lists the relevant parameters for several samples. In Table 2, sample 1b is a GaAs single crystal produced using a conventional crucible with a seed channel and is a comparative example. On the other hand, samples 6-9 (also GaAs) were produced by the method of the present invention using the crucible shown in Figure 2. The parameter EPD listed in Table 2 av and EPC total The values ​​were obtained from wafers after separation from the grown single crystals. The sample diameter was 150 mm.

[0058] [Table 2]

[0059] Figure 3 shows the apparatus 1'' of a third embodiment of the present invention. The method for manufacturing the single crystal and the structure of the apparatus are the same as those of the second embodiment. The only difference is the diameter d'' of the first section 4'' of the crucible 2''. As can be seen from the lower part of the top view of Figure 3, in the method underlying the third embodiment, the oversize is asymmetrically reduced in the post-processing step after proper growth in the crucible 2'' to obtain a nominal diameter d of 152 mm for the single crystal 14. This series of actions allows only the substantially edge region shown in the lower right of Figure 3 to be removed, i.e., the edge region affected by dislocations 101 arising from the seeding process can be removed in particular in the post-processing step, and as a result, a less oversized overall inner diameter d'' of the crucible 2'' can be selected. In this embodiment, the inner diameter d'' is 162 mm, i.e., 10 mm larger than the nominal diameter d of the single crystal (its manufacturing apparatus 1'' is configured for (d=152 mm)). As is evident from Figure 3, the cross-sections of the seed channel or the second section 6'', projected onto the cross-sectional region of the first section 4'' of the crucible 2'', are entirely within the edge region of the cross-sectional region of the single crystal 14 to be manufactured, which will be removed in the post-processing step. The offset v of the central axis M' of the seed channel with respect to the central axis M of the first section 4'' is only 75 mm in this embodiment.

[0060] In this embodiment, edge dislocations 102, particularly those located in the lower left of Figure 3, which may arise from contact with the inner crucible wall during growth, may remain in the single crystal 14 even after the post-processing step. However, the amount of material to be removed in the post-processing step is significantly reduced compared to the second embodiment. This results in an optimal cost-benefit ratio from an economic standpoint. Furthermore, the average dislocation density is set to 10 cm⁻¹. -2 less than or 5cm -2 The following excellent value was also achieved, and the percentage of measurement fields with no dislocations at all, P(EPD), according to the standard measurement method of SEMI-M83, was also achieved. L = 0cm -2Values ​​of 97% or higher, and even 99% or higher, are achieved for ). Table 3 lists the relevant parameters for the two samples. In Table 3, sample 1c is a GaAs single crystal produced using a conventional crucible with a seed channel, and is a comparative example. On the other hand, sample 10 was produced using the method of the present invention using the crucible shown in Figure 3 (this is also GaAs). The parameters EPD listed in Table 3 av and EPC total The values ​​were obtained from wafers separated from the grown crystals. The sample diameter was 150 mm.

[0061] [Table 3]

[0062] A fourth embodiment of the apparatus 1'' of the present invention is shown in Figure 4. This embodiment incorporates and combines features of both the first and third embodiments. Thus, apparatus 1''' includes a crucible 2''' formed from boron nitride or pyrolysis boron nitride, having a first cylindrical section 4'' that is 2 mm or more (10 mm in this embodiment) oversized to the nominal diameter, the crucible 2''' containing a raw molten material 16 (which in this specification consists of gallium arsenide). Apparatus 1''' further includes a second section 6 formed as a seed channel and extending with a length k' = 100 mm, and an asymmetric third section 8. The third section 8 forms a transition between the first section 4'' and the second section 6, connecting them to each other.

[0063] The advantages and effects are the same as those described above with reference to the first to third embodiments, and these advantages are integrated. Table 4 shows the relevant parameters of the single crystal 14 samples produced using this apparatus. In Table 4, sample 1d is a GaAs single crystal produced using a conventional crucible with a seed channel, and is a comparative example. On the other hand, sample 11 was produced using the crucible shown in Figure 4 (also GaAs). The parameters EPD listed in Table 4 av and EPC totalThe values ​​were obtained from wafers after separation from the grown crystals. The diameter of the samples is 150 mm. Samples 1b to 1d are identical.

[0064] [Table 4]

[0065] Apparatus 1'''' or 1'''''', which are embodiments of a multiple crucible arrangement, each containing three or five crucibles 2'' as shown in Figure 3, are shown in Figures 5 and 6, respectively. For example, a heating device 10 having one or more heating elements, such as a magnetic field heater, surrounds and heats the crucibles in the above arrangement. In addition to the magnetic field heater, a packing material (not shown), such as graphite, which contributes particularly to the basic configuration of the temperature field T by conducting heat anisotropically, may be placed between the crucibles 2''. One such particularly advantageous arrangement is described, for example, in US9,368,585 B2. The features of that arrangement shown in Figures 1-3 and 11-12 of that document are incorporated herein by reference with their corresponding descriptions. The multiple crucible arrangement described in that patent is very good because of the improved distribution of etch pit density, i.e., a particularly uniform dislocation density.

[0066] In these two embodiments, the crucible arrangement has an axis of symmetry Z that passes through the center of the arrangement and extends parallel to the corresponding central axis M of each crucible 2''. Viewed from each central axis, the direction of the offset v is precisely directed toward the axis of symmetry Z. In other words, the corresponding second section 6' of each crucible 2'' is offset toward the center of the arrangement.

[0067] This arrangement of multiple crucibles provides a uniform, stable, and excellent temperature field, particularly in the direction toward the center. Similarly, by offsetting the seed channels, the crystallization conditions become identical in each crucible. By combining the features of the apparatus 1'' of the present invention shown in Figure 3 (and the other embodiments shown in Figures 1, 2, and 4) with the arrangement of multiple crucibles, an extremely high synergistic effect can be obtained.

[0068] The embodiments described above relate to an apparatus configured to perform the VGF method. However, the present invention is not limited to the above-described specific apparatus, and the apparatus of interest may be based on the vertical Bridgman method.

[0069] The crucible described above has a cylindrical shape in the first section. However, it should be noted that other shapes may also be used, such as a cubic crucible with a square or rectangular cross-sectional area, or a shape in which circular segments are separated from a generally round cross-sectional area (for example, to form a flat section).

[0070] Modifications of the embodiments described above are possible within the scope of the appended claims. Furthermore, as in the fourth embodiment, a single element of each embodiment may be combined with an element of another embodiment. For example, in the first embodiment having symmetrically arranged seed channels, it is conceivable and feasible to arrange a first crucible section with an enlarged diameter, i.e., an enlarged inner diameter (e.g., d'''=172 mm), according to each aspect of the present invention, and to perform post-processing steps (drilling, polishing, lapping, grinding, etc.) to remove material from the edge regions of the cylindrical or tubular wall shapes of the single crystal 14.

[0071] While drilling, polishing, lapping, or grinding were given as examples of post-processing steps in the above embodiments, it goes without saying that other methods known in the field of materials science for material removal are also applicable, as will be apparent to those skilled in the art.

[0072] Surprisingly, it was found that when the dislocation density was reduced within the range described above relative to the reference value, the shear stress of the crystal and the wafers manufactured from that crystal were further significantly reduced. For this purpose, the SIRD measurement method described above was employed.

[0073] To obtain unified parameters for actual single crystals / wafers, the shear stress values ​​obtained for each location on the wafer surface (frequency versus shear stress, considering the sign) are recorded (see, for example, Figure 4 in Geiler et al.), and for the Lorentz curve based on this data, the value of the full width at half maximum of this curve is determined in kPa, for example.

[0074] Figure 13 shows the distribution function, similar to that obtained by Geiler et al. (2006), based on shear stress measured according to the SIRD method for three comparative examples ("Wafer 22", "Wafer 27", and "Wafer 37"). In the figure, the percentage P of the measured values ​​obtained at each shear stress interval. W The relative frequency of the values ​​of shear stress τ occurring for each wafer at each interval is shown. According to this, Geiler et al. (2006) found that the full width at half maximum (FWHM) was approximately 100 kPa for all three comparative examples relating to the prior art. The same value can be approximately obtained as the maximum value of the measured shear stress (as an absolute value in this specification). The maximum value may be read on the left and / or right side of the base of the curve.

[0075] As shown in Figure 14, for three comparative examples following Geiler et al. (2006), the corresponding values ​​of residual stress or shear stress in each single crystal or wafer manufactured according to the present invention were reduced to + / -40 kPa or less, particularly + / -30 kPa or less, and even further to + / -25 kPa, exceeding the residual stress or shear stress values ​​shown in Figure 9. The Lorentz curve obtained in this way is particularly narrow.

[0076] This means that measurements performed on wafers obtained from reference crystals according to each embodiment showed that residual stress was significantly reduced compared to wafers examined by Geiler et al. (2006) using the SIRD method. See also the comparison between comparative examples and embodiments shown in Table 5 for further details.

[0077] [Table 5]

[0078] In the comparative examples in Table 5, we examine GaAs wafers with a diameter of 150 mm, manufactured using a conventional method (as described by Geiler et al. (2006)), separated from the corresponding GaAs single crystals. Figure 9 shows the measured local etch density (EPD). L The distribution of is shown in grayscale, and Figure 10 shows the distribution of measured residual or shear stress in grayscale.

[0079] The corresponding values ​​of the maximum shear stress are shown in Table 5, particularly for comparative examples and embodiments. In Figures 11 and 12, the grayscale scale in the upper right corner must be considered. This scale indicates the range of the corresponding values ​​described herein.

[0080] In practice, the maximum value of shear stress, i.e., the vanishing value of shear stress, i.e., approximately 0 kPa (in this analysis, if there is no sign, only the absolute amount of shear stress is given), has not been reached to date. Therefore, this value, or values ​​of 0.1 kPa or less, and even values ​​of 1 kPa or less, may be excluded or discarded.

[0081] In the embodiments described above and in various other embodiments, the second section includes a longitudinal axis. When this longitudinal axis extends into the area of ​​the first section, it may extend within the first section at a distance of 15 mm or less, preferably 10 mm or less, and more preferably 5 mm or less, from the inner wall of the crucible.

[0082] Furthermore, with respect to such embodiments and aspects, the second section 6' may be formed in a cylindrical shape at least partially and may have an inner diameter of 15 mm or less, particularly in the range of 10 mm to 15 mm or 5 mm to 10 mm.

[0083] In the embodiments described above and in various other embodiments, the apparatus 1 is configured to produce a crystal having a nominal diameter, which is achieved in a post-processing step following the crystal growth step, and the first section has an inner diameter associated with its own cross-sectional region perpendicular to the central axis. This inner diameter may be 2 mm or more, preferably 3 mm or more, and more preferably 5 mm or more, than the nominal diameter. The inner diameter may be up to 10 mm larger than the nominal diameter.

[0084] In the embodiments described above and in various other embodiments, the second section 6, 6' has a length k' along the direction of its central axis M, the length of which is 40 mm to 120 mm, preferably 50 mm to 90 mm, more preferably 60 mm to 80 mm (each range including boundary values).

[0085] The embodiments and various aspects described above relate to AIII-BV single crystals or wafers obtained by separation from AIII-BV single crystals, i.e., semiconductor compound materials in particular. These specifically include, for example, gallium arsenide (GaAs) or indium phosphide (InP).

[0086] In the embodiments described above and in some of the various aspects, a lattice-hardening dopant is included in the single crystal being produced. In such cases, the lattice-hardening dopant may be at least one selected from the group consisting of boron, silicon, zinc, sulfur, and indium. However, other suitable elements may also be included, and the above aspects and embodiments are not limited to the specific dopants listed above.

Claims

1. AIII-BV single crystal (14) or a wafer obtained by separation from the single crystal (14), The average dislocation density in a cross-sectional region perpendicular to its own central axis (M) is the average edge pit density (EPD). av ) as 500cm -2 The following: The shear stress value measured by the SIRD method is within the range of -40 kPa or more and 40 kPa or less. The charge carrier concentration containing the lattice-hardening dopant is 5 × 10 16 Atoms / cm 3 The following, and, An AIII-BV single crystal (14) or wafer characterized in that the diameter of the wafer is 150 mm or more.

2. The lattice-hardening dopant comprises at least one selected from the group consisting of boron, silicon, zinc, sulfur, and indium. The AIII-BV single crystal or wafer according to claim 1.

3. The charge carrier concentration is 1 × 10 16 Atoms / cm 3 The following is: The AIII-BV single crystal or wafer according to claim 1.

4. The average dislocation density of the aforementioned single crystal is 200 cm³. -2 The following is: The AIII-BV single crystal or wafer according to claim 1.

5. The single crystal is made of gallium arsenide (GaAs) or indium phosphide (InP). The AIII-BV single crystal or wafer according to claim 1.