Compact thin-film surface-mountable coupler

JP7887409B2Active Publication Date: 2026-07-09KYOCERA AVX COMPONENTS CORP
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Patent Information

Application Number
JP2023531035
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-11-24
Filing Date
2021-11-23
Publication Date
2026-07-09
Estimated Expiration
2041-11-23

AI Technical Summary

Technical Problem

The miniaturization of couplers has increased the difficulty of surface mounting, necessitating the development of compact, surface-mountable thin-film couplers that can efficiently reproduce electrical signals while maintaining a small footprint.

Method used

A surface-mountable thin-film coupler with a monolithic base substrate and multiple ports, including thin-film inductors and capacitors, designed to operate with a coupling coefficient greater than -5 dB over a specific frequency range and occupy an area less than 3 mm², facilitating efficient signal coupling and splitting.

Benefits of technology

The coupler achieves uniform high-frequency coupling with a small footprint, enabling miniaturized device integration and reducing space requirements on printed circuit boards.

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Abstract

The surface-mountable thin film coupler may include a monolithic base substrate and a plurality of ports formed on the monolithic base substrate. The surface-mountable thin film coupler may include at least one thin film component connected to at least one of the plurality of ports. The surface-mountable thin film coupler may exhibit a coupling coefficient greater than -5 dB and less than -1 dB over a coupling frequency range having a lower limit greater than 1 GHz and an upper limit at least 200 MHz higher than the lower limit. The coupler has a footprint of approximately 3 mm. 2 It can be less than.
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Description

[Technical Field]

[0001] Cross-reference of related applications This application claims priority to U.S. Provisional Patent Application No. 63 / 117,615, filed November 24, 2020, which is incorporated herein by reference in its entirety. [Background technology]

[0002] Couplers generally connect source lines to coupling lines without direct electrical connection, and reproduce the electrical signals of signal lines in the coupling lines. The trend towards miniaturization has led to an increasing demand for tiny passive components. However, miniaturization has also increased the difficulty of surface mounting such tiny couplers. Therefore, compact, surface-mountable thin-film couplers would be welcome in this field. [Overview of the project] [Means for solving the problem]

[0003] According to one embodiment of the present invention, a surface-mountable thin-film coupler may include a monolithic base substrate and a plurality of ports formed on the monolithic base substrate. The surface-mountable thin-film coupler may include at least one thin-film component connected to at least one of the plurality of ports. The surface-mountable thin-film coupler can exhibit a coupling coefficient greater than -5 dB over a coupling frequency range having a lower limit of above 1 GHz and an upper limit of at least 200 MHz higher than the lower limit. The occupied area of ​​the coupler is approximately 3 mm². 2 It can be less than.

[0004] According to another embodiment of the present invention, a surface-mountable thin-film coupler may include a monolithic base substrate and a plurality of ports formed on the monolithic base substrate. The plurality of ports may include a separation port, a coupling port, an input port, and an output port. A first thin-film inductor may be connected between the input port and the output port. A second thin-film inductor may be connected between the coupling port and the separation port and inductively coupled to the first thin-film inductor. The occupied area of ​​the coupler is approximately 3 mm². 2 It can be less than.

[0005] According to another embodiment of the present invention, a method for forming a surface-mountable thin-film coupler may include providing a monolithic base substrate and forming a plurality of ports on the monolithic base substrate. The plurality of ports may include a separation port, a coupling port, an input port, and an output port. The method may include forming a first thin-film inductor connected between the input port and the output port. The method may also include forming a second thin-film inductor connected between the coupling port and the separation port and inductively coupled to the first thin-film inductor. The occupied area of ​​the coupler is approximately 3 mm². 2 It can be less than.

[0006] This specification contains a complete and implementable disclosure of the invention, including the best mode of the invention intended for those skilled in the art. This specification refers to the following appended drawings. [Brief explanation of the drawing]

[0007] [Figure 1] This is a schematic diagram showing a compact thin-film surface-mountable coupler according to an aspect of the present disclosure. [Figure 2] This is a top view showing one embodiment of a coupler according to an aspect of the present disclosure. [Figure 3] Figure 2 is a side view of the coupler. [Figure 4A] This figure shows an exemplary first patterned conductive layer that can be formed on a monolithic substrate of a compact thin-film surface-mountable coupler according to an aspect of the present disclosure. [Figure 4B] This figure shows an exemplary second pattern-forming conductive layer that can be formed on the first layer of Figure 4A according to an aspect of the present disclosure. [Figure 4C] This figure shows an exemplary second pattern-forming conductive layer that can be formed on the second layer of Figure 4B according to an aspect of the present disclosure. [Figure 5] This flowchart shows a method for forming a surface-mountable coupler according to an aspect of the present disclosure. [Figure 6] This graph shows the theoretically calculated S-parameters of a 3dB coupler configured as a whole, as shown in Figures 1 and 4C, across a frequency range from 2GHz to 3GHz. [Figure 7] This graph shows the logically calculated S-parameters of the 3dB coupler, configured as a whole, over a frequency range from 3GHz to 4.5GHz, as shown in Figures 1 and 4C. [Figure 8] This figure shows a power supply including a coupler according to an aspect of the present disclosure. [Modes for carrying out the invention]

[0008] The repeated use of reference letters throughout this specification and the accompanying drawings is intended to represent identical or similar features or elements of the present invention.

[0009] A surface-mounted thin-film coupler is provided that achieves uniform high-frequency coupling in a compact surface-mountable package. Generally, the coupler reproduces a coupled signal at a coupling port in response to an input signal being applied to an input port of the coupler. In some embodiments, the coupler can be configured as a 3 dB splitter / combiner. A 3 dB splitter / combiner can distribute an input signal approximately equally between a coupling port and an output port. The input signal can be reproduced with an amplitude that is half the amplitude of the input signal on each of a coupling line and an output line. Similarly, a 3 dB splitter / combiner can combine a first signal applied to an input port and a second signal applied to a coupling port to generate a combined signal at an output port. Such 3 dB splitters / combiners are used in a variety of applications, including, for example, a power supply described below with reference to FIG. 8.

[0010] Generally, the thin-film coupler of the present disclosure exhibits excellent performance characteristics in a very compact surface-mountable package. Thus, this thin-film coupler requires very little space (e.g., very little footprint area) when mounted on a surface such as a printed circuit board. Such a compact size can be particularly useful as devices employing surface-mount technology, such as power supplies, are miniaturized.

[0011] For example, this coupler has a small footprint area and thus requires less space for mounting on a printed circuit board. The coupler can have a footprint area of less than about 3 mm 2 in some embodiments less than about 2.5 mm 2 in some embodiments less than about 2.0 mm 2 in some embodiments less than about 1.5 mm 2 in some embodiments less than about 1.0 mm 2 in some embodiments less than about 0.8 mm 2 in some embodiments less than about 0.6 mm 2 in some cases.

[0012] The coupler may have a length of less than approximately 2.0 mm, less than approximately 1.8 mm in some embodiments, less than approximately 1.5 mm in some embodiments, and less than approximately 1.1 mm in some embodiments. The coupler may have a width of less than approximately 1.2 mm, less than approximately 1 mm in some embodiments, less than approximately 0.8 mm in some embodiments, less than approximately 0.7 mm in some embodiments, and less than approximately 0.6 mm in some embodiments. In some embodiments, the thin-film coupler may have an EIA case size of 1206, 805, 0504, 0402, 0303, 0202, or smaller.

[0013] The coupler generally includes a monolithic base substrate. For surface mounting of the coupler using, for example, grid array type mounting (e.g., land grid array (LGA) type mounting, ball grid array (BGA) type, etc.), at least one port (e.g., input port, output port, coupling port, and / or separation port) may be exposed along the outside of the coupler. The coupler may include a monolithic base substrate and a plurality of ports formed on the monolithic base substrate. At least one thin-film component may be connected to at least one of the plurality of ports. A surface-mountable thin-film coupler can exhibit a coupling coefficient greater than -5dB over a coupling frequency range having a lower limit above 1 GHz and an upper limit at least 200 MHz higher than the lower limit. For example, the lower limit of the coupling frequency range can be from about 1 GHz to about 8 GHz, and in some embodiments, from about 1.5 GHz to about 6 GHz, and in some embodiments, from about 2 GHz to about 4 GHz. The upper limit can be 200 MHz or more higher than the lower limit, 300 MHz or more higher than the lower limit depending on the embodiment, 500 MHz or more higher than the lower limit depending on the embodiment, 800 MHz or more higher than the lower limit depending on the embodiment, 1 GHz or more higher than the lower limit depending on the embodiment, and even 2 GHz or more higher than the lower limit depending on the embodiment.

[0014] Depending on the embodiment, the coupler can exhibit a coupling coefficient greater than -5 dB and less than -1 dB over the coupling frequency range. For example, as described above, depending on the embodiment, the coupler can be a 3 dB coupler. In such an embodiment, the coupler can exhibit a coupling coefficient of approximately -3 dB. For example, the coupler can exhibit a coupling coefficient between -2 dB and -4 dB, and depending on the embodiment, between -2.5 dB and -3.5 dB. As another example, the coupling frequency range can extend from approximately 2 GHz to approximately 3 GHz, and depending on the embodiment, from approximately 2 GHz to approximately 4 GHz, and further depending on the embodiment, from approximately 3 GHz to approximately 4.5 GHz.

[0015] The coupler can perform constant coupling over the coupling frequency range. For example, the coupler can exhibit a coupling coefficient with a variation of less than 5 dB over the coupling frequency range, less than 4.5 dB depending on the embodiment, less than 4 dB depending on the embodiment, less than 3.5 dB depending on the embodiment, and further less than 3 dB depending on the embodiment. The variation of the coupling coefficient can be less than 5 dB per 1 GHz, less than 3 dB per 1 GHz depending on the embodiment, less than 2 dB per 1 GHz depending on the embodiment, less than 1.5 dB per 1 GHz depending on the embodiment, and further less than 1.2 dB per 1 GHz depending on the embodiment.

[0016] The coupler can exhibit a isolation coefficient of less than approximately -10 dB over the coupling frequency range, less than approximately -12 dB over the coupling frequency range depending on the embodiment, less than approximately -14 dB depending on the embodiment, less than approximately -16 dB depending on the embodiment, and further less than approximately -17 dB depending on the embodiment. A low isolation coefficient over the coupling frequency range indicates excellent directivity. In contrast, a high isolation coefficient (e.g., an isolation coefficient greater than -10 dB) would indicate a coupler with high losses.

[0017] The coupler may include one or more thin film components configured to generate a combined signal at a combining port in response to an input signal received by an input port (e.g., with respect to a splitting port). For example, the coupler may include a first thin film inductor connected between an input port and an output port. The coupler may include a second thin film inductor connected between a combining port and a splitting port and inductively coupled to the first thin film inductor.

[0018] In some embodiments, the coupler may include one or more thin film capacitors. For example, a first thin film capacitor may be connected between an input port and a combining port. A second thin film capacitor may be connected between a splitting port and an output port.

[0019] The coupler may include a monolithic base substrate. A plurality of layers may be formed on the monolithic base substrate. The plurality of layers may include a dielectric material and / or a protective material. The coupler may include a patterned conductive layer including thin film components formed on and / or between the various layers. In some embodiments, a cover layer may be formed on these layers. The cover layer may include various suitable materials such as silicon oxynitride. In some embodiments, a first protective layer may be formed on the cover layer. The first protective layer may include various suitable materials such as polyimide.

[0020] The ports may extend through these layers (and the first protective layer, if present) and be electrically connected to a first patterning conductive layer (e.g., adjacent to a monolithic base substrate), a second patterning conductive layer, and / or a third patterning conductive layer. The ports may protrude beyond the outer surface of the cover layer (e.g., a "flip chip") so that a coupler can be mounted (e.g., in a printed circuit) through the ports and electrically connected. The ports may be formed by selective etching followed by the deposition of a conductive material (e.g., copper) using, for example, electroplating. The ports may include one or more layers on top of the conductive material, such as plating of tin, nickel, or mixtures thereof.

[0021] As used herein, the first layer "formed on" the second layer may mean that the first layer is positioned on the second layer with respect to the thickness direction of the bonder. The first layer may be in direct contact with the second layer. However, an intermediate layer may also be formed between these layers so that the first and second layers do not come into direct contact with each other.

[0022] The cover layer may include, for example, a suitable ceramic dielectric material as described later. The cover layer may have a thickness ranging from about 100 micrometers to about 600 micrometers, in some embodiments from about 125 micrometers to about 500 micrometers, in some embodiments from about 150 micrometers to about 400 micrometers, and in some embodiments from about 175 micrometers to about 300 micrometers.

[0023] The base substrate, dielectric layer, and / or cover layer may comprise one or more suitable ceramic materials. Suitable materials are generally electrically insulating and thermally conductive. Examples of dielectric materials include organic materials such as hafnium dioxide (HFO2), aluminum oxide (AL2O3), tantalum pentoxide (Ta2O5), silicon oxynitride, silicon nitride, silicon oxide, and silk. In another embodiment, one or more of the following dielectric materials may be employed: namely, barium titanate, strontium titanate, strontium barium titanate, bismuth strontium tantalate, niobium, oxides or nitrides of such substances, lead-based materials such as NPO(COG), X7R, X7S, Z5U, Y5V formulations, and doped or undoped PZT dielectrics.

[0024] The base substrate and / or cover layer may include glass, ceramic, organic material, or mixtures thereof. Examples of other materials for the base substrate and / or cover layer include alumina, aluminum nitride, beryllium oxide, aluminum oxide, boron nitride, silicon, silicon carbide, silica, gallium arsenide, gallium nitride, zirconium oxide, mixtures thereof, oxides and / or nitrides of such substances, or any other suitable ceramic material. Other ceramic materials include calcium titanate (CaTiO3), zinc oxide (ZnO), low-fired glass-containing ceramics, and other glass-bonding materials.

[0025] Depending on the embodiment, one or more of the base substrate, dielectric layer, and / or cover layer may contain sapphire or ruby. Sapphire and ruby ​​are types of corundum, which are crystalline forms of aluminum oxide (ceramic material) containing additional trace elements. Substrates containing sapphire may exhibit several advantages, including excellent electrical insulation, heat dissipation, and high-temperature stability. Furthermore, because sapphire is generally transparent, internal features of the coupler can be visually inspected, thereby reducing the time and difficulty associated with inspecting the quality of the finished component.

[0026] The base substrate, dielectric layer, and / or cover layer may include materials having a dielectric constant of less than about 30, less than about 25, less than about 20, and less than about 15, as measured according to ASTM D2149-13 at an operating temperature of 25°C and a frequency of 1 kHz. However, in other embodiments, materials having a dielectric constant greater than 30 may be used to realize higher frequencies and / or smaller components. For example, in such embodiments, the dielectric constant may be in the range of about 30 to about 120 or more, less than about 50 to about 100, and less than about 70 to about 90, as measured according to ASTM D149-13 at an operating temperature of 25°C and a frequency of 1 kHz.

[0027] Thin-film components may be formed from a variety of suitable materials. Thin-film inductors and / or capacitors may include a conductive layer. The conductive layer may include a variety of suitable conductive materials. Examples of conductive materials include copper, nickel, gold, tin, lead, palladium, silver, and alloys thereof. However, any conductive metallic or non-metallic material suitable for thin-film fabrication may be used. Depending on the embodiment, the coupler may include a thin-film resistor. The thin-film resistor may include a resistive layer, which may be formed from a variety of suitable resistive materials. For example, the resistive layer may include tantalum nitride (TaN), nickel-chromium (NiCr), tantalum aluminide, chromium-silicon, titanium nitride, titanium-tungsten, tantalum-tungsten, oxides and / or nitrides of these materials, and / or any other suitable thin-film resistive material.

[0028] The layers of the thin film component may have a thickness of about 50 micrometers or less, 20 micrometers or less depending on the embodiment, 10 micrometers or less depending on the embodiment, or 5 micrometers or less depending on the embodiment. For example, depending on the embodiment, the thickness of the thin film component may be in the range of about 0.05 micrometers to about 50 micrometers, 0.1 micrometers to about 20 micrometers depending on the embodiment, 0.3 micrometers to about 10 micrometers depending on the embodiment, or 1 micrometer to about 5 micrometers depending on the embodiment.

[0029] Thin film components may be precisely formed using various suitable subtractive, semi-additive, or fully additive processes. For example, physical vapor deposition and / or chemical vapor deposition may be used. For example, depending on the embodiment, thin film components may be formed using sputtering, which is a type of physical vapor deposition. However, various other suitable processes may be used, including, for example, plasma chemical vapor deposition (PECVD), electroless plating, and electroplating. Lithography masks and etching may be used to create the desired shape of the thin film component. Various suitable etching techniques may be used, including dry etching and / or wet etching using plasma of reactive or non-reactive gases (e.g., argon, nitrogen, oxygen, chlorine, boron, trichloride).

[0030] In some embodiments, the coupler may include at least one adhesive layer in contact with one or more thin film components. The adhesive layer may be, or include, a variety of materials suitable for improving adhesion between the thin film components and adjacent layers such as a base substrate, a dielectric layer, and / or a cover layer. For example, the adhesive layer may include at least one of Ta, Cr, TaN, TiW, Ti, or TiN. For instance, the adhesive layer may be, or include, tantalum (Ta) (e.g., tantalum or its oxide or nitride) and may be formed between the microstrip and the base substrate to improve adhesion between the microstrip and the base substrate. Theoretically, the material of the adhesive layer may be selected to overcome phenomena such as lattice mismatch and residual stress.

[0031] The adhesive layer may have a variety of suitable thicknesses. For example, depending on the embodiment, the thickness of the adhesive layer may range from about 100 angstroms to about 1000 angstroms, depending on the embodiment, from about 200 angstroms to about 800 angstroms, and depending on the embodiment, from about 400 angstroms to about 600 angstroms.

[0032] As described above, the coupler may be configured to surface mount components to a mounting surface such as a printed circuit board (PCB) using ports exposed along the bottom surface of the coupler for surface mounting. For example, the coupler may be configured for grid array surface mounting, such as land grid array (LGA) mounting, ball grid array (BGA) mounting, or any other suitable type of grid array surface mounting. Therefore, the ports do not have to extend along the sides of the base substrate, as in the case of surface mount devices (SMDs), for example. Thus, depending on the embodiment, conductive material may not be present on the sides of the base substrate and / or the coupler.

[0033] In some embodiments, the coupler may include a first protective layer exposed along the bottom surface of the coupler and / or a second protective layer exposed along the top surface of the coupler. For example, the first protective layer may be formed on a cover layer. In some embodiments, the second protective layer may be formed on a second surface of a monolithic base substrate. The first and / or second protective layer may include layers of polymer material (e.g., polyimide), SiNO, Al2O3, SiO2, Si3N4, benzocyclobutene, or glass. The first and / or second protective layer may have a thickness ranging from about 1 micrometer to about 300 micrometers, in some embodiments from about 5 micrometers to about 200 micrometers, and in some embodiments from about 10 micrometers to about 100 micrometers. I. Exemplary Embodiments Figure 1 shows a schematic diagram of a coupler 100 according to an embodiment of the present disclosure. The coupler 100 may include an input port 102, an output port 104, a coupling port 106, and a separation port 108. A first inductive inductor 110 may be inductively coupled to a second inductor 112. The first inductor 110 may be connected between the input port 102 and the output port 104. The second thin-film inductor 112 may be connected between the coupling port 106 and the separation port 108.

[0034] Depending on the embodiment, a first thin-film capacitor 114 may be coupled between the input port 102 and the coupling port 106. A second thin-film capacitor 116 may be connected between the isolation port 108 and the output port 104.

[0035] However, other configurations can be adopted within the scope of this disclosure. For example, one or more capacitors 114, 116 may be omitted. Additional capacitors, inductors, and / or resistors may be used to provide the desired performance characteristics. Those skilled in the art will see that a variety of configurations are possible within the scope of this disclosure.

[0036] Figure 2 shows a top view of one embodiment of a coupler 200 according to an aspect of the present disclosure. The coupler 200 may include a plurality of ports, including, for example, an input port 202, an output port 204, a coupling port 206, and / or a separation port 208. A first thin-film inductor 210 may be inductively coupled to a second thin-film inductor 212. The first inductor 210 may be connected between the input port 202 and the output port 204. For example, the first thin-film inductor 210 may include pattern-forming conductive wires separated from the pattern-forming conductive wires of the second thin-film inductor 212 in the thickness direction of the coupler 200, as will be described later with reference to Figures 4A to 4C. The second thin-film inductor 212 may be connected between the coupling port 206 and the separation port 208, for example by one or more vias 209. The second thin-film inductor 212 may include patterned conductive wires separated from the patterned conductive wires of the first thin-film inductor 210 in the thickness direction of the coupler 200 (for example, by the second layer 244 shown in Figure 3).

[0037] In some embodiments, a first thin-film capacitor 214 may be connected between the input port 202 and the coupling port 206. The first thin-film capacitor 214 may consist of a first portion 214a and a second portion 214b. The first portion 214a may be formed by a first patterned conductive wire on one layer of the coupler 200, and the second portion 214b may be formed by a second patterned conductive wire on another layer separated in the thickness direction of the coupler 200 from the layer having the first portion 214a. A second thin-film capacitor 216 may be connected between the isolation port 208 and the output port 204. The second thin-film capacitor 216 may consist of a first portion 216a and a second portion 216b. The first portion 216a may be formed by a first patterned conductive wire on one layer of the coupler 200, and the second portion 216b may be formed by a second patterned conductive wire on another layer separated in the thickness direction of the coupler 200 from the layer having the first portion 216a.

[0038] The coupling device 200 may have a length 218 in the longitudinal direction 220 and a width 222 in the transverse direction 224. As described above, the coupling device 200 has a small occupied area (e.g., about 3 mm) that can be defined as the area of ​​the coupling device 200 equal to the value obtained by multiplying the length 218 by the width 222. 2 It has a size of less than 50, and therefore requires less space to be mounted on a printed circuit board.

[0039] It should be understood that the differences in shading of different elements, such as the spotted shading of the first portion 214a of the first thin-film capacitor 214 and the first portion 216a of the second thin-film capacitor 216, the grid-like shading of the first thin-film inductor 210, and the cross-hatch shading of the second thin-film inductor 212, are merely for the purpose of examining the drawing in detail, such as distinguishing different elements in Figure 2. Also, Figure 2 shows the relative positions or layouts of various elements of the coupler 200, such as ports 202, 204, 206, 208, the first inductor 210, the second inductor 212, the first capacitor 214, and the second capacitor 212, in relation to each other in at least some embodiments of the coupler 200, and Figure 2 does not necessarily represent the relative positions of various patterned conductive wires, for example, in the thickness direction.

[0040] Referring to Figure 3, the coupler 200 may include a monolithic base substrate 240. A first layer 242 may be formed on the monolithic base substrate 240 with respect to the thickness direction 243 of the coupler 200. A second layer 244 may be formed on the first layer 242. A cover layer 246 may be formed on the second layer 244. A first pattern-forming conductive layer 248 may be formed on the monolithic base substrate 240. A second pattern-forming conductive layer 250 may be formed on the first layer 242. A third pattern-forming conductive layer 252 may be formed on the second layer 244. One or more protective layers may be formed on one or more of the pattern-forming conductive layers 248, 250, and 242, and / or on the first layer 242, the second layer 244, and / or the third layer 246. For example, a protective layer may be formed between the second pattern-forming conductive layer 248 and the first layer 242. The protective layer may contain polymer materials such as polyimide.

[0041] One or more vias 209 may be formed through one or more of the layers 242 and 244. The cover layer 246 may contain various suitable materials such as silicon oxynitride. Depending on the embodiment, a first protective layer may be formed on the cover layer 246. The first protective layer may contain various suitable materials such as polyimide.

[0042] Referring to Figure 3, ports 202, 204, 206, and 208 may extend through layers 242, 244, and 246 (and the first protective layer if there is a first protective layer) and may be electrically connected to the first patterning conductive layer 248, the second patterning conductive layer 250, and / or the third patterning conductive layer 252, for example, as described and illustrated with respect to Figures 4A to 4C.

[0043] Ports 202, 204, 206, and 208 may protrude from the outer surface 254 of the cover layer 246 so that the coupler 200 can be mounted (e.g., on a printed circuit) and electrically connected via ports 202, 204, 206, and 208. Ports 202, 204, 206, and 208 may be formed by selective etching followed by deposition of a conductive material (e.g., copper) using, for example, electroplating. Ports 202, 204, 206, and 208 may include one or more layers on top of a conductive material such as plating of tin, nickel, or a mixture thereof.

[0044] Figures 4A to 4C show exemplary conductive patterns according to embodiments of the present disclosure. Figure 4A shows an exemplary first pattern-forming conductive layer 248 that can be formed on a monolithic base substrate 240. Figure 4B shows an exemplary second pattern-forming conductive layer 250 that can be formed on the first layer 242. Figure 4C shows an exemplary third pattern-forming conductive layer 252 that can be formed on the second layer 244.

[0045] Referring to Figure 5, aspects of this disclosure relate to a method 500 for forming a surface-mountable coupler. Overall, the method 500 is described here with reference to the thin-film coupler 200 described above with reference to Figures 1 to 4C. However, it should be understood that the disclosed method 500 can also be implemented with any suitable thin-film coupler. Furthermore, although Figure 5 shows the steps performed in a particular order for illustrative and explanatory purposes, the method described herein is not limited to any particular order or arrangement. Those skilled in the art who use the disclosures presented herein will find that various steps of the method disclosed herein can be omitted, rearranged, combined, and / or modified in various ways without departing from the scope of this disclosure.

[0046] Method 500 may also include providing a monolithic base substrate in (502). The monolithic base substrate may be one or more suitable ceramic materials, sapphire, or ruby, or any of the various materials described herein, or may include such materials.

[0047] Method 500 may also include forming a plurality of ports on a monolithic base substrate in (504). The plurality of ports may include isolation ports, coupling ports, input ports, and output ports, as described above with reference to Figures 1 to 4C, for example. A series of layers can be deposited on the monolithic base substrate. Openings or windows through which ports can be formed or deposited can be formed within these series of layers.

[0048] Method 500 may also include, in (506), forming a first thin-film inductor connected between an input port and an output port. Method 500 may also include, in (508), forming a second thin-film inductor connected between a coupling port and a separation port and inductively coupled to the first thin-film inductor. For example, as described above with reference to Figures 2 to 4C, the first thin-film inductor may include forming patterned conductive wires separated in the thickness direction of the coupler from the patterned conductive wires of the second thin-film conductor. For example, the formation of the first thin-film inductor may include depositing and patterning a conductive layer (e.g., a second patterned conductive layer 250 on a first layer 242). The formation of the second thin-film inductor may include depositing and patterning a conductive layer (e.g., a third patterned conductive layer 252 on a second layer 244).

[0049] In some embodiments, method 500 may include, in (510), forming a first thin-film capacitor connected between an input port and a coupling port, as described above with reference to Figures 1 to 4C, for example, and forming a second thin-film capacitor connected between an isolation port and an output port. II. Simulation Data Figure 6 shows the theoretically calculated S-parameters of a first coupler configured as a whole, as described above with reference to the coupler 200 of Figures 1 to 4C, according to an aspect of this disclosure. Figure 6 shows the S-parameters over a frequency range from 2 GHz to 3 GHz. As is well known in the art, S-parameters are expressed using subscripts in the form S(a,b). The values ​​a and b indicate the port numbers associated with the S-parameter, so that each S-parameter can be understood as representing a signal that occurs at port b as a result of a signal input at port a. As is well known in the art, S-parameters are generally referred to as follows:

[0050] [Table 1] As shown in Figure 6, in this embodiment, the coupling coefficient varies from approximately -4 dB at 2 GHz to -2 dB at 3 GHz. Therefore, the coupling coefficient varies by approximately 2 dB over the frequency range from 2 GHz to 3 GHz. The coupling coefficient varies by approximately 2 dB for every 1 GHz over the frequency range shown in Figure 6.

[0051] However, the coupling frequency range can be defined as from 2.3 GHz to 2.7 GHz. The following table shows the coupling coefficients at the upper and lower limits of this coupling frequency range.

[0052] [Table 2] The coupling coefficient may vary by approximately 0.65 dB across the coupling frequency range. The upper limit of the coupling frequency range, 2.7 GHz, is 400 MHz higher than the lower limit of the coupling frequency range, 2.3 GHz. Therefore, in this embodiment, the coupling coefficient may vary by approximately 1.63 dB for every 1 GHz across the coupling frequency range.

[0053] The separation factor is less than -18dB across the coupling frequency range. Such a low separation factor indicates excellent directivity. In contrast, a separation factor greater than -10dB indicates a lossy coupler.

[0054] Figure 7 shows the theoretically calculated S-parameters of a second coupler configured as described above, with reference to the coupler 200 in Figures 1 to 4C, according to an embodiment of this disclosure. In this embodiment, the coupling coefficient varies from -4.5 dB at 3 GHz to approximately -2.5 dB at 4.5 GHz. Therefore, the coupling coefficient varies by approximately 2 dB over the frequency range from 2 GHz to 3 GHz. The coupling coefficient varies by approximately 2 dB for every 1 GHz over the frequency range shown in Figure 7.

[0055] However, the coupling frequency range can be defined as from 3.7 GHz to 4 GHz. The following table shows the coupling coefficients at the upper and lower limits of the coupling frequency range.

[0056] [Table 3] The coupling coefficient may vary by approximately 1.02 dB across the coupling frequency range. The upper limit of the coupling frequency range, 4 GHz, is 300 MHz higher than the lower limit of the coupling frequency range, 3.7 GHz. Therefore, in this embodiment, the coupling coefficient may vary by approximately 1.02 dB for every 1 GHz across the coupling frequency range.

[0057] The separation factor is less than -17dB across the coupling frequency range. Such a low separation factor indicates excellent directivity. In contrast, a separation factor greater than -10dB indicates a lossy coupler. III. Exam The coupling coefficient, insertion loss, return loss, and other S-parameter characteristics may be tested using a signal source generator (e.g., the 1306 Keithley 2400 series power measurement unit (SMU), e.g., the Keithley 2410-C SMU). For example, an input signal may be applied to the input port of the coupler using a signal source generator, and the coupling signal may be measured at the coupling port of the coupler. IV.Applications The coupler of this disclosure can be used in a variety of applications. For example, applications include power amplifiers, WiFi, Worldwide Interoperability for Microwave Access (WiMAX), Wireless Broadband (WIBRO), Long-Term Evolution (LTE), Bluetooth, and / or low-power wireless gateway applications. Other examples include power sensing, frequency sensing, and voltage standing wave ratio (VSWR) monitoring.

[0058] Examples of applications include compact components configured for 5G signal processing (e.g., 5G base stations), smartphones, signal repeaters (e.g., small cells), relay stations, radar, and radio-frequency identification (RFID) devices. For example, a power supply may include a 3dB coupler according to this disclosure. As mentioned above, a 3dB coupler is also called a splitter / combiner. Compact 3dB couplers with excellent performance characteristics can facilitate less expensive power supply designs. Instead of using one powerful and costly power amplifier, a pair of less powerful and less expensive power amplifiers using two 3dB couplers can be employed, as described below with reference to Figure 8, for example.

[0059] Figure 8 shows a power supply 800 including a coupler according to an embodiment of the present disclosure. The power supply 800 includes a first coupler 802, for example, as described above with respect to the coupler 200 in Figures 1 to 4C. The isolation port 806 of the first coupler 802 may be connected to ground 808. The input port 810 of the first coupler 802 may correspond to the input of the power supply 800. The output port 812 of the first coupler 802 can be connected to a first amplifier 814. The coupling port 816 of the first coupler 802 can be connected to a second amplifier 818. In some embodiments, the first coupler 802 can be configured to provide a coupled signal at the coupling port 816 that is phase-shifted relative to the signal output at the output port 812. For example, the coupled signal at the coupling port 816 may be 90 degrees out of phase with the output signal.

[0060] The first amplifier 814 and the second amplifier 818 may be connected to the second coupler 804. More specifically, the first amplifier 814 can be connected to the coupling port 820 of the second coupler 804. The second amplifier 818 can be connected to the input port 822 of the second coupler 804. The isolation port 824 of the second coupler 804 can be connected to ground 826. The output port 828 of the second coupler 804 is power supply It can be equivalent to an output of 800.

[0061] Without departing from the spirit and scope of the present invention, the above and other modifications and variations of the present invention can be implemented by those skilled in the art. Furthermore, it should be understood that all or part of the various embodiments may be replaced. Moreover, those skilled in the art will see that the above description is illustrative and not intended to limit the present invention to what is further described in the appended claims.

Claims

1. A surface-mountable thin-film coupler, Monolithic base board and A plurality of ports formed on the monolithic base substrate, including a separation port, a coupling port, an input port, and an output port, At least one thin-film component connected to at least one port among the plurality of ports, A first thin-film inductor connected between the input port and the output port, A second thin-film inductor is connected between the coupling port and the separation port and inductively coupled to the first thin-film inductor, A first thin-film capacitor connected between the input port and the coupling port, comprising a first pattern-forming conductive wire formed on a first layer and a second pattern-forming conductive wire formed on a second layer separate from the first layer, A second thin-film capacitor connected between the isolation port and the output port, comprising a first pattern-forming conductive wire formed on a first layer and a second pattern-forming conductive wire formed on a second layer separate from the first layer, A thin film component including at least one thin film component, Includes, The surface-mountable thin-film coupler exhibits a coupling coefficient greater than -5 dB and less than -1 dB over a coupling frequency range having a lower limit above 1 GHz and an upper limit at least 200 MHz higher than the lower limit. The first and second thin-film capacitors move away from the first and second thin-film inductors. The surface-mountable thin film coupler has an occupied area of ​​approximately 3 mm². 2 A surface-mountable thin-film coupler that is less than [amount missing].

2. The surface-mountable thin-film coupler according to claim 1, wherein the surface-mountable thin-film coupler exhibits a coupling coefficient of approximately -3 dB over the coupling frequency range.

3. The surface-mountable thin-film coupler according to claim 1, wherein the surface-mountable thin-film coupler exhibits a coupling coefficient that fluctuates by less than 5 dB over the coupling frequency range.

4. The surface-mountable thin-film coupler according to claim 1, wherein the surface-mountable thin-film coupler exhibits a coupling coefficient that fluctuates by less than 3 dB per 1 GHz over the coupling frequency range.

5. The surface-mountable thin-film coupler according to claim 1, wherein the surface-mountable thin-film coupler exhibits a separation coefficient of less than approximately -10 dB over the coupling frequency range.

6. The surface-mountable thin film coupler according to claim 1, wherein the width of the surface-mountable thin film coupler is less than approximately 1.2 mm.

7. The surface-mountable thin film coupler according to claim 1, wherein the length of the surface-mountable thin film coupler is less than approximately 2 mm.

8. The surface-mountable thin film coupler has an occupied area of ​​approximately 1 mm². 2 A surface-mountable thin-film coupler according to claim 1, wherein the coupling is less than [amount missing].

9. The surface-mountable thin film coupler according to claim 1, wherein the at least one thin film component includes a layer having a thickness of less than about 50 micrometers.

10. The surface-mountable thin film coupler according to claim 1, further comprising a cover layer formed on at least one thin film component.

11. The surface-mountable thin-film coupler according to claim 10, wherein the cover layer contains silicon oxynitride.

12. The surface-mountable thin-film coupler according to claim 1, wherein the monolithic base substrate includes a ceramic material.

13. A surface-mountable thin-film coupler, Monolithic base board and A plurality of ports formed on the monolithic base substrate, including a separation port, a coupling port, an input port, and an output port, A first thin-film inductor connected between the input port and the output port, comprising a first thin-film inductor formed from a first pattern-forming conductive wire, A second thin-film inductor connected between the coupling port and the separation port and inductively coupled to the first thin-film inductor, the second thin-film inductor being formed from a second pattern-forming conductive wire, The first thin-film capacitor and, The second thin-film capacitor, Includes, The first thin-film capacitor and the second thin-film capacitor are formed from pattern-forming conductive wires separate from the first and second pattern-forming conductive wires. The surface-mountable thin film coupler has an occupied area of ​​approximately 3 mm². 2 A surface-mountable thin-film coupler that is less than [amount missing].

14. The surface-mountable thin-film coupler according to claim 13, wherein the surface-mountable thin-film coupler exhibits a separation coefficient of less than approximately -10 dB over the coupling frequency range.

15. The surface-mountable thin-film coupler according to claim 13, wherein the surface-mountable thin-film coupler exhibits a coupling coefficient between -1 dB and -5 dB over the coupling frequency range.

16. The surface-mountable thin-film coupler according to claim 13, wherein the surface-mountable thin-film coupler exhibits a coupling coefficient that fluctuates by less than 5 dB over the coupling frequency range.

17. The surface-mountable thin-film coupler according to claim 13, wherein the surface-mountable thin-film coupler exhibits a coupling coefficient that fluctuates by less than 3 dB per 1 GHz over the coupling frequency range.

18. The surface-mountable thin-film coupler according to claim 13, wherein at least one of the first thin-film inductor or the second thin-film inductor includes a layer having a thickness of less than about 50 micrometers.

19. The surface-mountable thin film coupler according to claim 13, wherein one of the first or second thin film capacitors is connected to at least one of the input port or the isolation port.

20. The first thin-film capacitor is connected between the input port and the coupling port, The surface-mountable thin-film coupler according to claim 13, wherein the second thin-film capacitor is connected between the isolation port and the output port.

21. The surface-mountable thin-film coupler according to claim 13, further comprising a cover layer formed on the first thin-film inductor and the second thin-film inductor.

22. The surface-mountable thin-film coupler according to claim 21, wherein the cover layer contains silicon oxynitride.

23. The surface-mountable thin film coupler according to claim 13, wherein the width of the surface-mountable thin film coupler is less than approximately 1.2 mm.

24. The surface-mountable thin film coupler according to claim 13, wherein the length of the surface-mountable thin film coupler is less than approximately 2 mm.

25. The surface-mountable thin-film coupler according to claim 13, wherein the monolithic base substrate includes a ceramic material.

26. A method for forming a surface-mountable thin-film coupler, The steps include providing a monolithic base substrate, A step of forming a plurality of ports on the monolithic base substrate, wherein the plurality of ports include a separation port, a coupling port, an input port, and an output port. A step of forming a first pattern-forming conductive wire, wherein the first pattern-forming conductive wire defines a first thin-film inductor connected between the input port and the output port. A step of forming a second pattern-forming conductive wire, wherein the second pattern-forming conductive wire is connected between the coupling port and the separation port and a second thin-film inductively coupled to the first thin-film inductor, A step of forming a third pattern-forming conductive wire, wherein the third pattern-forming conductive wire defines a first thin-film capacitor, A step of forming a fourth pattern-forming conductive wire, wherein the fourth pattern-forming conductive wire defines a second thin-film capacitor, Includes, The third and fourth pattern-forming conductive wires are separate from the first and second pattern-forming conductive wires, and the first and second thin-film capacitors are separated from the first and second thin-film inductors. The surface-mountable thin film coupler has an occupied area of ​​approximately 3 mm². 2 A method that is less than.

27. ​​At least one amplifier, One or more surface-mountable thin film couplers according to claim 1, Power supply, including.

Citation Information

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