半導体スイッチング素子の駆動回路

JP7891790B2Active Publication Date: 2026-07-17TMEIC CORP (100 00)

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
TMEIC CORP (100 00)
Filing Date
2023-10-16
Publication Date
2026-07-17

AI Technical Summary

Benefits of technology

【0010】 一対の主端子間の耐圧以上のサージ電圧の抑制と、安定したオフ状態の維持と、を両立可能な半導体スイッチング素子の駆動回路が提供される。

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Abstract

To provide a semiconductor switching element driving circuit capable of both suppressing a surge voltage equal to or higher than a breakdown voltage between a pair of main terminals and maintaining a stable OFF state.SOLUTION: Provided is a driving circuit including a driving unit that switches a semiconductor switching element between an ON state and an OFF state in accordance with a control signal, a timing adjustment circuit that performs a process of delaying switching timings of a first state and a second state of the control signal by a prescribed time, a voltage detection circuit that detects a voltage between the pair of main terminals of the semiconductor switching element, and a current injection circuit that injects current to a control terminal in accordance with the magnitude of the voltage between the pair of main terminals at the time of switching from the ON state to the OFF state of the semiconductor switching element. The timing adjusting circuit delays the switching timing of the processed control signal until the OFF state is established when the current injection circuit operates.SELECTED DRAWING: Figure 1
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