Power supply system
By dynamically adjusting gate signal delay times in response to pass-through states, the system maintains stable output voltage and suppresses switching losses in battery string power supply systems.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- TOYOTA JIDOSHA KK
- Filing Date
- 2023-02-03
- Publication Date
- 2026-07-22
AI Technical Summary
Existing power supply systems using battery strings experience increased switching losses due to a higher drive frequency when a battery circuit module enters a pass-through state, leading to inefficiencies.
The system adjusts the gate signal delay time based on the number of operational battery circuit modules, setting a longer delay time when a pass-through state occurs to maintain a consistent gate signal frequency and suppress losses.
This approach effectively suppresses the increase in switching losses and maintains stable output voltage by adjusting the gate signal delay time in response to pass-through conditions.
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Abstract
Description
Technical Field
[0005] , , ,
[0001] The present disclosure relates to a power supply system.
Background Art
[0002] Japanese Patent Application Laid-Open No. 2022-120255 (Patent Document 1) discloses a power supply system that outputs AC power (AC voltage) using a battery string in which a plurality of battery circuit modules can be connected in series. Each battery circuit module included in the battery string includes a battery, a first switch connected in parallel to the battery, a second switch connected in series to the battery, and first and second output terminals to which the voltage of the battery is applied when the first switch is in the OFF state and the second switch is in the ON state. The ON / OFF states of the first switch and the second switch are controlled by a gate signal, and the gate signal is transmitted to the next-stage battery circuit module connected in series with a predetermined delay time. By controlling the first switch and the second switch of each battery circuit module included in the battery string with a gate signal, the output voltage of the battery string can be adjusted to a desired magnitude.
[0003] Japanese Patent Application Laid-Open No. 2022-120255 (Patent Document 1) describes that when the battery of a specific battery circuit module fails or the like, the first switch is kept in the ON state and the second switch is kept in the OFF state, so that the battery of the specific battery circuit module is forcibly disconnected (pass-through state).
Prior Art Documents
Patent Documents
[0004] <00000?19>
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] The gate signal is controlled, for example, by PWM (Pulse Width Modulation) control, and the output voltage of the battery string is controlled by controlling the duty cycle. The period of the PWM control (period of the gate signal) is calculated by the sum of the delay times of the operating (not forcibly disconnected) battery circuit modules (delay time × total number of operating battery circuit modules). When a battery circuit module enters a pass-through state, the total number of operating battery circuit modules decreases, the period shortens, and the drive frequency of the gate signal increases. A higher drive frequency increases losses (for example, switching losses).
[0006] The purpose of this disclosure is to suppress the increase in losses even when a pass-through condition occurs in a power supply system using a battery string. [Means for solving the problem]
[0007] (1) The power supply system of the present disclosure comprises a battery circuit module, a battery string formed by connecting a plurality of the battery circuit modules in series, and a control device for controlling the battery string. The battery circuit module includes a battery, a first switch connected in parallel to the battery, a second switch connected in series to the battery, and a first output terminal and a second output terminal to which the battery voltage is applied when the first switch is OFF and the second switch is ON. The control device transmits gate signals that switch the ON / OFF states of the first and second switches to the downstream battery circuit modules with a delay of a certain amount of time, and sets the period of the gate signals to "delay time × number of operating battery circuit modules". The control device sets the delay time to a first delay time Td when all battery circuit modules included in the battery string are operating without disconnecting them, and sets the delay time to a second delay time Tds which is longer than the first delay time when the battery of a particular battery circuit module is forcibly disconnected.
[0008] In this configuration, gate signals that turn the first and second switches of the battery circuit module ON / OFF are transmitted to the downstream battery circuit module with a fixed delay time. The period of the gate signal is set to "delay time × number of operating battery circuit modules," thereby controlling the duty cycle of the gate signal and controlling the output voltage of the battery string.
[0009] When the battery in a specific battery circuit module within a battery string is forcibly disconnected, the number of operational battery circuit modules decreases, the period of the gate signal shortens, and the frequency of the gate signal increases.
[0010] The control unit sets the delay time to a second delay time Tds when the battery of a specific battery circuit module is forcibly disconnected (pass-through state). The second delay time Tds is set to be longer than the first delay time Td, which is set when all battery circuit modules in the battery string are operating without being disconnected. Therefore, when the battery of a specific battery circuit module is forcibly disconnected, even if the number of operating battery circuit modules decreases, it is possible to suppress a shortening of the gate signal period and suppress an increase in the gate signal frequency. This suppresses an increase in losses even when a pass-through state occurs.
[0011] The second delay time Tds is set according to the number of battery circuit modules that are forcibly disconnected, and the more battery circuit modules that are forcibly disconnected, the longer the second delay time Tds can be set. This makes it possible to suppress large changes in the gate signal frequency.
[0012] (2) Preferably, the control device may set the second delay time Tds to "Tds = Td × (No / (No - Ns))" where No is the total number of battery circuit modules included in the battery string and Ns is the number of battery circuit modules that have been forcibly disconnected.
[0013] With this configuration, the period of the gate signal at the first delay time Td and the period of the gate signal at the second delay time Tds can be made substantially the same. Therefore, even if a pass-through condition occurs, the frequency of the gate signal can be kept constant, thus suppressing the increase in losses.
[0014] (3) The control device controls the output voltage of the battery string by controlling the duty cycle of the gate signal. When the control device sets the output voltage to a predetermined value, if the ON time of the gate signal at the first delay time Td is Ton, the ON time of the gate signal at the second delay time Tds, T'on, may be set to "T'on = Ton × (No / (No - Ns))".
[0015] With this configuration, it is possible to control the output voltage of the battery string so that it does not change even when the delay time is switched from the first delay time Td to the second delay time Tds.
[0016] (4) The power supply system of the present disclosure comprises a battery circuit module, a battery string in which a plurality of battery circuit modules are connected in series, and a control device for controlling the battery string. The battery circuit module includes a battery, a first switch connected in parallel to the battery, a second switch connected in series to the battery, and a first output terminal and a second output terminal to which the battery voltage is applied when the first switch is OFF and the second switch is ON. The control device transmits gate signals that switch the ON / OFF states of the first and second switches to downstream battery circuit modules with a delay of a certain delay time, and sets the period of the gate signals to "delay time × number of operating battery circuit modules". When the number of operating battery circuit modules in the battery string is Np, the control device sets the delay time to a first delay time Tda, forcibly disconnects the battery of a specific battery circuit module, and sets the delay time to a second delay time Tdt when the number of operating battery circuit modules becomes Nr, which is less than Np, and sets the second delay time Tdt to "Tdt = Tda × (Np / Nr)".
[0017] In this configuration, when the number of operating battery circuit modules in the battery string is Np, the delay time is set to the first delay time Tda. Then, when the number of operating battery circuit modules becomes Nr, which is less than Np, due to the pass-through state, the delay time is set to the second delay time Tdt = Tda × (Np / Nr). Since the period of the gate signal at the first delay time Tda and the period of the gate signal at the second delay time Tdt can be made substantially the same, even if the number of operating battery circuit modules decreases, the increase in the gate signal frequency can be suppressed, and the increase in losses can be suppressed.
[0018] (5) In (1) to (4) above, the control device may change the delay time from a first delay time (Td or Tda) to a second delay time (Tds or Tdt) when a specific battery circuit module is forcibly disconnected and the upstream battery circuit module in the battery string is driven.
[0019] In this configuration, when a pass-through state occurs, the delay time is changed from the first delay time (Td or Tda) to the second delay time (Tds or Tdt) when the upstream battery circuit module is driven. This suppresses disturbances in the output voltage of the battery string. [Effects of the Invention]
[0020] According to this disclosure, in a power supply system using a battery string, it becomes possible to suppress the increase in losses even when a pass-through condition occurs. [Brief explanation of the drawing]
[0021] [Figure 1] This figure shows the configuration of the power supply system according to the embodiment of the present disclosure. [Figure 2] Figures (A) through (D) illustrate the operation of a battery circuit module controlled by gate signals. [Figure 3] This figure shows the timing chart of the gate signal in this embodiment. [Figure 4] It is a diagram showing a time chart of a gate signal when returning from a pass-through state. [Figure 5] It is a flowchart showing an example of a process of pass-through control executed by a control device.
Embodiments for Carrying Out the Invention
[0022] Embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and their description will not be repeated.
[0023] FIG. 1 is a diagram showing the configuration of a power supply system according to an embodiment of the present disclosure. Referring to FIG. 1, the power supply system 1 includes a battery string St and a control device 100. The control device 100 may be a computer, and for example, includes a processor, a storage device, and a communication I / F (interface). The storage device stores, for example, a program executed by the processor and information used in the program (for example, maps, mathematical formulas, and various parameters).
[0024] The battery string St includes a plurality of battery circuit modules M (M0 to Mn: n is a positive integer including 0). The number of battery circuit modules M included in the battery string St is arbitrary and may be 5 to 50, or may be 100 or more.
[0025] Each battery circuit module M includes a power circuit SUB and a cartridge Cg. The cartridge Cg includes a battery B and a monitoring unit BS. By connecting the power circuit SUB and the battery B respectively, a battery circuit module M including the battery B is formed. The drive circuit SU is configured to drive switching elements (SW11 and SW12 described later) included in the battery circuit module M. The battery B may be a nickel-metal hydride secondary battery or a lithium-ion secondary battery, and the battery B may be manufactured by connecting secondary batteries used in an electric vehicle in series.
[0026] As shown in Figure 1, the battery circuit module M includes a power circuit SUB, a cartridge Cg, and circuit breakers RB1 and RB2 (hereinafter referred to as "circuit breakers RB" unless otherwise specified). The power circuit SUB and cartridge Cg are connected to each other via circuit breakers RB1 and RB2. The circuit breakers RB switch the connection state (continuity / interruption) between the power circuit SUB and cartridge Cg according to a command from the control device 100. The circuit breakers RB may be configured to be manually turned ON / OFF by the user, and this configuration makes the cartridge Cg detachable from the power circuit SUB.
[0027] In cartridge Cg, the monitoring unit BS is configured to detect the state of battery B (for example, voltage, current, and temperature) and output the detection results to the control device 100.
[0028] The battery circuit modules M included in the battery string St are connected by a common wire PL. The wire PL includes the output terminals OT1 and OT2 of each battery circuit module M. The battery circuit modules M included in the battery string St are connected to each other by the connection of the output terminal OT2 of one battery circuit module M to the output terminal OT1 of an adjacent battery circuit module M.
[0029] The power circuit SUB comprises a first switching element 11 (hereinafter referred to as "SW11"), a second switching element 12 (hereinafter referred to as "SW12"), a first diode 13, a second diode 14, a choke coil 15, a capacitor 16, and output terminals OT1 and OT2. Each of SW11 and SW12 is driven by a drive circuit SU. SW11 and SW12 in this embodiment correspond to examples of the "first switch" and "second switch" according to this disclosure, respectively.
[0030] A switch (SW11), a capacitor (16), and a battery (B) are connected in parallel between the output terminals OT1 and OT2 of the power circuit SUB. SW11 is located on the wire PL and is configured to switch the connection state (continuity / disconnection) between output terminals OT1 and OT2. Output terminal OT1 is connected to the positive terminal of battery B via wire BL1, and output terminal OT2 is connected to the negative terminal of battery B via wire BL2. A switch (SW12) and a choke coil (15) are further provided on wire BL1. In the battery circuit module M, the voltage of battery B is applied between output terminals OT1 and OT2 when SW12, which is connected in series with battery B, is in the ON state (connected state), and SW11, which is connected in parallel with battery B, is in the OFF state (disconnected state).
[0031] A capacitor 16 is provided between the output terminals OT1 and OT2 and battery B, connected to wires BL1 and BL2, respectively. SW11 and SW12 are, for example, FETs (field-effect transistors). The first diode 13 and the second diode 14 are connected in parallel to SW11 and SW12, respectively. Note that SW11 and SW12 are not limited to FETs, but may be other switching elements.
[0032] The control device 100 generates gate signals. A drive circuit SU (SU0 to SUn: n is a positive integer including 0) is provided for each battery circuit module M (M0 to Mn) and includes a gate driver (GD) 81 that drives SW11 and SW12 according to the gate signal, and a delay circuit 82 that delays the gate signal. Each of SW11 and SW12 included in the battery circuit module M is controlled ON / OFF according to the gate signal.
[0033] Figure 2 illustrates the operation of the battery circuit module M controlled by a gate signal. Figure 2(A) is a time chart showing an example of the operation of the battery circuit module M. In this embodiment, a square wave signal is used as the gate signal to drive SW11 and SW12. "Low" and "High" in Figure 2(A) refer to the L level and H level of the gate signal (square wave signal), respectively. "Output voltage" refers to the voltage output between output terminals OT1 and OT2. In the initial state of the battery circuit module M, no gate signal is input to the drive circuit SU (gate signal = L level), and SW11 and SW12 are in the ON and OFF states, respectively. SW11 and SW12 switch states (ON / OFF) according to the rising / falling edge of the gate signal. The control device 100 performs PWM control using the gate signal.
[0034] When a gate signal is input to the drive circuit SU, GD81 drives SW11 and SW12 according to the input gate signal. In the example shown in Figure 2, at timing t1, the gate signal rises from L level to H level, and SW11 switches from the ON state to the OFF state simultaneously with the rise of the gate signal. Then, at timing t2, which is delayed by a predetermined time (dead time dt1) from the rise of the gate signal, SW12 switches from the OFF state to the ON state. As a result, the battery circuit module M enters a driven state (connected state), and as shown in Figure 2(B), with SW11 in the OFF state and SW12 in the ON state, the voltage of battery B is applied between the output terminals OT1 and OT2.
[0035] Referring to Figure 2(A), at timing t3, when the gate signal falls from a high level to a low level, SW12 switches from the ON state to the OFF state simultaneously with the falling edge of the gate signal. This causes the battery circuit module M to stop. In the stopped state of the battery circuit module M, SW12 is in the OFF state, so the voltage of battery B is no longer applied between the output terminals OT1 and OT2. Subsequently, at timing t4, which is delayed by a predetermined time (dead time dt2) from the falling edge of the gate signal, SW11 switches from the OFF state to the ON state. Note that dead times dt1 and dt2 may be the same or different from each other.
[0036] During dead times dt1 and dt2, both SW11 and SW12 are in the OFF state, as shown in Figure 2(C). This prevents SW11 and SW12 from being in the ON state simultaneously (which would cause the battery circuit module M to be short-circuited).
[0037] If we refer to the period from the end of the dead time dt2 (t4) until the battery circuit module M enters a powered state as the "stop period," then during the stop period, as shown in Figure 2(D), SW11 is in the ON state and SW12 is in the OFF state, similar to the initial state.
[0038] The gate signal is delayed by a predetermined delay time Td by the delay circuit 82 and transmitted from the upstream drive circuit SU to the downstream drive circuit SU. When the control device 100 receives the gate signal from the delay circuit 82 of the furthest downstream drive circuit SU (SUn), it outputs a new gate signal to the furthest upstream drive circuit SU (SU0). The period T of the gate signal is the sum of the delay times Td of the delay circuits 82 included in the battery string St. If No is the total number of battery circuit modules M included in the battery string St, then the period T is set as "T = Td × No". By controlling the duty cycle of the gate signal (H level time: on time Ton), the number of battery circuit modules M in the driven state (the number of battery circuit modules M that are driven at the same time) can be adjusted. Setting a longer delay time Td results in a lower gate signal frequency (1 / T). Setting a shorter delay time Td results in a higher gate signal frequency. The delay time Td is set within an acceptable range of losses (switching losses), depending on the specifications required for, for example, the battery string St and power supply system 1.
[0039] By controlling the battery circuit modules M included in the battery string St as described above, the number of battery circuit modules M in the driven state (the number of battery circuit modules M that are driven simultaneously) can be adjusted, and the output voltage of the battery string St can be controlled. As a result, the battery string St is capable of outputting voltages ranging from 0[V] to the sum of the voltages of each battery B (cartridge Cg) included in the battery string St.
[0040] In cases of abnormalities such as rapid degradation or failure of a battery B included in the battery string St, or when equalizing the State of Charge (SOC) of each battery B, there is a need to forcibly disconnect a specific battery circuit module M (an abnormal battery or a battery with a small SOC) and exclude that battery B (pass-through state). In this case, for example, the GD81 of the specific battery circuit module M controls the battery B of the specific battery circuit module M to a pass-through state by keeping SW11 permanently ON and SW12 permanently OFF, and transmitting the gate signal to the downstream drive circuit SU by bypassing the delay circuit 82.
[0041] When a battery circuit module M enters a pass-through state, the total number of operational (non-pass-through) battery circuit modules M decreases, shortening the period T of the gate signal, and thus increasing the frequency (1 / T) of the gate signal. A higher frequency leads to increased losses (e.g., switching losses). In this embodiment, when a pass-through state occurs, the delay time Td is increased to suppress the increase in the gate signal frequency.
[0042] Figure 3 is a diagram showing the gate signal timing chart in this embodiment. In the battery string St shown in Figure 3, the total number of battery circuit modules M is 6, and it is equipped with drive circuits SU (SU0 to SU5) corresponding to the 6 battery circuit modules M (M0 to M5). Referring to Figure 3, the shaded area represents the H level of the gate signal, which corresponds to the on time Ton. In Figure 3, the duty cycle when no pass-through state occurs is set to 50%.
[0043] Referring to Figure 3, the gate signal from the control device 100 causes the upstream drive circuit SU0 to output an H level gate signal at time ta (the gate signal rises from L level to H level). Drive circuit SUn outputs an H level after a delay of Td × n from time ta (when drive circuit SU0 outputs an H level). For example, drive circuit SU2 outputs an H level after a delay of Td × 2 from time ta, and the downstream drive circuit SU5 outputs an H level after a delay of Td × 5 from time ta. Then, at time tb, which is after a delay of Td from the time drive circuit SU5 outputs an H level signal (after a delay of Td × 6 from time ta), the control device 100 outputs a new gate signal, and the next control cycle begins. The period Tn of the gate signal in this control cycle is the delay of Td × 6 (total number of battery circuit modules M).
[0044] After the start of the next control cycle, for example, if a pass-through state occurs in drive circuit SU4 (circuit module M4), no gate signal is output from drive circuit SU4, SW11 remains permanently ON, and SW12 remains permanently OFF. Drive circuit SU5, downstream of drive circuit SU4, outputs an H-level signal after a delay of Td × 4 has elapsed from time Tb. The period Ts of the gate signal in this cycle is Td × 5, and the frequency of the gate signal is higher than the previous one.
[0045] When a pass-through state occurs, in the next control cycle (at time tc, when the upstream drive circuit SU0 outputs a gate signal), the delay time Td is switched to delay time Tds. The delay time Tds is set as "Tds = Td × (No / (No - Ns))" where No is the total number of battery circuit modules M included in the battery string St (the total number of battery circuit modules included in the battery string St), and Ns is the number of battery circuit modules M in the pass-through state. In the example in Figure 3, No = 6 and Ns = 1, so it is set as "Td = Td × (6 / 5)". When the drive circuit SU4 (battery circuit module M4) enters a pass-through state, as shown in Figure 3, the delay time is switched from delay time Td to delay time Tds after time tc. Also, since the gate signal is transmitted by bypassing the delay circuit 82 of the drive circuit SU4 which is in a pass-through state, the drive circuit SU5 outputs an H level signal after "delay time Tds × 4" has elapsed from time Tc. Thus, when a pass-through state occurs, the delay time is switched from delay time Td to delay time Tds. After time tc, the period of the gate signal becomes period Tn, and the frequency of the gate signal can be made the same as the frequency when a pass-through state does not occur, thereby suppressing an increase in frequency. Note that delay time Td corresponds to an example of the "first delay time Td" in this disclosure, and delay time Tds corresponds to an example of the "second delay time Td" in this disclosure.
[0046] In Figure 3, when no pass-through state occurs, the duty cycle is 50%, and the on-time Ton (time at high level) of the gate signal is half of the period Tn. When a pass-through state occurs and the delay time switches from delay time Td to delay time Tds, if the duty cycle remains at 50%, the output voltage of the battery string St will fluctuate (change). Therefore, the on-time T'on of the gate signal at delay time Tds is calculated as "T'on = Ton × (No / (No - Ns))". Then, when the delay time is delay time Tds, the on-time (time at high level) of the gate signal is controlled to become the on-time T'on (the duty cycle is controlled to make it the on-time T'on). This suppresses fluctuations in the output voltage of the battery string St.
[0047] When the H level (on-time) / L level of the gate signal output from GD81 is generated using a counter (carrier counter) provided in the drive circuit SU, the counter value is reset to "0" when it reaches the maximum value max corresponding to the period Tn, as shown in Figure 3. The timing at which the counter value of the drive circuit SU is reset when it reaches the maximum value max (the timing at which the counter starts counting) is the timing at which each of the aforementioned drive circuits SU outputs the H level of the gate signal. When a pass-through state occurs, in that control cycle, the maximum value max of the drive circuits SU after the pass-through and the maximum value max of the upstream drive circuit SU0 are set to be smaller by a value corresponding to the delay time Td (the value obtained by subtracting Td from the maximum value max is set to the maximum value max (see A and B in Figure 3)). Also, when a pass-through state occurs, at the start of the next control cycle, the counter values of drive circuits SUn other than the upstream drive circuit SU0 are set to the value of "maximum value max - delay time Tds × n" (see the counter values of drive circuits SU1 to SU5 at time tc in Figure 3).
[0048] The drive circuit SU(GD81) outputs an H level when the counter value is below the threshold, and an L level when the counter value exceeds the threshold. When the delay time is delay time Td, the threshold is set to the threshold Tons corresponding to the on time Ton, and when the delay time switches to delay time Tds, the threshold is set to the threshold T'ons corresponding to the on time T'on. The threshold T'ons can be calculated as "T'ons = Tons × (No / (No - Ns))" in the same way as the on time T'on.
[0049] Figure 4 shows a time chart of the gate signal when recovering from the pass-through state. The shaded area represents the H level of the gate signal. When the drive circuit SU4 (battery circuit module M4) recovers from the pass-through state, as shown in Figure 4, the drive circuit SU4 outputs the H level gate signal after a delay of "Tds × 4" has elapsed from the time when the drive circuit SU0 outputs the H level (time tg). The drive circuit SU5 is controlled to output the H level after a delay of "Tds × 5" has elapsed from time tg, but in the example shown in Figure 4, the next control cycle begins due to the period Tn, so the H level is not output in the current control cycle. In the control cycle after the drive circuit SU4 recovers from the pass-through state, the delay time is switched from delay time Tds to delay time Td, the on time is set to on time Ton, and the gate signal is output from the drive circuit SU.
[0050] The counters installed in the drive circuit SU are set to the maximum value max of the drive circuit SU (in the example in Figure 4, drive circuit SU5) after the pass-through state is restored, and this value is obtained by adding the delay time Tds to the maximum value max (see C in Figure 4). Also, when the pass-through state is restored, at the start of the next control cycle, the counter values of drive circuits SUn other than the upstream drive circuit SU0 are set to the value of "maximum value max - delay time Td × n" (see the counter values of drive circuits SU1 to SU5 at time th in Figure 4).
[0051] Figure 5 is a flowchart showing an example of the pass-through control process performed by the control device 100. This flowchart is repeated at predetermined intervals while the power supply system 1 is operating. In step 10 (hereinafter, steps are abbreviated as "S"), it is determined whether or not there is a battery circuit module M (drive circuit SU) in a pass-through state. If there is no battery circuit module M in a pass-through state, the determination is negative and the routine ends. If there is a battery circuit module M in a pass-through state, the determination is positive and the process proceeds to S11.
[0052] In S11, the delay time Tds in the pass-through state is calculated. If the delay time when the pass-through state is not occurring is denoted as the delay time Td, then the delay time Tds is calculated as "Tds = Td × (No / Nr)". No is the total number of battery circuit modules M included in the battery string St, and Nr is the number of battery circuit modules that are operational (not in the pass-through state). Note that Nr = No - Ns (number of battery circuit modules in the pass-through state).
[0053] In the following step S12, the on-time T'on of the gate signal in the pass-through state is calculated. If the on-time Ton is defined as the on-time when the pass-through state is not occurring, then the on-time T'on is calculated as "T'on = Ton × (No / Nr)". In S13, the battery string St (drive circuit SU) is controlled using the delay time Tds and the on-time T'on.
[0054] According to this embodiment, when the battery B of a specific battery circuit module M is forcibly disconnected (pass-through state), the control device 100 sets the delay time Td to delay time Tds. The delay time Tds is set to be longer than the delay time Td when the pass-through state does not occur. Therefore, even if the number of battery circuit modules operating due to pass-through decreases, it is possible to suppress the shortening of the gate signal period and the increase in the gate signal frequency, thereby suppressing the increase in losses. Furthermore, the more battery circuit modules M in the pass-through state there are, the longer the second delay time Tds is set, so it is possible to suppress large changes in the gate signal frequency.
[0055] (modified version) In the above embodiment, the delay time when all battery circuit modules M included in the battery string St are operational was set to delay time Td, and the delay time when a pass-through state occurs was set to delay time Tds (= Td × No / Nr) (No: total number of battery circuit modules M included in the battery string St, Nr: number of operational (not in pass-through state) battery circuit modules). However, when the number of battery circuit modules M included in the battery string St is large, and when the number of battery circuit modules M in a pass-through state is small, even if control is performed using delay time Td, the number of operational battery circuit modules M may be large, and the gate signal frequency may not exceed the acceptable range.
[0056] In the modified version, a pass-through state occurs, and the battery string St (drive circuit SU) is controlled using a delay time Tda until the number of operating battery circuit modules M becomes Np, which is less than No (total number). The delay time Tda may be the same as the delay time Td in the above embodiment. Np is the smallest integer that satisfies "Np > 1 / (Tda × Hc)" when Hc [Hz] is the frequency at which losses (e.g., switching losses) can be tolerated. When a pass-through state occurs and the number of operating battery circuit modules M becomes Nr, which is less than Np, the delay time is switched from delay time Tda to delay time Tdt. The delay time Tdt is calculated as "Tdt = Tda × (Np / Nr)". The delay time Tda corresponds to an example of the "first delay time Tda" in this disclosure, and the delay time Tdt corresponds to an example of the "second delay time Tdt" in this disclosure. The on-time of the gate signal is calculated in the same way as in the above embodiment, and the switching is performed.
[0057] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the description of the embodiments above, and all modifications within the meaning and scope equivalent to the claims are intended to be included. [Explanation of symbols]
[0058] 1 Power supply system, 11 First switching element (SW), 12 Second switching element (SW), 81 Gate driver (GD), 82 Delay circuit, 100 Control device, B Battery, Cg Cartridge, M Battery circuit module, OT1, OT2 Output terminals, St Battery string, SU Drive circuit, SUB Power circuit.
Claims
1. A battery circuit module including a battery, a first switch connected in parallel to the battery, a second switch connected in series to the battery, and a first output terminal and a second output terminal to which the voltage of the battery is applied when the first switch is OFF and the second switch is ON. A battery string formed by connecting multiple battery circuit modules in series, The system comprises a control device for controlling the battery string, The control device transmits gate signals that switch the ON / OFF states of the first and second switches to the downstream battery circuit modules with a fixed delay time, and sets the period of the gate signals to "delay time × number of operating battery circuit modules". The control device is When all of the battery circuit modules included in the battery string are operated without being disconnected, the delay time is set to the first delay time Td. A power supply system that, when the battery of a specific battery circuit module is forcibly disconnected, sets the delay time to a second delay time Tds that is longer than the first delay time.
2. The control device is When No is the total number of battery circuit modules included in the battery string, and Ns is the number of battery circuit modules that have been forcibly disconnected, The power supply system according to claim 1, wherein the second delay time Tds is defined as "Tds = Td × (No / (No - Ns))".
3. The control device is By controlling the duty cycle of the gate signal, the output voltage of the battery string is controlled. The power supply system according to claim 2, wherein when the output voltage is controlled to a predetermined value, if the ON time of the gate signal in the first delay time is Ton, the ON time of the gate signal in the second delay time T'on is defined as "T'on = Ton × (No / (No - Ns)".
4. A battery circuit module including a battery, a first switch connected in parallel to the battery, a second switch connected in series to the battery, and a first output terminal and a second output terminal to which the voltage of the battery is applied when the first switch is OFF and the second switch is ON. A battery string formed by connecting multiple battery circuit modules in series, The system comprises a control device for controlling the battery string, The control device transmits gate signals that switch the ON / OFF states of the first and second switches to the downstream battery circuit modules with a fixed delay time, and sets the period of the gate signals to "delay time × number of operating battery circuit modules". The control device is When the number of operating battery circuit modules included in the battery string is Np, the delay time is set to the first delay time Tda. When the battery of a specific battery circuit module is forcibly disconnected and the number of operating battery circuit modules becomes Nr, which is less than Np, the delay time is set to a second delay time Tdt. A power supply system in which the second delay time Tdt is defined as "Tdt = Tda × (Np / Nr)".
5. The control device is When a specific battery circuit module is forcibly disconnected, The power supply system according to any one of claims 1 to 4, wherein the delay time is changed from a first delay time to a second delay time when the upstream battery circuit module included in the battery string is driven.