Gate drive circuits for semiconductor switching elements, motor control systems, and semiconductor devices.

JP7897488B2Active Publication Date: 2026-07-30MINEBEA POWER SEMICON DEVICE INC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
MINEBEA POWER SEMICON DEVICE INC
Filing Date
2022-09-16
Publication Date
2026-07-30

AI Technical Summary

Benefits of technology

【0011】 本発明によれば、半導体スイッチング素子の高破壊耐量化を実現することができる。

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Abstract

To provider a gate drive circuit for a semiconductor switching element, which can realize high breakdown tolerance in the semiconductor switching element.SOLUTION: A gate drive circuit for a semiconductor switching element, which executes drive control with two independent gate electrodes, is configured such that the time constant of the gate electrode voltage a is set to be longer during the off-time of a second gate electrode Gc than during the off-time of a first gate electrode Gs, and a voltage V* of the second gate electrode Gc when maximum power at the turn-off time of the semiconductor switching element 31 is applied satisfies an expression (1). Expression (1) 0≤V*≤prescribed value<+Vp (in the expression, +Vp represents a gate drive voltage during on-time of the semiconductor switching element).SELECTED DRAWING: Figure 2
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Claims

1. In a gate drive circuit for a semiconductor switching element that is driven and controlled by two independent gate electrodes, The time constant of the gate electrode voltage is set longer when the second gate electrode is off compared to when the first gate electrode is off. The voltage V of the second gate electrode at the point when maximum power is applied during the turn-off of the semiconductor switching element. * However, satisfy equation (1) A gate drive circuit for a semiconductor switching element, characterized by the following features. Equation (1) 0≦V * ≦Determined value <+Vp (In the formula, +Vp is the gate drive voltage when the semiconductor switching element is turned on.)

2. A gate drive circuit for a semiconductor switching element according to claim 1, The point at which maximum power is applied when the semiconductor switching element is turned off is the point at which the collector-emitter voltage of the semiconductor switching element becomes approximately equal to the power supply voltage. A gate drive circuit for a semiconductor switching element, characterized by the following features.

3. A gate drive circuit for a semiconductor switching element according to claim 1, The gate drive circuit has a gate resistor that controls the time constant when the second gate electrode is off, and the voltage drop across the gate resistor is controlled by adjusting the gate resistor. A gate drive circuit for a semiconductor switching element, characterized by the following features.

4. In a gate drive circuit for a semiconductor switching element that is driven and controlled by two independent gate electrodes, When the first gate electrode is turned off, the voltage of the first gate electrode is commanded to drop to the negative power supply voltage. When the second gate electrode is turned off, the voltage of the second gate electrode is commanded to decrease in two stages to the negative power supply voltage. A gate drive circuit for a semiconductor switching element, characterized by the following features.

5. A gate drive circuit for a semiconductor switching element according to claim 4, The gate drive circuit includes a first voltage power supply, a gate switch, and a switching control unit. The switching control unit first reduces the voltage of the second gate electrode to the first voltage, and then, after a predetermined time has elapsed, reduces the voltage of the second gate electrode to the negative power supply voltage of the gate drive circuit. A gate drive circuit for a semiconductor switching element, characterized by the following features.

6. A gate drive circuit for a semiconductor switching element according to any one of claims 1 to 5, The semiconductor switching element is characterized in that a first chip, which is a chip with high hole injection efficiency from the collector side, and a second chip, which is a chip with low hole injection efficiency from the collector side, are connected in parallel by the collector electrodes and emitter electrodes of the two chips.

7. A gate drive circuit for a semiconductor switching element according to claim 6, The gate of the first chip is connected to the second gate electrode, and both the first and second gate electrodes are connected to the gate of the second chip. A gate drive circuit for a semiconductor switching element, characterized by the following features.

8. A gate drive circuit for a semiconductor switching element according to claim 6, In the aforementioned semiconductor switching element, an n-type semiconductor with a higher impurity concentration than the n-drift layer is provided below the p-base layer sandwiched between the gates, without contacting the gates. A gate drive circuit for a semiconductor switching element, characterized by the following features.

9. A gate drive circuit for a semiconductor switching element according to claim 1 or claim 4, Control when the first gate electrode and the second gate electrode simultaneously receive an OFF signal. A gate drive circuit for a semiconductor switching element, characterized by the following features.

10. A gate drive circuit for a semiconductor switching element according to claim 1, The predetermined value is the threshold voltage of the semiconductor switching element. A gate drive circuit for a semiconductor switching element, characterized by the following features.

11. A gate drive circuit for a semiconductor switching element according to claim 1, The predetermined value is +Vp / 3. A gate drive circuit for a semiconductor switching element, characterized by the following features.

12. Each arm of the inverter circuit is equipped with a semiconductor switching element and a gate drive device. The gate drive device is a gate drive circuit for a semiconductor switching element as described in any one of claims 1 to 5. A motor control system in which the inverter circuit outputs alternating current to drive a motor based on the DC power supplied to the inverter circuit from a DC power source.

13. Each arm of the inverter circuit is equipped with a semiconductor switching element and a gate drive device. The gate drive device is a gate drive circuit for a semiconductor switching element as described in claim 6, A motor control system in which the inverter circuit outputs alternating current to drive a motor based on the DC power supplied to the inverter circuit from a DC power source.

14. A semiconductor switching element driven and controlled by two independent gate electrodes, A semiconductor device having a gate drive circuit for a semiconductor switching element as described in any one of claims 1 to 5.

15. A semiconductor switching element driven and controlled by two independent gate electrodes, A semiconductor device having a gate drive circuit for a semiconductor switching element as described in claim 6.