Power converter

Abstract

To provide a power converter that can suppress current waveform distortion when pulses are output by a converter even where an absolute value of a command value is small, while maintaining the effect of reducing output current ripples by connecting the converter in parallel and driving it via phase difference.SOLUTION: Two or more n converters connected in parallel generate pulses and output them to a motor 4, thus driving the motor 4. A pulse control unit 12 generates a multiple pulse for making the n converters of a three-phase converter 3 perform multiplex operation on the basis of control information output by a motor control unit 11. A current discontinuous operation switching unit 24 operates the converter by switching to a current boundary mode or a current discontinuous operation mode in accordance with the command value.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] This invention relates to a power converter. [Background technology]

[0002] A power converter of this type has been proposed for use in hybrid vehicles (see, for example, Patent Document 1). The power converter described in Patent Document 1 connects a multiphase converter to each phase of a permanent magnet synchronous motor, and also connects the multiphase converters connected to each phase in parallel. Each multiphase converter is driven while changing its phase, thereby outputting a sinusoidal voltage, and reducing output current ripple.

[0003] Generally, increasing the number of converters connected in parallel can reduce output current ripple, but a smaller current command value results in a shorter period. As a result, the pulse width driving the converter also becomes shorter. If the pulse width driving the converter is short, the converter may not be able to output pulses properly. In this case, current waveform distortion may occur, potentially increasing noise and static. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2009-219299 [Overview of the project] [Problems that the invention aims to solve]

[0005] The object of the present invention is to provide a power converter that maintains the effect of reducing output current ripple by connecting converters in parallel and driving them with a phase difference, while also suppressing current waveform distortion when the converter outputs a pulse, even when the absolute value of the command value is small. [Means for solving the problem]

[0006] The invention described in claim 1 comprises a power conversion unit having two or more n converters connected in parallel. When the motor control unit outputs control information corresponding to an input command value, the pulse control unit outputs pulse signals to drive the n converters of the power conversion unit based on the control information of the motor control unit. The pulse control unit comprises a current discontinuous operation switching unit that operates the converters by switching between a current boundary mode and a current discontinuous operation mode according to the command value.

[0007] The current discontinuous operation switching unit, for example, switches to current boundary mode when the absolute value of the command value is greater than a predetermined value, and switches to current discontinuous operation mode when the absolute value of the command value is less than a predetermined value. This allows the converter to output pulses while suppressing pulse width reduction and current waveform distortion. [Brief explanation of the drawing]

[0008] [Figure 1] Overall electrical configuration diagram in the first embodiment [Figure 2] Electrical configuration diagram for one phase in the first embodiment [Figure 3] Control configuration diagram of the converter in the first embodiment [Figure 4] Flowchart 1 illustrating the multiple pulse generation process in the first embodiment [Figure 5] Diagram illustrating the method for generating multiple pulses in the first embodiment. [Figure 6] Flowchart 2 illustrating the multiple pulse generation process in the first embodiment. [Figure 7] Converter drive voltage and drive current waveforms in the case of quadruple multiplexing in the first embodiment [Figure 8] Diagram 1 of the explanatory diagram showing the relationship between inductor current and output current in the quadruple current boundary mode in the first embodiment. [Figure 9] Diagram illustrating the relationship between command current and operating frequency in the first embodiment. [Figure 10]Explanatory diagram showing the relationship between the inductor current and the output current in the four-fold current discontinuous operation mode in the first embodiment [Figure 11] Explanatory diagram showing the relationship between the command current and the operating frequency in the comparative example [Figure 12] Flowchart schematically explaining the multi-pulse generation process in the second embodiment

Mode for Carrying Out the Invention

[0009] Hereinafter, several embodiments will be described with reference to the drawings. For the same or similar components in the plurality of embodiments, the same or similar reference numerals may be used and the description may be omitted.

[0010] (First Embodiment) The first embodiment will be described with reference to FIGS. 1 to 11. As illustrated in FIG. 1, a three-phase inverter 3 as a power converter is connected to the battery 2. The battery 2 is a storage battery such as a nickel-hydrogen storage battery or a lithium storage battery. A motor 4 is connected to the three-phase inverter 3. The motor 4 is, for example, a power generation device that drives the wheels of an electric vehicle or a hybrid vehicle, and a permanent magnet synchronous motor (PMSM) is exemplified.

[0011] The three-phase inverter 3 is provided with multi-phase converters 6u, 6v, 6w for a plurality of phases of the U phase, V phase, and W phase. The three-phase inverter 3 is composed of multi-phase converters 6u, 6v, 6w in which converter units 5u, 5v, 5w as basic units are connected in parallel in n-fold multiple of 2 or more.

[0012] In FIG. 1, subscripts "1 to n" are attached to the symbols of the converters 5u, 5v, and 5w that are the basic units for illustration. In the following description, individual ones or one of the converters 5u1, 5u2, 5u3... 5un, 5v1, 5v2, 5v3... 5vn, 5w1, 5w2, 5w3... 5wn may be simply abbreviated as converter 5. Also, the converters 5u1, 5v1, 5w1, which are the detection targets of the current flowing through the inductor L (hereinafter, inductor current IL), may be referred to as "converters 5 of the master phase". A configuration example of the converter 5 is shown in FIG. 3.

[0013] For example, the U-phase multi-phase converter 6u distributes the total current flowing through n converters 5 equally at 1 / n each, and drives them with a phase difference of T / n from each other to equalize the drive currents of the converters 5u1... 5un. Since the output currents of the converters 5u1... 5un are combined, current ripples can be canceled out, and thus, it is configured to output a desired current waveform, here a sine-wave current. The same applies to the V-phase and W-phase multi-phase converters 6v and 6w.

[0014] As shown in FIG. 3, each of the above individual converters 5 includes an upper-arm switch SW1, a lower-arm switch SW2, an inductor L, and a capacitor C in the illustrated form, and is constituted by a step-down non-inverting buck converter that converts the voltage of the battery 2 as desired.

[0015] The upper-arm switch SW1 and the lower-arm switch SW2 are configured as power switches such as N-channel power MOSFETs, and freewheeling diodes D1 and D2 are connected between the drain and the source, respectively, to commutate the load current. In the following description, both the upper-arm switch SW1 and the lower-arm switch SW2, or one of them, may be referred to as "power switch".

[0016] In this embodiment, the control system 1 connects the control device 10 to the three-phase inverter 3, and the control is mainly performed by the control device 10 shown in Figure 1. The control device 10 is composed of a computer equipped with multiple cores and volatile and non-volatile memories 17, and functionally comprises a motor control unit 11 and a pulse control unit 12. The memory 17 is used as a storage unit that holds various types of data as a non-transitional physical storage medium. A voltage sensor 13 is installed in the battery 2, and the voltage detected by the voltage sensor 13 is input to the motor control unit 11.

[0017] Furthermore, a current sensor 14 is provided in the energizing path of the inductor L that constitutes the converters 5u1, 5v1, and 5w1, which are the master phases for each of the UVW phases. The motor control unit 11 controls the inductor current I detected by the current sensor 14. L The following is input. Additionally, a voltage sensor 15 is provided to detect the output voltage Vout of capacitor C, and the voltage detected by the voltage sensor 15 is input to the motor control unit 11.

[0018] The motor control unit 11 receives the current command value Io calculated according to the required torque as a command value and outputs control information corresponding to the current command value Io to the pulse control unit 12. The update period for the current command value Io is set to be sufficiently short compared to the period of the AC frequency, allowing for fine-tuning of the current command value Io, which changes with the AC frequency.

[0019] The current sensor 16 is provided to detect the phase currents Iu, Iv, and Iw that are input to the motor 4, and the current detected by the current sensor 16 is input to the motor control unit 11. The motor control unit 11 also receives the rotor angle θ from a rotational position sensor 4a, such as a resolver, installed on the motor 4, and calculates the angular velocity ω.

[0020] As shown in Figure 2, the motor control unit 11 is configured by connecting a subtractor 30, a current controller 31, a two-phase to three-phase converter 32 as a phase converter, and a three-phase to two-phase converter 33 in the illustrated configuration. The motor control unit 11 receives the d-axis current command value Id* and the q-axis current command value Iq*. The three-phase to two-phase converter 33 of the motor control unit 11 receives the phase currents Iu, Iv, and Iw, and also receives the rotor angle θ from a rotational position sensor 4a such as a resolver installed on the motor 4, and calculates the angular velocity ω. The three-phase to two-phase converter 34 converts the three-phase phase currents Iu, Iv, and Iw of the motor 4 into the d-axis current Id and q-axis current Iq and outputs them to the subtractor 30.

[0021] The subtractor 30 subtracts the d-axis current Id and the q-axis current Iq from the d-axis current command value Id* and the q-axis current command value Iq*, respectively, and outputs them to the current controller 31. The current controller 31 outputs the dq-axis current command values ​​Id_cmd and Iq_cmd to the two-phase three-phase converter 32, for example, by proportional-integral control. The two-phase three-phase converter 32 converts the dq-axis current command value input from the current controller 31 into the three-phase current command values ​​Iu_cmd, Iv_cmd, and Iw_cmd of the motor 4, and outputs them to the pulse control unit 12.

[0022] The motor control unit 11 outputs this information to the pulse control unit 12 as feedback control information. The pulse control unit 12 is equipped with pulse generation blocks 12u, 12v, and 12w for each of the three phases. As functionally illustrated in Figure 2, the pulse generation blocks 12u, 12v, and 12w of the pulse control unit 12 are equipped with functional configurations as a gate drive unit 21, a zero current detection unit 22, a pulse calculation unit 23, and a current discontinuous operation switching unit 24, respectively.

[0023] Each pulse calculation unit 23 for each phase of the pulse generation blocks 12u, 12v, and 12w receives the current command values ​​Iu_cmd, Iv_cmd, and Iw_cmd for each of the three phases of the motor 4, respectively. The zero current detection unit 22 detects zero current for each phase and outputs it to the pulse calculation unit 23.

[0024] As shown in Figure 3, each phase pulse calculation unit 23 includes counters such as an on-time counter 24a, a start phase counter 24b, and an end phase counter 24c. The pulse calculation unit 23 calculates the on-time Ton and off-time Toff, period T, and phase difference Td between multiple pulses input to multiple converters 5 of the same phase (e.g., U phase) when each phase multiphase converter 6u, 6v, and 6w converters 5 are operating in current boundary mode.

[0025] The current boundary mode in this embodiment refers to a mode in which, when the inductor current IL is detected to be zero, the upper arm switch SW1 and the lower arm switch SW2 are switched on and off at the detection timing, and the multi-phase converters 6u, 6v, and 6w of each phase are continuously operated to keep the inductor current IL changing. The parameters of on time Ton, off time Toff, period T, and phase difference Td are set to be the same among the multiple pulses input to each converter 5 of the same-phase multi-phase converter (e.g., 6u). As will be described in detail below, the on time Ton refers to the on time Ton1 of power switch SW1 when the current command value I0>0, or the on time Ton2 of power switch SW2 when the current command value I0<0. The off time Toff refers to the off time Toff1 of power switch SW1 when the current command value I0>0, or the off time Toff2 of power switch SW2 when the current command value I0<0.

[0026] The gate drive unit 21 drives the three-phase inverter 3 based on the calculation results of the pulse calculation unit 23. The gate drive unit 21 turns the upper arm switch SW1 and the lower arm switch SW2 on and off based on the on time Ton, period T, and phase difference Td calculated by the pulse calculation unit 23. As a result, the pulse control unit 12 generates multiple pulses (multiphase pulses) based on the control information input from the motor control unit 11 and applies them to the 3 × n converters 5 of the three-phase inverter 3, thereby enabling the converters 5 to operate in multiple phases.

[0027] <Basic Operation Description of Multiphase Converters 6U, 6V, and 6W> The following flowcharts will explain the basic processing operations of the multiphase converters 6u, 6v, and 6w for each phase. Since the operation of each phase (UVW) is generally the same, the processing operation of the U-phase multiphase converter 6u will be explained, and the processing operations of the V-phase and W-phase multiphase converters 6v and 6w will be omitted.

[0028] Figure 4 shows the processing steps of the first multiplexed converter 5u1. Conditional on the zero current detection unit 22 detecting the timing in S1 when the inductor current IL becomes zero, the gate drive unit 21 turns on the upper arm switch SW1 or the lower arm switch SW2 in S3 or S4. At this time, the pulse calculation unit 23 decides in S2 whether to turn on the upper arm switch SW1 or the lower arm switch SW2 based on the value of the current command value Io.

[0029] <Current command value I o If it is greater than zero > Current command value I o If the value exceeds zero, the gate drive unit 21 turns on the upper arm switch SW1 in S3. For example, the current command value of the U phase I o If the value exceeds 0, the gate drive unit 21 drives the upper arm switch SW1 on and off while keeping the lower arm switch SW2 of each converter 5 constituting the multiphase converter 6u in the OFF position. When the upper arm switch SW1 is turned ON, the capacitor C is charged from the battery 2 by gradually increasing the inductor current IL through the upper arm switch SW1.

[0030] Subsequently, when the on-time Ton1 elapses in S5, the gate drive unit 21 turns off the upper arm switch SW1 in S6. Even when the upper arm switch SW1 is turned off, the inductor current I continues to flow through the freewheeling diode D2 attached to the lower arm switch SW2. L The music continues to play.

[0031] The inductor current IL gradually decreases, but the zero current detection unit 22 detects the timing when the inductor current IL becomes zero. When the inductor current IL becomes zero, the gate drive unit 21 turns the upper arm switch SW1 on again. This operation is repeated as long as the current command value Io exceeds 0. Each converter 5 operates in a current boundary mode in which the upper arm switch SW1 is turned on only when the zero current detection unit 22 detects that the inductor current IL is zero.

[0032] <Current command value I o If it is less than zero > Conversely, current command value I o If the value is less than zero, the gate drive unit 21 turns on the lower arm switch SW2 in S4. The gate drive unit 21 drives the lower arm switch SW2 on and off while holding the upper arm switch SW1 in the OFF position. When the lower arm switch SW2 is turned on, the capacitor C discharges while gradually decreasing the inductor current IL. After this, when the ON time Ton2 has elapsed in S5, the gate drive unit 21 drives the lower arm switch SW2 off in S6. Even when the lower arm switch SW2 is turned off, the inductor current IL continues to flow through the freewheeling diode D1 connected to the upper arm switch SW1.

[0033] The inductor current IL gradually increases, but the zero current detection unit 22 detects the timing when the inductor current IL becomes zero. When the inductor current IL becomes zero, the gate drive unit 21 turns on the lower arm switch SW2 again. This operation is repeated as long as the current command value Io is below 0. Each converter 5 operates in a current boundary mode in which the lower arm switch SW2 is turned on when the zero current detection unit 22 detects that the inductor current IL is zero.

[0034] <Calculation method by pulse calculation unit 23> When driving each converter 5, the pulse calculation unit 23 calculates the on-time Ton for keeping the power switch SW1 or SW2 of each converter 5 in the ON position, and the phase difference Td between the multiple pulses applied to each converter 5.

[0035] If the current command value Io of the phase current Iu and the multiplicity n of the converter 5 are given, the average current I of the converter 5 is I = Io / n. In this control system 1, since the inductor current IL repeats gradual increase or gradual decrease with zero as the boundary, the peak current I Lp of the inductor current IL is twice the average current I = 2I.

[0036] When the current command value Io > 0, the pulse operation unit 23 calculates the on-time Ton1 and off-time Toff1 of the upper arm switch SW1, as well as the period T and the phase difference Td, based on the following equations (1-1) to (1-4), respectively.

Equation

[0037] When the current command value I0 is less than 0, the pulse control unit 12 generates a pulse for driving the lower arm switch SW2. When the current command value Io < 0, the pulse operation unit 23 calculates the on-time Ton2 and off-time Toff2 of the lower arm switch SW2, as well as the period T and the phase difference Td, based on the following equations (2-1) to (2-4), respectively.

Equation

[0038] Fig. 5 shows an example of pulse generation by the pulse operation unit 23 for starting the converters 5 of the first to nth multiplicities. The on-time counter 24a measures the on-time Ton1 or Ton2 by setting the counter value to a predetermined value and counting down on the condition that the inductor current I L is detected as zero by the zero current detection unit 22.

[0039] The pulse calculation unit 23 determines YES in S5 of Figure 4 after the ON time Ton has elapsed, and turns off the ON power switch SW1 or SW2 in S6. This allows the power switch SW1 or SW2 to remain ON for only the ON time Ton1 or Ton2.

[0040] Furthermore, the pulse calculation unit 23 of the pulse control unit 12 operates the start phase counter 24b simultaneously with the on-time counter 24a. The start phase counter 24b is a counter used to measure the start timing of the pulses to be input to the 2nd to nth multiplexed converters 5u2...5un.

[0041] The start phase counter 24b measures the time corresponding to the phase difference Td calculated by the pulse calculation unit 23 by setting the counter value to a predetermined value and counting down. The end phase counter 24c is a counter that measures the end timing of the pulses input to the 1st to nth multiplexed converters 5u1...5un, respectively. The end phase counter 24c measures the time corresponding to the phase difference Td calculated by the pulse calculation unit 23 by setting the counter value to a predetermined value and counting down.

[0042] Figure 6 shows the processing steps for the m-th multiplexed converter 5 (where m≧2). The pulse control unit 12 performs the processing from S12 onward on the condition that the power switch SWm-1 of the m-1th multiplexed converter 5 is turned ON in S11. The power switch SWm-1 shown here refers to either the upper arm switch SW1 or the lower arm switch SW2 of the m-1th multiplexed converter 5, and the current command value I o It changes based on this.

[0043] After the power switch SWm-1 of the m-1th multiplexed converter 5 is turned on, in S12, the start phase counter 24b measures whether the phase difference Td = Ton / n, which is the start timing of the mth multiplexing, has elapsed. If the conditions of S12 are met, in S13, the power switch SWm of the mth multiplexed converter 5 is turned on. The power switch SWm refers to either the upper arm switch SW1 or the lower arm switch SW2 of the mth multiplexed converter 5, and the current command value I o It changes based on this.

[0044] Subsequently, the pulse control unit 12 generates pulses that sequentially turn on the power switch SWm of the m-th multiplexed converter 5 each time the start phase counter 24b finishes counting. This allows the drive pulses to be output while maintaining a phase difference Td between them.

[0045] On the other hand, as shown in Figure 5, when the on-time counter 24a of the first multiplexed converter 5u1 finishes counting, the pulse control unit 12 determines that the on-time Ton has elapsed and stops the pulse output to the power switch SW1 or SW2 of the first multiplexed converter 5u1. The pulse control unit 12 starts counting with the termination phase counter 24c at the same time that the on-time counter 24a finishes counting. Subsequently, the pulse control unit 12 finishes counting with the termination phase counter 24c, and each time the on-time Ton has elapsed in S14, it sequentially stops the pulses output to the power switch SWm of the m-th multiplexed converter 5. This sequentially turns off the power switch SWm of the m-th multiplexed converter.

[0046] Hard switching occurs when turning off power switch SW1 or SW2. However, by making the charging time of capacitor C, which is provided at the output of power switches SW1 and SW2, sufficiently longer than the switching time, the period during which the voltage rise is limited can be extended, enabling ZVS (Zero Voltage Switching). This makes switching losses approximately zero. If the capacitance of the output capacitor is insufficient, it is advisable to add capacitor C in parallel.

[0047] As a result, the pulse calculation unit 23 can generate multiple pulses to be input to the 1st to nth multiplexed converters 5u1 to 5un by sequentially outputting pulses after the phase difference Td calculated as described above, starting from the timing when the pulse to the first multiplexed converter 5u1 is output.

[0048] The resonance time of each converter 5 is determined by the output capacitances of power switches SW1 and SW2, the junction capacitances of freewheeling diodes D1 and D2, and the inductance of inductor L. The ON timing of power switches SW1 and SW2 is preferably set to the lowest voltage point after half a cycle of resonance due to these capacitances and inductances. The lowest voltage point after half a cycle of resonance is the timing when the inductor current IL overshoots zero and then approaches zero again after turning off power switch SW1 or SW2. This enables ZCS (Zero-Current-Switching) and pseudo-ZVS (Zero-Voltage-Switching), making the switching loss at turn-on virtually zero.

[0049] Figure 7 shows a basic waveform example and a partially enlarged view in the current boundary mode when the number of multiplexers n=4, the period is T, and the phase difference Td is T / n. When the inductor current IL gradually increases and then gradually decreases, the inductor current IL will flow through the inductor L in a triangular wave pattern.

[0050] Based on the aforementioned feedback information, the control device 10 gradually changes the current command value Io of each phase of the UVW in a sinusoidal manner and outputs control information to the pulse control unit 12. The pulse control unit 12 changes each parameter of the multiple pulse (on time Ton, off time Toff, period T, phase difference Td) as illustrated in Figure 5.

[0051] Each converter 5 has the same phase difference Td = T / n and supplies phase currents Iu, Iv, and Iw to the motor 4, thereby superimposing the output currents of each converter 5 by n, and supplying power to each of the UVW phases of the motor 4. This allows the phase currents Iu, Iv, and Iw to be controlled to a desired current command value Io, in this case a sinusoidal current command value Io.

[0052] The maximum output of each phase current Iu, Iv, and Iw is determined to be smaller than the inductor saturation current and to satisfy the heat generation requirements of the three-phase inverter 3. The number of multiplexers n should be determined based on the upper limit that satisfies the maximum output. Furthermore, the frequency corresponding to the period T of the multiplexed pulses should be set higher than the audible frequency.

[0053] The larger the multiplexing number n, the greater the current ripple cancellation effect, so it is desirable to make it as large as possible. However, if the multiplexing number n is too large, it will complicate the control by the control device 10, so it is best to determine the multiplexing number n according to the processing capacity based on the resources of the control device 10.

[0054] <Explanation of the current discontinuous operation switching unit 24> Next, the current discontinuous operation switching unit 24 of this embodiment and its technical significance will be described. As mentioned above, by performing basic control in the current boundary mode, the motor 4 can be driven with a sinusoidal drive current.

[0055] However, as mentioned in the background technology section, when the current command value I0 decreases, the period shortens, and the pulse width driving the converter 5 also shortens. When the pulse width driving the converter 5 is short, there is a risk that the converter 5 may not be able to output pulses properly. In this case, current waveform distortion may occur, and noise and static may increase.

[0056] Therefore, in this embodiment, as shown in Figure 2, the pulse generation blocks 12u, 12v, and 12w of the pulse control unit 12 each function as a current discontinuous operation switching unit 24. The current discontinuous operation switching unit 24 is a block that has the function of switching the converter 5 to a current boundary mode or to a current discontinuous operation mode according to the magnitude of the current command value I0. The mode switching method by the current discontinuous operation switching unit 24 according to the present invention will be explained below, along with its significance.

[0057] The current discontinuous operation mode of this embodiment indicates a mode that does not result in the current boundary mode described above. As described above, the current boundary mode is a mode in which, upon detecting that the inductor current IL becomes zero, the upper arm switch SW1 and the lower arm switch SW2 are switched on and off at the detection timing, and the multiphase converters 6u, 6v, and 6w of each phase are constantly operated to keep the inductor current IL changing.

[0058] In contrast, the current discontinuous operation mode is an operating mode that, when the inductor current IL is detected to be zero, keeps both the upper arm switch SW1 and the lower arm switch SW2 turned off from that detection timing, thereby providing a period within the cycle corresponding to the operating frequency during which the inductor current IL remains zero.

[0059] The current discontinuous operation switching unit 24 switches to current boundary mode when the absolute value of the current command value I0 (Iu_cmd, Iv_cmd, Iw_cmd) is greater than or equal to a predetermined value, and commands the pulse calculation unit 23 to execute the processing in current boundary mode. The operation of current boundary mode is described as above.

[0060] When the current command value I0 is positive, the pulse calculation unit 23 sets the on time Ton1 and off time Toff1 of the upper arm switch SW1, as well as the period T and the phase difference Td between the multiple pulses, based on equations (1-1) to (1-4) described above, and the gate drive unit 21 drives the upper arm switch SW1. Conversely, when the current command value I0 is negative, the pulse calculation unit 23 sets the on time Ton2 and off time Toff2 of the lower arm switch SW2, as well as the period T and the phase difference Td between the multiple pulses, based on equations (2-1) to (2-4) described above, and the gate drive unit 21 drives the lower arm switch SW2.

[0061] On the other hand, the current discontinuous operation switching unit 24 switches to the current discontinuous operation mode if the absolute value of the current command value I0 (Iu_cmd, Iv_cmd, Iw_cmd) is less than a predetermined value. The current discontinuous operation switching unit 24 commands the pulse calculation unit 23 to switch to the current discontinuous operation mode, and the pulse calculation unit 23 calculates and sets the on time Ton3 and off time Toff3, as well as the period T3 and the phase difference Td3 between multiple pulses, as shown below.

[0062] For example, in current discontinuous operation mode, the inductor peak current is I Lp The period T3 is defined as the period Tmin at the operating frequency limit F0, the on time Ton3 for the upper arm switch SW1, and the off time Toff3 for the time when the upper arm switch SW1 is off and the inductor current IL is not zero. Here, the period T3 is set to the period Tmin at the operating frequency limit F0. This operating frequency limit F0 is the frequency required to stably operate the upper arm switch SW1 and the lower arm switch SW2, and is a value predetermined by the characteristics of each element.

[0063] The pulse calculation unit 23 assumes that Vout ≈ Vin / 2 when the current command value Io is positive and less than a predetermined value, and calculates the on time Ton3 and off time Toff3 in the same manner as equations (1-1) and (1-2) described above. As a result, the pulse calculation unit 23 sets the on time Ton3 and off time Toff3 as shown in equation (3).

number

[0064] The average output current of converter 5 can be calculated as Iout / n. Therefore, the average output current Iout / n can be calculated as shown in equation (4) below.

number

[0065] Therefore, the on-time Ton3 and off-time Toff3 required to obtain the desired output current can be calculated as shown in equation (5) below.

number

[0066] Furthermore, the length of the period from the time of on time Ton3 and off time Toff3 until the end of period Tmin can be expressed as Tmin-(Ton3+Toff3). During this period, the current is set to zero (waiting period). In the current discontinuous operation mode, the phase difference Td can be optimized based on parameters such as the current Iout and input voltage Vin, but since this would require a huge processing time, the phase difference Td = Tmin / n at the operating frequency F0 can be used as a simpler method.

[0067] When the pulse calculation unit 23 sets the on time Ton3, off time Toff3, phase difference Td, and period Tmin, the gate drive unit 21 drives the upper arm switch SW1 while keeping the lower arm switch SW2 off, based on the on time Ton3, off time Toff3, phase difference Td, and period Tmin. Specifically, during the on time Ton3, the gate drive unit 21 turns on the upper arm switch SW1 while keeping the lower arm switch SW2 off, but during the off time Toff3, both the upper arm switch SW1 and the lower arm switch SW2 are turned off. During the on time Ton3, the inductor current IL continues to rise, but during the off time Toff3, the inductor current IL falls. In addition, during the aforementioned waiting period, which is set separately from the on time Ton3 and off time Toff3, the gate drive unit 21 keeps both the upper arm switch SW1 and the lower arm switch SW2 off, thereby keeping the inductor current IL at zero.

[0068] In this way, by driving the gate drive unit 21, the phase currents Iu, Iv, and Iw obtained by adding the inductor currents IL can be controlled to the desired output current, as shown in Figure 10. In particular, the pulse calculation unit 23 sets a current discontinuous operation mode by providing a standby period in which the current is set to zero after the on time Ton3 and off time Toff3 have elapsed. Therefore, even if the absolute value of the current command value I0 is smaller than a predetermined value and it is necessary to reduce the phase current, the output phase currents Iu, Iv, and Iw can be controlled in accordance with the command.

[0069] Conversely, the pulse calculation unit 23 also assumes Vout ≈ Vin / 2 when the current command value I0 is negative and its absolute value is less than a predetermined value, and calculates the on-time Ton3 and off-time Toff3 in the same way as equations (2-1) and (2-2) above. As a result, the pulse calculation unit 23 sets the on-time Ton3 and off-time Toff3 as shown in equations (3) to (5) above. Furthermore, it is preferable to set the period Tmin to correspond to the operating frequency limit F0 and to set the phase difference Td = Tmin / n.

[0070] As mentioned above, the length of the period from the time when the ON time Ton3 and the OFF time Toff3 have elapsed until the end of the period Tmin can be expressed as Tmin-(Ton3+Toff3), but the current is set to zero during this period (standby period).

[0071] When the pulse calculation unit 23 sets the on time Ton3, off time Toff3, phase difference Td, and period Tmin, the gate drive unit 21 drives the lower arm switch SW2 while keeping the upper arm switch SW1 OFF based on the on time Ton3, off time Toff3, phase difference Td, and period Tmin. Specifically, during the on time Ton3, the gate drive unit 21 turns on the lower arm switch SW2 while keeping the upper arm switch SW1 OFF, but during the off time Toff3, both the upper arm switch SW1 and the lower arm switch SW2 are turned OFF. During the on time Ton3, the inductor current IL continues to decrease, but during the off time Toff3, the inductor current IL increases. In addition, during the aforementioned waiting period, which is set separately from the on time Ton3 and off time Toff3, the gate drive unit 21 keeps the inductor current IL at zero by keeping both the upper arm switch SW1 and the lower arm switch SW2 OFF.

[0072] In the above example, we showed a configuration where the on-time Ton3 and off-time Toff3 were set assuming Vout ≈ Vin / 2. However, it is also possible to detect the output voltage Vout using the voltage sensor 15 and the input voltage Vin using the voltage sensor 13, and then calculate and set the on-time Ton3 and off-time Toff3 based on these detection results.

[0073] <Comparative Example> If the absolute value of the current command value Io is set to be small while the current boundary mode is applied, an ideal waveform cannot be obtained unless the device is driven at a frequency exceeding the operating frequency limit F0. In reality, the characteristics of the elements cannot be satisfactorily satisfied unless switches SW1 and SW2 are driven at a frequency below the operating frequency limit F0. Consequently, if the current boundary mode is maintained, current waveform distortion occurs when the converter 5 outputs multiple pulses, as shown in the upper part of Figure 11.

[0074] <Summary of this embodiment> According to this embodiment, the current discontinuous operation switching unit 24 switches between current boundary mode and current discontinuous operation mode according to the command value. For example, the current discontinuous operation switching unit 24 switches to current boundary mode when the absolute value of the command value is greater than a predetermined value, and switches to current discontinuous operation mode when the absolute value of the command value is less than a predetermined value.

[0075] According to this embodiment, the current discontinuous operation switching unit 24 switches to the current discontinuous operation mode when the absolute value of the current command value I0 is smaller than a predetermined value. For example, it outputs a pulse with the highest possible operating frequency limit F0 (period T3 = Tmin). By performing this processing operation, as shown in Figure 9, the converter 5 can output with current waveform distortion suppressed while suppressing pulse width shortening.

[0076] While we have described a configuration using the current command value I0 as the command value, this is not the only configuration. For example, the command rotational speed may be used as the command value. As the command rotational speed increases, the current command value I0 will increase in proportion to the change in command rotational speed.

[0077] (Second Embodiment) The second embodiment will be described with reference to Figure 12. For the second embodiment, the differences from the first embodiment will be described, and the descriptions of the identical parts will be omitted.

[0078] Figure 12 shows a flowchart that replaces Figure 6. As shown in Figure 12, from the moment the power switch SW1 or SW2 of the first multiplexed converter 5 is turned on in S11a, the phase difference T of the mth multiplexed pulse is measured with respect to the first multiplexed pulse in S12a. dm After elapsed = Ton × (m-1) / n, the power switch SWm of the mth multiplexed converter 5 may be turned on in S13. The on time Ton represents the on time Ton1 of power switch SW1 when the current command value I0 > 0, or the on time Ton2 of power switch SW2 when the current command value I0 < 0.

[0079] Note that the phase difference T of the start phase of the mth concurrency unit is relative to the start phase of the first concurrency unit. dm This can be calculated based on the relationship shown in equation (6) below.

number

[0080] For example, in the case of the U phase, the first multiplexed converter 5u1 may be designated as the master phase, and after turning on the power switch SW1 or SW2 of the master phase converter 5u1, the second or more m-th multiplexed converters 5u2...5un may be designated as slave phases and their power switches SW1 or SW2 may be turned on sequentially. This embodiment also provides the same effects as the first embodiment.

[0081] (Other embodiments) The present invention is not limited to the embodiments described above, and can be implemented in various modified forms and is applicable to various embodiments without departing from its essence. For example, the following modifications or extensions are possible.

[0082] The above-described embodiment describes a power converter using a step-down converter 5, but is not limited to this; for example, a step-up or step-up / step-down converter 5 can be used. Furthermore, the converter 5 may be non-isolated or isolated. The voltage sensor 15 may be provided as needed.

[0083] In the embodiment described above, the number of multiplexers n for multiplexing is set to 4, but the number of multiplexers n can be 2, 3, or 5 or more. In the embodiment described above, power switches SW1 and SW2 are exemplified as N-channel power MOSFETs, but they may be composed of other types of power switching elements.

[0084] In the embodiment described above, freewheeling diodes D1 and D2 are provided in parallel to the power MOSFETs constituting the power switches SW1 and SW2, respectively, to commutate the load current, but the system is not limited to this. Body diodes added to the power MOSFETs may be used instead of freewheeling diodes D1 and D2. Alternatively, a power switch with reverse conduction (for example, a reverse-conducting IGBT (RC-IGBT)) may be used.

[0085] Furthermore, similar to the first multiplexed converters 5u1, 5v1, and 5w1, a zero current detection unit 22 is provided for the second and subsequent m-multiplexed converters 5u2...5un, 5v2...5vn, and 5w2...5wn, and the inductor current I L After detecting zero, the corresponding power switch SW1 or SW2 may be turned on. It is preferable to use the on-time Ton calculated as described in equations (1-1) and (2-1) above for power switches SW1 and SW2.

[0086] The motor control unit 11 and pulse control unit 12, which are components of the control device 10, may be implemented using hardware that combines logic circuits, or they may be implemented by hardware such as a microcontroller executing a program.

[0087] The method using the control device 10 described herein may be implemented by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program. Alternatively, the control device 10 and its method described herein may be implemented by a dedicated computer provided by configuring a processor with one or more dedicated hardware logic circuits.

[0088] Alternatively, the control device 10 and its method described herein may be implemented by one or more dedicated computers comprising a combination of a processor and memory programmed to perform one or more functions and a processor comprising one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by the computer on a computer-readable non-transitional tangible recording medium.

[0089] Although the present invention has been described in accordance with the embodiments described above, it is understood that the present invention is not limited to such embodiments or structures. The present invention also encompasses various modifications and variations within the equivalence range. In addition, various combinations and forms, as well as other combinations and forms that include one, more, or fewer elements, fall within the scope and conceptual range of the present invention. [Explanation of Symbols]

[0090] In the drawing, 3 is a three-phase inverter (power conversion unit), 5, 5u1, 5v1, 5w1, 5u2, 5v2, 5w2, 5u3, 5v3, 5w3, 5un, 5vn, and 5wn are converters, 6u, 6v, and 6w are multi-phase converters, 10 is a control unit, 11 is a motor control unit, 12 is a pulse control unit, 21 is a gate drive unit, 22 is a zero current detection unit, and 23 is a pulse Calculation Section 24 indicates the current discontinuous operation switching section, SW1 is the upper arm switch, and SW2 is the lower arm switch.

Claims

1. A power conversion unit (3) is provided with two or more n converters (5u1...5un, 5v1...5vn, 5w1...5wn) connected in parallel, A motor control unit (11) that outputs control information corresponding to the input command value, The system includes a pulse control unit (12) that outputs pulse signals to drive the n converters of the power conversion unit based on the control information of the motor control unit, The pulse control unit, A power converter comprising a current discontinuous operation switching unit (24) that switches between a current boundary mode and a current discontinuous operation mode according to the command value to operate the converter.

2. The pulse control unit, A gate drive unit (21) that drives the converter of the power conversion unit, A zero current detection unit (22) detects when the current of the converter driven by the gate drive unit reaches zero, A pulse calculation unit (23) calculates the on-time, period, and phase difference between multiple pulse signals applied to each converter when the converter is operated in the current boundary mode or the current discontinuous operation mode, and outputs a pulse signal to the gate drive unit, The power converter according to claim 1, comprising:

3. The converter consists of an upper arm switch (SW1) and a lower arm switch (SW2) to which the power supply voltage is input, and a step-down converter using an inductor (L) and a capacitor (C). The current discontinuous operation switching unit switches to the current boundary mode when the absolute value of the current command value, which is the command value, is equal to or greater than a predetermined value. The gate drive unit drives the upper arm switch of the converter when the current command value as the command value is positive, and the pulse calculation unit sets the on time Ton1 and off time Toff1 of the upper arm switch, as well as the period T and the phase difference Td between the multiple pulses, based on equations (1-1) to (1-4), The power converter according to claim 2, wherein the gate drive unit drives the lower arm switch of the converter when the current command value as the command value is negative, and the pulse calculation unit sets the on time Ton2 and off time Toff2 of the lower arm switch, and the period T and the phase difference Td between the multiple pulses based on equations (2-1) to (2-4). Here, Vin represents the input voltage, Vout represents the output voltage, IL represents the inductor current, L represents the inductance of the inductor, and n represents the number of converter multiplexers. [Math 1] [Math 2]

4. The converter consists of an upper arm switch (SW1) and a lower arm switch (SW2) to which the power supply voltage is input, and a step-down converter using an inductor (L) and a capacitor (C). The current discontinuous operation switching unit switches to the current discontinuous operation mode when the absolute value of the current command value, which is the command value, is less than a predetermined value. The gate drive unit drives the upper arm switch of the converter when the current command value as the command value is positive, and the pulse calculation unit sets the on time Ton3 and off time Toff3 of the upper arm switch based on equation (5), and separately from the on time and off time, provides a standby period in which both the upper arm switch and the lower arm switch are turned off. The power converter according to claim 2, wherein the gate drive unit drives the lower arm switch of the converter when the current command value as the command value is negative, the pulse calculation unit sets the on time Ton3 and off time Toff3 of the lower arm switch based on equation (5), and provides a standby period in which both the upper arm switch and the lower arm switch are turned off, separate from the on time and the off time. Here, Vin represents the input voltage, Iout represents the output current, L represents the inductance of the inductor, and n represents the number of converter multiplexers. [Math 5]

5. The power converter according to any one of claims 1 to 4, wherein the converter is a step-down type, a step-up type, or a step-up / step-down type.

6. The power converter according to any one of claims 1 to 4, wherein the converter is non-isolated or isolated.

Images