Image sensor control method and camera system

Abstract

This image sensor controlling method is a method for controlling an image sensor that comprises: a photoelectric conversion unit that includes a first electrode, a second electrode opposed to the first electrode, and a photoelectric conversion layer located between the first electrode and the second electrode; and peripheral circuits connected to the photoelectric conversion unit. The image sensor controlling method comprises: accepting a predetermined input signal; and controlling the image sensor by switching between a normal imaging mode and a low power consumption mode on the basis of the predetermined input signal. In the normal imaging mode, the image sensor is caused to apply a first voltage between the first electrode and the second electrode. In the low power consumption mode, the image sensor is caused to apply a second voltage, which is higher than 0 volts and lower than the first voltage, between the first electrode and the second electrode and to halt some of the operations of the peripheral circuits.

Description

Technical Field

[0001] The present disclosure relates to a method for controlling an image sensor and a camera system.

Background Art

[0002] Conventionally, an image sensor in which a photoelectric conversion layer is laminated on a semiconductor substrate provided with a readout circuit is known. An image sensor in which a photoelectric conversion layer is laminated on a semiconductor substrate provided with a readout circuit is also called a stacked image sensor. When imaging using such a stacked image sensor, a predetermined bias voltage is applied to the photoelectric conversion layer. For example, Patent Document 1 discloses a stacked image sensor that changes the magnitude of the bias voltage during the period of reading out the pixel signals of each pixel.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a stacked image sensor, when the photoelectric conversion layer deteriorates, the reliability of the image sensor decreases, such as a decrease in the image quality of the captured image. In addition, a camera system using a stacked image sensor is mainly driven by being connected to a fixed power supply, but the use of driving with a battery has also increased. In order to operate with a limited battery capacity, power consumption reduction is desired.

[0005] The present disclosure provides a method for controlling an image sensor and a camera system capable of improving the reliability of the image sensor and reducing power consumption.

Means for Solving the Problems

[0006] A method for controlling an image sensor according to one aspect of the present disclosure includes a photoelectric conversion unit including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode, and a peripheral circuit connected to the photoelectric conversion unit, the method for controlling an image sensor including receiving a predetermined input signal and controlling the image sensor by switching between a normal imaging mode and a low power consumption mode based on the predetermined input signal. In the normal imaging mode, the image sensor is made to apply a first voltage between the first electrode and the second electrode. In the low power consumption mode, the image sensor is made to apply a second voltage greater than 0V and less than the first voltage between the first electrode and the second electrode, and a part of the operation of the peripheral circuit is stopped.

[0007] A camera system according to one aspect of the present disclosure includes an image sensor having a photoelectric conversion unit including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode, and peripheral circuits connected to the photoelectric conversion unit, and a control unit. The control unit receives a predetermined input signal and controls the image sensor by switching between a normal imaging mode and a low power consumption mode based on the predetermined input signal, in which case the control unit causes the image sensor to apply a first voltage between the first electrode and the second electrode, and in which case the control unit causes the image sensor to apply a second voltage greater than 0V and less than the first voltage between the first electrode and the second electrode, and stops the operation of part of the peripheral circuits. [Effects of the Invention]

[0008] According to one aspect of this disclosure, a method for controlling an image sensor and a camera system that enable improved reliability and reduced power consumption of the image sensor can be provided. [Brief explanation of the drawing]

[0009] [Figure 1] Figure 1 shows an example of the current-voltage characteristics of a device equipped with a photoelectric conversion layer. [Figure 2]Figure 2 is a block diagram showing the functional configuration of the camera system according to the embodiment. [Figure 3] Figure 3 is a schematic diagram showing an exemplary circuit configuration of an image sensor according to an embodiment. [Figure 4] Figure 4 is a schematic cross-sectional view showing an exemplary device structure of a pixel according to the embodiment. [Figure 5] Figure 5 is a plan view showing an example of a planar layout of a pixel electrode and a shield electrode according to an embodiment. [Figure 6] Figure 6 is a schematic cross-sectional view showing an exemplary device structure of another pixel according to the embodiment. [Figure 7] Figure 7 is a schematic cross-sectional view showing yet another exemplary pixel device structure according to the embodiment. [Figure 8] Figure 8 is a flowchart showing an example of the operation of the camera system according to the embodiment. [Figure 9] Figure 9 is a flowchart showing an example of operation of the image sensor in low power consumption mode according to the embodiment. [Figure 10] Figure 10 is a timing chart showing a first example of the operating timing of the camera system according to the embodiment. [Figure 11] Figure 11 shows an example of the current-voltage characteristics of the photoelectric conversion section used to explain the second voltage. [Figure 12] Figure 12 shows an example of the current-voltage characteristics of the photoelectric conversion section to illustrate the first voltage range. [Figure 13] Figure 13 shows another example of the current-voltage characteristics of the photoelectric conversion section to explain the second voltage. [Figure 14] Figure 14 is a timing chart showing a second example of the operating timing of the camera system according to the embodiment. [Figure 15] Figure 15 is a timing chart showing a third example of the operating timing of the camera system according to the embodiment. [Figure 16]FIG. 16 is a schematic diagram for explaining the potentials of the counter electrode and the charge storage unit at a certain time when the reset operation is performed in the low power consumption mode. [Figure 17] FIG. 17 is a schematic diagram for explaining the potentials of the counter electrode and the charge storage unit at a certain time when the reset operation is performed in the low power consumption mode. [Figure 18] FIG. 18 is a schematic diagram for explaining the potentials of the counter electrode and the charge storage unit at a certain time when the reset operation is performed in the low power consumption mode. [Figure 19] FIG. 19 is a schematic diagram for explaining the potentials of the counter electrode and the charge storage unit at a certain time when the reset operation is performed in the low power consumption mode. [Figure 20] FIG. 20 is a timing chart showing a modification of the operation timing of the camera system according to the embodiment.

Embodiments of the Invention

[0010] (Process of arriving at an aspect of the present disclosure) Before specifically describing the embodiments of the present disclosure, the process of arriving at an aspect of the present disclosure will be described.

[0011] In a stacked image sensor, when light is irradiated on the photoelectric conversion layer, pairs of charges as carriers are generated in the photoelectric conversion layer, and even when the readout circuit does not perform a readout operation, a current continues to flow through the photoelectric conversion layer. Hereinafter, the current flowing when light is irradiated on the photoelectric conversion layer may be referred to as "photoelectric current". Further, even when light is not irradiated on the photoelectric conversion layer, a current flows through the photoelectric conversion layer, which affects the pixel device characteristics. Hereinafter, the current flowing when light is not irradiated on the photoelectric conversion layer may be referred to as "dark current". In particular, dark current is likely to occur if there are defects or the like in the photoelectric conversion layer.

[0012] Here, the current characteristics flowing through the photoelectric conversion layer will be explained using Figure 1. Figure 1 shows an example of the current-voltage characteristics of an element equipped with a photoelectric conversion layer. The characteristics shown in Figure 1 are evaluated using a test element, for example, in which a pair of electrodes and a photoelectric conversion layer sandwiched between the pair of electrodes are formed on a glass substrate. For example, since actual image sensors use small electrodes of about a few μm, the amount of current measured is very small, so a relatively large test element is fabricated to confirm the current-voltage characteristics. The horizontal axis in Figure 1 shows the bias voltage applied to the element. The vertical axis in Figure 1 shows the absolute value of the current flowing between the pair of electrodes. Figure 1 is a semi-logarithmic graph with the vertical axis being logarithmic. In Figure 1, the solid line labeled "dark" shows the current-voltage characteristics in the dark when the element is not illuminated with light. The dashed line labeled "light" in Figure 1 shows the current-voltage characteristics in the bright state when the element is illuminated with light of a predetermined intensity. Note that in the bright state, the amount of current flowing changes depending on the intensity of the light incident on the element.

[0013] During photoelectric conversion for image acquisition, a bias voltage (e.g., about 5V) is applied to the photoelectric conversion layer at the position indicated by (a). This causes a photocurrent to flow due to carriers generated in response to the amount of light incident on the photoelectric conversion layer, and charges are collected on the electrodes. With the bias voltage indicated by (a), even if the bias voltage changes due to the collection of charges on the electrodes, the change in current characteristics is small. The readout circuit then reads out a signal corresponding to the amount of collected charge.

[0014] As described above, when imaging is performed using a stacked image sensor, a bias voltage is applied to ensure sufficient current flows in bright conditions. Furthermore, even when the readout circuit is not performing readout operations and the output image is not being used, photocurrent continues to flow through the photoelectric conversion layer. In addition, as shown in Figure 1, even in the dark when no light is illuminating the sensor, a dark current flows due to the bias voltage shown in (a) being applied to the photoelectric conversion layer. The flow of such photocurrent and darkcurrent causes the photoelectric conversion layer to deteriorate, leading to reliability issues for the image sensor and increased power consumption. Moreover, because the magnitudes of the photocurrent and darkcurrent differ, the degree of deterioration of the photoelectric conversion layer and power consumption vary greatly depending on the environment in which the stacked image sensor is placed. Therefore, when a stacked image sensor is placed in a bright location, the photoelectric conversion layer is more prone to deterioration, and power consumption increases.

[0015] On the other hand, when a bias voltage (e.g., 1V or less) is applied to the photoelectric conversion layer at the positions shown in (b) to (e) of Figure 1, the current flowing through the photoelectric conversion layer can be reduced compared to when the bias voltage shown in (a) is applied. As a result, degradation of the photoelectric conversion layer can be suppressed, improving the reliability of the image sensor and reducing power consumption. Heat generation of the image sensor can also be suppressed. For example, at the bias voltage shown in (d), the amount of current flowing through the photoelectric conversion layer can be minimized. Also, depending on the characteristics of each pixel or the photoelectric conversion layer, the bias voltage at which the current is minimized may fluctuate, so it is possible to stably reduce the amount of current flowing through the photoelectric conversion layer even at the bias voltages shown in (b) or (c), which have a margin in the operating range. Similar effects can be obtained even with bias voltages between (d) and (e). Furthermore, if the photoelectric conversion layer is considered as a photodiode, for example, the voltage to the left of (d) is a reverse bias voltage, and the voltage to the right of (d) is a forward bias voltage. Depending on the configuration of the photoelectric conversion layer, a forward current flow may lead to degradation of the photoelectric conversion layer. In such cases, it is better to apply the reverse bias voltage shown to the left of (d) to the photoelectric conversion layer.

[0016] As described above, the inventors of the present invention focused on the fact that in a stacked image sensor, the photocurrent and dark current flowing through the photoelectric conversion layer depend on the bias voltage. The inventors then found that controlling the bias voltage to reduce the current flowing through the photoelectric conversion layer is effective in suppressing degradation of the photoelectric conversion layer, improving the reliability of the image sensor, and reducing the power consumption of the image sensor, leading to one aspect of the present disclosure. This will be explained in detail below.

[0017] (Summary of this disclosure) The following is an overview of one aspect of this disclosure.

[0018] A method for controlling an image sensor according to one aspect of the present disclosure includes a photoelectric conversion unit including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode, and a peripheral circuit connected to the photoelectric conversion unit, the method for controlling an image sensor including receiving a predetermined input signal and controlling the image sensor by switching between a normal imaging mode and a low power consumption mode based on the predetermined input signal. In the normal imaging mode, the image sensor is made to apply a first voltage between the first electrode and the second electrode. In the low power consumption mode, the image sensor is made to apply a second voltage greater than 0V and less than the first voltage between the first electrode and the second electrode, and a part of the operation of the peripheral circuit is stopped.

[0019] This allows the system to switch from normal imaging mode to low power consumption mode upon receiving a predetermined input signal, thereby stopping some of the peripheral circuits of the image sensor. The system then controls the image sensor to reduce the bias voltage applied between the first and second electrodes of the image sensor compared to normal imaging mode. As a result, for example, the current flowing through the photoelectric conversion layer is reduced, which suppresses the degradation of the photoelectric conversion layer and reduces power consumption. Therefore, this embodiment improves the reliability of the image sensor and reduces power consumption.

[0020] Furthermore, for example, in the low power consumption mode, the second voltage may be applied to the image sensor between the first electrode and the second electrode for a period of one frame or longer.

[0021] This makes it possible to reduce the current flowing through the photoelectric conversion layer over a period of time longer than one frame.

[0022] Furthermore, for example, the image sensor may further include a third electrode facing the first electrode with the photoelectric conversion layer in between. In the normal imaging mode, a third voltage may be applied to the image sensor between the first electrode and the third electrode. In the low power consumption mode, a fourth voltage smaller than the third voltage may be applied to the image sensor between the first electrode and the third electrode.

[0023] This makes it possible to reduce the current flowing through the photoelectric conversion layer between the first electrode and the third electrode in low power consumption mode.

[0024] Furthermore, for example, in the low power consumption mode, the image sensor may be made to supply equal voltages to the first electrode and the third electrode, thereby applying the second voltage between the first electrode and the second electrode, and the fourth voltage between the first electrode and the third electrode.

[0025] This allows the fourth voltage to be minimized, potentially minimizing the current flowing through the photoelectric conversion layer between the first and third electrodes.

[0026] Furthermore, for example, the photoelectric conversion unit may have a photocurrent characteristic in which, when a voltage is applied between the first electrode and the second electrode, there exists a first voltage range such that the current density flowing between the first electrode and the second electrode is the same in the state with and without incident light. The second voltage may be included in the first voltage range.

[0027] As a result, the photocurrent becomes equivalent to the dark current, thus reducing the amount of current flowing through the photoelectric conversion layer in low-power mode. Furthermore, the amount of current flowing through the photoelectric conversion layer does not change depending on whether or not light is incident on the image sensor, and the effect of reducing the current can be kept constant regardless of the environment in which the image sensor is placed.

[0028] Furthermore, for example, the second electrode may be connected to a charge storage unit. In the low power consumption mode, the image sensor may be caused to supply a predetermined voltage to the first electrode, and then to supply a reset voltage to the charge storage unit to reset the potential of the charge storage unit, thereby applying the second voltage between the first electrode and the second electrode. The value of the predetermined voltage may be the value between the reset voltage and the voltage supplied to the first electrode when the first voltage is applied between the first electrode and the second electrode.

[0029] When switching from normal imaging mode to low power consumption mode for control, the potential of the charge storage unit may be either higher or lower than a predetermined voltage, depending on the amount of signal charge stored in the charge storage unit. This can cause current to flow in the photoelectric conversion layer in the opposite direction to that in normal imaging mode. Such reverse current can easily cause degradation of the photoelectric conversion layer. In low power consumption mode, after supplying a predetermined voltage to the first electrode, a reset voltage is supplied to the charge storage unit connected to the second electrode. This applies a bias voltage in the same direction as in normal imaging mode, causing current to flow in the same direction to the photoelectric conversion layer. Therefore, even if a reverse current flows, it can be temporary, thus suppressing degradation of the photoelectric conversion layer.

[0030] Furthermore, for example, in the low power consumption mode, the image sensor does not need to output an image by stopping some of the operation of the peripheral circuits.

[0031] This eliminates image output from the image sensor, further reducing the power consumption of the image sensor.

[0032] Furthermore, a camera system according to one aspect of the present disclosure includes an image sensor having a photoelectric conversion unit including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode, and peripheral circuits connected to the photoelectric conversion unit, and a control unit. The control unit receives a predetermined input signal and controls the image sensor by switching between a normal imaging mode and a low power consumption mode based on the predetermined input signal. In the normal imaging mode, the control unit causes the image sensor to apply a first voltage between the first electrode and the second electrode, and in the low power consumption mode, it causes the image sensor to apply a second voltage greater than 0V and less than the first voltage between the first electrode and the second electrode, and stops the operation of part of the peripheral circuits.

[0033] As a result, upon receiving a predetermined input signal, the control unit switches from normal imaging mode to low power consumption mode, stopping some of the operation of the peripheral circuits of the image sensor, and controls the image sensor to reduce the bias voltage applied between the first and second electrodes of the image sensor to a level lower than that in normal imaging mode. Therefore, for example, the current flowing through the photoelectric conversion layer is reduced, which suppresses the degradation of the photoelectric conversion layer and reduces power consumption. Thus, this embodiment improves the reliability of the image sensor and reduces power consumption.

[0034] The embodiments will be described below with reference to the drawings.

[0035] The embodiments described below are all comprehensive or specific examples. The numerical values, shapes, components, arrangement and connection configurations of components, steps, and the order of steps shown in the following embodiments are examples only and are not intended to limit this disclosure. Furthermore, components in the following embodiments that are not described in an independent claim are described as optional components. In addition, the figures are not necessarily strictly accurate. Therefore, for example, the scale in each figure may not necessarily match. Also, in each figure, substantially identical components are denoted by the same reference numerals, and redundant explanations may be omitted or simplified.

[0036] Furthermore, in this specification, terms indicating relationships between elements, terms indicating the shape of elements, and numerical ranges do not represent only strict meanings, but also include substantially equivalent ranges, such as differences of a few percent.

[0037] Furthermore, in this specification, the terms "upper" and "lower" do not refer to the upward (vertically upward) and downward (vertically downward) directions in absolute spatial perception, but rather to terms defined by the relative positional relationship based on the stacking order in the stacked configuration. Specifically, the light-receiving side of the image sensor is defined as "upper," and the side opposite the light-receiving side is defined as "lower." It should be noted that terms such as "upper" and "lower" are used solely to specify the relative arrangement of components and are not intended to limit the orientation of the image sensor during use. Moreover, the terms "upper" and "lower" apply not only when two components are spaced apart and another component exists between them, but also when two components are placed in close proximity and touching each other.

[0038] (Embodiment) The following describes a camera system according to an embodiment.

[0039] [Overall structure] First, the overall configuration of the camera system 300 according to the embodiment will be described. Figure 2 is a block diagram showing the functional configuration of the camera system 300 according to the embodiment.

[0040] As shown in Figure 2, the camera system 300 comprises an image sensor 100, a lens optical system 310, a camera signal processing unit 320, a system controller 330, and an operation reception unit 340. The camera system 300 can be used, for example, in smartphones, video cameras, digital still cameras, surveillance cameras, or in-vehicle cameras.

[0041] The image sensor 100 converts light incident on the camera system 300 into an electrical signal and outputs an image (image signal). The image sensor 100 is a stacked image sensor in which a photoelectric conversion unit including a photoelectric conversion layer is formed on a semiconductor substrate. For example, the image sensor 100 includes a photoelectric conversion unit and peripheral circuits that perform readout of the signal charge generated by the photoelectric conversion unit on a single semiconductor substrate. Details of the configuration of the image sensor 100 will be described later. The image sensor 100 operates based on the control of the system controller 330.

[0042] The lens optical system 310 is an optical element for guiding incident light to the imaging surface of the image sensor 100. The lens optical system 310 includes, for example, an autofocus lens, a zoom lens, and an aperture.

[0043] The camera signal processing unit 320 is a circuit that performs various processes on the image signal generated by the image sensor 100. For example, the camera signal processing unit 320 performs processes such as gamma correction, color interpolation, spatial interpolation, auto white balance, distance measurement calculation, and wavelength information separation. The camera signal processing unit 320 is implemented, for example, by a DSP (Digital Signal Processor).

[0044] The system controller 330 controls the entire camera system 300. The system controller 330 is an example of a control unit that controls the operation of the image sensor 100, the camera signal processing unit 320, and the lens optical system 310. For example, the system controller 330 outputs various drive signals to the image sensor 100, the camera signal processing unit 320, and the lens optical system 310. The system controller 330 is implemented, for example, by a microcomputer. The functions of the system controller 330 may be implemented by a combination of general-purpose processing circuits and software, or by hardware specialized for such processing.

[0045] The system controller 330 controls the image sensor 100 by switching between a normal imaging mode and a low power consumption mode upon receiving a predetermined input signal. For example, the system controller 330 outputs a power-saving signal PSV to the image sensor 100. In the normal imaging mode, as described above, a bias voltage is applied to the photoelectric conversion layer that allows sufficient photocurrent to flow due to carriers generated in accordance with the amount of light incident on the photoelectric conversion layer. On the other hand, in the low power consumption mode, a smaller bias voltage than in the normal imaging mode is applied to the photoelectric conversion layer.

[0046] Furthermore, the image signal processed by the camera signal processing unit 320 is recorded as a still image or video on a recording medium such as memory by the system controller 330. The image signal may also be displayed as a still image or video on a monitor such as a liquid crystal display by the system controller 330.

[0047] The operation reception unit 340 receives user operations related to the camera system 300. For example, the operation reception unit 340 receives an operation from the user indicating that the control of the image sensor 100 should be switched between normal imaging mode and low power consumption mode. The operation reception unit 340 also receives an operation from the user when taking an image using the camera system 300. The operation reception unit 340 is implemented, for example, by a touch panel that receives user operations, or by hardware keys such as push buttons.

[0048] [Image sensor] Next, the detailed configuration of the image sensor 100 will be described.

[0049] Figure 3 is a schematic diagram showing an exemplary circuit configuration of an image sensor 100 according to an embodiment. The image sensor 100 shown in Figure 3 has a pixel array PA including a plurality of pixels 10 arranged in two dimensions. The pixel array PA forms, for example, the imaging surface of the image sensor 100. Figure 3 schematically shows an example in which the pixels 10 are arranged in a 2x2 matrix. The number and arrangement of pixels 10 in the image sensor 100 are not limited to the example shown in Figure 3.

[0050] Each pixel 10 includes a photoelectric conversion unit 20, a signal detection circuit 22, a reset transistor 28, a charge storage unit 41, and a shield electrode 17.

[0051] As will be explained later with reference to the drawings, the photoelectric conversion unit 20 has a photoelectric conversion layer 12 sandwiched between two electrodes facing each other, and generates a signal charge upon receiving incident light. The entire photoelectric conversion unit 20 does not need to be an independent element for each pixel 10; for example, a part of the photoelectric conversion unit 20 may span multiple pixels 10.

[0052] The signal detection circuit 22 is a circuit that detects the signal charge generated by the photoelectric conversion unit 20. In this example, the signal detection circuit 22 includes a signal detection transistor 24 and an address transistor 26. The signal detection transistor 24 and the address transistor 26 are, for example, field-effect transistors (FETs). Here, N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used as examples for the signal detection transistor 24 and the address transistor 26. Each transistor, such as the signal detection transistor 24 and the address transistor 26, as well as the reset transistor 28 described later, has a control terminal, an input terminal, and an output terminal. The control terminal is, for example, the gate. The input terminal is one of the drain and source, for example, the drain. The output terminal is the other of the drain and source, for example, the source.

[0053] As schematically shown in Figure 3, the control terminal of the signal detection transistor 24 has an electrical connection with the photoelectric conversion unit 20. The signal charge generated by the photoelectric conversion unit 20 is stored in the charge storage unit 41. The charge storage unit 41 extends to a region including the area between the gate of the signal detection transistor 24 and the photoelectric conversion unit 20. The signal charge is either positive or negative charge, for example, a hole or an electron. The charge storage unit 41 is a portion that includes a so-called floating diffusion. The charge storage unit 41 is also called a "charge storage node". Details of the structure of the photoelectric conversion unit 20 will be described later.

[0054] The image sensor 100 includes peripheral circuits that are directly or indirectly connected to the photoelectric conversion unit 20. These peripheral circuits, for example, drive the pixel array PA and acquire an image based on the signal charge generated by the photoelectric conversion unit 20. The peripheral circuits operate, for example, under the control of a system controller 330. The image sensor 100 may also include a control circuit, as one of its peripheral circuits, that controls the operation of other peripheral circuits. These peripheral circuits include, for example, a voltage supply circuit 32, a voltage supply circuit 35, a reset voltage source 34, a vertical scanning circuit 36, a column signal processing circuit 37, a horizontal signal readout circuit 38, and a pixel drive signal generation circuit 39. The voltage supply circuits 32 and 35 may be located within the substrate on which the components of the image sensor 100 are mounted, or they may be located outside the substrate on which the components of the image sensor 100 are mounted. In other words, the voltage supply circuits 32 and 35 may be located on a printed circuit board or power supply board, or other location other than the substrate on which the components of the image sensor 100 are mounted.

[0055] Each pixel 10's photoelectric conversion unit 20 has a connection to a sensitivity control line 42. In the configuration illustrated in Figure 3, the sensitivity control line 42 is connected to a voltage supply circuit 32. As will be described in detail later, the voltage supply circuit 32 supplies different voltages to the counter electrode 13 of the photoelectric conversion unit 20, which will be described later, between the normal imaging mode and the low power consumption mode. The voltage supply circuit 32 includes, for example, two or more different voltage sources, and supplies the voltage of one of the voltage sources to the counter electrode 13 by a switch such as a transistor. Alternatively, the voltage supply circuit 32 may divide the voltage of one voltage source into two or more voltages and supply one of the voltages to the counter electrode 13.

[0056] As will be described later, the photoelectric conversion unit 20 has, in addition to the opposing electrode 13, a pixel electrode 11 that is positioned opposite the opposing electrode 13.

[0057] Furthermore, in the configuration illustrated in Figure 3, the shield electrode 17 has a connection to a sensitivity control line 45. The sensitivity control line 45 is connected to a voltage supply circuit 35. The voltage supply circuit 35 supplies a shield voltage to the shield electrode 17. For example, the shield electrode 17 and the pixel electrode 11 are electrically isolated. The voltage supply circuit 35 may supply different voltages to the shield electrode 17 between the normal imaging mode and the low power consumption mode. The voltage supply circuit 35 may, for example, include two or more different voltage sources and supply the voltage of one of the voltage sources to the shield electrode 17 by a switch such as a transistor. Alternatively, the voltage supply circuit 35 may divide the voltage of one voltage source into two or more voltages and supply one of the voltages to the shield electrode 17. Note that the image sensor 100 does not necessarily have to include the shield electrode 17, the sensitivity control line 45, and the voltage supply circuit 35.

[0058] Voltage supply circuits 32 and 35 are not limited to specific power supply circuits, and may be circuits that generate a predetermined voltage, or circuits that convert a voltage supplied from another power source to a predetermined voltage.

[0059] Each pixel 10 has a connection to a power line 40 that supplies the power supply voltage VDD. As shown in the figure, the input terminal of the signal detection transistor 24 is connected to the power line 40. By having the power line 40 function as a source follower power supply, the signal detection transistor 24 amplifies and outputs the signal charge generated by the photoelectric conversion unit 20. Specifically, a voltage corresponding to the amount of signal charge stored in the charge storage unit 41 is applied to the control terminal of the signal detection transistor 24. The signal detection transistor 24 amplifies this voltage.

[0060] The output terminal of the signal detection transistor 24 is connected to the input terminal of the address transistor 26. The output terminal of the address transistor 26 is connected to one of several vertical signal lines 47 arranged for each row of the pixel array PA. The control terminal of the address transistor 26 is connected to the address control line 46. By controlling the potential of the address control line 46, the output of the signal detection transistor 24 can be selectively read out to the corresponding vertical signal line 47. Specifically, the voltage amplified by the signal detection transistor 24 is selectively read out as a pixel signal via the address transistor 26 as a signal voltage.

[0061] In the illustrated example, the address control line 46 is connected to the vertical scanning circuit 36. The vertical scanning circuit 36 ​​is also called the "row scanning circuit". The vertical scanning circuit 36 ​​selects multiple pixels 10 arranged in each row on a row-by-row basis by applying a predetermined voltage to the address control line 46. This enables the reading of the signals from the selected pixels 10 and the reset of the charge storage unit 41, which will be described later.

[0062] Furthermore, a pixel drive signal generation circuit 39 is connected to the vertical scanning circuit 36. In the illustrated example, the pixel drive signal generation circuit 39 generates signals to drive the pixels 10 located in each row of the pixel array PA, and the generated pixel drive signals are supplied to the pixels 10 of the row selected by the vertical scanning circuit 36.

[0063] The vertical signal line 47 is the main signal line that transmits pixel signals from the pixel array PA to the peripheral circuits. A column signal processing circuit 37 is connected to the vertical signal line 47. The column signal processing circuit 37 is also called a "row signal storage circuit". The column signal processing circuit 37 performs noise suppression signal processing, such as correlated double sampling, and analog-to-digital conversion (AD conversion). As shown in the figure, the column signal processing circuit 37 is provided corresponding to each column of pixels 10 in the pixel array PA. A horizontal signal readout circuit 38 is connected to these column signal processing circuits 37. The horizontal signal readout circuit 38 is also called a "column scanning circuit". The horizontal signal readout circuit 38 sequentially reads signals from multiple column signal processing circuits 37 to the horizontal common signal line 49. The image sensor 100 may be driven using a global shutter method or a rolling shutter method.

[0064] In the configuration illustrated in Figure 3, the pixel 10 has a reset transistor 28. The reset transistor 28 may be a field-effect transistor, for example, similar to the signal detection transistor 24 and the address transistor 26. In the following, unless otherwise specified, an example in which an N-channel MOSFET is used as the reset transistor 28 will be described. As shown in the figure, the reset transistor 28 is connected between the reset voltage line 44 that supplies the reset voltage Vr and the charge storage unit 41. The control terminal of the reset transistor 28 is connected to the reset control line 48. By controlling the potential of the reset control line 48, the potential of the pixel electrode 11 and the charge storage unit 41 can be reset to the reset voltage Vr. In this example, the reset control line 48 is connected to the vertical scanning circuit 36. Therefore, by the vertical scanning circuit 36 ​​applying a predetermined voltage to the reset control line 48, it is possible to reset multiple pixels 10 arranged in each row on a row-by-row basis.

[0065] In this example, a reset voltage line 44 that supplies a reset voltage Vr to the reset transistor 28 is connected to a reset voltage source 34. The reset voltage source 34 is also called a "reset voltage supply circuit". The reset voltage source 34 only needs to have a configuration that can supply a predetermined reset voltage Vr to the reset voltage line 44 when the image sensor 100 is operating, and, like the voltage supply circuit 32 described above, is not limited to a specific power supply circuit. Each of the voltage supply circuit 32, voltage supply circuit 35, and reset voltage source 34 may be part of a single voltage supply circuit or may be an independent, separate voltage supply circuit. At least one of the voltage supply circuit 32, voltage supply circuit 35, and reset voltage source 34 may be part of the vertical scanning circuit 36. Alternatively, the sensitivity control voltage from the voltage supply circuit 32, the sensitivity control voltage from the voltage supply circuit 35, and / or the reset voltage Vr from the reset voltage source 34 may be supplied to each pixel 10 via the vertical scanning circuit 36.

[0066] It is also possible to use the power supply voltage VDD of the signal detection circuit 22 as the reset voltage Vr. In this case, the voltage supply circuit (not shown in Figure 3) that supplies power voltage to each pixel 10 and the reset voltage source 34 can be made common. Furthermore, since the power line 40 and the reset voltage line 44 can be made common, the wiring in the pixel array PA can be simplified. However, by making the reset voltage Vr a voltage different from the power supply voltage VDD of the signal detection circuit 22, more flexible control of the image sensor 100 becomes possible.

[0067] The image sensor 100 may also have circuits used in other known image sensors besides those described above. For example, each pixel 10 may have a feedback circuit to reduce reset noise, and a power supply circuit or the like for operating the feedback circuit may be included in the peripheral circuitry. Also, for example, the image sensor 100 may have an overflow transistor and a clipping circuit in the charge storage unit 41. In this case, the maximum potential of the charge storage unit 41 can be defined by setting the clipping voltage.

[0068] [Pixel device structure] Next, the device structure of the pixel 10 of the image sensor 100 will be described. Figure 4 is a schematic cross-sectional view showing an exemplary device structure of the pixel 10 according to the embodiment.

[0069] As shown in Figure 4, the pixel 10 comprises a CMOS (Complementary Metal Oxide Semiconductor) circuit layer 60, a photoelectric conversion unit 20 located above the CMOS circuit layer 60, a sealing layer 21 located above the photoelectric conversion unit 20, a shield electrode 17, and a charge storage unit 41. The shield electrode 17 is an example of a third electrode. The pixel 10 may further include an optical filter and microlenses above the sealing layer 21. Light enters the pixel 10 from above the CMOS circuit layer 60.

[0070] The photoelectric conversion unit 20 includes a pixel electrode 11 electrically connected to a charge storage unit 41, a counter electrode 13 located above the pixel electrode 11 and positioned opposite to the pixel electrode 11, a photoelectric conversion layer 12 located between the pixel electrode 11 and the counter electrode 13, an electron blocking layer 15 located between the pixel electrode 11 and the photoelectric conversion layer 12, and a hole blocking layer 16 located between the counter electrode 13 and the photoelectric conversion layer 12. The counter electrode 13 is an example of a first electrode. The pixel electrode 11 is an example of a second electrode. In the example shown in Figure 4, the counter electrode 13, the photoelectric conversion layer 12, the electron blocking layer 15, and the hole blocking layer 16 are formed across a plurality of pixels 10.

[0071] The CMOS circuit layer 60 includes a semiconductor substrate 61 and an interlayer insulating layer 62 disposed on the semiconductor substrate 61. The semiconductor substrate 61 is a substrate made of silicon, such as a p-type silicon substrate. The semiconductor substrate 61 is not limited to a substrate in which the entire surface is semiconductor. The interlayer insulating layer 62 is formed from an insulating material such as silicon dioxide.

[0072] Although not shown in Figure 4 except for some parts, the CMOS circuit layer 60 contains various transistors such as the signal detection circuit 22 and reset transistor 28 described using Figure 3, wiring such as signal lines, control lines and power lines, and a charge storage unit 41. In addition, a plug 31 connecting the charge storage unit 41 and the pixel electrode 11 is provided in the interlayer insulating layer 62 of the CMOS circuit layer 60. The plug 31 is formed using a conductive material.

[0073] Figure 4 schematically shows the signal detection circuit 22 and reset transistor 28, as well as the control and signal lines connected to them. The reset control line en_rst for each row is connected to the gate of the reset transistor 28. The signal detection circuit 22 outputs the pixel signal to the vertical signal line Vsig for each column. The reset control line en_rst corresponds to the reset control line 48 in Figure 3. The vertical signal line Vsig corresponds to the vertical signal line 47 in Figure 3. The pixel array PA is, for example, an n-row × m-column array, and in Figure 4, the i-th row, j-th column pixel 10 of the pixel array PA is shown. Therefore, the reset control line en_rst This represents the reset control line en_rst on the i-th row, and the vertical signal line Vsig <j>This represents the vertical signal line Vsig in column j.

[0074] The pixel electrode 11 is an electrode for collecting signal charges generated in the photoelectric conversion layer 12. There is at least one pixel electrode 11 for each pixel 10. The pixel electrode 11 is electrically connected to the charge storage unit 41 via a plug 31. The signal charges collected by the pixel electrode 11 are stored in the charge storage unit 41. The pixel electrode 11 is formed using a conductive material. The conductive material is, for example, a metal such as aluminum or copper, a metal nitride, or polysilicon that has been imparted conductivity by doping with impurities.

[0075] The photoelectric conversion layer 12 is located between the pixel electrode 11 and the counter electrode 13. The photoelectric conversion layer 12 is also located between the shield electrode 17 and the counter electrode 13. The photoelectric conversion layer 12 generates hole-electron pairs upon receiving incident light.

[0076] The photoelectric conversion material constituting the photoelectric conversion layer 12 may include, for example, organic semiconductor materials, semiconductor quantum dots, semiconductor carbon nanotubes, or compound semiconductors such as InGaAs (indium gallium arsenide). Furthermore, the photoelectric conversion material may be a combination of two or more of the organic semiconductor materials, semiconductor quantum dots, and semiconductor carbon nanotubes, and may also contain multiple types of organic semiconductor materials.

[0077] The photoelectric conversion layer 12 may absorb, or be sensitive to, infrared wavelengths. To absorb infrared wavelengths, the band gap of the photoelectric conversion material becomes narrower, making it easier for dark current to be generated by thermal excitation compared to photoelectric conversion materials that absorb visible light. Therefore, the effects of reduced power consumption and improved reliability in the low-power mode are more easily achieved.

[0078] The counter electrode 13 is a transparent electrode formed from, for example, a transparent conductive material. The counter electrode 13 is positioned on the side of the photoelectric conversion layer 12 where light is incident. Therefore, light that has passed through the counter electrode 13 is incident on the photoelectric conversion layer 12. In this specification, "transparent" means that at least a portion of the light in the wavelength range to be detected is transmitted, and it is not necessary to transmit light across the entire wavelength range of visible light and infrared light. In this specification, electromagnetic waves in general, including visible light and infrared light, are referred to as "light" for convenience.

[0079] The counter electrode 13 is formed using a transparent conductive oxide (TCO) such as ITO, IZO, AZO, FTO, SnO2, TiO2, or ZnO. A voltage is applied to the counter electrode 13 from the voltage supply circuit 32. By adjusting the voltage applied to the counter electrode 13 by the voltage supply circuit 32, the bias voltage, which is the potential difference between the counter electrode 13 and the pixel electrode 11, can be set and maintained at a desired value.

[0080] Furthermore, the counter electrode 13 is formed, for example, across multiple pixels 10. Therefore, it is possible to apply a voltage of a desired magnitude to multiple pixels 10 simultaneously from the voltage supply circuit 32. However, if a voltage of a desired magnitude can be applied from the voltage supply circuit 32, the counter electrode 13 may be provided separately for each pixel 10. Similarly, the photoelectric conversion layer 12, the electron blocking layer 15, and the hole blocking layer 16 may each be formed across multiple pixels 10, or they may be provided separately for each pixel 10.

[0081] In this way, by controlling the potential of the counter electrode 13 relative to the potential of the pixel electrode 11, either the hole or the electron from the hole-electron pair generated in the photoelectric conversion layer 12 by photoelectric conversion can be collected as a signal charge by the pixel electrode 11. Furthermore, the sensitivity of the photoelectric conversion unit 20 can be adjusted by changing the voltage applied to the counter electrode 13. The signal charge collected by the pixel electrode 11 is stored in the charge storage unit 41 via the plug 31. The voltage corresponding to the signal charge stored in the charge storage unit 41 is read out by the signal detection circuit 22. For example, when using holes as signal charges, it is possible to selectively collect holes by the pixel electrode 11 by setting the potential of the counter electrode 13 higher than that of the pixel electrode 11. The following describes the case in which holes are used as signal charges. Note that it is also possible to use electrons as signal charges, in which case the potential of the counter electrode 13 should be lower than that of the pixel electrode 11.

[0082] The voltage applied to the photoelectric conversion layer 12 is the difference between the potential Vito of the counter electrode 13 and the potential Vfd of the charge storage unit 41. The potential Vfd of the charge storage unit 41 fluctuates depending on the amount of signal charge stored in response to the amount of light incident on the photoelectric conversion layer 12. dark time Even in this case, the potential Vfd of the charge storage unit 41 fluctuates due to the flow of dark current.

[0083] The electron blocking layer 15 has the function of suppressing the injection of electrons from the pixel electrode 11 to the photoelectric conversion layer 12. The electron blocking layer 15 also transports holes, which are signal charges generated in the photoelectric conversion layer 12, to the pixel electrode 11. The upper surface of the electron blocking layer 15 is in contact with the photoelectric conversion layer 12. The lower surface of the electron blocking layer 15 is in contact with the pixel electrode 11 and the shield electrode 17.

[0084] The hole blocking layer 16 has the function of suppressing the injection of holes from the counter electrode 13 into the photoelectric conversion layer 12. The hole blocking layer 16 also transports electrons, which have a charge opposite to the signal charge generated in the photoelectric conversion layer 12, to the counter electrode 13. The upper surface of the hole blocking layer 16 is in contact with the counter electrode 13. The lower surface of the hole blocking layer 16 is in contact with the photoelectric conversion layer 12.

[0085] The materials for the electron blocking layer 15 and the hole blocking layer 16 are selected from known materials, taking into consideration, for example, the difference in bonding strength, ionization potential, and electron affinity between adjacent layers.

[0086] Furthermore, when electrons are used as signal charges, the photoelectric conversion unit 20 may have a configuration in which the electron blocking layer 15 and the hole blocking layer 16 are swapped.

[0087] The shield electrode 17 is positioned opposite the counter electrode 13, with the photoelectric conversion layer 12 in between. The shield electrode 17 is located below the photoelectric conversion unit 20. The shield electrode 17 is in contact with the lower surface of the photoelectric conversion unit 20. Although not shown in Figure 4, as described above, the shield electrode 17 has a connection to the sensitivity control line 45, and a voltage is applied from the voltage supply circuit 35 via the sensitivity control line 45. A portion of the interlayer insulating layer 62 may be placed between the shield electrode 17 and the photoelectric conversion layer 12. In other words, the shield electrode 17 and the photoelectric conversion layer 12 do not have to be in contact.

[0088] The shield electrode 17 and the pixel electrode 11 are separated from each other by a portion of the interlayer insulating layer 62. Figure 5 is a plan view showing an example of the planar layout of the pixel electrode 11 and the shield electrode 17. Note that in Figure 5, components other than the pixel electrode 11 and the shield electrode 17 are omitted from the illustration.

[0089] As shown in Figure 5, the pixel electrodes 11 are arranged, for example, in an array. The shield electrode 17 is positioned between adjacent pixel electrodes 11 in a plan view. The shield electrode 17 is positioned, for example, to sandwich the pixel electrodes 11 in a plan view, specifically surrounding the pixel electrodes 11. The shield electrode 17 is formed collectively across multiple pixels 10, and all pixels 10 are at the same potential. The shield electrode 17 is arranged in a grid pattern in a plan view, for example, with the pixel electrodes 11 positioned within each grid. Also, in a plan view, the area of ​​the pixel electrode 11 in each pixel 10 is larger than the area of ​​the shield electrode 17. This suppresses a decrease in sensitivity. The plan view shape of the shield electrode 17 is not particularly limited as long as it is positioned between adjacent pixel electrodes 11. For example, the shield electrode 17 may be provided in two or more separate units.

[0090] The shield electrode 17 is formed using a conductive material. The conductive material is, for example, a metal such as aluminum or copper, a metal nitride, or polysilicon that has been imparted conductivity by doping with impurities.

[0091] The voltage applied to the shield electrode 17 can be used to suppress the movement of signal charge between pixels 10, so-called crosstalk. Therefore, color mixing can be suppressed even without physically separating the photoelectric conversion layer 12. The voltage applied to the shield electrode 17 is set, for example, to be higher in potential than that of the pixel electrode 11. For example, a voltage higher than the reset voltage Vr is applied to the shield electrode 17. This makes it easier for holes to move to the pixel electrode 11 surrounded by the shield electrode 17 in a plan view, and suppresses the movement of holes to the pixel electrode 11 of adjacent pixels 10 beyond the shield electrode 17.

[0092] Furthermore, the voltage applied to the shield electrode 17 may be set so that the potential of the shield electrode 17 is lower than the potential of the pixel electrode 11. For example, a voltage lower than the reset voltage Vr is applied to the shield electrode 17. This allows holes that would otherwise move beyond the shield electrode 17 to the pixel electrode 11 of an adjacent pixel 10 in a plan view to be collected by the shield electrode 17, thereby suppressing the movement of holes beyond the shield electrode 17 to the pixel electrode 11 of an adjacent pixel 10.

[0093] Furthermore, the image sensor 100 does not necessarily have a sensitivity control line 45 and a voltage supply circuit 35, and the shield electrode 17 may be connected to the ground of the image sensor 100. Even in this case, crosstalk can be suppressed.

[0094] The image sensor 100 described above can be manufactured using a general semiconductor manufacturing process. In particular, when a silicon substrate is used as the semiconductor substrate 61, it can be manufactured by utilizing various silicon semiconductor processes.

[0095] [Device structure of another pixel] The configuration of the image sensor 100 is not limited to the example described above, and may have the configuration of a known stacked image sensor. For example, the image sensor 100 does not need to include an electron blocking layer 15, a hole blocking layer 16, and a shield electrode 17. Figure 6 is a schematic cross-sectional view showing an exemplary device structure of another pixel 10a according to the embodiment. In Figure 6, as in Figure 4, various transistors such as the signal detection circuit 22 and reset transistor 28 provided in the CMOS circuit layer 60, wiring such as signal lines, control lines and power lines, and the charge storage unit 41 are omitted except in part.

[0096] The image sensor 100 may have a pixel 10a as shown in Figure 6 instead of the pixel 10 described above. The pixel 10a differs from the pixel 10 in that it has a photoelectric conversion unit 20a instead of the photoelectric conversion unit 20 and does not have a shield electrode 17. The photoelectric conversion unit 20a has a pixel electrode 11, a counter electrode 13, and a photoelectric conversion layer 12, and does not have an electron blocking layer 15 and a hole blocking layer 16. Therefore, the lower surface of the photoelectric conversion layer 12 is in contact with the pixel electrode 11, and the upper surface of the photoelectric conversion layer 12 is in contact with the counter electrode 13.

[0097] Furthermore, the photoelectric conversion layer 12 may be formed of a compound semiconductor such as InGaAs, as described above. Figure 7 is a schematic cross-sectional view showing an exemplary device structure of yet another pixel 10b according to the embodiment. In Figure 7, as with Figure 4, various transistors such as the signal detection circuit 22 and reset transistor 28 provided in the CMOS circuit layer 60, wiring such as signal lines, control lines and power lines, and the charge storage unit 41 are omitted except in part.

[0098] The image sensor 100 may have a pixel 10b as shown in Figure 7 instead of the pixel 10 described above. Pixel 10b differs from pixel 10a in that it has a photoelectric conversion unit 20b having a photoelectric conversion layer 12 made of a compound semiconductor instead of a photoelectric conversion unit 20a. Furthermore, pixel 10b further includes an insulating layer 63 and a plug 31a between the photoelectric conversion unit 20b and the CMOS circuit layer 60.

[0099] The photoelectric conversion unit 20b includes a pixel electrode 11, a counter electrode 13, a photoelectric conversion layer 12, a carrier transfer layer 18 disposed on the pixel electrode 11 and between the pixel electrode 11 and the photoelectric conversion layer 12, a carrier transfer layer 19 disposed between the counter electrode 13 and the photoelectric conversion layer 12, and an impurity diffusion region 14 in contact with the pixel electrode 11, the photoelectric conversion layer 12, and the carrier transfer layer 18.

[0100] In the photoelectric conversion unit 20b, the photoelectric conversion layer 12 is composed of a compound semiconductor such as n-type InGaAs.

[0101] The impurity diffusion region 14 is a p-type impurity diffusion region doped with p-type impurities such as Zn, and is responsible for collecting signal charges. The signal charges generated in the photoelectric conversion layer 12 by photoelectric conversion are collected in the impurity diffusion region 14 by diffusion due to the bias voltage and the difference in signal charge concentration between the counter electrode 13 and the pixel electrode 11. The signal charges collected in the impurity diffusion region 14 are stored in the charge storage unit 41 via the pixel electrode 11.

[0102] The carrier transfer layer 18 transports holes, which are signal charges generated in the photoelectric conversion layer 12, to the pixel electrode 11, while suppressing the injection of electrons from the pixel electrode 11 into the photoelectric conversion layer 12. The carrier transfer layer 19 transports electrons, which are the opposite charge to the signal charges generated in the photoelectric conversion layer 12, to the counter electrode 13, while suppressing the injection of holes from the counter electrode 13 into the photoelectric conversion layer 12. The carrier transfer layer 18 and the carrier transfer layer 19 are each composed of, for example, n-type InP.

[0103] Furthermore, the photoelectric conversion layer 12, which is composed of n-type InGaAs, is formed, for example, by growing it on another InP substrate. The carrier transfer layer 18 and carrier transfer layer 19 also function as buffer layers to grow the n-type InGaAs layer with low defects while aligning the lattice constants during the formation of the photoelectric conversion layer 12.

[0104] The plug 31a is provided in the insulating layer 63 and connects the pixel electrode 11 to the plug 31. The interface between plug 31a and plug 31 forms, for example, a metal-metal bond. If plug 31a and plug 31 are made of copper (Cu), the interface between plug 31a and plug 31 forms a Cu-Cu bond.

[0105] [Operation] Next, the operation of the camera system 300 will be described. Below, the operation of the camera system 300 will mainly be described as the control method of the image sensor 100 performed by the system controller 330.

[0106] Figure 8 is a flowchart showing an example of the operation of the camera system 300 according to the embodiment.

[0107] As shown in Figure 8, when the camera system 300 is started, the system controller 330 controls the image sensor 100, for example, in normal imaging mode (step S10). Normal imaging mode is a mode for acquiring images using the camera system 300. Therefore, the system controller 330 causes the image sensor 100 to apply a first voltage, which is a bias voltage that causes a current to flow between the pixel electrode 11 and the counter electrode 13 that is not 0V, but corresponds to the amount of light incident on the photoelectric conversion layer 12. In other words, the first voltage is a bias voltage that creates a difference between the photocurrent and dark current flowing between the pixel electrode 11 and the counter electrode 13. Specifically, the system controller 330 causes the image sensor 100 to supply a voltage V1 to the counter electrode 13. The potential of the pixel electrode 11 is equal to the potential Vfd of the charge storage unit 41. Therefore, the first voltage is the difference between voltage V1 and potential Vfd, and at most the difference between voltage V1 and reset voltage Vr. In this specification, when comparing the magnitude of voltages applied between two electrodes, such as the first voltage and the second, third, and fourth voltages described later, we use the terms "larger" and "smaller" when comparing absolute values, regardless of whether they are positive or negative. For example, when comparing negative voltages with one electrode as the reference, a larger negative voltage is expressed as a larger voltage.

[0108] Furthermore, the system controller 330 causes the image sensor 100 to apply a first voltage between the pixel electrode 11 and the counter electrode 13 for at least the exposure period in the normal imaging mode. Also, in the normal imaging mode, the peripheral circuits of the image sensor 100 operate normally, and the image sensor 100 reads out a signal corresponding to the signal charge accumulated in the charge storage unit 41 during the exposure period and outputs an image.

[0109] Next, the system controller 330 determines whether or not it has received the first input signal (step S20). The first input signal is a signal that triggers switching from the normal imaging mode to the low power consumption mode. The first input signal is, for example, a signal indicating that the operation reception unit 340 has received an operation from the user to switch to any low power consumption mode. The user, for example, performs an operation to switch to the low power consumption mode on the operation reception unit 340 when not using the camera system 300. The system controller 330 may also receive a signal as the first input signal indicating that the camera system 300 is not being used. A signal indicating that the camera system 300 is not being used is, for example, a signal indicating that no operation has been performed on the operation reception unit 340 for a certain period of time, a signal indicating that there has been no change in the brightness value of the image output from the image sensor 100 for a predetermined period of time, or a signal indicating that the brightness value of the image output from the image sensor 100 is below a predetermined value.

[0110] If the system controller 330 does not accept the first input signal (No in step S20), , connoisseur The control of the image sensor 100 in normal imaging mode (step S10) continues.

[0111] On the other hand, when the system controller 330 receives the first input signal (Yes in step S20), it switches from the normal imaging mode to the low power consumption mode and controls the image sensor 100 (step S30). The system controller 330 outputs a power-saving signal PSV to the image sensor 100 to control it in the low power consumption mode. Specifically, the system controller 330 applies a second voltage greater than 0V and less than the first voltage between the pixel electrode 11 and the counter electrode 13 of the image sensor 100. In addition to outputting the power-saving signal PSV to control it in the low power consumption mode, the system controller 330 may also control the lens optical system 310, etc., to reduce or eliminate the amount of light incident on the image sensor 100. This further reduces the photocurrent flowing through the photoelectric conversion layer 12. Details of the control in the low power consumption mode will be described later.

[0112] Next, the system controller 330 determines whether or not it has received a second input signal (step S40). The second input signal is a signal that triggers switching from low power consumption mode to normal imaging mode. The second input signal is, for example, a signal indicating that the operation reception unit 340 has received an operation from the user to switch to any normal imaging mode. For example, when a user resumes using the camera system 300 while in low power consumption mode, they perform an operation to switch to normal imaging mode on the operation reception unit 340. The system controller 330 may also receive a signal as a second input signal indicating that the use of the camera system 300 has resumed while in low power consumption mode. The signal indicating that the use of the camera system 300 has resumed is, for example, a signal indicating that some operation has been performed on the operation reception unit 340, a signal indicating that the brightness value of the image output from the image sensor 100 has changed, or a signal indicating that the brightness value of the image output from the image sensor 100 is above a predetermined value.

[0113] The system controller 330 does not accept the second input signal (No in step S40). , low The control of the image sensor 100 in power consumption mode (step S30) continues.

[0114] On the other hand, when the system controller 330 receives the second input signal (Yes in step S40), it switches back from the low power consumption mode to the normal imaging mode and controls the image sensor 100 (step S10).

[0115] The camera system 300 performs the above operations, for example, until it is completely stopped.

[0116] Next, the operation of the image sensor 100 in the low-power mode in step S30, specifically the operation performed by the image sensor 100 based on the control of the system controller 330, will be described in detail. In other words, the following operations performed by the image sensor 100 are operations that the system controller 330 causes the image sensor 100 to perform. Figure 9 is a flowchart showing an example of the operation of the image sensor 100 in the low-power mode. Figure 10 is a timing chart showing a first example of the operation timing of the camera system 300. Figure 10 shows, from top to bottom, the vertical sync signal VD, the power save signal PSV, and the voltage level of the counter electrode 13. Furthermore, in the following explanation using Figure 10, the image sensor 100 equipped with the aforementioned pixels 10 will be used as an example, but similar operations can be performed even if the image sensor 100 is equipped with pixels 10a or pixels 10b.

[0117] As shown in Figure 9, first, the image sensor 100 changes the voltage applied to the photoelectric conversion layer 12 based on the control of the system controller 330 (step S31). Specifically, the image sensor 100 applies a second voltage between the counter electrode 13 and the pixel electrode 11 that is greater than 0V and less than the first voltage applied in normal imaging mode. For example, as shown in Figure 10, at time t1, when the system controller 330 receives the first input signal, it changes the power save signal PSV from a high level to a low level to control in low power consumption mode, thereby activating the low power consumption mode of the image sensor 100. Then, at time t2, after a predetermined transition time from time t1, the image sensor 100 changes the voltage supplied to the counter electrode 13 from voltage V1 to voltage V2. Therefore, the second voltage applied between the counter electrode 13 and the pixel electrode 11 is the difference between voltage V2 and potential Vfd. In this embodiment, since the signal charge is a hole, voltage V2 is lower than voltage V1. Furthermore, voltage V2 is, for example, a voltage higher than 0V. That is, V1 > V2 > 0V. In this way, in low power consumption mode, the voltage applied between the counter electrode 13 and the pixel electrode 11 is changed from a first voltage to a second voltage that is smaller than the first voltage. For example, the voltage applied between the counter electrode 13 and the pixel electrode 11 is changed from the voltage shown in Figure 1(a) to a voltage within the range shown in Figure 1(b) to (e). As a result, it is possible to suppress the flow of unnecessary current to the photoelectric conversion layer 12 when the camera system 300 is not in use, thereby improving the reliability of the image sensor 100 and reducing power consumption. Note that time t1 and time t2 may be the same time.

[0118] Furthermore, in low power consumption mode, the system controller 330 applies a second voltage between the counter electrode 13 and the pixel electrode 11 to the image sensor 100 for a period of one frame or longer, that is, for a time equivalent to one frame or longer. This reduces the current flowing through the photoelectric conversion layer 12 for a period of one frame or longer. One frame period is the period during which multiple pixels 10 are exposed, and the signal charge of the charge storage unit 41 of all pixels 10 is read out and reset sequentially for each pixel row, for example, to generate a signal corresponding to one image. For example, in Figure 10, one frame period is the period TVD between the rising (or falling) edges of two consecutive vertical synchronization signals VD in the vertical synchronization signal VD of the image sensor 100.

[0119] Here, we will explain the second voltage applied in low-power mode.

[0120] Figure 11 shows an example of the current-voltage characteristics of the photoelectric conversion unit 20 to explain the second voltage. The horizontal axis in Figure 11 shows the bias voltage applied between the counter electrode 13 and the pixel electrode 11. The vertical axis in Figure 11 shows the absolute value of the current flowing between the counter electrode 13 and the pixel electrode 11, that is, the current flowing in the photoelectric conversion layer 12. Figure 11 is a semi-logarithmic graph with the vertical axis being logarithmic. In Figure 11, the solid line labeled "dark" shows the current-voltage characteristics in the dark, when the image sensor 100 is not illuminated with light. The dashed line labeled "light" in Figure 11 shows the current-voltage characteristics in the bright, when the image sensor 100 is illuminated with light of a predetermined intensity. The notations "dark" and "light" are the same in Figures 12 and 13, which will be described later.

[0121] The voltage V1a shown in Figure 11 is an example of the first voltage. The voltages V2a to V2d shown in Figure 11 are examples of the second voltage. Furthermore, voltages V1a and V2a to V2d are, for example, reverse bias voltages when the photoelectric conversion layer 12 is considered as a photodiode. In this embodiment, the reverse bias voltage is the voltage at which the potential of the counter electrode 13 becomes higher than the potential of the pixel electrode 11. On the other hand, the forward bias voltage is the voltage at which the potential of the counter electrode 13 becomes lower than the potential of the pixel electrode 11.

[0122] The second voltage is, for example, a voltage lower than voltage V1a. This reduces power consumption by at least the amount corresponding to the decrease in bias voltage. In other words, if power is P, voltage is V, and current is I, then P = VI, so power P decreases in proportion to the decrease in voltage V. Also, the current flowing through the photoelectric conversion layer 12 decreases in accordance with the decrease in bias voltage.

[0123] Furthermore, the second voltage may be voltage V2a. Voltage V2a is the voltage through which the photocurrent I2a flows. The photocurrent I2a is smaller than the photocurrent I1 that flows when voltage V1a is applied to the photoelectric conversion unit 20. With voltage V2a, the amount of photocurrent flowing through the photoelectric conversion layer 12 can be reduced, so the current I in P=VI also contributes to the reduction of power P. In addition, since the amount of current flowing through the photoelectric conversion layer 12 is reduced, the degradation of the photoelectric conversion layer 12 can also be suppressed.

[0124] Furthermore, the second voltage may be voltage V2b. Voltage V2b is a voltage at which the amount of photocurrent I2b flowing is 90% or less of the amount of photocurrent I1. This makes it possible to reduce power consumption by more than 10% compared to the normal imaging mode, and further suppress the degradation of the photoelectric conversion layer 12. Voltage V2b may also be a voltage at which the amount of photocurrent I2b is 10% or less of the amount of photocurrent I1.

[0125] Furthermore, the second voltage may be voltage V2c, which is a voltage at which the amount of current Id2 flowing is 90% or less of the amount of dark current Id1 that flows when voltage V1a is applied to the photoelectric conversion unit 20. As a result, even when the camera system 300 is placed in a dark place, power consumption can be reduced by more than 10% compared to the normal imaging mode, and the degradation of the photoelectric conversion layer 12 can be further suppressed. When the photoelectric conversion layer 12 is sensitive to infrared light, the dark current tends to be large, so it is particularly effective for the second voltage to be voltage V2c or less. Voltage V2c may also be a voltage at which the amount of dark current Id2 is 10% or less of the amount of dark current Id1.

[0126] Furthermore, the second voltage may be voltage V2d. Voltage V2d is the voltage at which the amount of photocurrent and the amount of dark current become equal when the reverse bias voltage is reduced. This reduces the amount of current flowing through the photoelectric conversion layer 12. In addition, the amount of current flowing through the photoelectric conversion layer 12 does not change depending on whether or not light is incident on the image sensor 100, and the effect of reducing the amount of current can be kept constant regardless of the environment in which the camera system 300 is placed.

[0127] Furthermore, the second voltage may be a voltage in the first voltage range lower than voltage V2d. Figure 12 is a diagram showing an example of the current-voltage characteristics of the photoelectric conversion unit 20 to illustrate the first voltage range. Figure 12 shows the current-voltage characteristics of the photoelectric conversion unit 20 near the first voltage range. The horizontal axis in Figure 12 shows the bias voltage applied between the counter electrode 13 and the pixel electrode 11. The vertical axis in Figure 12 shows the current value flowing between the counter electrode 13 and the pixel electrode 11. Note that in Figure 12, the current value on the vertical axis is not an absolute value. Also, in Figure 12, the vertical axis is a normal numerical axis, not a logarithmic axis.

[0128] The photocurrent characteristics of the photoelectric conversion unit 20 in the example shown in Figure 12 are generally characterized by a first voltage range, a second voltage range, and a third voltage range. That is, the photoelectric conversion unit 20 has photocurrent characteristics that include a first voltage range, a second voltage range, and a third voltage range. The second voltage range is a reverse bias voltage range, in which the absolute value of the output current density increases with increasing reverse bias voltage. The third voltage range is a forward bias voltage range, in which the output current density increases with increasing forward bias voltage. The first voltage range is a voltage range between the second and third voltage ranges. The first voltage range is a voltage range in which, when a voltage is applied between the counter electrode 13 and the pixel electrode 11, the current density flowing between the counter electrode 13 and the pixel electrode 11 is equivalent with and without light incidence to the photoelectric conversion layer 12. The current density being equivalent with and without light incidence to the photoelectric conversion layer 12 means that it is substantially equivalent. For example, in the first voltage range, the ratio of the absolute value of the current density with light incidence to the absolute value of the current density without light incidence is greater than 1:10 and less than 10:1. Furthermore, the state with light incidence refers to, for example, 100 mW / cm². 2 This may also be light irradiation. Furthermore, a state with incident light, considering the standard illuminance indoors, would be, for example, 50 μW / cm². 2 The above light irradiation is also acceptable.

[0129] By having the second voltage be within this first voltage range, the amount of current flowing through the photoelectric conversion layer 12 can be reduced. Furthermore, the amount of current flowing through the photoelectric conversion layer 12 does not change depending on whether or not light is incident on the image sensor 100, and the effect of reducing the amount of current can be kept constant regardless of the environment in which the image sensor 100 is placed. In addition, a margin can be provided in the operating range of the second voltage.

[0130] Such a photoelectric conversion unit 20 having photocurrent characteristics with a first voltage range can be realized, for example, by selecting the photoelectric conversion material used in the photoelectric conversion layer 12. The photoelectric conversion material used in the photoelectric conversion layer 12 is not particularly limited as long as it can realize the above-mentioned photocurrent characteristics, but for example, it is a mixture of a donor organic semiconductor material and an acceptor organic semiconductor material.

[0131] Furthermore, if the photoelectric conversion layer 12 is configured to be less susceptible to degradation even when forward current flows, the second voltage may be a voltage within the third voltage range of the forward bias voltage, as long as it is smaller than the first voltage.

[0132] Furthermore, the photoelectric conversion unit 20 may have current-voltage characteristics different from those shown in Figures 11 and 12. Figure 13 is a diagram showing another example of the current-voltage characteristics of the photoelectric conversion unit 20 for explaining the second voltage. Figure 13 shows current-voltage characteristics that can be realized, for example, when semiconductor quantum dots are used as the photoelectric conversion material. Similar to Figure 11, the horizontal axis shown in Figure 13 shows the bias voltage applied between the counter electrode 13 and the pixel electrode 11. The vertical axis shown in Figure 13 shows the absolute value of the current flowing between the counter electrode 13 and the pixel electrode 11. Also, Figure 13 is a semi-logarithmic graph with the vertical axis in logarithmic notation.

[0133] The voltage V1b shown in Figure 13 is an example of the first voltage. The voltages V2f through V2h shown in Figure 13 are examples of the second voltages.

[0134] The second voltage is, for example, a voltage lower than voltage V1b and higher than voltage V2i. This reduces the power consumption corresponding to the decrease in bias voltage, and also reduces at least one of the photocurrent and dark current.

[0135] Furthermore, the second voltage may be voltage V2f. Voltage V2f is the voltage at which the amount of dark current Id4 flows is 90% or less of the amount of dark current Id3 that flows when voltage V1b is applied to the photoelectric conversion unit 20. Voltage V2f may also be the voltage at which the amount of dark current Id4 flows is 10% or less of the amount of dark current Id3.

[0136] Furthermore, the second voltage may be voltage V2g. Voltage V2g is the voltage at which the dark current flowing through the photoelectric conversion layer 12 is minimized. This minimizes the dark current flowing through the layer.

[0137] Furthermore, the second voltage may be a voltage V2h. Voltage V2h is the voltage at which the photocurrent flowing through the photoelectric conversion layer 12 is minimized. This minimizes the flowing photocurrent.

[0138] Furthermore, the second voltage is not limited to the examples explained using Figures 11 to 13, but can be set within a range greater than 0V and less than the first voltage, depending on the characteristics of the photoelectric conversion unit 20, etc.

[0139] The voltages V1 and V2 applied to the counter electrode 13 are set, for example, to be the first and second voltages when the potential Vfd of the charge storage unit 41 is the reset voltage Vr.

[0140] Referring again to Figure 9, the image sensor 100 then stops the operation of some of the peripheral circuits based on the control of the system controller 330 (step S32). Specifically, the image sensor 100 stops some of the operations of the peripheral circuits that occur in the normal imaging mode while a second voltage is applied between the counter electrode 13 and the pixel electrode 11. In other words, the operation sequence of the peripheral circuits is changed from that of the normal imaging mode. Therefore, the image sensor 100 applies a second voltage between the counter electrode 13 and the pixel electrode 11 while some of the operations of the peripheral circuits are stopped.

[0141] For example, the image sensor 100 stops the operation of at least part of one or more components included in the peripheral circuitry, based on the control of the system controller 330. Methods for stopping the operation include stopping the voltage supply to the component to be stopped, or reducing the supplied voltage, stopping the supply of the operating clock to the component to be stopped, and sending a control signal to the component to be stopped to stop its operation. Alternatively, a process may be performed to fix the output value of the component to be stopped.

[0142] Specifically, the circuits that stop at least part of the operation include, for example, one or more of the following: the voltage supply circuit 32, the voltage supply circuit 35, the reset voltage source 34, the vertical scanning circuit 36, the column signal processing circuit 37, the horizontal signal readout circuit 38, and the pixel drive signal generation circuit 39. If the image sensor 100 is provided with a feedback circuit for reducing reset noise, the image sensor 100 may stop the circuit that operates the feedback circuit. Alternatively, each of these circuits may be stopped entirely, or only a part of each circuit may be stopped.

[0143] Regarding the cessation of operation of some peripheral circuits, specific examples of circuits and operations to be stopped are listed below. Note that the circuits and operations to be stopped are not limited to the examples below.

[0144] • Power supply to pixel 10 and / or peripheral circuits is turned off. Alternatively, a lower voltage than that used during operation is supplied to pixel 10 and / or peripheral circuits. • Address transistor 26 is kept in a permanently off state. The selection signal pulse and / or reset signal pulse from the vertical scanning circuit 36 ​​are stopped. The power to the vertical scanning circuit 36 ​​is turned off. The power to the column signal processing circuit 37 is turned off. Alternatively, the power to the column load cell and / or column comparator circuit within the column signal processing circuit 37 is turned off. The power supply to the DAC circuit in the column signal processing circuit 37 is turned off. • The noise cancellation operation that reduces reset noise is disabled. • The correlated double sampling operation in the column signal processing circuit 37 is stopped. The input voltage of the amplifier in the column signal processing circuit 37 is fixed to the power supply voltage or ground level. - The connection from pixel 10 to the column signal processing circuit 37 is turned off. Specifically, a switch located on the vertical signal line 47 between pixel 10 and the column signal processing circuit 37 is turned off. Alternatively, the output of pixel 10 or the load cell circuit is fixed to a constant value. Alternatively, the input value of the column comparator is fixed to a constant value. Alternatively, the output value of the column comparator is fixed to a constant value. - The output of the DAC circuit, which serves as the reference voltage for the AD conversion circuit in the column signal processing circuit 37, is fixed to a constant value (e.g., power supply voltage or ground level), or it is set to a floating impedance state. The same value is written to the latch memory that holds the AD conversion result in the column signal processing circuit 37, or all latch memories output the same constant value. The supply of pixel drive signals by the pixel drive signal generation circuit 39 is stopped. The PLL circuit in the pixel drive signal generation circuit 39 stops operating. The operation of the bandgap reference circuit that generates the reference voltage is stopped. Specifically, the bandgap preference circuit stops supplying voltage and / or current to each circuit of the image sensor 100. The horizontal signal readout circuit 38 stops operating. Alternatively, the horizontal signal readout circuit 38 outputs a constant value. • If the image sensor 100 includes a control circuit, the register signal values ​​transmitted from the control circuit or system controller 330 to each circuit are fixed to a constant value. The timing generator circuit in the pixel drive signal generation circuit 39 is stopped. The control pulse from the timing generator circuit in the pixel drive signal generation circuit 39 is stopped. Switches located in the power supply path from the power supply input / output pad to each circuit of the image sensor 100 are turned off, and the power supply is stopped.

[0145] Furthermore, the image sensor 100 stops the signal charge readout operation as part of the operation of the peripheral circuitry. Also, the image sensor 100 does not have to output an image by stopping the operation of some of the peripheral circuitry. In this case, for example, the image sensor 100 stops at least one of the column signal processing circuit 37 and the horizontal signal readout circuit 38 that are downstream of the vertical signal line 47. As a result, there is no image output from the image sensor 100, and the power consumption of the image sensor 100 can be further reduced.

[0146] Thus, in this embodiment, in low-power mode, the image sensor 100 stops some of the operation of the peripheral circuits while the second voltage is applied between the counter electrode 13 and the pixel electrode 11. In low-power mode, the image sensor 100 does not perform operations such as readout and does not output an image. On the other hand, the image sensor disclosed in Patent Document 1 outputs an image by sequentially operating the peripheral circuits while a voltage in the first voltage range is applied to the photoelectric conversion layer.

[0147] Note that step S32 may be performed before step S31, provided it is performed after time t1.

[0148] Furthermore, the image sensor 100 may output an image signal in low power consumption mode.

[0149] [Other examples of operation] Next, other examples of operation of the camera system 300 according to this embodiment will be described. In the examples described below, the operation in step S31 described above differs from the first example described using Figure 10 above.

[0150] (1) Second example of camera system operation timing If the image sensor 100 includes a shield electrode 17, such as an image sensor 100 with pixels 10, the voltage applied between the counter electrode 13 and the shield electrode 17 may be further changed in low-power mode. Figure 14 is a timing chart showing a second example of the operating timing of the camera system 300. Figure 14 shows, from top to bottom, the power-saving signal PSV, the voltage levels of the counter electrode 13 and the shield electrode 17.

[0151] As shown in Figure 14, at time t1, when the system controller 330 receives the first input signal, it changes the power save signal PSV from a high level to a low level to control the image sensor 100 in low power consumption mode, thereby activating the low power consumption mode of the image sensor 100. Then, at time t2, after a predetermined transition time from time t1, the image sensor 100 changes the voltage supplied to the counter electrode 13 from voltage V1 to voltage V2. Up to this point, it is the same as in the first example described above.

[0152] In the second example shown in Figure 14, in step S31, the image sensor 100 also changes the voltage applied between the counter electrode 13 and the shield electrode 17 as the voltage applied to the photoelectric conversion layer 12. Specifically, at time t2, the image sensor 100 changes the voltage supplied to the shield electrode 17 from voltage V3 to voltage V4.

[0153] Voltage V3 is the voltage supplied to the shield electrode 17 in normal imaging mode. Therefore, in normal imaging mode, the third voltage applied between the counter electrode 13 and the shield electrode 17 is the difference between voltage V1 and voltage V3. Voltage V3 is set to a value corresponding to the reset voltage Vr in order to suppress the movement of signal charge between pixels 10, as described above.

[0154] Furthermore, in low-power mode, the fourth voltage applied between the counter electrode 13 and the shield electrode 17 is the difference between voltage V2 and voltage V4. Voltage V4 is set according to voltage V2 such that the fourth voltage is smaller than the third voltage. Thus, in low-power mode, the image sensor 100 may apply a fourth voltage smaller than the third voltage between the counter electrode 13 and the shield electrode 17 based on the control of the system controller 330. This reduces the current flowing through the photoelectric conversion layer 12 between the counter electrode 13 and the shield electrode 17, improving the reliability of the image sensor 100 and reducing power consumption.

[0155] Furthermore, voltage V4 may be equal to voltage V2. In other words, in low power consumption mode, the image sensor 100 supplies equal voltage to the counter electrode 13 and the shield electrode 17. As a result, in low power consumption mode, the potential difference between the counter electrode 13 and the shield electrode 17 is eliminated, and the current flowing between the counter electrode 13 and the shield electrode 17 can be minimized.

[0156] In the example shown in Figure 14, at time t2, the image sensor 100 changes the voltage supplied to the shield electrode 17 from voltage V3 to voltage V4, but this is not limited to this. If the fourth voltage becomes lower than the third voltage due to the relationship between voltage V3 and voltage V1 and the relationship between voltage V3 and voltage V2, the image sensor 100 may continue to supply voltage V3 to the shield electrode 17 even after time t2. Also, the timing at which the image sensor 100 applies the fourth voltage between the counter electrode 13 and the shield electrode 17 does not have to be at time t2; it may be before or after time t2, as long as it is after time t1.

[0157] (2) Third example of camera system operation timing Next, an example of operation when a reset operation is performed in low power consumption mode will be described. When the reset operation is performed, if the photoelectric conversion layer 12 is considered as a photodiode, the application of a forward bias voltage to the photoelectric conversion layer 12 and the flow of forward current are suppressed. Since the photoelectric conversion layer 12 is particularly susceptible to degradation when forward current flows through it, this operation is particularly effective in improving the reliability of the image sensor 100.

[0158] Figure 15 is a timing chart showing a third example of the operating timing of the camera system 300. From top to bottom, Figure 15 shows the voltage levels of the power save signal PSV, the counter electrode 13, and the reset control line en_rst for each row. In the following explanation using Figure 15, the image sensor 100 having the aforementioned pixels 10 will be used as an example, but similar operation can be performed even if the image sensor 100 has pixels 10a or pixels 10b.

[0159] As shown in Figure 15, at time t1, when the system controller 330 receives the first input signal, it changes the power save signal PSV from a high level to a low level to control the image sensor 100 in low power consumption mode, thereby activating the low power consumption mode of the image sensor 100. Then, at time t2, after a predetermined transition time from time t1, the image sensor 100 changes the voltage supplied to the counter electrode 13 from voltage V1 to voltage V2. Up to this point, it is the same as in the first example described above.

[0160] Next, at time t3, which is after time t2, the image sensor 100 controls the i-th reset control line en_rst By changing the voltage from a low level to a high level, the reset transistor 28 of the i-th row pixel 10 is turned on, supplying a reset voltage Vr to the charge storage unit 41 of the i-th row pixel 10. This resets the potential of the charge storage unit 41 of the i-th row pixel 10 to the reset voltage Vr. When holes are used as the signal charge, the reset voltage Vr is lower than voltages V1 and V2. Also, in Figure 15, the i-th row is, for example, the first row. After supplying the reset voltage Vr to the charge storage unit 41 of the i-th row pixel 10, the image sensor 100 uses the reset control line en_rst The voltage is returned from a high level to a low level, and the reset transistor 28 of the i-th row pixel 10 is turned off again. Also, after time t3, the image sensor 100 continues to supply voltage V2 to the counter electrode 13. As a result, a second voltage equal to the difference between voltage V2 and the reset voltage Vr is applied between the counter electrode 13 and the pixel electrode 11.

[0161] After resetting the potential of the charge storage unit 41 of the i-th row pixel 10, the image sensor 100 then, up to time t4, resets the i+1 row's reset control line en_rst<i+1> The reset control line en_rst on line n <n>The voltages up to this point are sequentially raised to a high level. As a result, the potential of the charge storage unit 41 of the pixels 10 from row i+1 to row n is reset to the reset voltage Vr for each pixel row. Consequently, the potential of the charge storage unit 41 of all pixels 10 of the image sensor 100 is reset to the reset voltage Vr.

[0162] In the example shown in Figure 15, a reset operation is performed for each pixel row. However, the image sensor 100 may also reset the potential of the charge storage units 41 of all pixels 10 to the reset voltage Vr at once by setting the reset control line en_rst for all rows to a high level at time t3, which is after time t2.

[0163] Here, the effect of a reset operation in low power consumption mode will be explained using Figures 16 to 19. Figures 16 to 19 are schematic diagrams illustrating the potentials of the counter electrode 13 and the charge storage unit 41 at each time point when a reset operation is performed in low power consumption mode. In the explanation of Figures 16 to 19, an example is given where voltage V1 = 5.0V, voltage V2 = 2.0V, and reset voltage Vr = 0.5V. Note that these voltage values ​​are just examples, and if the signal charge is a hole, the voltage values ​​are not particularly limited as long as the relationship V1 > V2 > Vr is satisfied. Also, in Figures 16 to 19, the photoelectric conversion layer 12 and the charge storage unit 41 are schematically shown as diodes.

[0164] First, as shown in Figure 16, before time t1, the system is controlled in normal imaging mode, so a voltage V1 is supplied to the counter electrode 13. Therefore, the potential Vito of the counter electrode 13 is Vito = V1 = 5.0V. At this time, a current corresponding to the amount of light incident on the photoelectric conversion layer 12 flows from the counter electrode 13 to the charge storage unit 41, accumulating signal charge. Therefore, the potential Vfd of the charge storage unit 41 is variable and undefined depending on the time and the amount of light incident on the photoelectric conversion layer 12. Furthermore, the potential Vfd of the charge storage unit 41 differs for each pixel 10. Specifically, the potential Vfd of the charge storage unit 41 for each pixel 10 is the potential between the reset voltage Vr when the charge storage unit 41 is reset and the voltage V1, that is, the potential in the range of 0.5V to 5.0V. Therefore, both the diode corresponding to the photoelectric conversion layer 12 and the diode corresponding to the charge storage unit 41 are in a reverse-biased state with a reverse bias voltage applied. Furthermore, if a clipping circuit for an overflow mechanism is connected to the charge storage unit 41, the potential Vfd of the charge storage unit 41 will be a potential between the reset voltage Vr and the clipping voltage. For example, if the clipping voltage is 3.0V, the potential Vfd of the charge storage unit 41 will be a potential in the range of 0.5V to 3.0V.

[0165] Next, as shown in Figure 17, at time t2, a voltage V2 is supplied to the counter electrode 13. As a result, the potential Vito of the counter electrode 13 becomes Vito = V2 = 2.0V. At this time, the potential Vfd of the charge storage unit 41 does not change from before time t1 and is in the range of 0.5V to 5.0V. Therefore, the diode corresponding to the charge storage unit 41 is in a reverse-biased state. On the other hand, if the signal charge stored in the charge storage unit 41 is small and the potential Vfd is lower than 2.0V, the state in which a reverse-bias voltage is applied to the photoelectric conversion layer 12 is maintained. However, since the potential Vfd can take up to 5.0V, a forward-bias voltage may be applied to the photoelectric conversion layer 12. Therefore, if such a forward-biased state in which a forward-bias voltage is applied is maintained, a forward current will continue to flow through the photoelectric conversion layer 12, as shown by the arrow in Figure 17, and depending on the configuration of the photoelectric conversion layer 12, the degradation of the photoelectric conversion layer 12 may be accelerated.

[0166] Next, as shown in Figure 18, at time t3, a reset voltage Vr is supplied to the charge storage unit 41. As a result, the potential Vfd of the charge storage unit 41 becomes Vfd = Vr = 0.5V. Consequently, the potential Vfd becomes lower than the potential Vito of 2.0V, allowing a reverse bias voltage to be applied to the photoelectric conversion layer 12. The diode corresponding to the charge storage unit 41 is in a reverse bias state. Therefore, by performing this operation, even when a forward bias voltage is applied to the photoelectric conversion layer 12, the state of a forward bias voltage being applied to the photoelectric conversion layer 12 can be avoided for a short time.

[0167] As a result of the above operation, the potential Vfd of the charge storage unit 41 fluctuates for each pixel 10, or due to the timing of when control in low power consumption mode is initiated. This makes it possible to suppress the state in which a forward current flows through the photoelectric conversion layer 12 to be temporary.

[0168] Furthermore, when supplying a reset voltage Vr to the charge storage unit 41 after applying a voltage V2 to the counter electrode 13, the following two problems can also be solved simultaneously by ensuring that the voltage V2 is between the voltage V1 and the reset voltage Vr, specifically, by satisfying the relationship V1>V2>Vr in this embodiment.

[0169] The first issue is the variation in the potential Vfd of the charge storage unit 41 from pixel to pixel 10 after it has been reset with the reset voltage Vr. Specifically, although the reset voltage Vr is supplied to the charge storage unit 41 via the reset transistor 28, the kT / C noise generated by the on / off operation of the reset transistor 28, known as reset noise, causes the potential Vfd of the charge storage unit 41 to be not exactly the same as the reset voltage Vr, resulting in variation from pixel to pixel 10.

[0170] The second issue is that, due to the difference between voltage V2 and reset voltage Vr, a potential difference is generated between the counter electrode 13 and the charge storage unit 41, causing some current to flow in the photoelectric conversion layer 12. On the other hand, even if we try to bring the potential difference between the two as close to zero as possible, due to the variation in the potential Vfd of the charge storage unit 41 from pixel to pixel 10, which is the first issue, it is difficult to make the potential difference between the counter electrode 13 and the charge storage unit 41 zero for all pixels 10 immediately after reset. For example, it might seem that setting voltage V2 to the same as the reset voltage Vr would allow for the lowest possible bias voltage, but in reality, due to the effect of reset noise, the potential Vfd of the charge storage unit 41 fluctuates, and some pixels 10 remain in a forward bias state even after the reset operation. For example, even if the reset voltage Vr is set to 2.0V, the same as voltage V2, the potential Vfd of the charge storage unit 41 may become 2.1V due to the effect of reset noise, resulting in a forward bias state.

[0171] These issues are resolved by phenomena that occur after time t3. As shown in Figure 19, after time t3, the low-power mode continues, and because the potential Vito of the counter electrode 13 is higher than the potential Vfd of the charge storage unit 41, a small amount of photocurrent and dark current continues to flow through the photoelectric conversion layer 12, compared to the normal imaging mode. This small current causes the potential Vfd to rise, asymptotically approaching potential Vito = 2.0V, and the bias voltage applied to the photoelectric conversion layer 12 approaches zero. In other words, the small current due to its own potential difference decreases the bias voltage between the counter electrode 13 and the pixel electrode 11, causing the sensitivity of the photoelectric conversion unit 20 to decrease.

[0172] By performing the reset operation while satisfying the relationship V1>V2>Vr, even if the potential Vfd of the charge storage unit 41 after the reset operation varies due to reset noise, the potential Vfd of the charge storage unit 41 of all pixels 10 can be brought closer to the potential Vito of the counter electrode 13, thereby reducing the current flowing to the photoelectric conversion layer 12. Therefore, the reset operation of each pixel 10 in low power consumption mode does not require the use of various reset methods that reduce conventional reset noise (e.g., active reset, feedback reset, flash reset, CDS operation), and may instead use a simple and quick method such as a strong inversion reset only. Because a simple method can be used, power consumption caused by the reset operation and the reset operation time can be shortened. As a result, the time for which forward current flows through the photoelectric conversion layer 12 can be shortened, which further suppresses the degradation of the photoelectric conversion layer 12 and enables further reduction of power consumption.

[0173] Furthermore, since the above effects can be obtained without completely reducing the potential difference between the counter electrode 13 and the charge storage unit 41 to zero immediately after the reset operation, it is possible to secure a margin for various voltage variations, such as variations in the set voltage in the actual circuit.

[0174] Voltage V2 is the voltage between voltage V1 and reset voltage Vr. Also, because the second voltage is less than the first voltage and greater than 0V, voltage V2 is different from voltage V1 and reset voltage Vr. Furthermore, voltages V1, V2, and reset voltage Vr are set according to, for example, the magnitude of the reset noise of the image sensor 100. Specifically, voltages V1, V2, and reset voltage Vr are set within a range where, for example, the difference between voltage V2 and reset voltage Vr is greater than or equal to the magnitude of the reset noise of the image sensor 100 (e.g., the maximum amount), and not greater than the difference between voltage V1 and reset voltage Vr.

[0175] In the third example, as in the second example described above, if the image sensor 100 is equipped with a shield electrode 17, the image sensor 100 may apply a fourth voltage between the counter electrode 13 and the shield electrode 17 at time t2.

[0176] Furthermore, if a clipping circuit for an overflow mechanism is connected to the charge storage unit 41, in low power consumption mode, the image sensor 100 may switch the clipping voltage to a voltage closer to voltage V2, or it may perform an operation to disable the clipping circuit or overflow operation.

[0177] (Other embodiments) The camera system relating to this disclosure has been described above based on embodiments, but this disclosure is not limited to these embodiments.

[0178] For example, in the above embodiment, in low power consumption mode, the image sensor 100 continuously supplied voltage V2 to the counter electrode 13 from time t2 onwards, but this is not limited to this. In low power consumption mode, the image sensor 100 may supply voltage V2 to the counter electrode 13 only for a portion of the period. Figure 20 is a timing chart showing a modified example of the operating timing of the camera system 300. Figure 20 shows, from top to bottom, the voltage level of the vertical synchronization signal VD, the drive timing of the pixel 10, the voltage level of the power save signal PSV, and the voltage level of the counter electrode 13. In the drive timing of the pixel 10, the imaging period in which exposure and signal charge readout are performed is shown by a shaded rectangle, and the vertical blanking period is shown by a halftone rectangle. As shown in Figure 20, the image sensor 100 may, for example, supply voltage V2 to the counter electrode 13 only during the vertical blanking period from time t1 onwards when the power save signal PSV becomes low level.

[0179] Furthermore, although the above embodiment described the case where the signal charge is a hole, even when the signal charge is an electron, the reliability of the image sensor 100 and the effect of lower power consumption can be obtained by controlling the image sensor 100 in a low power consumption mode. For example, this can be achieved by reversing the positive and negative signs of the applied voltage as described above.

[0180] Furthermore, the camera system does not necessarily have to include all of the components described in the above embodiment, and may consist only of the components necessary to perform the desired operation.

[0181] Furthermore, in the above embodiment, a process executed by a specific processing unit may be executed by another processing unit. Also, the order of multiple processes may be changed, or multiple processes may be executed in parallel.

[0182] Furthermore, in the above embodiment, each component may be realized by executing a software program suitable for each component. Each component may also be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0183] Furthermore, each component may be implemented by hardware. Each component may also be a circuit (or integrated circuit). These circuits may form a single circuit as a whole, or they may be separate circuits. Also, each of these circuits may be a general-purpose circuit or a dedicated circuit.

[0184] Furthermore, the general or specific embodiments of this disclosure may be implemented as a system, apparatus, method, integrated circuit, computer program, or recording medium such as a computer-readable CD-ROM. They may also be implemented in any combination of systems, apparatus, methods, integrated circuits, computer programs, and recording media.

[0185] For example, this disclosure may be implemented as a camera system according to the above embodiment, as a control device for controlling an image sensor, as a program for causing a computer to execute a method for controlling an image sensor performed by a system controller, or as a computer-readable non-temporary recording medium on which such a program is recorded.

[0186] In addition, the scope of this disclosure includes, without departing from the spirit of this disclosure, various modifications to the embodiments and examples that a person skilled in the art could conceive of, as well as other forms constructed by combining some of the components of the embodiments and examples. [Industrial applicability]

[0187] The camera system described herein can be applied to a variety of camera and sensor systems, including those for mobile devices, medical devices, surveillance devices, automotive devices, measurement devices including distance measuring devices, drones, and robots. [Explanation of Symbols]

[0188] 10, 10a, 10b pixels 11 Pixel electrodes 12 Photoelectric conversion layer 13 Counter electrode 14. Impurity diffusion region 15 electron blocking layer 16 Hole blocking layer 17 Shielding electrodes 18, 19 Carrier Transfer Layer 20, 20a, 20b Photoelectric conversion section 21 Sealing layer 22 Signal detection circuit 24 Signal detection transistors 26 Address Transistors 28 Reset transistor 31, 31a plug 32, 35 Voltage supply circuit 34 Reset voltage source 36 Vertical scanning circuit 37 Column Signal Processing Circuit 38 Horizontal signal readout circuit 39 Pixel drive signal generation circuit 40 Power line 41 Charge storage section 42, 45 Sensitivity control lines 44 Reset voltage line 46 Address control lines 47 Vertical signal line 48 Reset control line 49 Horizontal common signal line 60 CMOS circuit layers 61 Semiconductor substrates 62 Interlayer insulating layer 63 Insulating layer 100 image sensors 300 Camera System 310 Lens Optics 320 Camera signal processing unit 330 System Controller 340 Operation Reception Unit PA Pixel Array< / n> < / j>

Claims

1. A control method for an image sensor comprising a photoelectric conversion unit including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode, and peripheral circuits connected to the photoelectric conversion unit, Accepting a predetermined input signal, This includes controlling the image sensor by switching between a normal imaging mode and a low power consumption mode based on the predetermined input signal, In the normal imaging mode, a first voltage is applied to the image sensor between the first electrode and the second electrode. In the low power consumption mode, a second voltage greater than 0V and less than the first voltage is applied to the image sensor between the first electrode and the second electrode, and a portion of the operation of the peripheral circuit is stopped. A method for controlling an image sensor.

2. In the low power consumption mode, the second voltage is applied to the image sensor between the first electrode and the second electrode for a period of one frame or longer. The method for controlling an image sensor according to claim 1.

3. The image sensor further comprises a third electrode facing the first electrode, with the photoelectric conversion layer in between. In the normal imaging mode, a third voltage is applied to the image sensor between the first electrode and the third electrode. In the low power consumption mode, a fourth voltage smaller than the third voltage is applied to the image sensor between the first electrode and the third electrode. A method for controlling an image sensor according to claim 1 or 2.

4. In the low power consumption mode, the image sensor is made to supply equal voltages to the first electrode and the third electrode, thereby applying the second voltage between the first electrode and the second electrode, and applying the fourth voltage between the first electrode and the third electrode. The method for controlling an image sensor according to claim 3.

5. The photoelectric conversion unit has a photocurrent characteristic in which, when a voltage is applied between the first electrode and the second electrode, there exists a first voltage range in which the current density flowing between the first electrode and the second electrode is the same in the state with and without incident light. The second voltage is included in the first voltage range. A method for controlling an image sensor according to claim 1 or 2.

6. The second electrode is connected to the charge storage unit, In the low power consumption mode, the image sensor is instructed to supply a predetermined voltage to the first electrode, and then to supply a reset voltage to the charge storage unit to reset the potential of the charge storage unit, thereby applying the second voltage between the first electrode and the second electrode. The predetermined voltage value is the value between the reset voltage and the voltage supplied to the first electrode when the first voltage is applied between the first electrode and the second electrode. A method for controlling an image sensor according to claim 1 or 2.

7. In the low power consumption mode, the image sensor is prevented from outputting an image by stopping some of the operation of the peripheral circuits. A method for controlling an image sensor according to claim 1 or 2.

8. An image sensor comprising a photoelectric conversion unit including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer disposed between the first electrode and the second electrode, and peripheral circuits connected to the photoelectric conversion unit, It comprises a control unit and, The control unit, Accepts a predetermined input signal, The image sensor is controlled by switching between a normal imaging mode and a low power consumption mode based on the predetermined input signal. In the normal imaging mode, a first voltage is applied to the image sensor between the first electrode and the second electrode. In the low power consumption mode, a second voltage greater than 0V and less than the first voltage is applied to the image sensor between the first electrode and the second electrode, and a portion of the operation of the peripheral circuit is stopped. Camera system.

Images