Indication device

Abstract

To provide a semiconductor device in which the arrangement area of a transistor can be smaller.SOLUTION: The semiconductor device has a first transistor with a first oxide semiconductor film and a second transistor with a second oxide semiconductor film on a substrate. When the oxide semiconductor films are subjected to an electron-beam diffraction, the first oxide semiconductor film is larger than the second oxide semiconductor film in the ratio of the integrated intensity of the luminance in a diffraction spot due to a C-axial orientation and the integrated intensity of the luminance in a diffraction spot due to orientations in all directions. The semiconductor device also has a part of the first transistor between the second transistor and the substrate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a semiconductor device having an oxide semiconductor film and a display device having the semiconductor device. Regarding placement.

[0002] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the technical field relates to a product, method, or method of manufacture. Regarding machines, manufacturers, or compositions of matter In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, an energy storage device, and a memory device. This relates to methods for driving them, or methods for manufacturing them.

[0003] In this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. This is one embodiment of a semiconductor device. Imaging device, display device, liquid crystal display device, light-emitting device, electrical Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices are semi- It may have a conductive device. [Background technology]

[0004] A transistor (field-effect transistor) is formed using a semiconductor thin film on a substrate having an insulating surface. The technology for constructing FETs (also known as thin-film transistors or TFTs) is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely applied in sub-devices. Silicon is used as a semiconductor thin film applicable to transistors. While semiconductor materials such as [mention specific semiconductor materials here] are widely known, oxide semiconductors are attracting attention as another type of material. It is being done.

[0005] For example, Patent Document 1 describes a first transistor using an oxide semiconductor film and an oxide semiconductor By stacking a second transistor using a film, multiple memory cells are superimposed. This has led to the disclosure of a technology that reduces the cell area.

[0006] Furthermore, Patent Document 2 describes a pixel section having multiple pixels arranged in two dimensions, and a representation of the multiple pixels. It comprises a drive circuit section that drives the display, and a first layer including the drive circuit section and a second layer including the pixel section are stacked By layering, this technique reduces the space required for the drive circuit in the peripheral area of ​​the pixel. The technique has been disclosed. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2013-138191 [Patent Document 2] Japanese Patent Publication No. 2015-194577 [Overview of the project] [Problems that the invention aims to solve]

[0008] As shown in Patent Documents 1 and 2, by stacking multiple transistors, the arrangement of transistors The footprint can be reduced. On the other hand, by stacking multiple transistors, a mask can be created. There were problems such as an increase in the number of sheets or the number of processes.

[0009] In view of the above problems, in a semiconductor device in which multiple transistors are stacked, one aspect of the present invention is One of the challenges is to provide a semiconductor device that minimizes the increase in the number of masks or the number of manufacturing steps. Alternatively, one aspect of the present invention relates to a semiconductor that can reduce the arrangement area of ​​transistors. One of the objectives of this invention is to provide an apparatus. Alternatively, one aspect of this invention provides a highly reliable semiconductor One of the objectives is to provide a body device. Alternatively, one aspect of the present invention aims to reduce manufacturing costs. One of the objectives is to provide a semiconductor device that reduces power consumption. Alternatively, one aspect of the present invention is a novel One of the objectives is to provide a suitable semiconductor device.

[0010] The description of the above problems does not preclude the existence of other problems. Furthermore, one aspect of the present invention is not necessarily However, it is not necessary to solve all of these issues. Other issues can be addressed by describing them in the specifications, etc. This is self-evident, and it is possible to extract other issues from the description in the specification, etc. . [Means for solving the problem]

[0011] One aspect of the present invention is a semiconductor device comprising a first transistor and a second transistor on a substrate. The device has a first transistor having a first oxide semiconductor film, and a second transistor having a first oxide semiconductor film. The transistor has a second oxide semiconductor film, and the first transistor has an interlayer film.

[0012] The first oxide semiconductor film is a first metal oxide having a first crystalline portion and a second crystalline portion. The film has a first crystalline portion which is c-axis oriented, and the second crystalline portion which is c-axis oriented more than the first crystalline portion. Low orientation. The first metal oxide film was subjected to electron diffraction measurement in cross-section, and electron diffraction When the pattern is observed, the electron diffraction pattern is a diffraction spot originating from the first crystal region. It has a first region having a diffraction spot caused by a second crystalline portion, and a second region having a diffraction spot caused by a second crystalline portion. The second oxide semiconductor film has a third crystalline portion and a fourth crystalline portion, and the second metal It has an oxide film, the third crystalline portion has c-axis orientation, and the fourth crystalline portion is similar to the third crystalline portion. The c-axis orientation is low. The second metal oxide film was subjected to electron diffraction measurement in cross-section, and electron When observing the linear diffraction pattern, the electron diffraction pattern is due to diffraction caused by the third crystal region. A third region having a pot, and a fourth region having diffraction spots originating from a fourth crystalline region. It has the following characteristics.

[0013] The integral intensity of the brightness in the second region of the first oxide semiconductor film is given by the first region. The ratio of the integrated intensity of the luminance is the integrated intensity of the luminance in the fourth region of the second oxide semiconductor film. It is characterized by being greater than the ratio of the integrated intensity of luminance in the third region to the degree.

[0014] In the above configuration, the source electrode or drain electrode of the first transistor is located on the substrate. Preferably, it has a region sandwiched between the second oxide semiconductor film and the second oxide semiconductor film.

[0015] In the above configuration, the first oxide semiconductor film is located between the substrate and the second oxide semiconductor film. It is preferable to have a region that is sandwiched between the elements.

[0016] In the above configuration, the interlayer film is the region sandwiched between the substrate and the second oxide semiconductor film. It is desirable to have it.

[0017] In the above configuration, the ratio of the number of In, M, and Zn atoms in the oxide semiconductor film is In:M: Zn is in the vicinity of 4:2:3, and when In is 4, M is between 1.5 and 2.5, and Preferably, the amount of Zn is between 2 and 4. The ratio of the number of atoms of In, M, and Zn is the ratio of the first oxidation The properties in the first semiconductor film and the second oxide semiconductor film may be different.

[0018] In the above configuration, the field effect mobility in the saturation region is the field of the first transistor. It is preferable that the field-effect mobility of the second transistor is greater than the effect mobility. In the above configuration, the Id-Vg characteristic of the transistor is when the voltage applied to the gate electrode is 3V The voltage shall be in the range of 10V or less, and the voltage applied to the drain region shall be between 10V and 20V. It is preferable that the measurement be taken within the following range.

[0019] Another aspect of the present invention is a semiconductor device according to any one of the above configurations, and a light-emitting element. It is a display device having the following features.

[0020] Another aspect of the present invention is a display module having the display device and a touch sensor. Furthermore, another aspect of the present invention is a semiconductor device described in any one of the above aspects, An electronic device having a display device, or the above-mentioned display module, and operation keys or a battery. be. [Effects of the Invention]

[0021] According to one aspect of the present invention, in a semiconductor device in which multiple transistors are stacked, the number of masks Alternatively, a semiconductor device with a small increase in the number of manufacturing steps can be provided. Or, an embodiment of the present invention. Depending on the circumstances, in a semiconductor device in which multiple transistors having oxide semiconductor films are stacked, A highly reliable semiconductor device can be provided. Alternatively, according to one aspect of the present invention, oxidation In a semiconductor device in which multiple transistors having a monocrystalline semiconductor film are stacked, the manufacturing cost is reduced. A semiconductor device that reduces power consumption can be provided. Alternatively, according to one aspect of the present invention, a novel semiconductor can be provided. We can provide a body device.

[0022] Furthermore, the description of these effects does not preclude the existence of other effects. Also, one aspect of the present invention is not necessarily However, it is not necessary to have all of these effects. Other effects are described in the specification. This is obvious from the descriptions in the drawings and claims, and the description in the specification, drawings, and claims is Furthermore, it is possible to extract effects other than those mentioned above. [Brief explanation of the drawing]

[0023] [Figure 1] A diagram illustrating the cross-section of a semiconductor device. [Figure 2] A diagram illustrating the cross-section of a semiconductor device. [Figure 3] A diagram illustrating the cross-section of a semiconductor device. [Figure 4] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 5] A diagram illustrating the Id-Vg and Id-Vd characteristics of a transistor. [Figure 6] A diagram illustrating the Id-Vg characteristics and mobility curves (linear and saturated) calculated from GCA. [Figure 7] A cross-sectional diagram illustrating a transistor. [Figure 8] A diagram illustrating the Id-Vg characteristics of a transistor. [Figure 9] A diagram illustrating the circuitry of a semiconductor device. [Figure 10] A diagram illustrating the cross-section of a semiconductor device. [Figure 11] A diagram illustrating the cross-section of a semiconductor device. [Figure 12] A diagram illustrating the cross-section of a semiconductor device. [Figure 13] A diagram illustrating energy bands. [Figure 14] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 15] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 16] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 17] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 18] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 19] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 20] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 21] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 22] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 23] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 24] A diagram illustrating the SIMS measurement results of an oxide semiconductor film. [Figure 25] A diagram illustrating the range of atomic ratios in oxide semiconductors. [Figure 26] A diagram illustrating the crystal structure of InMZnO4. [Figure 27] A diagram illustrating the energy bands in a transistor that uses an oxide semiconductor in the channel region. [Figure 28] A diagram illustrating cross-sectional TEM images and cross-sectional HR-TEM images of an oxide semiconductor film. [Figure 29] A diagram illustrating cross-sectional TEM images and cross-sectional HR-TEM images of an oxide semiconductor film. [Figure 30] A diagram illustrating cross-sectional TEM images and cross-sectional HR-TEM images of an oxide semiconductor film. [Figure 31] A diagram illustrating the XRD measurement results and electron diffraction patterns of an oxide semiconductor film. [Figure 32] A diagram illustrating the XRD measurement results and electron diffraction patterns of an oxide semiconductor film. [Figure 33] A diagram illustrating the XRD measurement results and electron diffraction patterns of an oxide semiconductor film. [Figure 34] A diagram illustrating electron diffraction patterns. [Figure 35] A diagram illustrating the line profile of an electron diffraction pattern. [Figure 36] A conceptual diagram illustrating the luminance profile of an electron diffraction pattern, the relative luminance R of the luminance profile, and the full width at half maximum of the profile. [Figure 37] A diagram illustrating electron diffraction patterns and brightness profiles. [Figure 38] A diagram illustrating the relative brightness estimated from the electron diffraction pattern of an oxide semiconductor film. [Figure 39] This figure illustrates the cross-sectional TEM image of an oxide semiconductor film and the cross-sectional TEM image after image analysis. [Figure 40] A diagram illustrating the top surface and cross-section of a semiconductor device. [Figure 41] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 42] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 43] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 44] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 45] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 46] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 47] A top view and a cross-sectional view illustrating the method for manufacturing a semiconductor device. [Figure 48] Schematic cross-sectional view of a light-emitting element. [Figure 49] A schematic cross-sectional diagram illustrating the method for fabricating the EL layer. [Figure 50] A conceptual diagram illustrating a droplet dispensing device. [Figure 51] A top view showing one embodiment of a display device. [Figure 52] A cross-sectional view showing one embodiment of a display device. [Figure 53] A cross-sectional view showing one embodiment of a display device. [Figure 54] A block diagram illustrating the display device. [Figure 55] A diagram illustrating the display module. [Figure 56]A diagram illustrating electronic devices. [Figure 57] A diagram illustrating electronic devices. [Figure 58] A perspective view illustrating the display device. [Modes for carrying out the invention]

[0024] The embodiments will be described below with reference to the drawings. However, many of the embodiments differ. It is possible to implement it in any manner, without deviating from its purpose and scope. It will be readily apparent to those skilled in the art that the details can be modified in various ways. Therefore, the present invention The following embodiments shall not be interpreted as being limited to their contents.

[0025] Furthermore, in drawings, the size, layer thickness, or area may be exaggerated for clarity. There is a possibility of compatibility. Therefore, it is not necessarily limited to that scale. Note that the drawing is modeled after an ideal example. This is expressed formulaically and is not limited to the shapes or values ​​shown in the drawings.

[0026] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the combination of constituent elements. This is added to avoid ambiguity and does not mean that the number is limited.

[0027] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The relationships are used for convenience in explaining them with reference to the diagrams. Also, the positional relationships between the components are shown. This changes appropriately depending on the direction in which each configuration is described. Therefore, it is not limited to the terms described in the specification. It is not limited to a single word, and can be appropriately rephrased depending on the situation.

[0028] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel region, and current flows between the source and drain through the channel region. This is possible. In this specification, the channel region is defined as the region where the current is mainly It refers to the area in which something flows.

[0029] Furthermore, the source and drain functions may vary depending on whether transistors with different polarities are used, or the circuit dynamics may change. In the process, the direction of the current may change, causing the order to be reversed. Therefore, this specification In written documents and other materials, the terms "source" and "drain" can be used interchangeably.

[0030] Furthermore, in this specification, "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "something that has some electrical effect" The term "connection" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. These include switching elements, resistive elements, inductors, capacitors, and various other functional elements. This includes elements such as [specific components].

[0031] Furthermore, in this specification, "parallel" means that two lines are at an angle of -10° or more and 10° or less. This refers to a state in which the elements are positioned. Therefore, it also includes cases where the angle is between -5° and 5°. "Perpendicular" refers to a state where two lines are positioned at an angle of 80° to 100°. Therefore, this also includes cases where the angle is between 85° and 95°.

[0032] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change the term "conductive layer" to "conductive film". In some cases, this may be possible. Or, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the terminology to this.

[0033] Furthermore, unless otherwise specified in this specification, off-current refers to the state in which a transistor is in the off state. This refers to the drain current when the device is in a non-conductive state (also called a closed state). Unless otherwise specified, in an n-channel transistor, the voltage Vg between the gate and source is... When s is lower than the threshold voltage Vth, in a p-channel transistor, the gate and saw This refers to a state where the voltage Vgs between channels is higher than the threshold voltage Vth. For example, an n-channel type. The off-current of a transistor is defined as the voltage between the gate and source, Vgs, and the threshold voltage Vth. It sometimes refers to the drain current when it is lower than [a certain value].

[0034] The off-current of a transistor may depend on Vgs. Therefore, the off-current of the transistor The statement that the current is less than or equal to I means that there exists a value of Vgs such that the transistor's off-current is less than or equal to I. It is sometimes said that the off-current of a transistor is the off-state at a given Vgs. An off state within a predetermined Vgs range, or a sufficiently reduced off current, can be obtained. This can sometimes refer to the off-current in the off state of Vgs, etc.

[0035] As an example, consider a drain with a threshold voltage Vth of 0.5V and Vgs of 0.5V. Current is 1 × 10 -9 A is such that the drain current at Vgs = 0.1V is 1 × 10⁻¹⁰ -13 A is such that the drain current at Vgs = -0.5V is 1 × 10⁻¹⁰ -19 A and Vgs The drain current at -0.8V is 1 × 10⁻⁶ -22 n-channel transistor such that A Let's assume a transistor. The drain current of this transistor is, when Vgs is -0.5V, Alternatively, in the range of Vgs from -0.5V to -0.8V, 1 × 10 -19 A or less Therefore, the off-current of the transistor is 1 × 10⁻⁶. -19 There are cases where it is said to be less than or equal to A. The drain current of the transistor is 1 × 10⁻⁶ -22 Because there exists a Vgs that is less than or equal to A. The off-current of the transistor is 1 × 10⁻⁶ -22 Sometimes it is said that it is less than or equal to A.

[0036] Furthermore, in this specification, the off-current of a transistor having a channel width W is defined as the channel width W It is sometimes expressed as the current flowing through a certain area. Also, per a given channel width (e.g., 1 μm) It can sometimes be expressed as the value of the current flowing through it. In the latter case, the unit of the off-current is current / length. It may be expressed in units that have a specific value (for example, A / μm).

[0037] The off-current of a transistor may be temperature-dependent. In this specification, the off-current is Unless otherwise specified, the power is turned off at room temperature, 60°C, 85°C, 95°C, or 125°C. It may represent current. Alternatively, the reliability of the semiconductor device containing the transistor is guaranteed. The temperature at which the transistor is used, or the temperature at which the semiconductor device containing the transistor is used (for example) In some cases, it may represent the off-current at any one temperature between 5°C and 35°C. The off-current of the zista is less than or equal to I, meaning that at room temperature, 60°C, 85°C, 95°C, 125°C, etc. The temperature at which the reliability of the semiconductor device containing the transistor is guaranteed, or the transistor The temperature at which semiconductor devices containing stas are used (for example, any one of 5°C to 35°C) This indicates that there exists a value of Vgs such that the transistor's off-current at a given temperature is less than or equal to I. There may be cases where this is the case.

[0038] The off-current of a transistor may depend on the voltage Vds between the drain and source. In this specification, unless otherwise specified, the off-current is defined as Vds of 0.1V, 0.8V, and 1 V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or This may represent the off-current at 20V, or the semiconductor containing the transistor. Vds that guarantees the reliability of the device, or semiconductor device containing the transistor. It can sometimes represent the off-current at Vds used in a transistor. The current is less than or equal to I, meaning that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2V. 0.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, the transistor in question is included. The reliability of the semiconductor device is guaranteed by Vds, or the semiconductor containing the transistor. In devices and other equipment, the off-current of the transistor at Vds is less than or equal to I at Vg. This can sometimes refer to the existence of a value for s.

[0039] In the above explanation of off-current, you may substitute "drain" for "source." That is, off-current This can also refer to the current flowing through the source when the transistor is in the off state.

[0040] Furthermore, in this specification, the term "leakage current" may be used interchangeably with "off current." , in this specification and the like, the off-current, for example, when the transistor is in the off state, may refer to the current flowing between the source and the drain.

[0041] Also, in this specification and the like, the threshold voltage of a transistor refers to the gate voltage (Vg) when a channel is formed in the transistor. Specifically, the threshold voltage of a transistor refers to the gate voltage (Vg) on the horizontal axis and the square root of the drain current (Id) on the vertical axis. When plotting the curve (Vg-√Id characteristic), it may refer to the gate voltage (Vg) at the intersection of the straight line obtained by extrapolating the tangent line with the maximum slope and the square root of the drain current (Id) being 0 (Id being 0 A). Alternatively, the threshold voltage of a transistor may refer to the gate voltage (Vg) when, with the channel length being L and the channel width being W, the value of Id [A] × L [μm] / W [μm] becomes 1 × 10 [A]. -9 [A]. It may refer to the gate voltage (Vg).

[0042] Also, in this specification and the like, even when it is described as "semiconductor", for example, when the conductivity is extremely low, it may have the characteristics of an "insulator". Also, the boundary between "semiconductor" and "insulator" may be ambiguous and cannot be strictly distinguished. Therefore, the "semiconductor" described in this specification and the like may be possible to be rephrased as "insulator". Similarly, the "insulator" described in this specification and the like may be possible to be rephrased as "semiconductor". Or it may be possible to rephrase the "insulator" described in this specification and the like as "semi-insulator".

[0043] Also, in this specification and the like, even when it is described as "semiconductor", for example, when the conductivity is extremely high, it may have the characteristics of a "conductor". Also, the boundary between "semiconductor" and "conductor" The term "electric body" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification, etc. The term "semiconductor" as used in this document can sometimes be replaced with "conductor." Similarly, In some cases, the term "conductor" as used in detailed documents may be replaced with "semiconductor."

[0044] Furthermore, in this specification, the term "impurity of a semiconductor" refers to any component other than the main component constituting the semiconductor film. For example, elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can lead to... , the formation of DOS (Density of States) in semiconductors, and carrier In some cases, the mobility of the semiconductor may decrease, or the crystallinity may decrease. When an ionized semiconductor is present, impurities that alter the properties of the semiconductor include, for example, Group 1 elements. These include elements, Group 2 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components, in particular Hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen There are elements such as [elements]. In the case of oxide semiconductors, for example, oxygen vacancies can be created by the inclusion of impurities such as hydrogen. It may form. Also, if the semiconductor contains silicon, it can change the properties of the semiconductor. Impurities include, for example, Group 1 elements, Group 2 elements, Group 13 elements, and other elements excluding oxygen and hydrogen. This includes elements from Group 15, among others.

[0045] Furthermore, in this specification, the term "metal oxide" is a broad expression. It is a metal oxide. Metal oxides are oxide insulators and oxide conductors (transparent oxide conductors). (including), oxide semiconductor (also called Oxide Semiconductor or simply OS) It is classified as such. For example, when a metal oxide is used in the active layer of a transistor, Metal oxides are sometimes referred to as oxide semiconductors. Therefore, they are sometimes written as OS FETs. In this context, it can be rephrased as a transistor having a metal oxide or oxide semiconductor. ru.

[0046] Furthermore, in this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxi They are sometimes collectively referred to as (de) metal oxides (met It may also be called al oxynitride.

[0047] Furthermore, in this specification, etc., CAAC (c-axis aligned crystal ), and when referred to as CAC (Cloud-Aligned Composite) Yes. Note that CAAC represents an example of a crystal structure, and CAC represents an example of a function or material composition. It represents.

[0048] An example of the crystal structure of an oxide semiconductor or metal oxide is described below. n-Ga-Zn oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) Using the above, we will explain an oxide semiconductor film deposited by sputtering as an example. Using a GET, the substrate temperature is set to between 100°C and 130°C, and the sputtering method is used. The formed oxide semiconductor is called sIGZO, and using the above target, the substrate temperature is set to room temperature. (RT) Oxide semiconductors formed by the sputtering method are called tIGZO. For example, sIGZO is either nc (nano crystal) or CAAC. It has one or both of the crystal structures. Furthermore, tIGZO has the nc crystal structure. Note that the room temperature (RT) referred to here includes the temperature when the substrate is not intentionally heated.

[0049] Furthermore, in this specification, CAC-OS or CAC-metal oxide means Some parts of the material have the function of a conductor, and some parts of the material have the function of a dielectric (or insulator). The material as a whole possesses semiconductor properties. Note that CAC-OS or CAC-me When tal oxide is used in the active layer of a transistor, the conductor acts as a carrier. A dielectric material has the function of conducting electrons (or holes), while a dielectric material has the function of not conducting electrons, which act as carriers. It possesses the functions of a conductor and a dielectric, which work complementaryly to each other. By doing so, the switching function (the function to turn on / off) is controlled by CAC-OS or C It can be applied to AC-metal oxide. CAC-OS or CAC-m In etal oxide, by separating each function, both functions are maximized. It can be increased to its limit.

[0050] Furthermore, in this specification, CAC-OS or CAC-metal oxide is defined as a conductive It has an electric region and a dielectric region. The conductive region has the functions of a conductor as described above, and the dielectric region The region has the dielectric function described above. Furthermore, within the material, there is a conductive region and a dielectric region. The regions may be separated at the nanoparticle level. Also, there are conductive regions and dielectric regions. These can be unevenly distributed within the material. Also, the conductive region appears blurred around the edges, creating a cloudy appearance. They may sometimes be observed connected in a specific way.

[0051] In other words, CAC-OS or CAC-metal oxide is a matrix composite material. (matrix composite), or metal matrix composite (metal It can also be called a matrix composite.

[0052] Furthermore, in CAC-OS or CAC-metal oxide, the conductive region and the induction region The electrochemical region is defined as 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. These particles may be dispersed in the material at the following sizes.

[0053] (Embodiment 1) In this embodiment, a semiconductor device and a method for manufacturing a semiconductor device according to one aspect of the present invention are shown in Figure This will be explained with reference to Figures 1 through 23.

[0054] <1-1. Example of Semiconductor Device Configuration 1> The cross-sectional views of semiconductor devices 100A, 100B, 100C, and 100D according to one aspect of the present invention are shown. See Figures 1(A)(B) and 2(A)(B). Semiconductor devices 100A, 100B, and 100C. The 100D has transistor Tr1 and transistor Tr2.

[0055] The transistor Tr1 of semiconductor device 100A is a top-gate type transistor, Transistor Tr2 is a bottom-gate type transistor. Transistor of semiconductor device 100B Transistors Tr1 and Tr2 are top-gate type transistors. Transistors Tr1 and Tr2 of the main unit 100C are bottom-gate type transistors It is a transistor. Transistor Tr1 of semiconductor device 100D is a bottom gate type transistor. Transistor Tr2 is a top-gate type transistor.

[0056] In semiconductor devices 100A, 100B, 100C, and 100D, any of the transistors Tr1, Tr2 also has an oxide semiconductor film. This oxide semiconductor film consists of In and M(M It has a metal oxide containing Al, Ga, Y, or Sn, and Zn. To explain, in terms of the proportion of crystalline parts having c-axis orientation, transistor Tr1 has The oxide semiconductor film is larger than the oxide semiconductor film of transistor Tr2. In other words, regardless of the shape of the transistor, a semiconductor device according to one aspect of the present invention is a transistor The oxide semiconductor film of Tr1 and the oxide semiconductor film of transistor Tr2 are connected The crystallinity is different from that of the other. Alternatively, the semiconductor device according to one aspect of the present invention is a transistor Tr1 An oxide semiconductor film in which a channel region is formed, and the channel region of transistor Tr2 are formed The oxide semiconductor film and the material have different crystallinity properties.

[0057] The transistor Tr1 of semiconductor devices 100A and 100B has an insulating film 106 on the substrate 102 and , an oxide semiconductor film 108 on the insulating film 106, and an insulating film 110 on the oxide semiconductor film 108 , conductive film 120 on insulating film 110, insulating film 106, oxide semiconductor film 108, conductive film 12 It has an insulating film 114 on 0. Also, the oxide semiconductor film 108 overlaps with the conductive film 120. Furthermore, a channel region 108i in contact with the insulating film 110 and a source region in contact with the insulating film 114 It has a 108s and a drain region 108d that is in contact with the insulating film 114.

[0058] Furthermore, transistor Tr1 has an insulating film 116 on the insulating film 114, and insulating film 114 and insulating film. Through the opening provided in the film 116, the oxide semiconductor film 10 in the source region 108s The conductive film 112a is electrically connected to 8, and the insulating film 114 and insulating film 116 are provided Through the opening, the oxide semiconductor film 108 is electrically connected in the drain region 108d. The conductive film 112b, the insulating film 116, the conductive film 112a, and the insulating film on the conductive film 112b. It has 118 and.

[0059] Furthermore, in semiconductor device 100A, transistor Tr2 has conductive film 112b and conductive film 112b The insulating film 118 on top, the oxide semiconductor film 128 on the insulating film 118, and the oxide semiconductor film 128 The conductive film 122a on top, the conductive film 122b on the oxide semiconductor film 128, and the oxide semiconductor film 1 28. The insulating film 124 on the conductive film 122a and the conductive film 122b, and the insulating film 124 It has a film 126 and a conductive film 130 on the insulating film 126. That is, transistor Tr2 The conductive film 112b and the conductive film 130 can be used as the gate electrode. The film 112b can be used as a back gate electrode.

[0060] In semiconductor device 100B, transistor Tr2 is connected to a conductive film 112b and on the conductive film 112b. An insulating film 118, an oxide semiconductor film 208 on the insulating film 118, and on the oxide semiconductor film 208 Insulating film 210b, conductive film 212b on insulating film 210b, oxide semiconductor film 208, conductive Film 212b, and insulating film 214 on insulating film 118, insulating film 216, conductive film 218a, It has 218b and, in other words, transistor Tr2 has conductive film 112b and conductive film 21 2b and can be used as the gate electrode. In this case, the conductive film 112b is used as the back gate electrode. It can be done this way.

[0061] The transistor Tr1 of semiconductor devices 100C and 100D is connected to the conductive film 107 on the substrate 102. , an insulating film 117 on the conductive film 107, an oxide semiconductor film 108 on the insulating film 117, and an oxide Conductive films 112a and 112b are electrically connected to the semiconductor film 108, and insulating films 118 and 11 It has 9 and .

[0062] The transistor Tr2 of semiconductor device 100C has a conductive film 112b and an insulating film on the conductive film 112b. Edge films 118, 119, oxide semiconductor film 128 on insulating film 119, and oxide semiconductor film 12 The conductive film 122a on 8, the conductive film 122b on the oxide semiconductor film 128, and the insulating film 124 It has an insulating film 126 on the insulating film 124 and a conductive film 130 on the insulating film 126. The transistor Tr2 uses conductive film 112b and conductive film 130 as its gate electrode. This can be done. In this case, the conductive film 112b can be used as the back gate electrode.

[0063] The transistor Tr2 of the semiconductor device 100D has a conductive film 112b and an insulating film on the conductive film 112b. Edge films 118, 119, oxide semiconductor film 128 on insulating film 119, and oxide semiconductor film 12 8 The conductive film 122a on the oxide semiconductor film 128, and the insulating film 210b on the oxide semiconductor film 128, and insulating film 210b It has the conductive film 212b and the insulating film 216. That is, the transistor Tr2 is conductive The electrode film 112b and the conductive film 212b can be used as a gate electrode. 112b can be used as the back gate electrode.

[0064] Furthermore, in semiconductor devices 100C and 100D, the conductive film 1 is formed simultaneously with the conductive film 122a. 22c overlaps with the oxide semiconductor film 108 of transistor Tr1. Zistor Tr1 can use conductive film 107 and conductive film 122c as gate electrodes. In this case, the conductive film 122c can be used as the back gate electrode.

[0065] In semiconductor devices 100A, 100B, 100C, and 100D, the transistor Tr1 has The oxide semiconductor film and the oxide semiconductor film of transistor Tr2 have overlapping regions. It has transistor Tr1 and transistor Tr2, at least partially overlapping each other. By providing a region, the area required for transistor placement can be reduced. However, The channel region formed in the oxide semiconductor film of transistor Tr1 and the transistor Tr2 It is preferable that the channel regions formed in the oxide semiconductor film do not overlap with each other.

[0066] Similar to semiconductor device 100A, a structure having transistor Tr1 and transistor Tr2 The semiconductor device 100E is shown in Figure 3(A). However, it differs from semiconductor device 100A in that Unlike semiconductor device 100A, semiconductor device 100E has an oxidation of transistor Tr1 The material semiconductor film and the oxide semiconductor film of transistor Tr2 have overlapping regions. It has not been done. However, a portion of the conductive film 112b is the oxide semiconductor of transistor Tr2. It has regions that overlap with the conductive film. Also, a part of the conductive film 112b is a part of the conductive film 122a. They have overlapping regions. This is the transistor Tr1 of semiconductor device 100B, Transistors Tr1 and Tr2 of semiconductor device 100F relative to transistor Tr2 The same applies to the transistors (see Figure 3(B)). Also, the transistors of semiconductor devices 100C and 100D In the transistor, the oxide semiconductor film of transistor Tr1 and the transistor Tr2 The oxide semiconductor film having this structure may also have no overlapping regions with each other. Even with this arrangement, considering the limits of how much the line width can be reduced by exposure, the distance between wirings on a plane This has the effect of reducing the area required for transistor placement compared to when sufficient spacing is maintained.

[0067] Furthermore, in semiconductor devices 100A and 100B, insulating film 116, insulating film 118, semiconductor device At 100C and 100D, insulating film 117, insulating film 118, and insulating film 119 allow hydrogen to pass through. Assume it has a film that is difficult for water to pass through. If the substrate 102 is a material that easily releases hydrogen, this water The amount of elementary diffusion is less than the amount of transistor Tr1 in the oxide semiconductor film, The amount of r2 in the oxide semiconductor film can be made smaller. In other words, the transient Transistor Tr2 has a characteristic where the threshold for hydrogen diffusion is more prone to fluctuation compared to transistor Tr1. It can also be used with transistors.

[0068] Figure 4(A) is a top view of a semiconductor device 100A according to one embodiment of the present invention, and Figure 4(B) is a semiconductor device In the cross-sectional view of the body device 100A between the dashed line A1 and A2 shown in Figure 4(A), This applies. Figure 4(B) shows a cross-section of transistor Tr1 in the direction of the channel length (L), and Includes a cross-section of transistor Tr2 in the channel length (L) direction.

[0069] Furthermore, in Figure 4(A), to avoid complexity, the configuration of the semiconductor device 100A is shown. Some of the elements (such as insulating films that function as gate insulating films) and some of the symbols of the components are omitted. This is illustrated in the diagram. Furthermore, in the top view of the semiconductor device, Figure 4(A) will also be used in subsequent drawings. Similar to the above, some of the components and some of the symbols of the components may be omitted when illustrating.

[0070] Semiconductor devices 100B, 100C, 100D, and 100E have different structures from semiconductor device 100A. Similar to semiconductor device 100A, 100F can also be arranged as shown in Figure 4(A). ru.

[0071] In one aspect of the present invention, transistor Tr1 and transistor Tr2 are each electric field effect The effect mobility differs. In Id-Vg measurements, the field effect mobility in the saturation region is different from the transient The transistor Tr2 is more expensive than transistor Tr1. Further details will be explained later. The deposition temperature of the oxide semiconductor film on transistor Tr1 is higher than that of transistor Tr2. The deposition temperature of the oxide semiconductor film is higher than that of the transistor. Also, transistor Tr2 is a transistor The minimum and maximum values ​​of the field effect mobility in the saturation region, measured by Id-Vg. The difference from the maximum value is 15cm 2 It should be within / Vs.

[0072] In one aspect of the present invention, semiconductor devices 100A, 100B, 100C, 100D, 100E, In any of the 100F structures, the field-effect mobility of transistor Tr2 in the saturation region is It will be higher than that of transistor Tr1. That is, one aspect of the present invention is semiconductor device 100 Structures A, 100B, 100C, and 100D are all acceptable. The oxide semiconductor film of transistor Tr1 and the oxide semiconductor film of transistor Tr2 However, the structure of semiconductor device 100E or 100F does not have overlapping regions with each other. That's good too.

[0073] The channel regions of transistor Tr1 and transistor Tr2 overlap with each other. In such cases, when one transistor is operating, it may affect the other. Yes. To avoid this effect, between transistor Tr1 and transistor Tr2 A configuration for increasing the gap or a configuration for providing a conductive film between the transistor Tr1 and the transistor Tr2 can be cited. However, in the case of the former configuration, since the semiconductor device becomes thick, for example, when forming the semiconductor device 100A on a flexible substrate or the like, flexibility and the like may become a problem. Also, in the case of the latter configuration, an increase in the process for forming the conductive film and a problem may occur because the semiconductor device becomes thick as in the case of the former configuration.

[0074] Also, since the oxide semiconductor film 108 and the oxide semiconductor film 128 each have a region where the atomic ratio of In is larger than the atomic ratio of M, the field-effect mobilities of both the transistor Tr1 and the transistor Tr2 can be increased.

[0075] For example, by using the above transistor with a high field-effect mobility in a gate driver that generates a gate signal of a display device, a display device with a narrow frame width (also referred to as a narrow frame) can be provided. Also, by using the above transistor with a high field-effect mobility in a source driver (particularly, a demultiplexer connected to the output terminal of a shift register included in the source driver) that supplies a signal from a signal line of a display device, a display device with a small number of wirings connected thereto can be provided. Also, by using the above transistor with a high field-effect mobility in either one or both of a selection transistor and a drive transistor of a pixel circuit of a display device, a display device with high display quality can be provided. <​​​​​​​​​​​​​​​​​​This allows for an arrangement as shown in Figures 4(A) and 4(B), which increases the pixel density of the display device. This makes it possible to increase the pixel density of a display device to 1000 ppi (pixels). If the pixel density exceeds (per inch) or the pixel density of the display device exceeds 2000 ppi However, by using the arrangement shown in Figures 4(A) and 4(B), the aperture ratio of the pixels can be increased. This is possible. Note that ppi is a unit representing the number of pixels per inch.

[0077] The following example uses the structure of semiconductor device 100A, and includes oxide semiconductor film 108 and oxide semiconductor film 1 I will explain the difference between 28 and , especially in the saturation region when measuring the Id-Vg of a transistor. Let's explain field-effect mobility.

[0078] <1-2 Field effect mobility in the saturation region> First, we will explain the general characteristics of transistors using Figures 5 and 6.

[0079] [Transistor Id-Vg characteristics] This section explains the drain current-gate voltage characteristics (Id-Vg characteristics) of a transistor. Figure 5(A) is a diagram illustrating an example of the Id-Vg characteristics of a transistor. In this context, to simplify understanding, polycrystalline silicon was used for the active layer of the transistor. This scenario is assumed. Also, in Figure 5(A), the vertical axis represents Id and the horizontal axis represents Vg. vinegar.

[0080] As shown in Figure 5(A), the Id-Vg characteristics can be broadly divided into three regions. The first region is called the OFF region, and the second region is called the subthreshold. The subthreshold region and the third region is the ON region. These are referred to as the subthreshold region and the on region, respectively. The gate voltage of a gate is called the threshold voltage (Vth).

[0081] Transistor characteristics include the drain current in the off-region (also called off-current or Ioff). It is desirable for the (u) to be low and the drain current in the ON region (also called ON current or Ion) to be high. It is important to note that the on-current of a transistor is often measured using field-effect mobility as an indicator. Details of the field-effect mobility will be described later.

[0082] Furthermore, in order to drive the transistor at a low voltage, the Id in the subthreshold region is -A steep slope in the Vg characteristic is desirable. Id-Vg characteristics in the subthreshold region. As an indicator representing the magnitude of change, SS (subthreshold swing) It is also called the S value. The S value is expressed by the following formula (1).

[0083]

number

[0084] The S value is the value required for the drain current to change by an order of magnitude in the subthreshold region. This is the minimum value of the change in voltage. The smaller the S value, the smaller the on-off switching operation. It can be done steeply.

[0085] [Transistor Id-Vd characteristics] Next, we will explain the drain current-drain voltage characteristics (Id-Vd characteristics) of a transistor. Figure 5(B) illustrates an example of the Id-Vd characteristics of a transistor. In 5(B), the vertical axis represents Id and the horizontal axis represents Vd.

[0086] As shown in FIG. 5(B), the on-region is further divided into two regions. The first region is referred to as the linear region and the second region as the saturation region, respectively. In the linear region, the drain current increases parabolically as the drain voltage increases. On the other hand, in the saturation region, the drain current does not change significantly even when the drain voltage changes. Note that, analogous to a vacuum tube,

[0087] the linear region may be referred to as the triode region and the [[ID=!8]]saturation region as the pentode region, respectively. However, in practice, it is necessary to consider the threshold voltage of the transistor. Therefore, a state where the value obtained by subtracting the threshold voltage of the transistor is large with respect to Vd (Vd < Vg - Vth) may be defined as the linear region.

[0088] In the Id-Vd characteristics of a transistor, a characteristic where the current in the saturation region is constant may be expressed as "good saturation". The goodness of saturation of a transistor is particularly important for applications to organic EL displays. For example, by using a transistor with good saturation as the

[0089] [Analysis Model of Drain Current] Next, we will explain the analytical model for drain current. An analytical formula for drain current based on the Gradual Channel Approximation (GCA) is known. Based on GCA, the drain current of a transistor is expressed by the following equation (2). .

[0090]

number

[0091] In equation (2), the upper part is the equation for the drain current in the linear region, and the lower part is the equation for the drain current in the saturation region. This is the formula for the drain current.

[0092] [Field effect mobility] Next, we will explain field-effect mobility. As an indicator of the current-driving force of a transistor, the electric field... Effective mobility is used. As mentioned above, the on-region of a transistor consists of a linear region and a saturation region. It is divided into regions. Based on the characteristics of each region, the drain current analysis formula based on GCA is used. The field-effect mobility of a transistor can be calculated. Linear mobility and saturation mobility, respectively. It is called linear mobility. Linear mobility is expressed by the following equation (3), The sum mobility is expressed by the following equation (4).

[0093]

number

[0094]

number

[0095] In this specification, the curves calculated from equations (3) and (4) are referred to as mobility curves. Figure 6 shows the mobility curve calculated from the analytical formula for drain current based on GCA. Oh, Figure 6 shows the movement of linear mobility and saturation mobility with respect to the Id-Vg characteristics of the transistor. The degree curves are shown superimposed on each other.

[0096] In Figure 6, the Id-Vg characteristics are calculated from the drain current analysis formula based on GCA. The shape of the mobility curve provides clues to understanding the internal workings of a transistor.

[0097] For example, let's focus on the shape of the saturation mobility shown in Figure 6. The carriers (electrons or A hole is accelerated by the electric field as the gate voltage increases, gaining energy. Because the carriers gain a constant velocity due to the electric field, the saturation mobility increases. However, The rear is not infinitely accelerated by the electric field, but rather a thermally vibrating lattice atom or ion. Because it loses energy by colliding with fused impurity atoms, the saturation mobility gradually decreases. It decreases to [a certain value].

[0098] [Transistor fabrication] Next, a transistor having an oxide semiconductor film is fabricated, and its electrical characteristics are evaluated. It was worth it.

[0099] The transistor shown in Figure 7 consists of a conductive film 107 on the substrate 102 and an insulating film 1 on the conductive film 107. 04, an oxide semiconductor film 108 on the insulating film 104, and an insulating film 1 on the oxide semiconductor film 108. 10, the conductive film 112 on the insulating film 110, the insulating film 104, the oxide semiconductor film 108, and It has an insulating film 116 on a conductive film 112. Note that the oxide semiconductor film 108 is a conductive film 1 The channel region 108i overlaps with 12, and the source region 108s is in contact with the insulating film 116. It has a drain region 108d that is in contact with the edge film 116.

[0100] In this embodiment, with the transistor configuration shown in Figure 7, the following samples A1 to I created an A3 size.

[0101] Samples A1 to A3 each have a channel length L of 2 μm and a channel width W of 3 μm. This is a sample on which a transistor of size m has been formed. Samples A1 and A2 are also shown as comparative transistors. A sample in which a transistor is formed, and sample A3 is formed with a transistor according to one aspect of the present invention. These are the samples. Samples A1 to A3 were each prepared under different conditions for forming oxide semiconductor films. The process was carried out using the same manufacturing method for all other steps.

[0102] [Method for preparing samples A1 to A3] First, a 10nm thick titanium film and a 100nm thick copper film are sputtered onto a glass substrate. The conductive film was formed using a ring device. Subsequently, the conductive film was processed by photolithography. .

[0103] Next, four insulating films were laminated onto the substrate and conductive film. The insulating films were formed using plasma chemical vapor deposition. The film was continuously formed in a vacuum using a deposition (PECVD) apparatus. The insulating film was 5mm thick from the bottom. 0nm silicon nitride film, 300nm thick silicon nitride film, 50nm thick silicon nitride A silicon oxide-nitride film with a thickness of 50 nm was used, respectively.

[0104] Next, an oxide semiconductor film is formed on an insulating film, and the oxide semiconductor film is processed into an island shape. A semiconductor layer was formed. The oxide semiconductor film 108 was an oxide semiconductor film with a thickness of 40 nm. The following was formed. Note that the film deposition conditions for the oxide semiconductor film differed in each of the samples A1 to A3. Yes.

[0105] The oxide semiconductor film of sample A1 was subjected to an Algo ionization process with a substrate temperature of 170°C and a flow rate of 140 sccm. A gas and oxygen gas at a flow rate of 60 sccm are introduced into the chamber of the sputtering apparatus. The pressure is set to 0.6 Pa, and the metal oxide target has indium, gallium, and zinc. A 2.5kW AC power is applied to a galvanic plate (In:Ga:Zn=4:2:4.1 [atomic ratio]). It was formed by adding [something]. Furthermore, the "oxygen flow rate ratio" is calculated from the proportion of oxygen in the total film-forming gas. This information may be included. The oxygen flow rate ratio during film formation of sample A1 was 30%.

[0106] The oxide semiconductor film of sample A2 was subjected to an Algo ionization process with a substrate temperature of 130°C and a flow rate of 180 sccm. A gas and oxygen gas at a flow rate of 20 sccm are introduced into the chamber of the sputtering apparatus. The pressure is set to 0.6 Pa, and the metal oxide target has indium, gallium, and zinc. A 2.5kW AC power is applied to a galvanic plate (In:Ga:Zn=4:2:4.1 [atomic ratio]). The film was formed by adding [a specific substance]. The oxygen flow rate ratio during film formation of sample A2 was 10%.

[0107] The metal oxide film used for the oxide semiconductor film in sample A3 was prepared under the same conditions as sample A6. And, assuming the substrate temperature is room temperature (RT), argon gas at a flow rate of 180 sccm and flow rate 20 sccm of oxygen gas is introduced into the sputtering apparatus chamber, and the pressure is set to 0.6 Let Pa be a metal oxide target having indium, gallium, and zinc (In:G By applying 2.5 kW of AC power to a:Zn=4:2:4.1 [atomic ratio], the shape Success. The oxygen flow rate ratio during film formation of sample A3 was 10%.

[0108] Next, an insulating film was formed on the insulating film and oxide semiconductor layer. The insulating film had a thickness of 150 A silicon oxidoxide film of nm thickness was formed using a PECVD apparatus.

[0109] Next, heat treatment was performed. This heat treatment involved a 35°C mixture under a nitrogen and oxygen gas atmosphere. The heat treatment was performed at 0°C for 1 hour.

[0110] Next, an opening was formed in a desired region of the insulating film. The method for forming the opening was dry etching. The Ching method was used.

[0111] Next, an oxide semiconductor film with a thickness of 100 nm is formed on the insulating film so as to cover the opening, and the acid A conductive film was formed by processing a semiconductor film into island-like structures. Furthermore, after forming the conductive film, Then, an insulating film was formed by processing an insulating film that was in contact with the underside of the conductive film.

[0112] The conductive film consists of a 10nm thick oxide semiconductor film and a 50nm thick titanium nitride film, and A copper film with a thickness of 100 nm was formed sequentially. The deposition conditions for the oxide semiconductor film were as follows: At a temperature of 170°C, oxygen gas at a flow rate of 200 sccm is introduced into the chamber of the sputtering apparatus. - Introduced into a chamber, with a pressure of 0.6 Pa, containing indium, gallium, and zinc. A 2.5kW inverter is used on an oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]). The film was formed by applying alternating current power. Furthermore, the titanium nitride film and copper film were formed using sputtering. It was formed using a 3D apparatus.

[0113] Next, plasma treatment was performed on the oxide semiconductor film, insulating film, and conductive film. The process involves using a PECVD apparatus, setting the substrate temperature to 220°C, and using argon gas and nitrogen gas. The procedure was carried out under a mixed gas atmosphere with S.

[0114] Next, an oxide semiconductor film, an insulating film, and an insulating film were formed on the conductive film. The insulating film was thick A silicon nitride film with a thickness of 100 nm and a silicon oxide nitride film with a thickness of 300 nm are subjected to PECVD. It was formed by lamination using a device.

[0115] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. Ta.

[0116] Next, a conductive film is formed to fill the opening, and the conductive film is processed into an island shape. A conductive film was formed to serve as the source electrode and drain electrode. The conductive film had a thickness of 10 nm. A titanium film and a copper film with a thickness of 100 nm are formed using a sputtering apparatus. did.

[0117] Next, an insulating film and an insulating film were formed on the conductive film. As the insulating film, a film with a thickness of 1.5 μm was used. A acrylic-based photosensitive resin was used.

[0118] Samples A1 to A3 were prepared in the manner described above.

[0119] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistors of the prepared samples A1 to A3 were measured. Furthermore, the measurement conditions for the transistor's Id-Vg characteristics are as follows: functioning as the first gate electrode. The voltage applied to the conductive film (hereinafter also called the gate voltage (Vg)), and the second gate voltage The voltage applied to the conductive film that functions as a electrode (also called Vbg) is set from -10V to +10V. The voltage was applied in steps of 0.25V up to that point. Additionally, the voltage was applied to the conductive film that functions as the source electrode. The voltage (hereinafter also called the source voltage (Vs)) is set to 0V (comm), and the drain electrode and The voltage applied to the conductive film that functions as such (hereinafter also called the drain voltage (Vd)) is set to 0.1 The voltages were set to V and 20V.

[0120] Figures 8(A),(B), and(C) show the Id-Vg characteristic results for samples A1, A2, and A3. Each is shown below. Note that in Figures 8(A), (B), and (C), the first vertical axis represents Id(A), and the second vertical axis represents Id(A). The vertical axis represents the field effect mobility (μFE (cm)). 2 The horizontal axis represents Vg(V), and the horizontal axis represents Vg(V). The field-effect mobility (Vd) is the value obtained when Vd was measured at 20V.

[0121] As shown in Figures 8(A), (B), and (C), by changing the deposition conditions of the oxide semiconductor film, Different trends are observed in the Id-Vg characteristics of the transistors. In particular, the field effect transfer of the transistors Differences can be observed in the shape of the mobility curves for each movement.

[0122] From the shape of the mobility curves of samples A1 to A3 shown in Figures 8(A), (B), and (C), the transition Minimum, maximum, and difference between the maximum and minimum values ​​of the field effect mobility in the saturation region of Sta. The results were calculated. Note that, in this case, the saturation region of the transistor is defined as Vg being 3V or less. The voltage range was set to 10V or less. This range is commonly used in applications such as displays. This becomes the gate voltage.

[0123] In sample A1, the minimum field-effect mobility in the transistor's saturation region was 9.8. cm 2 The value is / Vs, and the maximum value is 28.3 cm. 2 / Vs was the value of sample A1. The minimum and maximum values ​​of the field-effect mobility in the saturation region of a transistor. The difference is 18.5cm 2 It was / Vs. Also, in sample A2, the transistor saturation region In this region, the minimum value of the field-effect mobility is 23.3 cm⁻¹. 2 / Vs, and the maximum value is 51.1 cm 2 / Vs. That is, the field effect in the saturation region of the transistor of sample A2. The difference between the minimum value of the field effect mobility and the maximum value of the field effect mobility is 27.8 cm. 2 It was / Vs. Furthermore, in sample A3, the minimum value of the field-effect mobility in the saturation region of the transistor is 55.8cm 2 The value is / Vs, and the maximum value is 67.0 cm. 2 The value was / Vs. That is, the sample The minimum field-effect mobility in the saturation region of transistor A3, and the field-effect mobility The difference from the maximum value is 11.2 cm. 2 It was / Vs.

[0124] In other words, sample A1 has a minimum field-effect mobility in the saturation region of the transistor, It is approximately 65.3% lower than the maximum value of the field-effect mobility. Also, sample A2 is a transistor The minimum value of the field effect mobility in the saturation region is approximately 5 times the maximum value of the field effect mobility. It is 4.4% lower. Also, sample A3 has the highest field-effect mobility in the saturation region of the transistor. The smallest value is approximately 16.7% lower than the maximum value of the field effect mobility. Thus, the present invention Sample A3, on which a transistor of the specified form is formed, exhibits the field effect in the transistor's saturation region. The minimum value of the mobility is preferably 30% or less, and more preferably less, than the maximum value of the field effect mobility. Or it possesses characteristics of 20% or less.

[0125] Thus, sample A3, on which a transistor according to one aspect of the present invention is formed, has a transistor saturation The difference between the minimum and maximum field effect mobility in the sum region is 15 cm. 2 It exhibits extremely low characteristics, within / Vs. Furthermore, sample A3 has a low Vg (for example, Vg is 0V). It has high field-effect mobility in the region (above 5V and within 5V). By using transistors in the pixels of, for example, an organic EL display, high power consumption can be achieved. It can provide both flow-driven capability and high reliability.

[0126] <1-3. Pixel circuits of display devices> An example of applying the semiconductor device 100A shown in Figures 4(A) and 4(B) to the pixel circuit of a display device. This will be explained using Figure 9.

[0127] Figure 9 shows an example of when the semiconductor device 100A is applied to the pixel circuit of a display device. This is a route map.

[0128] The semiconductor device 100A shown in Figure 9 includes transistor Tr1, transistor Tr2, and a capacitor. It has an element Cs1 and a light-emitting element 160. In Figure 9, the semiconductor device 100 This example illustrates a configuration where two A's are adjacent in the column direction. The semiconductor device 100A is a pixel (or sub-pixel). It functions as one of the elements (also called an element). Furthermore, the capacitive element Cs1 is shown in Figure 4. Although not shown, for example, the capacitance between conductive film 120 and conductive film 122a, or conductivity It can be formed using the capacitance between film 112b and conductive film 122a. Transistor Tr1 is also called the selection transistor. Transistor Tr2 is called the drive transistor. Also, transistor Tr2 operates primarily in the saturation region.

[0129] Furthermore, in the circuit diagram shown in Figure 9, the data line DL_ is used to write data signals to the pixels. Y-1, the data line DL_Y which writes a data signal to the adjacent pixel, and the light-emitting element Anode line ANODE_X-1 that supplies potential, and an anode line that supplies potential to adjacent light-emitting elements. The node line ANODE_X and the scan line GL_X that supplies the scan signal to the pixel are shown. ru.

[0130] One of the source and drain electrodes of transistor Tr1 is connected to the data line DL_Y-1. They are electrically connected. Furthermore, the first gate electrode and the second gate electrode of transistor Tr1 The pole is electrically connected to the scan line GL_X. Transistor Tr1 is the data of the data signal. It has a function to control the writing of data.

[0131] One of the pair of electrodes of the capacitive element Cs1 is connected to the source electrode and drain electrode of the transistor Tr1. It is electrically connected to the other electrode of the pole. Also, the other electrode of the pair of electrodes of the capacitive element Cs1 is a transient It is electrically connected to the second gate electrode (also called the back gate electrode) of Tr2. The quantitative element Cs1 functions as a retention capacitor that holds the written data.

[0132] One of the source and drain electrodes of transistor Tr2 is connected to the anode line ANODE_X It is electrically connected to -1.

[0133] One of the pair of electrodes of the light-emitting element 160 is connected to the source electrode and drain electrode of the transistor Tr2. It is electrically connected to the other pole, and the other pole is electrically connected to the cathode wire (CATHODE). Furthermore, one of the pair of electrodes of the light-emitting element 160 is connected to the other of the pair of electrodes of the capacitive element Cs1. It is electrically connected.

[0134] The above configuration applies to the pixels of a display device, as shown in Figures 4(A) and 4(B). This is an example of a combination.

[0135] <1-4. Semiconductor device configuration> Let us once again explain the semiconductor device 100A shown in Figures 4(A) and 4(B). When semiconductor device 100A is applied to the pixels of a display device, for example, the transistor channel Channel length (L) and channel width (W), or the line width of the wiring and electrodes connected to the transistor. These can be made relatively large. For example, transistor Tr1 and transistor Tr Compared to the case where 2 and are placed on the same plane, as shown in Figures 4(A) and 4(B), the transition By overlapping at least a portion of transistor Tr1 and transistor Tr2, the line width, etc. Because this can be increased, it becomes possible to reduce variations in processed dimensions.

[0136] Furthermore, in transistor Tr1 and transistor Tr2, either the conductive film or the insulating film is used. Since one or both methods can be used in common, the number of masks or the number of processes can be reduced. This is possible.

[0137] For example, in transistor Tr1, the conductive film 120 functions as a gate electrode, and the conductive film 112a functions as the source electrode, and the conductive film 112b functions as the drain electrode. Furthermore, in transistor Tr1, the insulating film 110 functions as a gate insulating film. In transistor Tr2, the conductive film 112b functions as the first gate electrode, and the conductive film 122a functions as the source electrode, and the conductive film 122b functions as the drain electrode. The film 130 functions as a second gate electrode. Also, in transistor Tr2, insulation Film 118 functions as the first gate insulating film, and insulating films 124 and 126 function as the second gate insulating film. It functions as a membrane.

[0138] In this specification, etc., insulating film 110 is referred to as the first insulating film, and insulating film 118 as the second insulating film. The film and the insulating films 124 and 126 are sometimes referred to as the third insulating film, respectively.

[0139] Furthermore, an insulating film 134 and an insulating film 136 on the insulating film 134 are provided on the conductive film 130. Furthermore, the insulating films 134 and 136 are provided with openings 184 that reach the conductive film 130. Furthermore, a conductive film 138 is provided on the insulating film 136. Note that the conductive film 138 is open It is connected to the conductive film 130 via the opening 184.

[0140] Furthermore, an insulating film 140, an EL layer 142, and a conductive film 144 are provided on the conductive film 138. The insulating film 140 covers a portion of the side edge of the conductive film 138, and the conductive film between adjacent pixels It has a function to prevent short circuits at 138. In addition, the EL layer 142 has a function to emit light. Furthermore, the light-emitting element 160 is composed of the conductive film 138, the EL layer 142, and the conductive film 144. The conductive film 138 functions as one electrode of the light-emitting element 160, and the conductive film 144 is It functions as the other electrode of the light-emitting element 160.

[0141] Thus, in one embodiment of the present invention, a top-gate type transistor and a bottom-gate type transistor are used. It can be used in combination with a T-type transistor.

[0142] As described above, a semiconductor device according to one aspect of the present invention has a stacked structure of multiple transistors, The footprint of the transistor is reduced. Also, in multiple transistors, the insulating film and conductive film are reduced. By using either or both of the film types in common, the number of masks or processes can be reduced. It is possible.

[0143] <1-5. Configuration of the gate electrode> Furthermore, as shown in Figures 4(A) and 4(B), transistor Tr2 has two gate electrodes. It is structured.

[0144] Here, the effect of a configuration with two gate electrodes is shown in Figures 4(A)(B) and 10. We will use this to provide an explanation.

[0145] Figure 10 corresponds to a cross-sectional view of the section between the dashed line B1 and B2 shown in Figure 4(A). Figure 10 also includes a cross-section of transistor Tr2 in the channel width (W) direction.

[0146] As shown in Figure 10, the oxide semiconductor film 128 is paired with the conductive film 112b and the conductive film 130. It is positioned to face in a certain direction and is sandwiched between two conductive films that function as gate electrodes. Conductive film 1 The lengths of 12b and the conductive film 130 in the channel width direction are, respectively, the length of the oxide semiconductor film 128. The entire oxide semiconductor film 128 is longer than the length in the channel width direction, and the insulating film 118, 124 , is covered by conductive film 112b and conductive film 130 via 126.

[0147] In other words, conductive films 112b and 130 are wider than the side edges of the oxide semiconductor film 128. It has an outer region.

[0148] By using this configuration, the oxide semiconductor film 128 contained in transistor Tr2 is The conductive film 112b and conductive film 130 can electrically surround the area. As in Tr2, the channel region is affected by the electric fields of the first and second gate electrodes. The device structure of a transistor electrically surrounding an oxide semiconductor film in which a region is formed is called Surr. This can be called an ounded channel (S-channel) structure.

[0149] Since transistor Tr2 has an S-channel structure, the first gate electrode is The functional conductive film 112b effectively induces an electric field to create a channel in the oxide semiconductor. Because it can be applied to the body membrane 128, the current driving capability of transistor Tr2 is improved. This makes it possible to obtain high on-current characteristics. Furthermore, it is possible to increase the on-current. Therefore, it becomes possible to miniaturize transistor Tr2. Also, transistor Tr2 The oxide semiconductor film 128 functions as the first gate electrode, and the conductive film 112b and second gate Because it has a structure surrounded by a conductive film 130 that functions as a contact electrode, it has mechanical strength It can be improved.

[0150] Note that the transistor Tr2 shown in Figure 4(B) is a conductive film that functions as a second gate electrode. 130 is a conductive film 12 that functions as the source or drain electrode of transistor Tr2. The configuration has, but is not limited to, an electrical connection with 2a. For example, the first ge The terminal electrode and the second gate electrode may be connected. In this case, the insulating film 11 By providing openings at 8, 124, and 126, the conductive film 1 functions as a second gate electrode. 30 is electrically in contact with the conductive film 112b which functions as the first gate electrode in the opening. This process continues. Therefore, the same potential is applied to the conductive film 112b and the conductive film 130.

[0151] Although not shown in Figure 10, the capacitive element Cs1 is, for example, a conductive film. The capacitance between the film formed simultaneously with 112b and the film formed simultaneously with the conductive film 122a is It can be formed using this. On the other hand, the parasitic capacitance of transistor Tr2 is the conductive film 112b The relationship between the oxide semiconductor film 128 and the conductive film 130 and the oxide semiconductor film 128 This will be the total.

[0152] When the holding capacitance of the capacitive element Cs1 is small, the gate voltage value of transistor Tr2 is The parasitic capacitance of zista Tr2 causes significant fluctuations. This results in a widening of the display by the light-emitting element 160. Raising occurs. This is because the purpose is to reduce the placement area of ​​the transistor, so the capacitive element Cs1 If it is difficult to increase the holding capacitance, reduce the parasitic capacitance of transistor Tr2. This is effective for stabilizing the gate voltage value of transistor Tr2. As a means of this, an absolute Increasing the thickness of the border film 126 would be beneficial, but it would reduce the on-current of transistor Tr2.

[0153] Transistor Tr2 is mainly driven in the saturation region. In Figure 8, the on current in the saturation region is compared. In comparison, Figure 8(C) is the largest, followed by Figure 8(B), and then Figure 8(A) is the smallest. When trying to obtain a certain ON current in the saturation region, Figure 8(B) or Figure 8(C) has Using an oxide semiconductor film provides better insulation than using the oxide semiconductor film shown in Figure 8(A). This makes it possible to increase the thickness of film 126.

[0154] In other words, in one aspect of the present invention, the transistor Tr2 is provided with Figure 8(B) or Figure 8(C) By using an oxide semiconductor film, the holding capacitance of the capacitive element Cs1 can be reduced. This allows for a reduction in the footprint of the transistor.

[0155] <1-6. Components of Semiconductor Devices> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0156] <Circuit board> There are no major restrictions on the material of the substrate 102, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, saffron A wire substrate or the like may be used as the substrate 102. Alternatively, silicon or silicon carbide may be used as the material. Single-crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor groups such as silicon germanium It is also possible to use boards, SOI substrates, etc., and semiconductor elements are provided on these substrates. The resulting material may be used as substrate 102. In that case, 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2200 mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800 By using large-area substrates such as the 10th generation (2950mm x 3400mm), A type of display device can be manufactured.

[0157] Furthermore, a flexible substrate is used as the substrate 102, and the semiconductor device 100A is directly mounted on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the semiconductor device 100A. The delamination layer is separated from the substrate 102 after the semiconductor device has been partially or completely completed on it. It can be separated and transferred to another substrate. In this case, the semiconductor device 100A is heat resistant. It can be transferred to substrates with inferior properties or flexible substrates.

[0158] <Conductive film> Conductive film 112a, conductive film 112b, conductive film 120, conductive film 122a, conductive film 122b, conductive film The conductive films 130, 138, and 144 are chromium (Cr), copper (Cu), Aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), Tantalum (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Nickel Metal elements selected from (Ni), iron (Fe), and cobalt (Co), or the above-mentioned metal elements These are formed using alloys composed of the elemental material, or alloys combining the aforementioned metallic elements. It is possible.

[0159] Also, conductive film 112a, conductive film 112b, conductive film 120, conductive film 122a, conductive film 122 b. Conductive film 130, conductive film 138, and conductive film 144 contain an acid having indium and tin. Oxides containing tungsten and indium, tungsten, indium and zinc Oxides having titanium and indium, oxides having titanium, indium and tin Oxides containing indium and zinc, oxides containing silicon, indium and tin Applying oxide conductors such as oxides, oxides containing indium, gallium, and zinc. It's also possible.

[0160] In particular, the above-mentioned oxide conductors can be suitably used for the conductive film 120 and the conductive film 130. Here, we will explain oxide conductors. In this specification, etc., oxide conductors are referred to as It may also be called OC (Oxide Conductor). Examples of oxide conductors include For example, when an oxygen vacancy is formed in an oxide semiconductor and hydrogen is added to the oxygen vacancy, near the conduction band... A donor level is formed. As a result, the oxide semiconductor becomes highly conductive and turns into a conductor. Oxide semiconductors that have been made conductive can be called oxide conductors. Generally, oxide semiconductors The body has a large energy gap, making it transparent to visible light. On the other hand, oxides Conductors are oxide semiconductors that have donor levels near the conduction band. The electrochemical material shows little influence from absorption due to donor levels, and its absorption to visible light is similar to that of oxide semiconductors. It is translucent.

[0161] Also, conductive film 112a, conductive film 112b, conductive film 122a, conductive film 122b, conductive film 13 0, conductive film 138, and conductive film 144 contain Cu-X alloy films (where X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti may be used. A Cu-X alloy film is used. Therefore, since it can be processed using a wet etching process, it is possible to reduce manufacturing costs. Yes.

[0162] In particular, conductive film 112a, conductive film 112b, conductive film 122a, conductive film 122b, and conductive film One or more of the 130s can preferably be made into the Cu-X alloy film described above. A Cu-Mn alloy film is particularly preferred as the Cu-X alloy film.

[0163] Also, conductive film 112a, conductive film 112b, conductive film 120, conductive film 122a, conductive film 122 b and one or more of the conductive film 130 contain, among the above-mentioned metal elements, particularly A Selected from aluminum, copper, titanium, tungsten, tantalum, and molybdenum. It is preferable to have one or more deviations.

[0164] Also, conductive film 112a, conductive film 112b, conductive film 120, conductive film 122a, conductive film 122 b, and one or more of the conductive film 130 contain nitrogen and tantalum, a so-called nitride It is preferable to use a tantalum film. The tantalum nitride film is conductive and also contains copper or It has high barrier properties against hydrogen. Furthermore, the tantalum nitride film also has water barrier properties against itself. Because there is little emission of elemental particles, the metal film in contact with the oxide semiconductor film 108, or the oxide semiconductor film 1 It can be most preferably used as a metal film in the vicinity of O8.

[0165] <Insulated film> Insulating film 106, insulating film 114, insulating film 116, insulating film 118, insulating film 124, insulating film 12 6. The insulating films 134, 136, and 140 are silicon oxide film, nitrogen oxide film, etc. Silicon oxide film, silicon nitride film, silicon nitride film, aluminum oxide film, hafni oxide yttrium film, zirconium oxide film, gallium oxide film, tantalum oxide film, One or more magnesium oxide films, lanthanum oxide films, cerium oxide films, and neodymium oxide films. Each of the insulating layers can be used.

[0166] Furthermore, the insulating film 106 functions as a blocking film that suppresses oxygen permeation. For example, insulating film 114, insulating film 116, oxide semiconductor film 108, oxide semiconductor film 128, When one or more of the edge film 124 and the insulating film 126 have an excess oxygen region In this configuration, the insulating film 106 can suppress the permeation of oxygen.

[0167] Furthermore, the oxide semiconductor film 108 and the oxide semiconductor film 128 are in contact with either one or both of them. The insulating film is preferably an oxide insulating film, and the acid is present in excess of the stoichiometric composition. It is more preferable to have a region containing an element (excess oxygen region). In other words, excess oxygen An oxide insulating film having a region is an insulating film capable of releasing oxygen.

[0168] Furthermore, as an oxide insulating film having the above-mentioned excess oxygen region, for example, under an oxygen atmosphere... Forming a border film, heat-treating the insulating film after deposition in an oxygen atmosphere, or the insulating film after deposition It can be formed by adding oxygen to it. One method is to add oxygen to the insulating film after film formation. Therefore, plasma treatment is preferred.

[0169] Furthermore, the insulating film functions as the gate insulating film for transistors Tr1 and Tr2. Hafnium oxide may be used for this purpose. When using Um, the following effects are produced.

[0170] Hafnium oxide has a higher dielectric constant compared to silicon oxide and silicon oxide nitride. Therefore Therefore, compared to the case using silicon oxide, the thickness of the insulating film can be increased, thus tunnel electricity This can reduce leakage current due to current. In other words, transistors with low off-current Furthermore, hafnium oxide having a crystalline structure can achieve an amorphous structure. It has a higher relative permittivity compared to hafnium oxide. Therefore, it has a small off-current. To use a lunger, it is preferable to use hafnium oxide having a crystalline structure. Examples of crystal structures include monoclinic and cubic systems. However, in one embodiment of the present invention... This is not limited to these.

[0171] Furthermore, the insulating film functions as the gate insulating film for transistors Tr1 and Tr2. Silicon nitride may be used for this purpose. Silicon nitride as the insulating film that functions as a gate insulating film. When used, the following effects are achieved. Silicon nitride has a relative permittivity compared to silicon oxide. Because the capacitance is high and the thickness required to obtain capacitance equivalent to silicon oxide is large, the insulating film thickness is increased. It can be formed into a film. Therefore, the dielectric breakdown voltage of transistors Tr1 and Tr2 This suppresses the decrease in voltage and further improves the dielectric strength of transistors Tr1 and T This can suppress electrostatic discharge breakdown at r2.

[0172] Furthermore, insulating films 110, 116, 118, 124, and 126 are oxide semiconductor film 108 or It has the function of supplying oxygen to one or both of the oxide semiconductor films 128. Furthermore, insulating films 110, 116, 118, 124, and 126 contain oxygen. 10 and 124 are insulating films that can permeate oxygen. Note that insulating film 110 is later As a damage mitigation film for the oxide semiconductor film 108 when forming the conductive film 120 to be formed thereon It also functions, and the insulating film 124 is an oxide semiconductor when forming the insulating film 126 which will be formed later. It also functions as a damage-mitigating membrane for membrane 128.

[0173] The insulating films 110 and 124 have a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or less. Silicon oxide, silicon oxide, silicon nitride, etc., with a wavelength of 50 nm or less can be used.

[0174] Furthermore, it is preferable that the insulating films 110 and 124 have a low defect rate, and typically, ESR measurement... According to the settings, the speed of the signal appearing at g=2.001 originating from the silicon dangling bond The density is 3 × 10 17 spins / cm 3 The following is preferable. This is the insulating film 1 If the defect density in 14 and 124 is high, oxygen will bond to the defects, and insulating film 114 The amount of oxygen permeable in that area decreases.

[0175] Furthermore, insulating films 110 and 124 use oxide insulating films with low energy level density due to nitrogen oxides. It can be formed by this. Furthermore, the level density caused by the nitrogen oxide is that of an oxide semiconductor. The energy at the top of the valence band of the film (Ev_os) and the energy at the bottom of the conduction band of the oxide semiconductor film It may be formed between energy (Ec_os). As the above oxide insulating film, nitrogen acid silicon oxide nitride film with low emission of nitrides, or silicon oxide nitride film with low emission of nitrogen oxides Aluminum films and the like can be used.

[0176] Furthermore, silicon oxidnitride films with low nitrogen oxide emissions can be analyzed using the temperature-dependent desorption gas analysis method (TDS). In this context, a membrane that releases more ammonia than nitrogen oxides is a typical example. The amount of munonia released is 1 × 10 18 cm -3 The above 5 x 10 19 cm -3 The following applies. The amount of ammonia released above is for when the heat treatment temperature in TDS is between 50°C and 650°C. or the total amount in the range of 50°C to 550°C. Also, the release of ammonia as described above. The amount is the total amount converted to ammonia molecules in TDS.

[0177] Nitrogen oxides (NO x (where x is greater than 0 and less than or equal to 2, preferably between 1 and 2), typically N O2 or NO forms energy levels in insulating films 110, 124, etc. These energy levels are formed by oxide semiconductors. It is located within the energy gap of the conductive films 108 and 128. Therefore, nitrogen oxides are insulated. The interface between the edge film 110 and the oxide semiconductor film 108, or the insulating film 124 and the oxide semiconductor film 1 When it diffuses into the interface of 28, the energy level traps electrons on the insulating film 110, 124 side. In some cases, this can occur. As a result, trapped electrons can be trapped in the insulating film 110 and the oxide semiconductor film 10 Because it remains near the interface of 8, or near the interface of the insulating film 124 and the oxide semiconductor film 128, This shifts the transistor's threshold voltage in the positive direction.

[0178] Furthermore, nitrogen oxides react with ammonia and oxygen during heat treatment. The nitrogen oxides contained react with the ammonia contained in the insulating film 126 during the heat treatment. Therefore, nitrogen oxides contained in the insulating film 124 are reduced. Electrons are less likely to be trapped at the interface of the oxide semiconductor film 128.

[0179] By using the above oxide insulating film as insulating films 110 and 124, the threshold of the transistor This makes it possible to reduce the value voltage shift, thereby reducing variations in the electrical characteristics of the transistor. It is possible.

[0180] Furthermore, the heat treatment in the transistor manufacturing process typically involves heating to temperatures between 300°C and 350°C. As a result of the processing, the spectral properties of the insulating films 110 and 124, as measured at an ESR of 100K or less, In Torl, the first signal is when the g value is between 2.037 and 2.039, and the g value is 2.001 The second signal is 2.003 or less, and the third signal is 1.964 or more and 1.966 or less. The following signals are observed. Note that the split width of the first signal and the second signal, Furthermore, the split width of the second and third signals is determined in the X-band ESR measurement. It is approximately 5mT. Also, the first signal is a g value between 2.037 and 2.039. A second signal is given if the g value is between 2.001 and 2.003, and the g value is between 1.964 and 1.96 The sum of the spin densities of the third signal, which is 6 or less, is 1 × 10⁻⁶. 18 spins / cm 3 Not yet It is full, and typically 1 x 10 17 spins / cm 3 The above 1 x 10 18 spins / c m 3 It is less than.

[0181] Furthermore, in ESR spectra below 100K, the g value must be between 2.037 and 2.039. The first signal, the second signal with a g value of 2.001 or more and 2.003 or less, and the g value The sum of the spin densities of the third signal, which is between 1.964 and 1.966, is nitrogen oxidation Item (NO x (where x is greater than 0 and less than or equal to 2, preferably between 1 and 2) the speed of the signal caused This corresponds to the sum of the densities of nitrogen oxides. Typical examples of nitrogen oxides include nitric oxide and nitrogen dioxide. Yes. That is, the first signal is when the g value is between 2.037 and 2.039, and the g value is between 2.001 The second signal is 2.003 or less, and the g value is between 1.964 and 1.966. The lower the sum of the spin densities of the third signal, the more nitrogen oxides contained in the oxide dielectric film are present. It can be said that the content is low.

[0182] Furthermore, the above oxide insulating film has a nitrogen concentration of 6 × 10 as measured by SIMS. 20 atom / cm 3 The following applies:

[0183] The substrate temperature is between 220°C and 350°C, and PECV using silane and nitrous oxide. By forming the above oxide insulating film using method D, a dense and hard film can be formed. It is possible.

[0184] The insulating film 114 has at least one of nitrogen or hydrogen. Examples of insulating films 114 include For example, nitride insulating films can be used. Examples of nitride insulating films include silicon nitride and nitride. It can be formed using silicon oxide, aluminum nitride, aluminum nitride oxide, etc. The hydrogen concentration contained in the insulating film 114 is 1 × 10⁻⁶. 22 atoms / cm 3 That's all. This is preferable. Also, the insulating film 114 is the source region 108s of the oxide semiconductor film 108, and It is in contact with the drain region 108d. In addition, the insulating film 114 has a region that is in contact with the conductive film 120. Therefore, the source region 108s and drain region 108d that are in contact with the insulating film 114, Furthermore, the hydrogen concentration in the conductive film 120 increases, in the source region 108s and the drain region 108d. , and the carrier density of the conductive film 120 can be increased. Note that in the source region 108s, The drain region 108d and the conductive film 120 are in contact with the insulating film 114. Therefore, there may be regions within the membrane where the hydrogen concentration is the same.

[0185] The insulating films 116, 118, and 126 contain more oxygen than satisfactorily satisfying the oxygen composition. Formed using an oxide insulating film. An acid containing more oxygen than satisfactorily satisfying the stoichiometric composition. When heated, the oxide insulating film releases some of its oxygen. If the amount of oxygen exceeds the amount required to satisfy the stoichiometric composition, In oxide insulating films containing oxygen, the amount of oxygen released in terms of oxygen atoms, as measured by TDS, is 1. 0 x 10 19 atoms / cm 3 Preferably 3.0 × 10 20 atoms / cm 3 That concludes the explanation. Note that the above oxygen release amount is calculated based on the heat treatment temperature in TDS being 50°C or higher. This refers to the total amount at temperatures below 650°C, or in the range of 50°C to 550°C. Also, the above oxygen... The amount released is the total amount converted to oxygen atoms in TDS.

[0186] The insulating films 116, 118, and 126 have a thickness of 30 nm to 500 nm, preferably. This can use silicon oxide, silicon oxide, silicon nitride, etc., with a wavelength of 50 nm to 400 nm. Cut.

[0187] Furthermore, it is preferable that the insulating films 116, 118, and 126 have a low defect rate, and typically, ESR measurement reveals a signal originating from the dangling bond of silicon, appearing at g=2.001. The spin density of the number is 1.5 × 10⁻⁶ 18 spins / cm 3 Less than, and even 1 × 10 18 sp ins / cm 3 The following is preferable:

[0188] Furthermore, since insulating films 124 and 126 can be made of the same type of insulating material, In some cases, the interface between insulating film 124 and insulating film 126 cannot be clearly identified. Therefore, In this embodiment, the interface between the insulating film 124 and the insulating film 126 is shown with a dashed line.

[0189] The insulating film 134 functions as a protective insulating film for transistors Tr1 and Tr2. It has.

[0190] The insulating film 134 contains either hydrogen or nitrogen, or both. 4 contains nitrogen and silicon. The insulating film 134 contains oxygen, hydrogen, water, alkali gold. It has the function of blocking alkaline earth metals, etc. An insulating film 134 is provided. Therefore, the diffusion of oxygen from the oxide semiconductor film 108 and the oxide semiconductor film 128 to the outside, and insulation Diffusion of oxygen contained in films 110, 116, 124, and 126 to the outside, and oxide semiconductors from the outside This prevents hydrogen, water, and other substances from entering the conductive films 108 and 128.

[0191] For example, a nitride insulating film can be used as the insulating film 134. For example, silicon nitride, silicon oxide nitride, aluminum nitride, aluminum oxide nitride, etc. There is.

[0192] <Oxide semiconductor film> The oxide semiconductor film 108 and the oxide semiconductor film 128 are made from the materials described above. It is possible.

[0193] When oxide semiconductor film 108 and oxide semiconductor film 128 are In-M-Zn oxide, In- Atomic ratio of metal elements in a sputtering target used to deposit M-Zn oxide films. It is preferable that In > M be satisfied. The metal element of such a sputtering target As atomic ratios, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In: Examples include M:Zn=4:2:4.1.

[0194] Furthermore, if the oxide semiconductor film 108 and the oxide semiconductor film 128 are In-M-Zn oxide, The raw material of the metal element in the sputtering target used to deposit In-M-Zn oxide film The number of particles may be a composition that satisfies In ≤ M. Such a metal for a sputtering target. The atomic ratios of the elements are In:M:Zn = 1:1:1 and In:M:Zn = 1:1:1.2 , In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3 Examples include: 6, etc. The raw material of the metal element of the sputtering target used for film deposition. Even if the number of atoms differs between oxide semiconductor film 108 and oxide semiconductor film 128 good.

[0195] Furthermore, the oxide semiconductor film 108 and the oxide semiconductor film 128 have an energy gap of 2 eV The above is preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor with a wide energy gap, transistor Tr1 and transistor This can reduce the off-current of Tr2.

[0196] Furthermore, the thickness of oxide semiconductor film 108 and oxide semiconductor film 128 is 3 nm or more, respectively. 00nm or less, preferably 3nm to 100nm, more preferably 3nm to 50nm It should be less than or equal to nm.

[0197] Furthermore, the hydrogen contained in oxide semiconductor film 108 and oxide semiconductor film 128 bonds with metal atoms. It reacts with oxygen to form water, and the lattice (or the part from which oxygen has been removed) also reacts with the oxygen to form water. ) forms an oxygen vacancy. When hydrogen enters this oxygen vacancy, electrons, which are carriers, are generated. In some cases, this can occur. Also, some of the hydrogen combines with the metal atom and oxygen, forming a carrier. It can generate electrons. Therefore, using an oxide semiconductor film containing hydrogen can lead to The radiator tends to exhibit normally-on characteristics. Therefore, the oxide semiconductor film 108 and the oxide It is preferable that the semiconductor film 128 has as little hydrogen as possible.

[0198] Specifically, in oxide semiconductor film 108 and oxide semiconductor film 128, SIMS analysis was performed. The hydrogen concentrations obtained are 2 × 10⁻⁶ each. 20 atoms / cm 3 The following are preferably 5 ×10 19 atoms / cm 3 More preferably 1 × 10 19 atoms / cm 3 Below Bottom, 5×10 18 atoms / cm 3 The following is preferably 1 × 10 18 atoms / cm 3 The following is more preferable: 5 x 10 17 atoms / cm 3 More preferably 1 × 10 16 atoms / cm 3 The following applies:

[0199] Furthermore, in oxide semiconductor films 108 and 128, one of the Group 14 elements is If a certain silicon or carbon is present, oxide semiconductor film 108 and oxide semiconductor film 128 In this state, oxygen vacancies increase, and it becomes n-type. Therefore, the oxide semiconductor film 108 and acid The silicon concentration obtained by SIMS analysis in the siliconized semiconductor film 128 was calculated by 2× 10 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following ru. Furthermore, SIMS analysis of oxide semiconductor film 108 and oxide semiconductor film 128 was obtained. The carbon concentrations are 2 × 10 18 atoms / cm 3 The following is preferably 2 × 10 1 7 atoms / cm 3 The following applies:

[0200] Furthermore, the oxide semiconductor film 108 and oxide semiconductor film 128 were obtained by SIMS analysis. The concentrations of alkali metals or alkaline earth metals are set to 1 × 10⁻⁶ each. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 The following applies: Alkali metals and Alkaline earth metals can generate carriers when they combine with oxide semiconductors, and The off-current of the inverter may increase. Therefore, the oxide semiconductor film 108 and It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the oxide semiconductor film 128. It seems so.

[0201] The various films mentioned above, such as conductive films and insulating films, include those produced by sputtering, plasma cutting, and other methods. Plasma Enhanced Chemical Vapor Deposition (PECVD) Vapor Deposition) method, thermal CVD (Chemical Vapor Deposition) method, thermal CVD (Chemical Vapor Deposition) method, It can be formed by the Deposition method. Furthermore, as a thermal CVD method, MO CVD(Metal Organic Chemical Vapor Deposit) ion method, or ALD (Atomic Layer Deposition) method, etc. These are some examples.

[0202] Thermal CVD is a film deposition method that does not use plasma, so defects are generated by plasma damage. It has the advantage of not being affected.

[0203] In the thermal CVD method, the raw material gas and oxidizer are introduced into a chamber, and the chamber is subjected to atmospheric pressure or The film is formed by reacting the substrate near or on the substrate under reduced pressure and depositing the film onto the substrate. That's good too.

[0204] Furthermore, the ALD method uses atmospheric pressure or reduced pressure inside the chamber and a raw material gas for the reaction. Then, film deposition may be performed.

[0205] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and Liquids containing hafnium precursor compounds (such as hafnium alkoxide or tetrakisdimethylamine) A raw material gas obtained by vaporizing midhafnium (TDMAH, etc., a hafnium amide), and oxidation Two types of gases, ozone (O3), are used as agents. The chemical formula for nium is Hf[N(CH3)2]4. Other material liquids include tetra Examples include kiss(ethylmethylamide)hafnium.

[0206] For example, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, the solvent And a liquid containing an aluminum precursor compound (such as trimethylaluminum (TMA)) Two types of gases are used: a converted raw material gas and H2O as an oxidizing agent. The chemical formula for luminium is Al(CH3)3. Other materials include Tris(Di Methylamide) Aluminum, Triisobutylaluminum, Aluminum Tris(2, Examples include 2,6,6-tetramethyl-3,5-heptanedione).

[0207] For example, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexa Rolodisilane is adsorbed onto the film-forming surface, and chlorine contained in the adsorbed material is removed, causing an oxidizing gas (O2) A radical (nitrous oxide) is supplied and reacted with the adsorbed material.

[0208] For example, when depositing a tungsten film using a film deposition apparatus that utilizes ALD, WF6 gas An initial tungsten film is formed using s and B2H6 gas, and then WF6 gas and H2 gas are used. A tungsten film is formed using a gas. Note that SiH4 gas is used instead of B2H6 gas. It's okay to be there.

[0209] <1-7. Semiconductor device configuration example 2> Next, a modified example of the semiconductor device 100A shown in Figures 4(A) and 4(B) will be explained using Figure 11. I will reveal it.

[0210] Figure 11 is a cross-sectional view of a modified example of the semiconductor device 100A shown in Figure 4(B).

[0211] Figure 11 shows the second gate electrode of transistor Tr2 in semiconductor device 100A. This configuration does not include a conductive film 130 or an insulating film 134 on the conductive film 130. In Figure 11, the openings 182 provided in the insulating film 124 and insulating film 126, and the insulating film 13 4 and instead of the opening 184 provided in the insulating film 136, insulating film 12 6, and an opening 183 is provided in the insulating film 136. In this way, the opening is 1 This approach is preferable because it reduces the number of manufacturing steps.

[0212] <1-8. Semiconductor device configuration example 3> Next, regarding a modified example of the semiconductor device 100A shown in Figures 4(A) and 4(B), see Figures 12(A) and 12(B) This will be explained using Figures 13(A) and 13(B).

[0213] This section describes the stacked structure of oxide semiconductor films.

[0214] Figures 12(A) and (B) show the channel length of transistor Tr2 in semiconductor device 100A. This is a cross-sectional view in the L direction.

[0215] Figure 12(A) shows that the oxide semiconductor film 128 of transistor Tr2 is an oxide semiconductor film 128a, an oxide semiconductor film 128b on the oxide semiconductor film 128a, and an oxide semiconductor film 1 The configuration includes an oxide semiconductor film 128c on 28b. That is, an oxide semiconductor film 1 28 has a three-layer laminated structure.

[0216] Figure 12(B) shows that the oxide semiconductor film 128 of transistor Tr2 is an oxide semiconductor film The configuration includes 128b and an oxide semiconductor film 128c on the oxide semiconductor film 128b. In other words, the oxide semiconductor film 128 has a two-layer stacked structure.

[0217] Even in a stacked structure of three layers of oxide semiconductor film 128, In terms of structure, the oxide semiconductor film 128b was used in the transistor configuration shown in Figure 7 for sample A. The film is deposited under the same deposition conditions as when the oxide semiconductor film 3 was fabricated. Such a stacked structure In the transistor, the field effect in the saturation region is measured by the Id-Vg measurement of the transistor. The difference between the minimum and maximum values ​​of fruit mobility is when the oxide semiconductor film 128b was used to prepare sample A1. The minimum and maximum values ​​of the field-effect mobility when a film is deposited under the same deposition conditions as for an oxide semiconductor film. The difference will be smaller than the difference between the two.

[0218] An example of the band structure of the oxide semiconductor film 128 and the insulating film in contact with the oxide semiconductor film 128 is shown below. This is shown in Figures 13(A) and 13(B). Figure 13(A) shows insulating film 118, oxide semiconductor film 128a, An example of a band structure in the film thickness direction of a laminated structure having 128b, 128c, and insulating film 124. Furthermore, Figure 13(B) shows the insulating film 118, oxide semiconductor films 128b, 128c, and This is an example of a band structure in the film thickness direction of a laminated structure having an insulating film 124. The structure is designed to facilitate understanding by using insulating film 118 and oxide semiconductor films 128a, 128b, and 128 c and the energy level (Ec) at the lower end of the conduction band of insulating film 124 are shown.

[0219] Furthermore, Figure 13(A) shows a silicon oxide film used as insulating film 118 and insulating film 124. For the oxide semiconductor film 128a, the atomic ratio of metal elements is In:Ga:Zn=1:3:2, which is gold. Using an oxide semiconductor film formed with a group oxide target, oxide semiconductor film 128b The atomic ratio of the metal elements is In:Ga:Zn = 4:2:4.1 for the metal oxide target. Using an oxide semiconductor film formed using the above method, the original metal element is used as the oxide semiconductor film 128c. The oxidation formed using a metal oxide target with a particle ratio of In:Ga:Zn=1:3:2 This is a band diagram of a configuration using a monocrystalline semiconductor film.

[0220] Furthermore, Figure 13(B) shows a silicon oxide film used as insulating film 118 and insulating film 124. For oxide semiconductor film 128b, the atomic ratio of metal elements is In:Ga:Zn = 4:2:4.1 Using an oxide semiconductor film formed with a metal oxide target, the oxide semiconductor film 12 As 8c, the atomic ratio of metal elements is In:Ga:Zn = 1:3:2 for a metal oxide target. This is a band diagram of a configuration using a metal oxide film formed using [a specific method / tool].

[0221] As shown in Figures 13(A) and (B), oxide semiconductor films 128a, 128b, and 128c Therefore, the energy levels at the lower end of the conduction band change smoothly. In other words, they change continuously. This can also be described as a continuous junction. In order to have such a band structure, oxides The interface between the semiconductor film 128a and the oxide semiconductor film 128b, or the interface between the oxide semiconductor film 128b and At the interface with the oxide semiconductor film 128c, defect levels such as trap centers and recombination centers Assume that no impurities that would form such a compound are present.

[0222] To form a continuous junction on oxide semiconductor films 128a, 128b, and 128c, a rodor Each film is deposited using a multi-chamber type film deposition apparatus (sputtering apparatus) equipped with a chuck chamber. It is necessary to continuously layer the materials without exposing them to the atmosphere.

[0223] By using the configuration shown in Figures 13(A) and (B), the oxide semiconductor film 128b forms a well. In a transistor using the above stacked structure, the channel region is an oxide semiconductor film 12 It can be seen that it is formed in 8b.

[0224] Furthermore, by providing oxide semiconductor films 128a and 128c, the trap levels are set by the oxide semiconductor films. It can be kept away from the conductive film 128b.

[0225] Furthermore, the lower end of the conduction band of the oxide semiconductor film 128b where the trap level functions as a channel region. The energy level (Ec) can be farther from the vacuum level, and electrons can be trapped in the trap level. It becomes easier for electrons to accumulate. Electrons accumulate in the trap level, leading to a negative fixed charge. This creates a load, causing the transistor's threshold voltage to shift in the positive direction. Therefore, The trap level is lower than the energy level (Ec) of the lower end of the conduction band of the oxide semiconductor film 128b. It is preferable to configure it so that it is close to the level. In this way, electricity is drawn to the trap level. This makes it less likely for the child to accumulate, and it is possible to increase the on-current of the transistor, This can increase the field effect mobility.

[0226] Furthermore, oxide semiconductor films 128a and 128c have a lower conduction band than oxide semiconductor film 128b. The energy level is close to the vacuum level, and typically, this is the lower end of the conduction band of oxide semiconductor film 128b. The energy levels of and the energy levels of the lower end of the conduction band of the oxide semiconductor films 128a and 128c The difference between the two is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV or less. Below. That is, the electron affinity of the oxide semiconductor films 128a and 128c, and the oxide semiconductor The difference with the electron affinity of film 128b is 0.15 eV or greater, or 0.5 eV or greater, and 2e It is less than or equal to V, or less than or equal to 1 eV.

[0227] With this configuration, the oxide semiconductor film 128b becomes the main path for the current, It functions as a channel region. In addition, the oxide semiconductor films 128a and 128c have channel regions. The oxide semiconductor film 128b that is formed is composed of one or more metal elements. Since it is a semiconductor film, the interface between the oxide semiconductor film 128a and the oxide semiconductor film 128b, At the interface between the oxide semiconductor film 128b and the oxide semiconductor film 128c, interfacial scattering occurs. It is difficult to do so. Therefore, the movement of carriers is not hindered at the interface, so transistor The field effect mobility increases.

[0228] Furthermore, the oxide semiconductor films 128a and 128c function as part of the channel region. To prevent this, use a material with sufficiently low conductivity. Alternatively, use an oxide semiconductor film 128a, 1 At 28c, electron affinity (the difference between the vacuum level and the energy level at the bottom of the conduction band) is present in oxide semiconductors. It is smaller than the body film 128b, and the energy level at the lower end of the conduction band is smaller than that of the oxide semiconductor film 128b. A material with a difference (band offset) from the lower energy level of the guide is used. In order to suppress the occurrence of threshold voltage differences that depend on the magnitude of the input voltage, The energy levels at the lower end of the conduction band of semiconductor films 128a and 128c are the same as those of oxide semiconductor film 128b. It is preferable to use a material whose energy level is closer to the vacuum level than the energy level of the lower end of the conduction band. The energy levels at the lower end of the conduction band of the oxide semiconductor film 128b and the oxide semiconductor film 128a, The difference from the energy level at the lower end of the conduction band at 128c is 0.2eV or more, preferably 0.5eV. It is preferable to set it to V or higher.

[0229] The thickness of oxide semiconductor films 128a and 128c depends on the constituent elements of conductive films 122a and 122b. A film thickness greater than or equal to that which can suppress diffusion into the ionized semiconductor film 128b, and an insulating film The film thickness should be less than the thickness required to suppress the supply of oxygen from 124 to the oxide semiconductor film 128b. For example, If the thickness of the oxide semiconductor films 128a and 128c is 10 nm or more, the conductive film 122a, 1 This can suppress the diffusion of constituent elements of 22b into the oxide semiconductor film 128b. If the thickness of the oxide semiconductor films 128a and 128c is 100 nm or less, then insulating film 124 or This allows for an effective supply of oxygen to the oxide semiconductor film 128b.

[0230] The oxide semiconductor films 128a and 128c are In-M-Zn oxide (where M is Al, Ga, Y, and When is Sn, having M in a higher atomic ratio than In, the oxide semiconductor film 128 a, the energy gap of 128c can be increased and the electron affinity can be decreased. Therefore, oxidation This makes it possible to control the difference in electron affinity with the semiconductor film 128b by the composition of M. There is a combination. Also, since M is a metallic element with a strong bonding force with oxygen, these elements are used in In Having a higher atomic ratio makes oxygen deficiency less likely to occur.

[0231] Furthermore, when the oxide semiconductor films 128a and 128c are In-M-Zn oxides, Zn and The atomic ratio of In and M excluding O is preferably such that In is 50 atomic% or less. M is higher than 50 atomic%, and more preferably In is 25 atomic% or less. The full value of M is set to be higher than 75 atomic%. Also, the oxide semiconductor films 128a and 128c Alternatively, a gallium oxide film may be used.

[0232] Furthermore, if the oxide semiconductor films 128a, 128b, and 128c are In-M-Zn oxide, Compared to oxide semiconductor film 128b, the amount of M contained in oxide semiconductor films 128a and 128c The atomic ratio is large, and typically compared to the atoms contained in oxide semiconductor film 128b. The atomic ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more higher.

[0233] Furthermore, if the oxide semiconductor films 128a, 128b, and 128c are In-M-Zn oxide, Oxide semiconductor film 128b In:M:Zn=x1:y1:z1 [atomic ratio], oxide semiconductor If the body membranes 128a and 128c are in In:M:Zn=x2:y2:z2 [atomic ratio], then y 2 / x2 is greater than y1 / x1, preferably y2 / x2 is 1.5 times greater than y1 / x1. It is more than twice as large. More preferably, y2 / x2 is more than twice as large as y1 / x1, and further Preferably, y2 / x2 is 3 times or more, or 4 times or more, than y1 / x1. In this case, In the oxide semiconductor film 128b, if y1 is greater than or equal to x1, the oxide semiconductor film 128b This is preferable because it allows for stable electrical characteristics to be imparted to the transistor used. However, y1 is x1 When it becomes more than three times, the field-effect mobility of the transistor using the oxide semiconductor film 128b is Because it would decrease, it is preferable that y1 be less than 3 times x1.

[0234] When the oxide semiconductor film 128b is In-M-Zn oxide, the oxide semiconductor film 128b is deposited. In the target used for this purpose, the atomic ratio of the metal elements is In:M:Zn=x1:y If we set the ratio to z1, 、 x1 / y1 is between 1 / 3 and 6, and moreover, it is between 1 and 6. z1 / y1 is preferably between 1 / 3 and 6, and more preferably between 1 and 6. By setting z1 / y1 to between 1 and 6, the oxide semiconductor film 128b is formed as CAAC, as described later. -OS is more easily formed. Typical examples of atomic ratios of target metal elements include In :M:Zn=4:2:4.1, In:M:Zn=1:1:1.2, In:M:Zn=3: There are ratios like 1:2.

[0235] Furthermore, when the oxide semiconductor films 128a and 128c are In-M-Zn oxide, the oxide semiconductor In the target used to deposit films 128a and 128c, the atomic ratio of metal elements If we set In:M:Zn=x2:y2:z2, then 、 x2 / y2 <x1 / y1であって、z2 / y2 is preferably between 1 / 3 and 6, and more preferably between 1 and 6. Also, In By increasing the atomic ratio of M to , the energy of the oxide semiconductor films 128a and 128c Because it is possible to increase the energy gap and decrease the electron affinity, y² / x² It is preferable to have 3 or more, or 4 or more. Representative example of the atomic ratio of target metal elements. For example, In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn =1:3:5, In:M:Zn=1:3:6, In:M:Zn=1:4:2, In:M: Examples include Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:5:5, etc. .

[0236] Note that the atomic ratios of oxide semiconductor films 128a, 128b, and 128c are each considered to have an error. This includes a variation of plus or minus 40% in the above atomic ratio.

[0237] In Figures 12(A) and 12(B), the oxide semiconductor film 128 of transistor Tr2 is two-layered. Although a three-layer stacked structure was illustrated, the oxide semiconductor film 10 of the transistor Tr1 A similar configuration may be used in case 8 as well.

[0238] Thus, the semiconductor device of the present invention may have a second gate electrode or an oxide semiconductor. The layered structure of the body membrane may be changed and applied. Also, the transistor according to this embodiment is Each of the structures described can be freely combined.

[0239] <1-9. Method for Manufacturing Semiconductor Devices> Next, a method for manufacturing a semiconductor device 100A according to one aspect of the present invention will be described using Figures 14 to 23. I will explain.

[0240] Note that Figures 14(A), 15(A), 16(A), 17(A), 18(A), and 1 Figures 9(A), 20(A), 21(A), 22(A), and 23(A) show semiconductor equipment. This is a top view illustrating the manufacturing method of Unit 100A, as shown in Figures 14(B), 15(B), and 16( B), Figure 17(B), Figure 18(B), Figure 19(B), Figure 20(B), Figure 21(B), Figure 2 Figures 2(B) and 23(B) are cross-sectional views illustrating the method for manufacturing the semiconductor device 100A. .

[0241] First, an insulating film 106 is formed on the substrate 102, and then an oxide semiconductor film is formed on the insulating film 106. Subsequently, the oxide semiconductor film is processed into an island shape to form the oxide semiconductor film 108. (See Figures 14(A) and 14(B)).

[0242] In this embodiment, a glass substrate can be used as the substrate 102.

[0243] The insulating film 106 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition (P It can be formed using appropriate methods such as LD (Luminography), printing, and coating. For insulating film 106, a silicon nitride film with a thickness of 400 nm was produced using a PECVD apparatus, A silicon oxide-nitride film with a thickness of 50 nm is formed.

[0244] Alternatively, oxygen may be added to the insulating film 106 after it has been formed. The oxygen added can be oxygen radicals, oxygen atoms, oxygen atom ions, oxygen molecular ions, etc. There are also methods of addition, such as ion doping, ion implantation, and plasma treatment. These are some examples. In addition, after forming a film that suppresses oxygen desorption on the insulating film 106, via the film Oxygen may be added to the insulating film 106.

[0245] As membranes that suppress the desorption of oxygen as described above, indium, zinc, gallium, tin, and aluminum are used. From chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten Selected metal elements, alloys containing the above-mentioned metal elements, and combinations of the above-mentioned metal elements alloys, metal nitrides having the above-mentioned metal elements, metal oxides having the above-mentioned metal elements, Formed using conductive materials such as metal nitrides containing the aforementioned metal elements. It is possible.

[0246] Furthermore, when adding oxygen during plasma processing, the oxygen is excited with microwaves, resulting in high-density oxygen. By generating plasma, the amount of oxygen added to the insulating film 106 can be increased.

[0247] The oxide semiconductor film 108 can be produced using sputtering, coating, pulsed laser deposition, etc. It can be formed by methods such as laser ablation and thermal CVD. For processing the body membrane 108, a mask was formed on the oxide semiconductor film by a lithography process. Subsequently, a portion of the oxide semiconductor film can be formed by etching using the mask. Alternatively, the element-separated oxide semiconductor film 108 may be directly formed using a printing method.

[0248] When forming an oxide semiconductor film by sputtering, the power supply required to generate the plasma... The power supply can be an RF power supply, AC power supply, DC power supply, etc., as appropriate. When forming oxide semiconductor films, the sputtering gas used is a noble gas (typically argon). Oxygen, noble gases, and mixed gases of oxygen are used as appropriate. It is preferable to increase the gas ratio of oxygen to the noble gas.

[0249] In this embodiment, a sputtering apparatus is used to produce the oxide semiconductor film 108. i, as a sputtering target, In-Ga-Zn metal oxide (In:Ga:Zn= Using a 4:2:4.1 (atomic ratio), an oxide semiconductor film with a thickness of 40 nm is deposited. At that time, the substrate was heated to 170°C, and argon gas was injected at a flow rate of 140 sccm and 60 sccm. Oxygen gas is introduced into the deposition chamber of the sputtering apparatus.

[0250] Furthermore, after forming the oxide semiconductor film 108, a heat treatment is performed to remove the oxide semiconductor film 108. Hydrogenation or dehydration may be performed. The heat treatment temperature is typically 150°C or higher, under substrate strain. The temperature is below 1 / 25, or between 250°C and 450°C, or between 300°C and 450°C.

[0251] Heat treatment is performed using noble gases such as helium, neon, argon, xenon, krypton, or nitrogen. This can be carried out in an inert gas atmosphere containing an element. Alternatively, after heating in an inert gas atmosphere... Heating may be performed in an oxygen atmosphere. Furthermore, hydrogen, water, etc. may be added to the above inert atmosphere and oxygen atmosphere. It is preferable that it does not contain [specific element]. The processing time should be between 3 minutes and 24 hours.

[0252] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate, but only for a short period of time. Processing time can be reduced.

[0253] A heat treatment is performed after the oxide semiconductor film has been formed, or after the oxide semiconductor film has been formed, or while heating the film is being heated. By performing this procedure, the hydrogen concentration obtained by secondary ion mass spectrometry in oxide semiconductor films can be determined. 5 x 10 19 atoms / cm 3 The following, or 1 × 10 19 atoms / cm 3 below, 5 x 10 18 atoms / cm3 The following, or 1 × 10 18 atoms / cm 3 The following, taha 5×10 17 atoms / cm 3 The following, or 1 × 10 16 atoms / cm 3 below It can be done this way.

[0254] Next, insulating films and conductive films are formed on the insulating film 106 and oxide semiconductor film 108 in an island-like manner. The insulating film 110 and the conductive film 120 are formed by processing (see Figures 15(A) and (B)).

[0255] As the insulating film 110, a silicon oxide film or a silicon oxide nitride film is used by the PECVD method. It can be formed by this. In this case, the raw material gas is a silicon-containing sedimentary gas and It is preferable to use an oxidizing gas. Typical examples of silicon-containing sedimenting gases include silicon. Examples include ores, disilanes, trisilanes, and silane fluorides. Oxidizing gases include oxygen and ozoite. Examples include nitrous oxide, dinitrogen dioxide, and other similar substances.

[0256] Furthermore, as the insulating film 110, the flow rate of the oxidizing gas is greater than 20 times the flow rate of the sedimenting gas. The pressure should be less than 100 times, or between 40 and 80 times, and the pressure inside the processing chamber should be less than 100 Pa. Alternatively, by using the PECVD method with a pressure of 50 Pa or less, silica oxidnitridation with fewer defects can be produced. It can form a cone film.

[0257] Furthermore, the insulating film 110 is a substrate placed in the vacuum-evacuated processing chamber of a PECVD apparatus. Maintain the temperature between 280°C and 400°C, introduce the raw material gas into the processing chamber, and pressurize the pressure inside the processing chamber. The force is 20 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 250 Pa or less. Depending on the conditions under which high-frequency power is supplied to the electrodes provided in the processing chamber, the insulating film 110 is, A dense silicon oxide film or silicon oxide nitride film can be formed.

[0258] Alternatively, the insulating film 110 may be formed using a microwave-based plasma CVD method. Microwaves refer to the frequency range from 300 MHz to 300 GHz. In microwaves, The electron temperature is low and the electron energy is low. Also, the electron acceleration is affected by the supplied power. It is used in small proportions and can be used for the dissociation and ionization of a larger number of molecules. This allows for the excitation of a high-density plasma. To form an insulating film 110 with minimal plasma damage to the surface and deposits, and with few defects. It is possible.

[0259] Furthermore, the insulating film 110 can be formed using a CVD method with organic silane gas. Examples of organic silane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetramethyl silate. Tramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Xan (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexame Tildisilazan (HMDS), Triethoxysilane (SiH(OC2H5)3), Tris Using silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) This is possible. By using a CVD method with organic silane gas, a highly insulating film with high coverage can be produced. It is possible to form 110.

[0260] In this embodiment, the insulating film 110 is made of nitrogen oxide with a thickness of 150 nm using a PECVD apparatus. A silicon dioxide film is formed.

[0261] Furthermore, it is preferable that the conductive film 120 be formed from an oxide conductor (OC). Conductive film type 120 During the formation process, oxygen is added from the conductive film 120 into the insulating film 110.

[0262] The conductive film 120 is formed using a sputtering method, and an atmosphere containing oxygen gas is used during formation. It is preferable to form it in an atmosphere. The conductive film 120 is formed in an atmosphere containing oxygen gas during formation. This allows for the appropriate addition of oxygen to the insulating film 110.

[0263] Furthermore, the conductive film 120 is made of the same material as the oxide semiconductor film 108 described above. It is possible.

[0264] In this embodiment, the conductive film 120 is produced using a sputtering apparatus. As a target for the ing process, In-Ga-Zn metal oxide (In:Ga:Zn=5:1:7 [original A conductive film with a thickness of 20 nm is deposited using the [number of particles] ratio.

[0265] In this embodiment, the processing of the conductive film 120 and the insulating film 110 is performed by dry etching. This will be done using the Ching method.

[0266] Furthermore, when processing the conductive film 120 and the insulating film 110, the conductive film 120 does not overlap in the region. The thickness of the oxide semiconductor film 108 may become thinner.

[0267] Next, impurity elements are added to the insulating film 106, the oxide semiconductor film 108, and the conductive film 120. Perform the addition.

[0268] Methods for adding impurity elements include ion doping, ion implantation, and plasma treatment. In the case of plasma treatment, plasma is generated in a gas atmosphere containing the added impurity elements. By generating the material and performing plasma treatment, impurity elements can be added. Plasma generating equipment includes dry etching equipment, ashing equipment, and plasma CVD equipment, high-density plasma CVD equipment, etc., can be used.

[0269] The raw material gases for impurity elements are B2H6, PH3, CH4, N2, NH3, and AlH 3. Use one or more of the following: AlCl3, SiH4, Si2H6, F2, HF, H2, and noble gases. It is possible to dilute B2H6, PH3, N2, NH3, AlH3 with a noble gas. One or more of AlCl3, F2, HF, and H2 can be used. Diluted with a noble gas. B2H6, PH3, N2, NH3, AlH3, AlCl3, F2, HF, and H2 By adding impurity elements to the oxide semiconductor film 108 and the conductive film 120 using the above method, One or more of the following are oxide semiconductors: gas, hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine. It can be added to the body film 108 and the conductive film 120.

[0270] Alternatively, after adding a noble gas, B2H6, PH3, CH4, N2, NH3, AlH3, A One or more of lCl3, SiH4, Si2H6, F2, HF, and H2 are used in an oxide semiconductor film 10 8 and the conductive film 120 may also be added.

[0271] Alternatively, B2H6, PH3, CH4, N2, NH3, AlH3, AlCl3, SiH4, After adding one or more of Si2H6, F2, HF, and H2, the noble gas is added to the oxide semiconductor film 10 8 and the conductive film 120 may also be added.

[0272] The addition of impurity elements can be controlled by appropriately setting injection conditions such as acceleration voltage and dose amount. . For example, when adding argon by ion implantation, the acceleration voltage is 10 kV or more and 100 kV Hereinafter, the dose amount is 1×10 13 ions / cm 2 or more and 1×10 16 ions / cm 2 or less will do. For example, 1×10 14 ions / cm 2 will do. Also, when adding phosphorus ions by ion implantation , the acceleration voltage is 30 kV, and the dose amount is 1×10 13 ions / cm 2 or more and 5×10 16 ions / cm 2 or less will do. For example, 1×10 15 i ons / cm 2 will do.

[0273] <000222​​​​​​​​​​​​​​​​​​​​​And an oxide semiconductor film 108 having a drain region 108d is formed (Figure 16(A)( See B).

[0275] In this embodiment, the insulating film 114 is made using a PECVD apparatus to a thickness of 100n. A silicon nitride film of m thickness is formed.

[0276] By using a silicon nitride film as the insulating film 114, the conductive film 12 in contact with the insulating film 114 Hydrogen and nitrogen in the silicon nitride film are present in the source region 108s and the drain region 108d. Either one or both of the conductive film 120, the source region 108s, and the drained This can increase the carrier density in region 108d.

[0277] Next, an insulating film 116 is formed on the insulating film 114.

[0278] In this embodiment, the insulating film 116 is made using a PECVD apparatus to achieve a thickness of 300n. A silicon oxidoxide-nitride film of m is formed.

[0279] Next, a mask is formed on the insulating film 116 by lithography at the desired position, and then the insulating film 1 By etching 16 and a portion of the insulating film 114, an aperture is formed that reaches the source region 108s. A section 141a and an opening 141b that reaches the drain region 108d are formed (Figure 16( See A)(B)).

[0280] Methods for etching insulating film 116 and insulating film 114 include wet etching and A dry etching method may be used as appropriate. The insulating film 116 and insulating film 114 are processed using the Lye etching method.

[0281] Next, a conductive film is formed on the insulating film 116 so as to cover the openings 141a and 141b, and desired After forming a mask at the specified location using a lithography process, a portion of the conductive film is etched. This process forms conductive films 112a and 112b (see Figures 16(A) and 16(B)).

[0282] In this embodiment, a sputtering apparatus is used to produce the conductive films 112a and 112b. a 50nm thick titanium film, a 400nm thick aluminum film, and a 100nm thick A multilayer titanium film is formed.

[0283] The processing method for the conductive films 112a and 112b is a wet etching method and / or dry etching. A dry etching method can be used as appropriate. In this embodiment, a dry etching method is used. Next, the conductive film is processed to form conductive films 112a and 112b.

[0284] By following the above steps, transistor Tr1 can be fabricated.

[0285] Furthermore, the films that make up transistor Tr1 (insulating film, oxide semiconductor film, conductive film, etc.) are spa Tarting method, chemical vapor deposition (CVD), vacuum deposition, pulsed laser deposition (PLD) It can be formed using the ALD (atomic layer deposition) method, or by coating or printing methods. It can be formed by sputtering and plasma chemical vapor deposition. The (PECVD) method is typical, but the thermal CVD method can also be used. As an example of the thermal CVD method, MO One example is CVD (chemical vapor deposition) method.

[0286] Thermal CVD is a method in which the chamber is subjected to atmospheric pressure or reduced pressure, and the raw material gas and oxidizer are simultaneously processed. The film is formed by sending the material into a chamber, reacting it near or on the substrate, and depositing it onto the substrate. Thus, since thermal CVD is a film deposition method that does not generate plasma, It has the advantage of not generating defects through damage.

[0287] Furthermore, the ALD method involves maintaining atmospheric pressure or reduced pressure inside the chamber and supplying the raw material gas for the reaction. The film is formed by introducing and reacting the material in a chamber and repeating this process. A gas (such as argon or nitrogen) can be introduced as a carrier gas. For example, two types The above raw material gases may be supplied to the chamber in order. In this case, multiple types of raw material gases may be mixed. To prevent this from happening, an inert gas is introduced after the reaction of the first raw material gas, and then the second raw material gas is introduced. Alternatively, instead of introducing an inert gas, the first source gas was removed by vacuum evacuation. Later, a second raw material gas may be introduced. The first raw material gas is adsorbed and reacts with the surface of the substrate. A first layer is formed, and a second raw material gas introduced later is adsorbed and reacts, so that the second layer becomes the first layer. Thin films are formed by stacking layers. The order of gas introduction is controlled until the desired thickness is achieved. By repeating this process multiple times, a thin film with excellent step coverage can be formed. (Thickness of the thin film) This can be adjusted by changing the number of times gas is introduced, allowing for precise film thickness control. Therefore, it is suitable for fabricating miniature FETs.

[0288] Thermal CVD methods such as MOCVD can be used for the conductive films, insulating films, oxide semiconductor films, and metallic acids mentioned above. It can form films such as coated films, for example, when forming an In-Ga-Zn-O film. These are trimethylindium (In(CH3)3) and trimethylgallium (Ga(CH3) 3) and dimethylzinc (Zn(CH3)2) are used. The combinations are limited to these. Instead, triethylgallium (Ga(C2H5)3) is used in place of trimethylgallium. It is also possible to use diethylzinc (Zn(C2H5)2) instead of dimethylzinc. Cut.

[0289] For example, when forming a hafnium oxide film using a film deposition apparatus that utilizes ALD, the solvent and Liquids containing hafnium precursors (such as hafnium alkoxide or tetrakisdimethylamide) Fnium (TDMAH, Hf[N(CH3)2]4) and tetrakis (ethylmethylamide) (The raw material gas is a vaporized hafnium amide such as hafnium, and ozone is used as an oxidizer.) Two types of gases (O3) are used.

[0290] For example, when forming an aluminum oxide film using a film deposition apparatus that utilizes ALD, the solvent and a liquid containing an aluminum precursor (trimethylaluminum (TMA, Al(CH3)3) Two types of gases are used: a raw material gas obtained by vaporizing (such as) and H2O as an oxidizing agent. The materials include tris(dimethylamide)aluminum, triisobutylaluminum, and Luminium tris(2,2,6,6-tetramethyl-3,5-heptanedione), etc. There is.

[0291] For example, when forming a silicon oxide film using a film deposition apparatus that utilizes ALD, hexa Roloticilane is adsorbed onto the film-forming surface, and radicals of oxidizing gases (O2, nitrous oxide) are supplied. It is supplied and reacted with the adsorbed material.

[0292] For example, when depositing a tungsten film using a film deposition apparatus that utilizes ALD, WF6 gas The initial tungsten film is formed by sequentially introducing S and B2H6 gas, and then WF6 gas and H A tungsten film is formed using two gases. Note that SiH4 gas is used instead of B2H6 gas. You may also use [this].

[0293] For example, oxide semiconductor films, such as In-Ga-Zn-O, can be deposited using an ALD (Advanced Laser Deposition) system. When forming a film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Subsequently, a GaO layer was formed using Ga(CH3)3 gas and O3 gas, and then Zn A ZnO layer is formed using (CH3)2 gas and O3 gas. The order of these layers is as follows: This is not the only example. Furthermore, these gases can be used to create In-Ga-O layers and In-Zn-O layers. A mixed compound layer such as a Ga-Zn-O layer may be formed. Alternatively, Ar may be used instead of O3 gas. H2O gas obtained by bubbling water with an inert gas may also be used, but it does not contain H. It is preferable to use O3 gas.

[0294] Next, an insulating film 118 is formed on the insulating film 116 and the conductive films 112a and 112b.

[0295] The insulating film 118 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition (P It can be formed using appropriate methods such as LD (Luminography), printing, and coating. For insulating film 118, a silicon nitride film with a thickness of 400 nm is produced using a PECVD apparatus. A silicon oxide-nitride film with a thickness of 50 nm is formed.

[0296] Alternatively, oxygen may be added to the insulating film 118 after it has been formed. The oxygen added can be oxygen radicals, oxygen atoms, oxygen atom ions, oxygen molecular ions, etc. There are also methods of addition, such as ion doping, ion implantation, and plasma treatment. These are some examples. In addition, after forming a film that suppresses oxygen desorption on the insulating film, the insulating film is then transmitted through the film. Oxygen may be added to 118.

[0297] As membranes that suppress the desorption of oxygen as described above, indium, zinc, gallium, tin, and aluminum are used. From chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten Selected metal elements, alloys containing the above-mentioned metal elements, and combinations of the above-mentioned metal elements alloys, metal nitrides having the above-mentioned metal elements, metal oxides having the above-mentioned metal elements, Formed using conductive materials such as metal nitrides containing the aforementioned metal elements. It is possible.

[0298] Furthermore, when adding oxygen during plasma processing, the oxygen is excited with microwaves, resulting in high-density oxygen. By generating plasma, the amount of oxygen added to the insulating film 118 can be increased.

[0299] Furthermore, the silicon nitride film used as the insulating film 118 has a layered structure. Specifically, nitriding The silicon film consists of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer laminated structure with a film can be formed. An example of this three-layer laminated structure is as follows: It can be formed.

[0300] For the first silicon nitride film, for example, silane at a flow rate of 200 sccm, flow rate of 2000 s PE-CVD using nitrogen at ccm and ammonia gas at a flow rate of 100 sccm as raw material gases. It supplies power to the reaction chamber of the apparatus, controls the pressure inside the reaction chamber to 100 Pa, and uses a high frequency of 27.12 MHz. By supplying 2000W of power using a wave power supply, you can form it to a thickness of 50nm. stomach.

[0301] As the second silicon nitride film, a silane at a flow rate of 200 sccm and a silane at a flow rate of 2000 sccm Nitrogen and ammonia gas at a flow rate of 2000 sccm are used as raw material gases in the reaction of a PECVD apparatus. It supplies power to the reaction chamber, controls the pressure inside the reaction chamber to 100 Pa, and uses a 27.12 MHz high-frequency power supply. By using this method and supplying 2000W of power, the material can be formed to a thickness of 300nm.

[0302] The third silicon nitride film is a silane at a flow rate of 200 sccm and a flow rate of 5000 sccc. A nitrogen atom of m is supplied as a raw material gas to the reaction chamber of the PECVD apparatus, and the pressure inside the reaction chamber is set to 100p. Controlled to a, 2000W of power is supplied using a 27.12MHz high-frequency power supply, thickness It should be formed so that the wavelength is 50 nm.

[0303] Furthermore, the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film shape described above The substrate temperature during maturation can be kept below 350°C.

[0304] By making the insulating film 118 a three-layer laminated structure of silicon nitride films, for example, conductive film 112 When a conductive film containing copper (Cu) is used for 112b, the following effects are achieved.

[0305] The first silicon nitride film suppresses the diffusion of copper (Cu) from the conductive films 112a and 112b. The second silicon nitride film has the function of releasing hydrogen, and the gate insulating film is also available. The dielectric strength of the insulating film, which functions as such, can be improved. The third silicon nitride film is the third The hydrogen release from the first silicon nitride film is small, and the release from the second silicon nitride film is small. This can suppress the diffusion of hydrogen.

[0306] Next, an oxide semiconductor film 128 is formed on the insulating film 118 (see Figures 17(A) and 17(B)).

[0307] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4:2 Using :4.1[atomic ratio]), an oxide semiconductor film is formed by sputtering. Furthermore, the substrate temperature during the formation of the oxide semiconductor film was set to room temperature (RT), and the flow rate was 180 sc. Argon gas at a flow rate of 1 cm and oxygen gas at a flow rate of 20 sccm are used. Subsequently, the above oxide semi-oxides are used. By processing the conductive film into a desired shape, island-shaped oxide semiconductor films 128 are formed. A wet etching apparatus is used to form oxide semiconductor films.

[0308] Next, a conductive film is formed on the insulating film 118 and the oxide semiconductor film 128, and the conductive film is formed as desired By processing into shape, conductive films 122a and 122b are formed. Then, insulating film 118, Insulating films 124 and 126 are formed on the oxide semiconductor film 128 and the conductive films 122a and 122b. (See Figures 18(A) and 18(B)).

[0309] In this embodiment, conductive films 122a and 122b are tungsten films with a thickness of 50 nm and A laminate consisting of a 100nm thick aluminum film and a 50nm thick titanium film stacked in sequence. The film is deposited using the sputtering method.

[0310] Furthermore, after the formation of the conductive films 122a and 122b, the surface of the oxide semiconductor film 128 (backchar) The flannel side may be cleaned. For example, the cleaning method may involve using an etchant such as an aqueous phosphoric acid solution. One example is cleaning using a tamper. This removes impurities adhering to the surface of the oxide semiconductor film 128. Pure substances (for example, elements contained in conductive films 122a and 122b) can be removed. It should be noted that this cleaning is not always necessary, and in some cases, it may not be required.

[0311] Furthermore, either the step of forming conductive films 122a and 122b, or the cleaning step described above, In both cases, the regions exposed from the conductive films 122a and 122b of the oxide semiconductor film 128 are It may become thinner.

[0312] In this embodiment, a silicon oxidizride film with a thickness of 20 nm is used as the insulating film 124, As 26, silicon oxidizride films with a thickness of 200 nm were formed using the PECVD method. do.

[0313] Furthermore, after forming the insulating film 124, the insulating film 126 is formed continuously without exposure to the atmosphere. It is preferable to do so. After forming the insulating film 124, do not open it to the atmosphere, and control the flow rate, pressure, and frequency of the raw material gas. By adjusting the wave power and substrate temperature to one or more units, the insulating film 126 is formed continuously, thus providing insulation. The concentration of impurities originating from atmospheric components can be reduced at the interface between the film 124 and the insulating film 126. At the same time, the oxygen contained in the insulating films 124 and 126 is moved to the oxide semiconductor film 128. This makes it possible to reduce the amount of oxygen vacancies in the oxide semiconductor film 128.

[0314] In this embodiment, the insulating film 124 is set to a temperature of 220°C for holding the substrate 102. The raw material gases used were silane at a flow rate of 50 sccm and nitrous oxide at a flow rate of 2000 sccm. The pressure inside the processing chamber is set to 20 Pa, and the high-frequency power supplied to the parallel plate electrodes is set to 13.56 MHz. z, 100W (power density is 1.6 × 10⁻⁶) -2 W / cm 2 The PECVD method is used. Then, a silicon oxide nitride film is formed.

[0315] As the insulating film 126, the substrate placed in the vacuum-evacuated processing chamber of the PECVD apparatus is 1 Maintain a temperature between 80°C and 350°C, introduce the raw material gas into the processing chamber, and adjust the pressure within the processing chamber. The pressure should be between 100 Pa and 250 Pa, more preferably between 100 Pa and 200 Pa. 0.17 W / cm² is applied to the electrode installed in the processing chamber. 2 More than 0.5W / cm 2 The following are further preferred Or 0.25 W / cm² 2 More than 0.35W / cm 2 The following conditions apply when supplying high-frequency power: This forms a silicon oxide film or a silicon oxide-nitride film.

[0316] As the film deposition conditions for the insulating film 126, a high-frequency power of the above power density in a reaction chamber at the above pressure By supplying this, the decomposition efficiency of the raw material gas in the plasma is increased, and oxygen radicals increase. As the oxidation of the raw material gas progresses, the oxygen content in the insulating film 126 becomes greater than the stoichiometric composition. The amount increases. On the other hand, in films formed at the above temperature, the bonding force between silicon and oxygen increases. Because it is weak, some of the oxygen in the film is removed by the subsequent heat treatment. As a result, stoichiometry An oxide insulating material contains more oxygen than is required to satisfy the target composition, and some of the oxygen is removed upon heating. A border film can be formed.

[0317] Furthermore, in the process of forming the insulating film 126, the insulating film 124 is a protective film of the oxide semiconductor film 128. Therefore, while reducing damage to the oxide semiconductor film 128, high power density is achieved. An insulating film 126 can be formed using high-frequency power.

[0318] Furthermore, in the film formation conditions for the insulating film 126, the silicon-containing deposition gas relative to the oxidizing gas By increasing the flow rate, it is possible to reduce the number of defects in the insulating film 126. Typically, ESR measurement revealed that this originates from dangling bonds in silicon, appearing at g=2.001. The spin density of the signal is 6 × 10 17 spins / cm 3 Less than 3 × 10 17 s pins / cm 3 The following is preferably 1.5 × 10 17 spins / cm 3 The following defects It is possible to form an oxide insulating film with a small amount of material. As a result, the reliability of transistor Tr2 It can enhance sexual performance.

[0319] Furthermore, after forming the insulating films 124 and 126, a heat treatment (hereinafter referred to as the first heat treatment) is performed. It is preferable to perform the following. The first heat treatment removes nitrogen oxidation contained in the insulating films 124 and 126. The amount of material can be reduced. Alternatively, by the first heat treatment, the insulating films 124 and 126 can be reduced. A portion of the oxygen contained in the oxide semiconductor film 128 is transferred to the oxide semiconductor film 128. This can reduce the amount of oxygen deficiency.

[0320] The temperature of the first heat treatment is typically less than 400°C, preferably less than 375°C, and further Preferably, the temperature is between 150°C and 350°C. The first heat treatment involves nitrogen, oxygen, and ultra-drying. Air (water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less) The procedure can be carried out in an atmosphere of air (below) or a noble gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. Heat treatment is performed using electric furnaces, RTA (Rapid Thermal Annealing), etc. It is possible.

[0321] Next, an opening 182 reaching the conductive film 122a is formed in a desired region of the insulating film 124, 126. Then, a conductive film 130 is formed on the insulating film 126 and the conductive film 122a (Figure 19( See A)(B)).

[0322] A dry etching apparatus or a wet etching apparatus is used to form the opening 182. Furthermore, the conductive film 130 is an oxide (IT) having indium, tin, and silicon. (also called SO) Target (In2O3:SnO2:SiO2 = 85:10:5 [weight %]) Using ]), an ITSO film with a thickness of 100 nm is formed, and then it is processed into island shapes.

[0323] By following the above steps, transistor Tr2 can be fabricated.

[0324] Next, an insulating film 134 is added on top of the insulating film 126 and conductive film 130, and an insulating film 136 is added. A laminated film is formed with an insulating film. Then, the conductive film 130 is made to reach a desired region of the laminated film. This forms an opening 184 (see Figures 20(A) and 20(B)).

[0325] As the insulating film 134, a silicon oxide nitride film with a thickness of 200 nm was prepared using the PECVD method. Formed. In addition, the insulating film 136 is a photosensitive acrylic resin film with a thickness of 1.5 μm. It forms.

[0326] A dry etching apparatus or a wet etching apparatus is used to form the opening 184. .

[0327] Next, a conductive film is formed on the insulating film 136 and the conductive film 130, and the conductive film is processed into an island shape. This forms a conductive film 138 (see Figures 21(A) and 21(B)).

[0328] In this embodiment, the conductive film 138 is an ITSO film with a thickness of 10 nm and a film with a thickness of 200 nm. A reflective metal film of m (here, a metal film having silver, palladium, and copper) and a thickness of 10 A laminated film with an nm-thick ITSO film is used. Furthermore, wet etching is used for processing the conductive film 138. A ching device is used.

[0329] Next, island-shaped insulating films 140 are formed on the insulating film 136 and the conductive film 138 (Figure 22(A)). (See (B)).

[0330] As the insulating film 140, a photosensitive polyimide-based resin film with a thickness of 1.5 μm is used.

[0331] Next, an EL layer 142 is formed on the conductive film 138, and then the insulating film 140 and the EL layer 142 By forming the conductive film 144 on top, the light-emitting element 160 is formed (see Figure 23(A)(B)). see).

[0332] The method for forming the light-emitting element 160 will be described in detail in Embodiment 4.

[0333] By following the above steps, the semiconductor device 100A shown in Figures 4(A) and 4(B) can be formed.

[0334] From the above, the heat after the oxide semiconductor film 108 and oxide semiconductor film 128 have been deposited Comparing the histories, it can be seen that the oxide semiconductor film 108 has a longer thermal history. This is because acid From the time the oxide semiconductor film 108 is deposited until the time the oxide semiconductor film 128 is deposited, at least insulation is maintained. This is because the substrate is heated during the deposition of films such as film 110 and insulating film 118.

[0335] To improve the reliability of transistors, the amount of oxygen vacancies in the oxide semiconductor film must be reduced. While sufficient heat treatment time is necessary, in order to reduce manufacturing costs, heat treatment It is effective to keep the temperature as low as possible and shorten the heat treatment time. As will be shown in the following section, In one aspect of the invention, as explained in Figure 24, the oxide semiconductor film 128 is more oxide semiconductor Oxygen diffuses more easily into the film than into the conductive film 108. In other words, into the oxide semiconductor film 128. However, compared to the oxide semiconductor film 108, oxygen deficiency occurs with shorter heat treatment times or lower heat treatment temperatures. It is possible to reduce the amount. That is, in one aspect of the present invention, oxygen diffuses into the membrane. Using a pyramidal film in the oxide semiconductor film 128 is effective in reducing manufacturing costs. ru.

[0336] Furthermore, consider the case where the substrate 102 or the insulating film 106 releases a large amount of hydrogen. (See below) When hydrogen diffuses into a transistor as shown, hydrogen binds to oxygen vacancies, increasing the number of carriers. Because the properties change, to avoid this, transistor Tr1, which is close to the hydrogen source, is positioned to handle the hydrogen. A structure with excellent reliability for diffusion is desirable. Hydrogen and acid due to high membrane density The transistor Tr1 has an oxide semiconductor film with low elementary diffusion, and the diffusion of hydrogen and oxygen Having a large oxide semiconductor film in transistor Tr2 is due to hydrogen diffusion from the substrate. This is effective in reducing degradation. In this case, under transistor Tr2, silicon nitride Examples of films that hinder hydrogen diffusion include silicon nitride films, aluminum oxide films, and other films that are difficult for hydrogen to diffuse. Formation is preferable.

[0337] Furthermore, in order to reduce the area of ​​the transistors, conductive film 112a and conductive film 112b If you want to reduce the line width of conductive film 122a and conductive film 122b, the number of these conductive films Depending on the material, resistance to thermal migration may be low. The thermal film 112a, the conductive film 112b, the conductive film 122a, and the thermal film after the formation of the conductive film 122b Historically, it is better to lower the upper limit of the process temperature and shorten the heat treatment time. In one aspect of the present invention, Therefore, using a film in which oxygen easily diffuses into the film as the oxide semiconductor film 128 is effective for thermal migration. This is effective in improving reliability when using materials with low resistance to saturation.

[0338] In other words, in one aspect of this embodiment, a large field effect mobility can be obtained, Therefore, a transistor that is prone to threshold changes in response to hydrogen diffusion and has weak thermal migration is designed. It is used in elements that require high magnetic mobility, and conversely, in elements that have low field-effect mobility but are effective against hydrogen diffusion. The transistor has a small threshold change and is highly resistant to thermal migration, making it a design choice with great confidence. By using it in components where reliability is required, degradation is suppressed while reducing the area required for transistor placement. This can be done more effectively.

[0339] The configuration and method shown in this embodiment may be appropriately combined with the configuration and method shown in other embodiments. They can be used together.

[0340] (Embodiment 2)

[0341] <2-1. Composition of Oxide Semiconductor Films> The composition of the oxide semiconductor film according to the present invention is described below.

[0342] The oxide preferably contains at least indium or zinc. In particular, indium and It is preferable to include zinc. In addition to these, aluminum, gallium, and t It is preferable that it contains elements such as lium or tin. Also, boron, silicon, and titanium are preferable. Iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neo One of the following: gymite, hafnium, tantalum, tungsten, or magnesium. , or may include multiple types.

[0343] Here, we consider the case where the oxide contains indium, element M, and zinc. Note that element M is This includes aluminum, gallium, yttrium, or tin. Other elements M are suitable. Usable elements include boron, silicon, titanium, iron, nickel, germanium, and zirconium. Conium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten Examples include stainless steel and magnesium. However, as element M, multiple elements mentioned above can be combined. There are times when it's acceptable to do so.

[0344] First, using Figures 25(A), 25(B), and 25(C), the oxide according to the present invention is described. The preferred range of atomic ratios of indium, element M, and zinc is described below. Figure 25 does not show the atomic ratio of oxygen. Furthermore, the indium content of the oxide is not shown. Let [In], [M], and [Zn] be the terms representing the atomic ratios of element M and zinc, respectively. ru.

[0345] In Figures 25(A), 25(B), and 25(C), the dashed line represents [In]:[M] The line where the atomic ratio of Zn is (-1≦α≦1) is [ ] In]:[M]:[Zn]=(1+α):(1-α):2 is the line where the atomic ratio is [I The line [In]:[M]:[Zn]=(1+α):(1-α):3 represents the atomic ratio. The line where the atomic ratio of ]:[M]:[Zn]=(1+α):(1-α):4, and [ This represents a line where the atomic ratio of In]:[M]:[Zn]=(1+α):(1-α):5. .

[0346] Furthermore, the dashed line represents the atomic ratio [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio is [In]:[M]:[Zn]=1:2:β, [In] The line where the atomic ratio of :[M]:[Zn]=1:3:β is [In]:[M]:[Zn] The line with an atomic ratio of 1:4:β, where [In]:[M]:[Zn]=2:1:β atoms. Lines that represent numerical ratios, and lines that represent the atomic ratio of [In]:[M]:[Zn]=5:1:β. It represents "n".

[0347] Furthermore, the dotted line represents the number of atoms in [In]:[M]:[Zn]=(1+γ):2:(1-γ). This represents the line where the ratio (-1≦γ≦1) holds. Also, as shown in Figure 25, [In]:[M]:[Z Oxides with an atomic ratio of n] = 0:2:1, and values ​​near that, exhibit a spinel-type crystal structure. It's easy to understand.

[0348] Figures 25(A) and 25(B) show the indium contained in the oxide of one embodiment of the present invention. An example of a preferred range for the atomic ratio of element M and zinc is shown.

[0349] As an example, Figure 26 shows InMZnO, where [In]:[M]:[Zn]=1:1:1. Figure 4 shows the crystal structure. Figure 26 also shows InMZn when observed from a direction parallel to the b-axis. This is the crystal structure of O4. Note that the layer containing M, Zn, and oxygen shown in Figure 26 (hereinafter referred to as (M,Z) In layer n), the metallic element represents either element M or zinc. In this case, element M and zinc. Assume that the proportions are equal. Element M and zinc are substituted for each other, and their arrangement is irregular. .

[0350] InMZnO4 has a layered crystalline structure (also called a layered structure), as shown in Figure 26. One layer contains indium and oxygen (hereinafter referred to as the In layer), while the other layer contains elements M, zinc, and The (M,Zn) layer containing oxygen is 2.

[0351] Furthermore, indium and element M are mutually substitutable. Therefore, the elements in the (M,Zn) layer... It can also be represented as an (In,M,Zn) layer, where M is substituted with indium. In that case, the In layer... It has a layered structure where there is 1 layer and 2 (In,M,Zn) layers.

[0352] In an oxide with an atomic ratio of [In]:[M]:[Zn]=1:1:2, the In layer is 1. It has a layered structure with 3 (M,Zn) layers. That is, [Z] for [In] and [M]. As n] increases, if the oxide crystallizes, the ratio of the (M,Zn) layer to the In layer increases It increases.

[0353] However, in the oxide, the number of (M,Zn) layers is not an integer for every one In layer. In this case, there are multiple types of layered structures where the number of (M,Zn) layers is an integer for every one In layer. There are cases where this occurs. For example, if [In]:[M]:[Zn]=1:1:1.5, then the In layer A layered structure in which there are 1 (M,Zn) layer and 2 (M,Zn) layers, and a layered structure in which there are 3 (M,Zn) layers. In some cases, a layered structure may be formed in which these materials are mixed together.

[0354] For example, when depositing an oxide film using a sputtering apparatus, the atomic ratio of the target will deviate. A film with a specific atomic ratio is formed. In particular, depending on the substrate temperature during film formation, the target [Zn In some cases, the [Zn] of the film may be smaller than [ ].

[0355] Furthermore, multiple phases may coexist within an oxide (e.g., two-phase coexistence, three-phase coexistence). For example, For atomic ratios near the atomic ratio [In]:[M]:[Zn]=0:2:1, the speed Two phases, one with a Nell-type crystal structure and the other with a layered crystal structure, tend to coexist. Also, [In]:[M]: For atomic ratios that are near the atomic ratio [Zn]=1:0:0, the bigxbyte type Two phases, such as a crystalline structure and a layered crystalline structure, tend to coexist. This is especially true when multiple phases coexist within an oxide. , the site where grain boundaries (also called grain boundaries) are formed between different crystal structures. There is a match.

[0356] Furthermore, by increasing the indium content, the carrier mobility (electron mobility) of the oxide is increased. It can be made higher. Therefore, oxides with a high indium content have a high indium content. Compared to oxides with low carrier content, it exhibits higher carrier mobility.

[0357] On the other hand, when the content of indium and zinc in the oxide decreases, the carrier mobility decreases. Therefore, the atomic ratio that shows [In]:[M]:[Zn]=0:1:0, and its vicinity. In the atomic ratio of a specific value (for example, region C shown in Figure 25(C)), the insulating properties become high.

[0358] Therefore, an oxide according to one aspect of the present invention has high carrier mobility and a layered structure with few grain boundaries. It is preferable to have the atomic ratio shown in region A of Figure 25(A), which is prone to forming a compound.

[0359] Furthermore, region B shown in Figure 25(B) is 4 from [In]:[M]:[Zn]=4:2:3. 1 and its neighboring values ​​are shown. Neighboring values ​​include, for example, atomic ratios [In]:[M]. [Zn]=5:3:4 is included. Oxides with the atomic ratio shown in region B are particularly... It is an excellent oxide with high crystallinity and high carrier mobility.

[0360] Furthermore, the conditions under which oxides form a layered structure are not uniquely determined by the atomic ratio. The difficulty of forming a layered structure varies depending on the ratio of atoms. On the other hand, even with the same ratio of atoms... However, depending on the formation conditions, it may or may not form a layered structure. Therefore, Figure The regions shown represent the atomic ratios in which the oxide has a layered structure, and are regions A to C. The boundary is not strict.

[0361] Next, we will explain the case where the above oxide is used in a transistor.

[0362] Furthermore, by using the above oxide in transistors, carrier scattering at grain boundaries can be reduced. Because this can be done, transistors with high field-effect mobility can be realized. This makes it possible to create highly reliable transistors.

[0363] Furthermore, it is preferable to use an oxide with a low carrier density for the transistor. For example, Oxides have a carrier density of 8 × 10 11 cm -3 Less than 1 × 10 11 cm -3 Less than 1 × 10 10 cm -3 It is less than 1 × 10 9 cm -3 That's all. That's all you need to do.

[0364] Furthermore, oxides that are high-purity intrinsic or substantially high-purity intrinsic have few carrier sources. Therefore, the carrier density can be lowered. Also, high-purity intrinsic or substantially high-purity intrinsic Oxides that are such as [this type of oxide] may have a low trap level density because they have a low defect level density.

[0365] Furthermore, the charge trapped in the oxide's trap level takes a long time to disappear. They can sometimes behave like fixed charges. Therefore, oxides with a high trap level density are particularly problematic. Transistors in which a channel region is formed may have unstable electrical characteristics.

[0366] Therefore, in order to stabilize the electrical characteristics of the transistor, the concentration of impurities in the oxide must be reduced. This is effective. In addition, in order to reduce the impurity concentration in the oxide, It is also preferable to reduce the concentration of impurities. Examples of impurities include hydrogen, nitrogen, alkali metals, and Examples include earth metals such as rutile, iron, nickel, and silicon.

[0367] Here, we will explain the effects of each impurity in oxides.

[0368] In oxides, if silicon or carbon, which are among the Group 14 elements, are present, the oxide will have an odor. Defect levels are formed. Therefore, the concentration of silicon and carbon in the oxide and the oxide The concentration of silicon and carbon near the interface (Secondary Ion Mass Spectrometry (SIMS)) The concentration obtained by (iron mass spectrometry) is 2 × 1 0 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies: .

[0369] Furthermore, if the oxide contains alkali metals or alkaline earth metals, it forms defect levels. It may generate carriers. Therefore, it contains alkali metals or alkaline earth metals. Transistors using oxides tend to exhibit normally-on characteristics. It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the material. Specifically The concentration of alkali metals or alkaline earth metals in oxides obtained by SIMS is determined by 1 x 10 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 below I'll do that.

[0370] Furthermore, in oxides, when nitrogen is present, electrons, which act as carriers, are generated, and the carrier density increases. It increases and becomes more likely to become n-type. As a result, transistors using nitrogen-containing oxides as semiconductors Distal oxides tend to exhibit normally-on properties. Therefore, in these oxides, nitrogen should be present as much as possible. It is preferable that the nitrogen concentration in the oxide be reduced, for example, in SIMS, 5 x 10 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 below , more preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 The following applies:

[0371] Furthermore, the hydrogen contained in oxides reacts with the oxygen that bonds with the metal atoms to form water, so oxygen A defect may form. When hydrogen enters this oxygen defect, electrons, which act as carriers, are generated. In some cases, this can occur. Also, some of the hydrogen combines with oxygen that is bonded to a metal atom, and in the carrier It can generate certain electrons. Therefore, a transient using an oxide containing hydrogen... The ion tends to exhibit normally-on properties. Therefore, hydrogen in the oxide is reduced as much as possible. It is preferable that the hydrogen concentration obtained by SIMS in the oxide is , 1 × 10 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than.

[0372] By using oxides with sufficiently reduced impurities in the channel formation region of transistors, It is possible to impart specific electrical characteristics.

[0373] <2-2. Carrier density of oxide semiconductor films> Next, the carrier density of oxide semiconductor films will be explained below.

[0374] Factors that affect the carrier density of oxide semiconductor films include oxygen deficiency in oxide semiconductor films. Loss (V o Examples include impurities in oxide semiconductor films, etc.

[0375] When the number of oxygen vacancies in an oxide semiconductor film increases, hydrogen atoms bond to these oxygen vacancies (this state is called V). o H (Also known as) When this occurs, the defect level density increases. Alternatively, when there are many impurities in the oxide semiconductor film As this increases, the defect level density increases due to the impurities. Therefore, in oxide semiconductor films By controlling the defect level density, the carrier density of an oxide semiconductor film can be controlled. .

[0376] Now, let's consider a transistor that uses an oxide semiconductor film for the channel region.

[0377] Suppression of negative shift in the transistor threshold voltage, or the transistor off-current When the goal is reduction, it is preferable to lower the carrier density of the oxide semiconductor film. i. When the carrier density of an oxide semiconductor film is reduced, impurities in the oxide semiconductor film The objective is to lower the concentration of the substance and thus the defect level density. In this specification, the impurity concentration is low. Furthermore, a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic. The carrier density of the oxide semiconductor film is 8 × 10 15 cm -3 Less than 1x 10 11 cm -3 Less than 1 × 10 10 cm -3 It is less than 1 × 10 - 9 cm -3 That should suffice.

[0378] On the other hand, improving the on-current of the transistor, or improving the field-effect mobility of the transistor When this is the objective, it is preferable to increase the carrier density of the oxide semiconductor film. When increasing the carrier density of an oxide semiconductor film, the impurity concentration of the oxide semiconductor film is increased. It would suffice to slightly increase it, or to slightly increase the defect level density of the oxide semiconductor film. To achieve this, it is desirable to make the band gap of the oxide semiconductor film smaller. For example, in transistors Within the range where the on / off ratio of the Id-Vg characteristic can be obtained, the impurity concentration is slightly high, Oxide semiconductor films with a slightly higher defect level density can be considered virtually intrinsic. Also, electron The affinity is high, and consequently the band gap becomes small, and as a result, thermal excitation occurs. An oxide semiconductor film with an increased electron (carrier) density can be considered virtually intrinsic. When an oxide semiconductor film with a higher electron affinity is used, the threshold voltage of the transistor The pressure will decrease.

[0379] The carrier density of a virtually intrinsic oxide semiconductor film is 1 × 10⁻⁶ 5 cm -3 The above 1 x 10 18 cm -3 Less than 1 × 10 is preferable. 7 cm -3 The above 1 x 10 17 cm -3 The following are preferred , 1 x 10 9 cm -3 The above 5 x 10 16 cm -3 The following is even more preferable: 1 × 10 1 0 cm -3 The above 1 x 10 16 cm -3 The following is even more preferable: 1 × 10 11 cm -3 That's all. 1 x 10 15 cm -3 The following are even more preferable.

[0380] Furthermore, by using the substantially intrinsic oxide semiconductor film mentioned above, the reliability of the transistor is improved. This may occur. Here, using Figure 27, when an oxide semiconductor film is used in the channel region... This explains why the reliability of the transistor is improved. Figure 27 shows the oxide semiconductor film being channeled. This diagram illustrates the energy bands in transistors used in the Nell region.

[0381] In Figure 27, GE represents the gate electrode, GI represents the gate insulating film, and OS represents the oxide semiconductor film. SD represents the source electrode or drain electrode, respectively. That is, Figure 27 shows the gate An electrode, a gate insulating film, an oxide semiconductor film, and a source electrode or in contact with the oxide semiconductor film. This is an example of the energy band of the drain electrode.

[0382] Furthermore, in Figure 27, a silicon oxide film is used as the gate insulating film, and an oxide semiconductor film The configuration uses In-Ga-Zn oxide. Furthermore, it can be formed in a silicon oxide film. The defect transition level (εf) is formed at a location approximately 3.1 eV away from the lower end of the conduction band of the gate insulating film. Assuming this is done, the oxide semiconductor film and silicon oxide when the gate voltage (Vg) is 30V The Fermi level (Ef) of the silicon oxide film at the interface with the film is below the conduction band of the gate insulating film. It is assumed that the silicon oxide film is formed at a position approximately 3.6 eV away from the surface. The energy level fluctuates depending on the gate voltage. For example, by increasing the gate voltage, the oxide level changes. The Fermi level (Ef) of the silicon oxide film at the interface between the semiconductor film and the silicon oxide film is It becomes lower. Also, the white circles in Figure 27 represent electrons (carriers), and X in Figure 27 is silicone oxide. This represents the defect level in the film.

[0383] As shown in Figure 27, when a gate voltage is applied, for example, when a carrier is thermally excited... The carrier is trapped in the defect level (X in the figure), and moves from positive ("+") to neutral. The charge state of the defect level changes to "0". That is, the Fermi level of the silicon oxide film ( The value obtained by adding the energy of the thermal excitation mentioned above to Ef) is higher than the defect transition level (εf). In this case, the charge state of the defect levels in the silicon oxide film changes from positive to neutral, and the transient The threshold voltage of the device will fluctuate in the positive direction.

[0384] Furthermore, when oxide semiconductor films with different electron affinities are used, the gate insulating film and the oxide semiconductor film are The depth at which the Fermi level is formed at the interface can vary. Oxides with high electron affinity When a semiconductor film is used, gate insulation occurs near the interface between the gate insulating film and the oxide semiconductor film. The lower end of the conduction band of the film becomes relatively higher. In this case, defect levels may form in the gate insulating film. (X in Figure 27) also becomes relatively high, so the Fermi level of the gate insulating film and the oxide semiconductor The energy difference with respect to the Fermi level of the film increases. Therefore, the amount of charge trapped in the gate insulating film is reduced, for example, the silicon oxide film mentioned above. The change in the charge state of defect levels that can form inside is reduced, and the gate bias heat (Gate Bias Temperature (also known as GBT) Transition in stress This can reduce fluctuations in the threshold voltage.

[0385] Furthermore, transistors that use oxide semiconductor films in the channel region exhibit carrier dispersion at grain boundaries. This allows for the reduction of disturbances, thus enabling the realization of transistors with high field-effect mobility. This makes it possible to create highly reliable transistors.

[0386] Furthermore, the time required for charge trapped in the defect levels of an oxide semiconductor film to disappear is long. They can sometimes behave as if they were fixed charges. Therefore, oxides with a high defect level density... Transistors in which a channel region is formed in a semiconductor film may have unstable electrical properties. ru.

[0387] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is Reducing it is effective. Also, in order to reduce the impurity concentration in oxide semiconductor films Furthermore, it is preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, Examples include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0388] Here, we will explain the effects of various impurities in oxide semiconductor films.

[0389] In oxide semiconductor films, if silicon or carbon, which are among the Group 14 elements, oxidation occurs. Defect levels are formed in the silicon semiconductor film. Therefore, silicon in oxide semiconductor films The concentration of carbon and the concentration of silicon and carbon near the interface with the oxide semiconductor film (secondary ion mass) Analysis method (SIMS: Secondary Ion Mass Spectrometry) The concentration obtained by ) is 2 × 10 18 atoms / cm 3 The following is preferably 2 × 10 17 atoms / cm 3 The following applies:

[0390] Furthermore, if an oxide semiconductor film contains alkali metals or alkaline earth metals, the defect levels They may form and generate carriers. Therefore, alkali metals or alkaline earth metals Transistors using oxide semiconductor films containing this material tend to exhibit normally-on characteristics. Therefore, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor film is reduced. This is preferable. Specifically, alkali metal in oxide semiconductor films obtained by SIMS Alternatively, the concentration of alkaline earth metals can be set to 1 × 10⁻⁶. 18 atoms / cm 3 The following are preferably 2 ×10 16 atoms / cm 3 Do the following:

[0391] Furthermore, in oxide semiconductor films, when nitrogen is present, electrons, which are carriers, are generated. The density increases, making it more likely to become n-type. As a result, the oxide semiconductor film containing nitrogen becomes semi- Transistors used as conductors tend to exhibit normally-on characteristics. Therefore, the oxide semiconductor In films, it is preferable to reduce nitrogen as much as possible, for example, in oxide semiconductor films. The nitrogen concentration inside is 5 × 10⁻⁶ in SIMS. 19 atoms / cm 3 Less than, preferably 5 x 10 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 atoms / cm 3 The following applies:

[0392] Furthermore, the hydrogen contained in the oxide semiconductor film reacts with the oxygen bonded to the metal atoms to form water. Therefore, an oxygen deficiency may form. When hydrogen enters this oxygen deficiency, the carrier electrons In some cases, a child may be produced. Also, some of the hydrogen combines with the metal atom and oxygen, resulting in a crystal. It can generate electrons that act as carriers. Therefore, an oxide semiconductor film containing hydrogen The transistor used tends to exhibit normally-on characteristics. Therefore, in oxide semiconductor films... It is preferable that hydrogen content be reduced as much as possible. Specifically, in oxide semiconductor films... The hydrogen concentration obtained by SIMS is 1 × 10⁻⁶ 20 atoms / cm 3 Less than, preferably is 1 x 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than.

[0393] Using an oxide semiconductor film with sufficiently reduced impurities in the channel formation region of a transistor. This allows for the provision of stable electrical characteristics.

[0394] Furthermore, oxide semiconductor films have an energy gap of 2 eV or more, or 2.5 eV or more. It would be preferable if that happened.

[0395] Furthermore, the thickness of the oxide semiconductor film is 3 nm to 200 nm, preferably 3 nm to 10 The wavelength is 0 nm or less, and more preferably 3 nm to 60 nm.

[0396] <2-3. Structure of oxide semiconductor films> Next, we will explain the structure of oxide semiconductor films.

[0397] Oxide semiconductor films include single-crystal oxide semiconductor films and other non-single-crystal oxide semiconductor films. It can be divided. As a non-single-crystal oxide semiconductor film, CAAC-OS (c-axis-ali gned crystalline oxide semiconductor), polycrystalline crystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous US-like oxide semiconductors, and amorphous oxide semiconductors. These are some examples.

[0398] From another perspective, oxide semiconductor films include amorphous oxide semiconductor films and other crystalline oxide films. They can be divided into monocrystalline and monocrystalline semiconductor films. As for crystalline oxide semiconductor films, single-crystal oxide semiconductor films, Examples include CAAC-OS, polycrystalline oxide semiconductor films, and nc-OS.

[0399] Amorphous structures are generally isotropic and lack heterogeneous structures, representing a metastable state of atomic arrangement. It is not fixed, the bonding angle is flexible, and it has short-range order but not long-range order. It is said that...

[0400] In other words, a stable oxide semiconductor film is completely amorphous. It cannot be called an oxide semiconductor film. Also, it is not isotropic (for example, in a minute region) An oxide semiconductor film (which has a periodic structure) cannot be called a perfectly amorphous oxide semiconductor film. On the other hand, a-like OS is not isotropic but has an unstable structure with voids (also called porous structures). It is a structure. In terms of instability, a-like OS is an amorphous oxide in terms of its physical properties. It's similar to a semiconductor film.

[0401] [CAAC-OS] First, let me explain CAAC-OS.

[0402] CAAC-OS is an oxide semiconductor having multiple c-axis oriented crystalline portions (also called pellets). It is a type of conductive film.

[0403] CAAC-OS is a highly crystalline oxide semiconductor film. The crystallinity of oxide semiconductor films depends on the presence of impurities. CAAC-OS may decrease in quality due to the inclusion of impurities or the formation of defects, therefore, CAAC-OS is a product that can be damaged by impurities and defects. It can be described as an oxide semiconductor film with few voids (such as oxygen vacancies).

[0404] Impurities are elements other than the main components of oxide semiconductor films, such as hydrogen, carbon, silicon, and transition gold. There are group elements, for example, more so than the metallic elements that make up oxide semiconductor films such as silicon. Elements with a strong bonding affinity for oxygen remove oxygen from oxide semiconductor films, thus removing the raw materials from the oxide semiconductor film. This disrupts the arrangement of particles and reduces crystallinity. It also affects heavy metals such as iron and nickel, and aluminum. Because atoms like carbon dioxide have a large atomic radius (or molecular radius), oxide semiconductor films This disrupts the atomic arrangement and reduces crystallinity.

[0405] [nc-OS] Next, I will explain nc-OS.

[0406] This section describes the case of analyzing nc-OS using XRD. For example, for nc-OS When structural analysis is performed using the out-of-plane method, no peaks indicating orientation appear. In other words, nc-OS crystals do not have orientation.

[0407] nc-OS is an oxide semiconductor film with higher orderliness than amorphous oxide semiconductor films. Therefore, nc-OS has a lower defect level density than a-like OS and amorphous oxide semiconductor films. However, nc-OS does not show any regularity in crystal orientation between different pellets. Therefore, nc-OS may have a higher defect level density compared to CAAC-OS.

[0408] [a-like OS] a-like OS is an oxide having a structure between nc-OS and an amorphous oxide semiconductor film. It is a semiconductor film.

[0409] a-like OS has porous or low-density regions. a-like OS has porosity. Therefore, it has an unstable structure.

[0410] Furthermore, because a-like OS has porosity, it is different from nc-OS and CAAC-OS. It has a low-density structure. Specifically, the density of a-like OS is less than that of a single crystal of the same composition. The density is between 78.6% and 92.3%. Also, the density of nc-OS and CAAC-O The density of S is between 92.3% and 100% of the density of a single crystal of the same composition. Oxide semiconductors with a viscosity of less than 78% are inherently difficult to deposit into films.

[0411] For example, in an oxide semiconductor film satisfying In:Ga:Zn=1:1:1 [atomic ratio], The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm³. 3 That is. For example, in an oxide semiconductor film satisfying In:Ga:Zn=1:1:1 [atomic ratio] The density of a-like OS is 5.0 g / cm³. 3 More than 5.9g / cm 3 It is less than. Furthermore, for example, in an oxide semiconductor film satisfying In:Ga:Zn=1:1:1 [atomic ratio] Furthermore, the density of nc-OS and CAAC-OS is 5.9 g / cm³. 3 More than 6.3g / c m 3 It is less than.

[0412] If single crystals with the same composition do not exist, single crystals with different compositions can be combined in any proportion. By doing so, the density equivalent to a single crystal at the desired composition can be estimated. The density corresponding to a single crystal of the desired composition is, with respect to the ratio of single crystals with different compositions combined, The density can be estimated using a weighted average. However, the density should be calculated using as few types of single crystals as possible. It is preferable to estimate by combining the costs.

[0413] As described above, oxide semiconductor films can take on various structures, each possessing a variety of properties. Furthermore, the oxide semiconductor film according to one aspect of the present invention is an amorphous oxide semiconductor film, a-like OS Two or more of the following may be mixed: nc-OS and CAAC-OS. An example of such a case. The following is shown.

[0414] In one aspect of the present invention, the oxide semiconductor film is an oxide semiconductor film containing two types of crystalline portions. Yes, it is possible. In other words, it is an oxide semiconductor film in which two types of crystalline parts are mixed. One of the crystalline parts ( The first crystalline portion (also called the first crystalline portion) is in the thickness direction of the film (film surface direction, the surface on which the film is formed, or the surface of the film). This is a crystalline portion that has orientation in the perpendicular direction (also called the vertical direction), i.e., c-axis orientation. The other part of the crystal (also called the second crystal part) does not have c-axis orientation and is oriented in various directions. This is the crystalline part.

[0415] For the sake of clarity, in the following explanation, the crystalline portion having c-axis orientation will be referred to as the first crystalline portion, and c The crystalline portion that does not have axial orientation is explained separately as the second crystalline portion, but these are related to crystallinity and bonding. In some cases, there is no difference in crystal size, etc., making them indistinguishable. That is, one embodiment of the present invention of oxidation These can also be described without distinguishing between them when referring to crystalline semiconductor films.

[0416] For example, an oxide semiconductor film according to one aspect of the present invention has a plurality of crystalline portions, and crystals present in the film It is sufficient that at least one crystalline portion of the part has c-axis orientation. Also, the part present in the film Of the crystalline portions, those that do not have c-axis orientation are more numerous than those that do have c-axis orientation. The proportion may be increased. For example, the oxide semiconductor film of one aspect of the present invention has a thickness ratio In the transmission electron microscope image of the cross-section, multiple crystalline regions were observed. Of the plurality of crystal portions, the second crystal portion that does not have c-axis orientation is the first crystal portion that has c-axis orientation In some cases, it may be observed in greater quantities than the crystalline portion. In other words, an oxide semiconductor film according to one aspect of the present invention This material has a high proportion of a second crystalline region that does not exhibit c-axis orientation.

[0417] By increasing the proportion of a second crystalline region that does not have c-axis orientation in the oxide semiconductor film, It produces the following excellent effects.

[0418] When there is a sufficient oxygen supply source near the oxide semiconductor film, the c-axis orientation is not present. The crystalline portion of 2 can serve as an oxygen diffusion pathway. Therefore, sufficient oxygen is present near the oxide semiconductor film. When a supply source is present, a second crystal portion that does not have c-axis orientation is formed, which has c-axis orientation. Oxygen can be supplied to the first crystalline region. Therefore, oxygen deficiencies in the oxide semiconductor film can be resolved. The amount can be reduced. Applying such an oxide semiconductor film to the semiconductor film of a transistor. This makes it possible to achieve high reliability and high field-effect mobility.

[0419] Furthermore, the first crystalline portion has specific crystal planes that are oriented with respect to the thickness direction of the film. For an oxide semiconductor film containing a first crystalline portion, X-rays are applied in a direction approximately perpendicular to the upper surface of the film. When diffraction (XRD: X-ray Diffraction) measurements are performed, a predetermined diffraction angle (2 A diffraction peak originating from the first crystalline region is observed at θ). On the other hand, the oxide semiconductor film is the first Even if it has a crystalline portion, X-ray scattering by the support substrate or background elevation may occur. Therefore, diffraction peaks may not be fully visible. Note that the height (intensity) of the diffraction peaks... This increases in proportion to the amount of the first crystalline portion contained in the oxide semiconductor film, and the oxide semiconductor It can also serve as an indicator for assessing the crystallinity of a conductive film.

[0420] Furthermore, electron diffraction is one method for evaluating the crystallinity of oxide semiconductor films. Then, electron diffraction measurements are performed on the cross-section, and the electron diffraction of the oxide semiconductor film according to one embodiment of the present invention is determined. When the pattern is observed, there is a first region having diffraction spots originating from the first crystal part, A second region is observed that has diffraction spots originating from the second crystalline region.

[0421] The first region having diffraction spots originating from the first crystalline region is a crystalline region having c-axis orientation. It originates from this. On the other hand, the second region having diffraction spots originating from the second crystalline part is oriented It originates from crystal regions that do not have or crystal regions that are randomly oriented in any direction. Therefore, it differs depending on the beam diameter of the electron beam used in electron diffraction, that is, the area of ​​the region being observed. A pattern may be observed. Note that in this specification, etc., the electron beam diameter is 1n Electron diffraction measured in the range of mΦ to 100 nmΦ is called nanobeam electron diffraction (NBED). This is called Nano Beam Electron Diffraction.

[0422] However, the crystallinity of the oxide semiconductor film according to one embodiment of the present invention may be evaluated by a method different from NBED. This is also acceptable. Examples of methods for evaluating the crystallinity of oxide semiconductor films include electron diffraction, X-ray diffraction, and neutral Examples include electron diffraction. Among electron diffraction methods, in addition to NBED as mentioned above, transmission electron microscopy is also an option. Mirror (TEM: Transmission Electron Microscopy), Scanning Electron Microscope (SEM) y), Convergent Beam Electron Diffraction (CBED) Diffraction, Selected Area Electron Diffraction (SAED) Electron Diffraction (and the like) can be suitably used.

[0423] Furthermore, in NBED, conditions were used where the electron beam diameter was increased (for example, 25 nmΦ or larger). Nanobeam electron diffraction (100 nmΦ or less, or 50 nmΦ to 100 nmΦ) During the turn, a ring-shaped pattern is observed. Furthermore, this ring-shaped pattern is radially moving. In some cases, the brightness distribution may be in the direction of the beam. On the other hand, in NBED, the beam diameter of the electron beam is sufficiently In electron diffraction patterns under conditions where the size is reduced (for example, between 1 nmΦ and 10 nmΦ), the above phosphorus Multiple spots distributed in the circumferential direction (also called the θ direction) were observed at the locations of the G-shaped pattern. This can occur. In other words, a ring shape can be seen when the beam diameter of the electron beam is increased. The pattern is formed by a collection of the multiple spots mentioned above.

[0424] <2-4. Evaluation of the crystallinity of oxide semiconductor films> Below, we will describe samples (Sample X1 to Sample X3) in which three oxide semiconductor films were formed under different conditions. Samples were prepared and their crystallinity was evaluated. First, the preparation methods for samples X1 to X3 were described below. I will reveal it.

[0425] [Sample X1] Sample X1 is a sample in which an oxide semiconductor film with a thickness of approximately 100 nm is formed on a glass substrate. The oxide semiconductor film contains indium, gallium, and zinc. Oxidation of sample X1 The conditions for forming the semiconductor film are as follows: the substrate is heated to 170°C and an argon atomizer is used with a flow rate of 140 sccm. A gas and oxygen gas at a flow rate of 60 sccm are introduced into the chamber of the sputtering apparatus. The pressure is set to 0.6 Pa, and the target is a metal oxide containing indium, gallium, and zinc. A 2.5kW AC power is applied to a galvanic (In:Ga:Zn=4:2:4.1 [atomic ratio]). It was formed by the following process. The oxygen flow rate ratio under the preparation conditions for sample X1 was 30%.

[0426] [Sample X2] Sample X2 is a sample in which an oxide semiconductor film with a thickness of approximately 100 nm has been deposited on a glass substrate. The conditions for forming the oxide semiconductor film of sample X2 were as follows: heating the substrate to 130°C and flowing at a flow rate of 180°C. The sputtering apparatus is infused with argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm. It was formed by introducing it into a chamber. The oxygen flow rate ratio under the preparation conditions for sample X2 was 10%. Other than the substrate temperature and oxygen flow rate ratio, the conditions are the same as those for sample X1 shown above. did.

[0427] [Sample X3] Sample X3 is a sample in which an oxide semiconductor film with a thickness of approximately 100 nm has been deposited on a glass substrate. The conditions for forming the oxide semiconductor film of sample X3 were as follows: the substrate was at room temperature (RT), and the flow rate was 1 80 sccm of argon gas and 20 sccm of oxygen gas are supplied to the sputtering device. It was formed by introducing it into a chamber. The oxygen flow rate ratio in the preparation conditions for sample X3 was 10%. The conditions other than substrate temperature and oxygen flow rate ratio are the same as those for sample X1 shown above. It was counted as one case.

[0428] Table 1 shows the formation conditions for samples X1 to X3.

[0429] [Table 1]

[0430] Next, the crystallinity of the prepared samples X1 to X3 was evaluated. To evaluate the crystallinity, cross-sectional TEM observation, XRD measurement, and electron diffraction were performed.

[0431] [Cross-sectional TEM observation] Figures 28, 29, and 30 show the cross-sectional TEM observation results of samples X1 to X3. Figures 28(A) and 28(B) show cross-sectional TEM images of sample X1, and Figures 29(A) and 29(B) show cross-sectional TEM images of sample X2. These are cross-sectional TEM images, and Figures 30(A) and (B) are cross-sectional TEM images of sample X3.

[0432] Furthermore, Figure 28(C) shows a cross-section of sample X1 using a high-resolution transmission electron microscope (HR-TEM:Hi This is a gh Resolution-TEM image, and Figure 29(C) shows a cross-sectional HR- of sample X2. These are TEM images, and Figure 30(C) is a cross-sectional HR-TEM image of sample X3. Note that the cross-sectional HR -TEM image observation requires spherical aberration correction (C). The orrector function may also be used. High-resolution TEM images using spherical aberration correction function This is specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are used, for example, by NEC. Observation is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by our company. It is possible.

[0433] As shown in Figures 28 and 29, in samples X1 and X2, atoms are arranged in layers in the film thickness direction. Columnar crystal regions are observed. In particular, in the HR-TEM image, layered crystal regions are observed. Crystalline regions are easily observed. Also, as shown in Figure 30, in sample X3, atoms are layered in the direction of film thickness. It is difficult to see how they are arranged.

[0434] [XRD measurement] Next, we will explain the XRD measurement results for each sample.

[0435] Figure 31(A) shows the XRD measurement results for sample X1, and Figure 32(A) shows the XRD measurement results for sample X2. Figure 33(A) shows the XRD measurement results for sample X3.

[0436] XRD measurements use a type of out-of-plane method called the powder method (also known as the θ-2θ method). The θ-2θ method involves changing the incident angle of the X-rays and setting up a device opposite the X-ray source. This method measures X-ray diffraction intensity by setting the angle of the detector to the same angle as the incident angle. X-rays are incident on the film surface at an angle of approximately 0.40°, and the angle of the detector is changed to measure the intensity of X-ray diffraction. GIXRD (Grazing-I) is a type of out-of-plane method for measuring degrees. The cidication XRD method (also known as the thin-film method or Seemann-Bohlin method) .) may be used. The vertical axis in Figures 31(A), 32(A), and 33(A) is ∫ The bending strength is shown in arbitrary units, and the horizontal axis represents the angle 2θ.

[0437] As shown in Figures 31(A) and 32(A), in sample X1 and sample X2, 2θ = A peak in diffraction intensity is observed around 31°. On the other hand, as shown in Figure 33(A), the sample In X3, the diffraction intensity peak around 2θ=31° is difficult to observe, or 2θ=3 The diffraction intensity peak around 1° is extremely small, or the diffraction intensity peak around 2θ=31° is small. There is no mark.

[0438] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was for single-crystal InGaZn. This matches the diffraction angle of the (009) plane in the structural model of O4. Therefore, sample X1 and In sample X2, the above peak is observed, indicating a crystalline portion where the c-axis is oriented in the film thickness direction. (Hereinafter referred to as a crystalline portion having c-axis orientation, or the first crystalline portion) This can be confirmed. Furthermore, regarding sample X3, XRD measurements revealed that it possesses c-axis orientation. It is difficult to determine whether or not crystalline parts are present.

[0439] [Electron diffraction] Next, we will explain the results of electron diffraction measurements performed on samples X1 to X3. In electron diffraction measurements, the electron diffraction pattern is measured when an electron beam is incident perpendicularly to the cross-section of each sample. Turns were acquired. Additionally, the electron beam diameters were set to two: 1 nmΦ and 100 nmΦ.

[0440] Furthermore, in electron diffraction, not only the beam diameter of the incident electron beam, but also the thickness of the sample is important. Therefore, the electron diffraction pattern will reveal information in the depth direction. In addition to reducing the beam diameter of the sub-beam, by also reducing the thickness of the sample in the depth direction, Information can be obtained from a localized area. On the other hand, if the thickness of the sample in the depth direction is too thin... In the case of (for example, when the thickness of the sample in the depth direction is 5 nm or less), only information about extremely fine regions can be obtained. Therefore, if crystals are present in an extremely fine region, the resulting electron diffraction pattern will not be accurate. The turns may have a pattern similar to that of single crystals. If not suitable, the thickness of the sample in the depth direction should be, for example, between 10 nm and 100 nm. Ideally, the wavelength should be between 10 nm and 50 nm.

[0441] Figures 31(B) and 32(B) and 32(B) show the electron diffraction patterns of sample X1 and sample X2, respectively. The electron diffraction pattern of sample X3 is shown in Figure 33(B)(C), and the electron diffraction pattern of sample X3 is shown in Figure 33(B)(C). They will be shown.

[0442] Note that the electron beams shown in Figures 31(B)(C), 32(B)(C), and 33(B)(C) are also electron beams. The diffraction pattern is an image with adjusted contrast to make the electron diffraction pattern clearer. This is data. Also, see Figures 31(B)(C), 32(B)(C), and 33(B)(C). In this image, the brightest spot in the center is caused by the incident electron beam. This is the center of the diffraction pattern (also called the direct spot or transmitted wave).

[0443] Furthermore, as shown in Figure 31(B), when the beam diameter of the incident electron beam is set to 1 nmΦ, The presence of multiple spots distributed in a circular pattern indicates that the oxide semiconductor film is extremely small. Furthermore, it can be seen that multiple crystalline regions oriented in all directions are mixed together. As shown in Figure 31(C), when the beam diameter of the incident electron beam is set to 100 nmΦ, Multiple diffraction spots from different crystalline regions are linked together, and the brightness is averaged to form a ring-shaped diffraction pattern. It can be confirmed that it becomes a n. Also, in Figure 31(C), two ring-shaped rotations with different radii are shown. The folding pattern can be seen. Here, we will refer to the rings with smaller diameters as the first ring, the second ring, and so on. It can be confirmed that the first ring has higher brightness than the second ring. Additionally, two high-brightness spots (the first region) were observed in positions overlapping with the first ring. It will be done.

[0444] The radial distance from the center of the first ring is determined in the structural model of single crystal InGaZnO4. This is approximately the same as the radial distance from the center of the diffraction spot on the (009) plane. Region 1 is a diffraction spot caused by c-axis orientation.

[0445] Furthermore, as shown in Figure 31(C), a ring-shaped diffraction pattern is observed, indicating that acid In the crystalline semiconductor film, there are crystalline regions oriented in all directions (hereinafter referred to as those without c-axis orientation). This can also be rephrased as saying that a crystalline region (also called a second crystalline region) exists.

[0446] Furthermore, the two first regions are arranged symmetrically with respect to the center point of the electron diffraction pattern, and the brightness Since they are of similar magnitude, it can be inferred that it has twofold symmetry. Also, as mentioned above, 2 Since the two first regions are diffraction spots due to c-axis orientation, The direction of the straight line connecting the center and the other point coincides with the direction of the c-axis of the crystal. (See Figure 31(C)) Since the vertical direction is the film thickness direction, the c-axis is oriented in the film thickness direction within the oxide semiconductor film. It can be seen that a crystalline portion exists.

[0447] Thus, the oxide semiconductor film of sample X1 has a crystalline portion having c-axis orientation and c-axis orientation It can be confirmed that the film contains a mixture of crystalline and non-crystalline regions.

[0448] In the electron diffraction patterns shown in Figures 32(B)(C) and 33(B)(C), Figure 3 The electron diffraction patterns shown in 1(B) and (C) are generally the same as the results obtained. However, the c-axis orientation is different. The brightness of the two resulting spots (first region) is in the order of sample X1, sample X2, and sample X3. This suggests that the proportion of bright, c-axis oriented crystalline regions is highest in this order.

[0449] [Method for quantifying the crystallinity of oxide semiconductor films] Next, using Figures 34 to 36, we will describe an example of a method for quantifying the crystallinity of oxide semiconductor films. explain.

[0450] First, prepare an electron diffraction pattern (see Figure 34(A)).

[0451] Figure 34(A) shows a beam diameter of 100 nm applied to an oxide semiconductor film with a thickness of 100 nm. The electron diffraction pattern measured is shown in Figure 34(B), and the electron diffraction pattern shown in Figure 34(A) is shown in Figure 34(A). This is the electron diffraction pattern after contrast adjustment.

[0452] In Figure 34(B), there are two distinct spots above and below the direct spot (the first region) ) has been observed. These two spots (the first region) are the structural model of InGaZnO4 Diffraction spots corresponding to (00l) in the r, i.e., crystalline regions with c-axis orientation, occur. This is due to the fact that, separate from the first region mentioned above, there is a low-luminance region roughly concentric with the first region. A ring-shaped pattern (second region) appears to overlap. This is because the electron beam diameter is 100 nm. As a result, the structure of the crystalline portion (second crystalline portion) that does not have c-axis orientation is caused by The brightness of the potentiometers has been averaged out, resulting in a ring-shaped effect.

[0453] Here, the electron diffraction pattern has diffraction spots originating from the c-axis oriented crystalline regions. The first region and the second region having diffraction spots originating from the second crystalline part overlap. This is observed. Therefore, a line profile including the first region and a line profile including the second region By obtaining and comparing in-profiles, it is possible to quantify the crystallinity of oxide semiconductor films. Yes.

[0454] First, the line profile including the first region and the line profile including the second region This will be explained using Figure 35.

[0455] Figure 35 shows the irradiation of an electron beam from the (100) plane onto a structural model of InGaZnO4. The electron diffraction simulation pattern obtained in this case includes regions A-A' and BB. This is a diagram with auxiliary lines drawn, including ' and region C-C'.

[0456] The region A-A' shown in Figure 35 is caused by two diffraction spots resulting from a first crystalline region with c-axis orientation. It includes a straight line passing through the pot and the direct spot. Also, the region B-B' shown in Figure 35 and In the C-C' region, diffraction spots were observed that originated from the first crystalline region having c-axis orientation. This includes the area that is not present and the line passing through the direct spot. Note that area A-A' and area BB The angle at which it intersects with 'or region C-C' is near 34°, specifically between 30° and 38°. If, more preferably, the angle is between 32° and 36°, and even more preferably between 33° and 35°, good.

[0457] Furthermore, the line profile shows a tendency as shown in Figure 36, depending on the structure of the oxide semiconductor film. It has. Figure 36 shows an image of the line profile for each structure, relative luminance R, and The full width at half maximum (FWHM) of the spectrum due to c-axis orientation obtained from electron diffraction patterns. This diagram illustrates the concept of "Full Width at Half Maximum."

[0458] Note that the relative luminance R shown in Figure 36 is the integrated intensity of luminance in region A-A', and region B- This is the value obtained by dividing the luminance by the integrated intensity of the luminance in region B' or by the integrated intensity of the luminance in region C-C'. Furthermore, the integrated intensity of luminance in regions A-A', B-B', and C-C' is used. Therefore, the background brightness caused by the direct spot appearing in the center is removed. It has passed away.

[0459] By calculating the relative luminance R, the strength of c-axis orientation can be quantitatively defined. For example, as shown in Figure 36, in a single-crystal oxide semiconductor film, the c-axis orientation of region A-A' is observed. The peak intensity of the diffraction spot is high due to the first crystalline portion having properties, and region B-B' and No diffraction spots are observed in region C-C' due to the first crystalline region exhibiting c-axis orientation. Therefore, the relative brightness R becomes extremely large, exceeding 1. Also, the relative brightness R is a single crystal, CA AC only (details about CAAC will be explained later), CAAC + Nanocrystal, The order of decreasing properties is Nanocrystal followed by Amorphous. In particular, those with specific orientations... For non-transparent nanocrystals and amorphous materials, the relative luminance R is 1.

[0460] Furthermore, the more periodic the crystal structure, the more the spectrum originates from the first crystal portion which has c-axis orientation. The intensity of the Toll becomes higher, and the full width at half maximum (FMAX) of the spectrum also decreases. Therefore, the FMAX of the single crystal Smallest width, CAAC only, CAAC + Nanocrystal, Nanocrys The half-width increases in the order of tal, and in amorphous, the half-width is very large, and This profile is called "low."

[0461] [Analysis using line profiles] As described above, the integrated intensity of luminance in the first region and the integrated intensity of luminance in the second region The intensity ratio is important information for estimating the proportion of oriented crystalline regions.

[0462] Therefore, from the electron diffraction patterns of samples X1 to X3 shown above, the line profile The analysis was performed using the following method.

[0463] The line profile analysis results for sample X1 are shown in Figure 37(A1)(A2), and the line profile analysis results for sample X2 are shown in Figure 37(A1)(A2). The line profile analysis results are shown in Figure 37(B1)(B2), and the line profile of sample X3. The results of the file analysis are shown in Figures 37(C1) and (C2), respectively.

[0464] Note that Figure 37(A1) shows the electron diffraction pattern shown in Figure 31(C) with regions A-A' and region A-A'. Figure 37(B1) shows the electron diffraction pattern for regions B-B' and C-C'. The electron diffraction pattern shown in Figure 32(C) includes regions A-A', B-B', and CC. This is an electron diffraction pattern with ' indicated, and Figure 37(C1) shows the electron beam shown in Figure 33(C) Electron diffraction pattern with regions A-A', B-B', and C-C' indicated It's a turn.

[0465] Furthermore, regions A-A', B-B', and C-C' are defined as electron diffraction patterns. This can be determined by normalizing the brightness of the direct spot that appears at the center. Furthermore, this allows for relative comparisons between each sample.

[0466] Furthermore, when calculating the luminance profile, the luminance composition due to inelastic scattering from the sample is also considered. Subtracting the background time allows for a more accurate comparison. Thus, the luminance component due to inelastic scattering has an extremely broad profile in the radial direction. To obtain the target, the background brightness may be calculated using linear approximation. For example, the target Draw straight lines along the tails on both sides of the peak, and define the region located on the lower brightness side of those lines. It can be deducted as ground.

[0467] Here, using the data obtained by subtracting the background using the method described above, region A-A', The integrated intensity of luminance in regions B-B' and C-C' was calculated. Then, region A- The integrated intensity of luminance in region A', the integrated intensity of luminance in region B-B', or region C- The relative luminance R was calculated by dividing the luminance at C' by the integrated intensity.

[0468] Figure 38 shows the relative brightness R of samples X1 to X3. Note that in Figure 38, Figure 37( A2), the direct luminance profile shown in Figure 37(B2) and Figure 37(C2) In the spectra located to the left and right of the spot, the integrated intensity of the luminance in region A-A' is The value obtained by dividing the luminance in region B-B' by the integrated intensity, and the integral of the luminance in region A-A'. The intensity was divided by the integrated intensity of luminance in region C-C' to obtain the respective values.

[0469] Based on the results shown in Figure 38, the integrated intensities of samples X1 to X3 are as follows: be. • Integrated intensity of sample X1 = 25.00 • Integrated intensity of sample X2 = 3.04 • Integrated intensity of sample X3 = 1.05 The integrated intensity mentioned above was calculated as the average value at four locations. Thus, the integrated intensity is the sample The results are highest in the order of X1, sample X2, and sample X3.

[0470] An oxide semiconductor film according to one aspect of the present invention is used as a semiconductor film in which the channel of a transistor is formed. In this case, the relative luminance R is greater than 1 and less than or equal to 40, preferably greater than 1 and less than or equal to 10, and further Preferably, an oxide semiconductor film having an intensity ratio greater than 1 and less than or equal to 3 is used. By using such oxide semiconductor films as semiconductor films, high stability in electrical properties and gate voltage are achieved. This allows for both high field-effect mobility in low-temperature regions.

[0471] <2-5. Abundance of crystalline parts> The proportion of crystalline regions in an oxide semiconductor film can be estimated by analyzing cross-sectional TEM images. can.

[0472] First, let's explain the image analysis method. The image analysis method involves capturing images at high resolution. For the TEM image, a two-dimensional Fast Fourier Transform (FFT) is applied. The image is processed (anasform) to obtain an FFT image. The obtained FFT image is then analyzed for periodicity. A masking process is applied to remove everything except the desired area. Then, the masked FFT image is... , 2D Inverse Fourier Transform (IFFT) The image is processed (answered) and an FFT filtered image is obtained.

[0473] This allows us to obtain a real-space image in which only the crystalline portion is extracted. Here, the remaining image The proportion of the crystalline portion can be estimated from the area ratio. Also, the region used in the calculation ( By subtracting the remaining area from the area of ​​the original image (also called the area of ​​the original image), the area other than the crystalline part is obtained. The proportion of each part can be estimated.

[0474] Figure 39(A1) shows a cross-sectional TEM image of sample X1, and Figure 39(A2) shows a cross-sectional TEM image of sample X1. The images obtained after image analysis are shown below. Also, Figure 39(B1) shows the cross-section of sample X2. The planar TEM image is the image obtained after image analysis of the cross-sectional TEM image of sample X2 shown in Figure 39(B2). These are shown respectively. Also, Figure 39(C1) shows a cross-sectional TEM image of sample X3, and Figure 39(C2) shows... The images obtained after image analysis of the cross-sectional TEM image of sample X3 are shown below.

[0475] In the image obtained after image analysis, the white areas in the oxide semiconductor film are orientations. The regions shown in black correspond to the regions containing the crystalline parts that have orientation, and the regions shown in black are the regions that do not have orientation. This corresponds to a region containing crystalline parts or crystalline parts oriented in various directions.

[0476] As shown in Figure 39(A2), the region containing the oriented crystalline portion in sample X1 is removed. The area ratio was approximately 43.1%. Also, from the results shown in Figure 39(B2), sample X2 The area excluding the region containing the oriented crystalline portion was approximately 61.7%. Furthermore, as shown in Figure 39(C2), the region containing the oriented crystalline portion in sample X3 is... The area excluding that portion accounted for approximately 89.5%.

[0477] The proportion of the oxide semiconductor film excluding the oriented crystalline portion, as estimated in this way, is If the concentration is between 5% and less than 40%, the oxide semiconductor film is an extremely crystalline film. It is preferable because it is less likely to create oxygen vacancies and has very stable electrical properties. On the other hand, oxide semiconductors The proportion of the film excluding the oriented crystalline portion is 40% or more and less than 100%, preferably. If the percentage is between 60% and 90%, the oxide semiconductor film has oriented crystalline portions and orientation The presence of crystalline regions without these components in an appropriate proportion allows for both stable electrical properties and high mobility. It is possible.

[0478] Here, it can be clearly confirmed by cross-sectional TEM images or by image analysis of cross-sectional TEM images. The region excluding the crystalline part is called Lateral Growth Buffer Region. It can also be referred to as n(LGBR).

[0479] <2-6. Oxygen Diffusion into Oxide Semiconductor Films> Next, we will explain the results of our evaluation of the ease with which oxygen diffuses into oxide semiconductor films.

[0480] Here, we prepared the following three samples (Sample Y1 to Sample Y3).

[0481] [Sample Y1] First, on a glass substrate, an oxide layer approximately 50 nm thick was prepared using the same method as shown for sample X1. A semiconductor film was deposited. Subsequently, a silicon oxide nitride film with a thickness of approximately 30 nm was deposited on the oxide semiconductor film. A film, a silicon oxide nitride film with a thickness of approximately 100 nm, and a silicon oxide nitride film with a thickness of approximately 20 nm, It was formed by layering using plasma CVD. In the following explanation, oxide semiconductor film Sometimes, the OS is written as OS, and the silicon oxidizide film as GI.

[0482] Next, the material was heat-treated at 350°C for 1 hour under a nitrogen atmosphere.

[0483] Next, a 5nm thick In-Sn-Si oxide film was deposited using the sputtering method.

[0484] Next, the silicon oxidoxide-nitride film was subjected to oxygenation treatment. The oxygenation conditions were as follows: Using a sinking apparatus, the substrate temperature is set to 40°C, and oxygen gas is supplied at a flow rate of 150 sccm. 16 O) And, oxygen gas at a flow rate of 100 sccm ( 18 O) is introduced into the chamber, and the pressure is set to 15P Let a be a parallel flat plate installed in the ashing device so that a bias is applied to the substrate side. The procedure involved supplying 4500W of RF power between the electrodes for 600 seconds. Note that oxygen gas ( 18 The reason for using O) is that oxygen ( 16 O) is present at the main component level. Therefore, it is necessary to accurately measure the oxygen added during the oxygenation process. .

[0485] Next, a silicon nitride film with a thickness of approximately 100 nm was deposited using plasma CVD.

[0486] [Sample Y2] Sample Y2 is a sample obtained by changing the film deposition conditions for the oxide semiconductor film of sample Y1. A 50 nm thick oxide semiconductor film was deposited using the same method as for sample X2 described above.

[0487] [Sample Y3] Sample Y3 is a sample obtained by changing the film deposition conditions for the oxide semiconductor film of sample Y1. A 50 nm thick oxide semiconductor film was deposited using the same method as for sample X3 described above.

[0488] Samples Y1 to Y3 were prepared using the above process.

[0489] [SIMS analysis] For samples Y1 to Y3, SIMS (Secondary Ion Mass Saturation) Pectrometry analysis 18 The concentration of O was measured. Furthermore, SIMS analysis was performed. In this case, the conditions for evaluating the above-prepared samples Y1 to Y3 without heat treatment, and the conditions for evaluating the samples The conditions for heat treatment of samples Y1 to Y3 at 350°C for 1 hour under a nitrogen atmosphere, and for sample Y1 The three conditions are: 1) heat treatment of sample Y3 at 450°C for 1 hour under a nitrogen atmosphere, and 2) That's what I decided.

[0490] Figures 24(A), (B), and (C) show the SIMS measurement results. Note that Figure 24(A) shows sample Y1. The SIMS measurement results are shown in Figure 24(B), and Figure 24 shows the SIMS measurement results for sample Y2. (C) shows the SIMS measurement results for sample Y3.

[0491] Furthermore, Figures 24(A), (B), and (C) show the analysis results for the region including GI and OS. Figures 24(A), (B), and (C) show SIMS analysis (SSDP(Su) from the substrate side. (bstrate Side Depth Profile) - also known as SIMS - It is the result.

[0492] Furthermore, in Figures 24(A), (B), and (C), the thick dashed lines represent samples that have not undergone heat treatment. This is a file, where the thin dashed line represents the profile of the sample that underwent heat treatment at 350°C, and the solid line represents the profile of the sample that underwent heat treatment at 350°C. This is the profile of a sample that underwent heat treatment at 450°C.

[0493] In each of samples Y1 to Y3, during GI 18 The fact that O is diffusing, and O During S 18 It can be confirmed that oxygen is diffusing. Also, the following can be observed in samples Y1, Y2, and Y3. In order, to deeper positions 18 It can be confirmed that O is diffusing. Also, at 350°C and 4 By performing a heat treatment at 50°C, it can reach even deeper locations. 18 It was confirmed that O was diffusing. ru.

[0494] From the above results, it can be concluded that oriented and non-oriented crystalline parts are mixed together, and that orientation Oxide semiconductor films with a low proportion of crystalline regions are films that are easily permeable to oxygen, in other words This confirms that the film is one in which oxygen can easily diffuse. Furthermore, heat treatment at 350°C and 450°C was performed. By performing this procedure, it can be confirmed that oxygen in the GI film diffuses into the OS.

[0495] The above results indicate that the higher the proportion (density) of oriented crystalline regions, the more oxygen is present in the thickness direction. This indicates that diffusion is difficult, and that oxygen diffuses more easily in the thickness direction as the density decreases. The ease of oxygen diffusion in a crystalline semiconductor film can be considered as follows: ru.

[0496] Oxide semiconductors containing a mixture of oriented crystalline regions and extremely fine, non-oriented crystalline regions. In the film, the region other than the crystalline part (LGBR) that can be clearly observed in the cross-sectional view is where oxygen is spread. These are regions where diffusion is likely to occur, i.e., they can become diffusion pathways for oxygen. Therefore, the vicinity of oxide semiconductor films When there is a sufficient oxygen supply nearby, the oriented crystalline portion also undergoes LGBR. This is thought to make it easier for oxygen to be supplied, thereby reducing the amount of oxygen deficiency in the membrane. ru.

[0497] For example, an oxide film that readily releases oxygen is placed in contact with the oxide semiconductor film, and then heat treatment is applied. As a result, the oxygen released from the oxide film is directed in the direction of the thickness of the oxide semiconductor film by LGBR. It diffuses. Then, via LGBR, oxygen is supplied from the side to the oriented crystalline region. This can be done. As a result, the crystalline portion having orientation in the oxide semiconductor film and the other regions This allows for sufficient oxygen distribution and effectively reduces oxygen deficiency within the membrane.

[0498] For example, if there are hydrogen atoms in an oxide semiconductor film that are not bonded to metal atoms, then Oxygen atoms can bond, forming OH groups and becoming fixed. Therefore, low By forming a film at high temperature, oxygen vacancies (V) are created in the oxide semiconductor film. o ) in a state where hydrogen atoms are trapped. State (V o (let's call this H) a certain amount (for example, 1 × 10) 17 cm -3 (To a certain extent) By forming OH It suppresses the generation of V. o H generates carriers, so oxide semiconductor film A certain amount of carriers is present inside. This results in an oxidation state with increased carrier density. It is possible to form a monosemiconductor film. Furthermore, oxygen vacancies are simultaneously formed during film formation. The loss can be reduced by introducing oxygen via LGBR, as described above. By this method, an acid with a relatively high carrier density and sufficiently reduced oxygen deficiency is obtained. It is possible to form a crystalline semiconductor film.

[0499] Furthermore, regions other than the oriented crystalline parts are extremely fine crystals that do not exhibit orientation during film formation. Because it constitutes a part, no clear grain boundaries can be observed in the oxide semiconductor film. The crystalline portion is located between multiple oriented crystalline portions. These fine crystalline portions are formed during film formation. By growing laterally due to heat, it bonds with adjacent oriented crystalline regions. The fine crystalline regions also function as carrier-generating regions. This results in such a configuration Oxide semiconductor films having this property significantly improve the field-effect mobility of transistors when applied to them. It is thought that this can be improved.

[0500] Furthermore, an oxide semiconductor film is formed, and then an oxide insulating film such as a silicon oxide film is deposited on top of it. It is preferable to perform plasma treatment in an oxygen atmosphere. This treatment allows the film to be processed in In addition to supplying oxygen, hydrogen concentration can be reduced. For example, during plasma processing. In addition, fluorine remaining in the chamber may also be doped into the oxide semiconductor film. Fluorine exists as a negatively charged fluorine atom, and positively charged hydrogen HF is generated through bonding with atoms via Coulomb forces. During the plasma treatment, oxides are formed. It is released outside the semiconductor film, and as a result, the hydrogen concentration in the oxide semiconductor film is reduced. Yes, it is possible. Also, in plasma processing, oxygen atoms and hydrogen atoms combine to form H2O, which forms a film. It may also be released into the air.

[0501] Furthermore, a configuration in which a silicon oxide film (or silicon oxide nitride film) is laminated on an oxide semiconductor film. Consider this: Fluorine in a silicon oxide film combines with hydrogen in the film, resulting in electrically neutral HF. Because it can exist as such, it does not affect the electrical properties of the oxide semiconductor film. Although a reaction may occur, this also results in an electrically neutral solution. Furthermore, HF in the silicon oxide film is acidic. It is thought that this does not affect the basic diffusion.

[0502] Through the mechanism described above, oxygen vacancies in the oxide semiconductor film are reduced, and gold in the film is also reduced. It is believed that reliability can be improved by reducing the amount of hydrogen that is not bonded to a group atom. Furthermore, if the carrier density of the oxide semiconductor film is above a certain level, the electrical properties are improved. It is thought that this is the case.

[0503] <2-7. Method for Deposition of Oxide Semiconductor Films> The following describes a method for forming an oxide semiconductor film according to one aspect of the present invention.

[0504] An oxide semiconductor film according to one aspect of the present invention is obtained by sputtering in an oxygen-containing atmosphere. It can be used to form a thin film.

[0505] The substrate temperature during film formation should be above room temperature and below 150°C, preferably between 50°C and 150°C. Preferably, the temperature is between 100°C and 150°C, and typically 130°C. By keeping the substrate temperature within the above range, the oriented crystalline portion and the non-oriented portion are formed. The ratio of the crystalline portion to the crystalline portion can be controlled.

[0506] Furthermore, the oxygen flow rate ratio (oxygen partial pressure) during film formation should be 1% or more and less than 33%, preferably 5% or more. 30% or less, more preferably 5% to 20%, and even more preferably 5% to 15%. Typically, it is preferable to set it to 10%. By reducing the oxygen flow rate, orientation is achieved. This allows for the inclusion of a larger amount of non-crystalline material within the film.

[0507] Therefore, by setting the substrate temperature and oxygen flow rate during film formation within the above-mentioned range, orientation can be controlled. It is possible to obtain an oxide semiconductor film in which crystalline portions having orientation and crystalline portions without orientation are mixed together. It is possible. Furthermore, by keeping the substrate temperature and oxygen flow rate within the above range, an oriented crystal can be formed. This makes it possible to control the proportion of crystalline parts that do not have orientation to the oriented parts.

[0508] Oxide targets that can be used for depositing oxide semiconductor films include In-Ga-Z Not limited to n-based oxides, for example, In-M-Zn oxides (where M is Al, Ga, Y, and The Sn) can be applied to this.

[0509] Furthermore, using a sputtering target containing a polycrystalline oxide having multiple crystal grains, acid When an oxide semiconductor film containing crystalline parts, which are oxide semiconductor films, is formed, polycrystalline oxides are not included. Compared to using a sputtering target, a crystalline oxide semiconductor film can be obtained. It's easy to get it.

[0510] The following describes a consideration of the deposition mechanism of oxide semiconductor films. The target for the polishing has multiple crystal grains, and these crystal grains have a layered structure. If the crystal grain has an interface that is easily cleaved, ions will be introduced into the sputtering target. By colliding them, the crystal grains cleave, and plate-shaped or pellet-shaped sputtering particles are formed. It may be obtained. The obtained flat or pellet-shaped sputtering particles on the substrate It is thought that an oxide semiconductor film containing nanocrystals is formed by deposition on the substrate. By heating, bonding or rearrangement of the nanocrystals progresses on the substrate surface. This is thought to facilitate the formation of oxide semiconductor films containing oriented crystalline regions. It can be done.

[0511] Here, we have described the method of formation using the sputtering method, but in particular, sputtering The ring method is preferred because it allows for easy control of crystallinity. In addition to the G method, other methods include pulsed laser deposition (PLD) and plasma chemical vapor deposition (PECV). D) method, thermal CVD (Chemical Vapor Deposition) method, ALD Methods such as Atomic Layer Deposition (Atomic Layer Deposition) and vacuum deposition can also be used. An example of a thermal CVD method is MOCVD (Metal Organic Chemical). One example is the (al Vapor Deposition) method.

[0512] This embodiment can be appropriately combined with other embodiments described herein, at least in part. They can be implemented together.

[0513] (Embodiment 3) In this embodiment, a semiconductor device and a method for manufacturing a semiconductor device according to one aspect of the present invention are shown in Figure This will be explained with reference to Figures 40 through 47.

[0514] <3-1. Example of Semiconductor Device Configuration 1> Figure 40(A) is a top view of a semiconductor device 200 according to one embodiment of the present invention, and Figure 40(B) is This corresponds to the cross-sectional view of the section between the dashed line A1 and A2 shown in Figure 40(A). 40(B) shows the cross-section of transistor Tr1 in the channel length (L) direction, and transistor T Includes a cross-section of r2 in the direction of the channel length (L).

[0515] The semiconductor device 200 shown in Figures 40(A) and 40(B) includes transistor Tr1 and transistor T It has a transistor Tr2 in which at least a portion of r1 overlaps with each other. Both transistor Tr1 and transistor Tr2 are top-gate type transistors.

[0516] A region is provided in which transistors Tr1 and Tr2 overlap at least partially. This allows for a reduction in the area required for the transistors to be placed.

[0517] Transistor Tr1 consists of an insulating film 106 on substrate 102 and an oxide semiconductor on insulating film 106. A film 108, an insulating film 110 on the oxide semiconductor film 108, and a conductive film 120 on the insulating film 110 It also includes an insulating film 106, an oxide semiconductor film 108, and an insulating film 114 on a conductive film 120. Furthermore, similar to Embodiment 1, the oxide semiconductor film 108 overlaps with the conductive film 120 and is insulating The channel region 108i is in contact with the edge film 110, and the source region 108s is in contact with the insulating film 114. It has a drain region 108d that is in contact with the insulating film 114.

[0518] Furthermore, transistor Tr1 has an insulating film 116 on the insulating film 114, and insulating film 114 and insulating film. The oxide semiconductor film 108 is electrically connected through the opening 141a provided on the film 116. The conductive film 112a and the openings 141b provided in the insulating film 114 and insulating film 116 A conductive film 112b is electrically connected to the oxide semiconductor film 108 via an insulating film 116, It comprises a conductive film 112a and an insulating film 118 on the conductive film 112b.

[0519] Furthermore, transistor Tr2 has a conductive film 112b and an insulating film 118 on the conductive film 112b, The oxide semiconductor film 208 on the insulating film 118, and the insulating film 210b on the oxide semiconductor film 208 , conductive film 212b on insulating film 210b, and oxide semiconductor film 208 and conductive film 212b It has an insulating film 214. Also, similar to the oxide semiconductor film 108, the oxide semiconductor film 208 This includes a channel region 208i that overlaps with the conductive film 212b and is in contact with the insulating film 210b, and an insulating film. The source region 208s is in contact with the edge film 214, and the drain region 208d is in contact with the insulating film 214. It has, and

[0520] Furthermore, transistor Tr2 is provided on insulating film 216 on insulating film 214 and on insulating film 216 A conductive film 218a is electrically connected to the oxide semiconductor film 208, and an insulating film 216 is placed on top of it. It includes a conductive film 218b which is provided and electrically connected to the oxide semiconductor film 208.

[0521] As shown in Figures 40(A) and 40(B), the oxide semiconductor film 108 and the oxide semiconductor film 20 The number 8 has overlapping regions.

[0522] The oxide semiconductor film 108 can be the same as the configuration shown in Embodiment 1. The oxide semiconductor film 208 has the same configuration as the oxide semiconductor film 128 shown in Embodiment 1. It is possible.

[0523] Therefore, it becomes possible to create a high field-effect mobility for transistor Tr2.

[0524] For example, a transistor with high field-effect mobility, as described above, generates the gate signal of a display device. By using it in the gate driver, it provides a display device with a narrow bezel (also called a narrow-bezel display). It is possible. Furthermore, the display device has a transistor with high field-effect mobility as described above. A source driver that supplies signals from the signal line (especially the shifts that the source driver has) By using it in a demultiplexer connected to the output terminal of a resistor, it can be connected to a display device. A display device with a small number of wires can be provided. Also, the above field effect mobility is High-performance transistors are used in the selection transistors and drive transistors of the pixel circuits of the display device. By using either one or both of the above, it is possible to provide a display device with high display quality. can.

[0525] The semiconductor device 100A shown in Figure 40 does not show the capacitive element Cs1, but it is conductive. Capacitance between the film formed simultaneously with film 112b and the film formed simultaneously with conductive film 212b This can be formed using the insulating film that forms this capacitance simultaneously with the insulating film 118. The formed film and the film formed simultaneously with the insulating film 210b, either or both. ru.

[0526] One aspect of the present invention is a film formed simultaneously with the insulating film 118 on the insulating film that forms this capacitance. Let's assume that a certain ON current is obtained in the saturation region of the oxide semiconductor. The oxide semiconductor of the transistor measured in Figure 8(B) or Figure 8(C) is present on film 208. By using a conductive film, the oxide semiconductor film of the transistor measured in Figure 8(A) Compared to the case using [this method], the film thickness of the film formed simultaneously with the insulating film 210b can be increased. ru.

[0527] In other words, the transistor Tr2 is connected to the transistor measured in Figure 8(B) or Figure 8(C). By using the oxide semiconductor film possessed by the zista, the retained capacitance of the capacitive element Cs1 is reduced. This allows for a reduction in the footprint of the transistor.

[0528] Furthermore, the semiconductor device 200 shown in Figures 40(A) and 40(B) is suitably used in the pixel circuit of a display device. This allows for an arrangement as shown in Figures 40(A) and 40(B), which increases the pixel density of the display device. This makes it possible to increase the pixel density of a display device, Alternatively, even when the pixel density of the display device exceeds 2000 ppi, as shown in Figure 40(A)(B) By arranging the pixels as shown, the aperture ratio can be increased.

[0529] Note that when the semiconductor device 200 shown in Figures 40(A) and 40(B) is applied to the pixel circuit of a display device... In this case, a configuration similar to the pixel circuit shown in Figure 9 can be used.

[0530] Furthermore, when the semiconductor device 200 shown in Figures 40(A) and 40(B) is applied to the pixels of a display device, for example, For example, the channel length (L) and channel width (W) of a transistor, or the channel width of a transistor The wire width of the connecting wires and electrodes can be made relatively large. For example, Compared to the case where transistors Tr1 and Tr2 are placed on the same plane, Figure 40(A) As shown in (B), at least a portion of transistor Tr1 and transistor Tr2 overlap By arranging them horizontally, the line width and other dimensions can be increased, thus reducing variations in processing dimensions. It becomes possible to reduce it.

[0531] Furthermore, in transistor Tr1 and transistor Tr2, either the conductive film or the insulating film is used. Since one or both methods can be used in common, the number of masks or the number of processes can be reduced. This is possible.

[0532] For example, in transistor Tr1, the conductive film 120 functions as a gate electrode, and the conductive film 112a functions as the source electrode, and the conductive film 112b functions as the drain electrode. Furthermore, in transistor Tr1, the insulating film 110 functions as a gate insulating film. In transistor Tr2, the conductive film 112b functions as the first gate electrode, and the conductive film 218a functions as the source electrode, and the conductive film 218b functions as the drain electrode. Film 212b functions as a second gate electrode. Also, in transistor Tr2, The edge film 118 functions as the first gate insulating film, and the insulating film 210b functions as the second gate insulating film. It functions in this way.

[0533] In this specification, the insulating film 210b may be referred to as the fourth insulating film.

[0534] Furthermore, an insulating film 136 is provided on the insulating film 216 and the conductive films 218a and 218b. Furthermore, the insulating film 136 is provided with an opening 186 that reaches the conductive film 218b. A conductive film 138 is provided on the insulating film 136. The conductive film 138 is located at the opening 186 It is connected to the conductive film 218a via this.

[0535] Furthermore, an insulating film 140, an EL layer 142, and a conductive film 144 are provided on the conductive film 138. Furthermore, the conductive film 138, the EL layer 142, and the conductive film 144 form the light-emitting element 160. This is what is formed.

[0536] Also, although not shown in the drawings, transistors Tr1 and t shown in Figures 40(A) and (B) The transistor Tr2 may also be an S-channel structure as described in Embodiment 1.

[0537] Furthermore, the semiconductor device 200 shown in this embodiment has transistors Tr1 and transistors Transistor Tr2 and transistors Tr1 and Tr2 of the semiconductor device 100A shown in Embodiment 1 It can be used in combination with the Rangista Tr2.

[0538] As described above, a semiconductor device according to one aspect of the present invention has a stacked structure of multiple transistors, The footprint of the transistor is reduced. Also, in multiple transistors, the insulating film and conductive film are reduced. By using either or both of the film types in common, the number of masks or processes can be reduced. It is possible.

[0539] <3-2. Components of Semiconductor Devices> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0540] <Conductive film> The conductive films 212b, 218a, and 218b are the conductive films described in Embodiment 1 (conductive film 1 12a, conductive film 112b, conductive film 122a, conductive film 122b, conductive film 120, conductive film 13 Materials such as conductive film 138 and conductive film 144 can be used. In particular, conductive film 21 Using an oxide conductor (OC) for 2b is preferable because it allows oxygen to be added to the insulating film 210b. It is suitable.

[0541] <Insulated film> The insulating films 214, 216, and 210b are the insulating films described in Embodiment 1 (insulating film 106 , insulating film 114, insulating film 116, insulating film 118, insulating film 124, insulating film 126, insulating film 1 Materials for 34, insulating film 136, and insulating film 140 can be used.

[0542] Furthermore, since the insulating film 118 is in contact with the oxide semiconductor film 208, an oxide insulating film is preferred. In particular, a silicon oxide film or a silicon oxide-nitride film is preferred. Also, insulating film 210b Preferably, it is an oxide insulating film, and contains an excess of oxygen in a stoichiometric composition. It is more preferable to have a region (excess oxygen region). As for the insulating film 210b, A silicon film or a silicon oxidizride film is preferable.

[0543] Furthermore, the insulating film 214 contains either hydrogen or nitrogen, or both. The film 214 contains nitrogen and silicon. The insulating film 214 also contains oxygen, hydrogen, water, and aluminum. It has the ability to block potassium metals, alkaline earth metals, etc. Oxide semiconductor film 20 When 8 comes into contact with the insulating film 214, either the hydrogen or nitrogen in the insulating film 214 is released. Both enter the oxide semiconductor film 208, and the carrier density of the oxide semiconductor film 208 It can be made higher. Therefore, the acid in contact between the oxide semiconductor film 208 and the insulating film 214 The regions within the ionized semiconductor film 208 function as either source regions or drain regions.

[0544] <Oxide semiconductor film> The oxide semiconductor film 208 is the oxide semiconductor film described in Embodiment 1 (oxide semiconductor film Materials such as 108 and oxide semiconductor films (128) can be used.

[0545] <3-3. Method for Manufacturing Semiconductor Devices> Next, a method for manufacturing a semiconductor device 200 according to one aspect of the present invention will be described using Figures 41 to 47. I will explain.

[0546] Note that Figures 41(A), 42(A), 43(A), 44(A), 45(A), and 4 Figures 6(A) and 47(A) are top views illustrating the method for manufacturing the semiconductor device 200. Figures 41(B), 42(B), 43(B), 44(B), 45(B), 46(B) Figures 47(B) and 47(B) are cross-sectional views illustrating a method for manufacturing the semiconductor device 200.

[0547] The method for fabricating transistor Tr1 is the method described in Embodiment 1. Yes, it is possible. Therefore, an insulating film 106, an oxide semiconductor film 108, and an insulating film 11 are placed on the substrate 102. 0, conductive film 120, insulating film 114, insulating film 116, conductive film 112a, conductive film 112b, insulating film For the method of forming the border film 118, refer to Embodiment 1 and Figures 14 to 16. .

[0548] Next, an insulating film 118 is formed on the insulating film 116 and the conductive films 112a and 112b. The insulating film 118 can be formed in the same manner as in Embodiment 1.

[0549] Next, an oxide semiconductor film 208 is formed on the insulating film 118 (see Figures 41(A) and 41(B)).

[0550] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4:2 Using :4.1[atomic ratio]), an oxide semiconductor film is formed by sputtering. Furthermore, the substrate temperature during the formation of the oxide semiconductor film was set to 170°C, and the film formation gas during the formation was set to This uses oxygen gas at a flow rate of 60 sccm and argon gas at a flow rate of 140 sccm. Subsequently, the oxide semiconductor film is processed into a desired shape to form an island-shaped oxide semiconductor film 20 Form 8. A wet etching apparatus is used to form the oxide semiconductor film.

[0551] Next, a laminated film of the insulating film and the conductive film is formed on the insulating film 118 and the oxide semiconductor film 208. Then, by processing the laminated film into a desired shape, island-shaped insulating film 210b and island-shaped A conductive film 212b is formed (see Figures 42(A) and 42(B)).

[0552] Subsequently, insulating film 214 is applied to insulating film 118, oxide semiconductor film 208, and conductive film 212b. Form 216. Furthermore, by forming the insulating film 214, the oxide in contact with the insulating film 214 The semiconductor film 208 consists of a source region 208s and a drain region 208d. The oxide semiconductor film 208 that does not come into contact with 214, in other words, the oxide semiconductor film that comes into contact with the insulating film 210b The membrane 208 becomes channel region 208i. Thus, channel region 208i, source An oxide semiconductor film 208 having region 208s and drain region 208d is formed ( See Figures 43(A) and 43(B).

[0553] In this embodiment, the insulating film 210b is a silicon oxidizride film with a thickness of 50 nm, P It is formed using an ECVD apparatus. Furthermore, the conductive film 212b is an oxide film with a thickness of 200 nm. A material semiconductor film is formed using a sputtering apparatus. The same composition as the oxide semiconductor film 208 is used. In addition, the insulating film 214 has a thickness of 10 A 0 nm silicon nitride film is formed using a PECVD apparatus. In addition, an insulating film 216 is formed. Next, a silicon oxide-nitride film with a thickness of 200 nm is formed using a PECVD apparatus.

[0554] By using a silicon nitride film as the insulating film 214, the conductive film 21 in contact with the insulating film 214 2b, source region 208s, and drain region 208d contain hydrogen and nitrogen in the silicon nitride film. Either one or both of the elements penetrate, forming the conductive film 212b, the source region 208s, and the do The carrier density in the rain region 208d can be increased. Therefore, oxide semiconductor film 2 A portion of area 08 and the conductive film 212b become an oxide conductor (OC).

[0555] The insulating film 210b is formed self-aligned using the conductive film 212b as a mask.

[0556] Next, openings 282 that reach the oxide semiconductor film 208 in desired regions of the insulating films 214 and 216 a, 282b are formed (see Figure 43(A)(B)).

[0557] The openings 282a and 282b are formed using a dry etching apparatus or wet etching. Use the device.

[0558] Next, the insulating film 216 and the oxide semiconductor film 208 are placed to cover the openings 282a and 282b. A conductive film is formed on top, and the conductive film is processed into an island shape, thereby creating conductive films 218a and 218b. Form (see Figures 43(A) and 43(B)).

[0559] Conductive films 218a and 218b consist of a tungsten film with a thickness of 100 nm and a film with a thickness of 200 nm. A copper film is formed by sputtering.

[0560] By following the above steps, transistor Tr2 can be fabricated.

[0561] Next, an insulating film 136 is formed on the insulating film 216 and the conductive films 218a and 218b. By processing a desired region of the insulating film 136, an opening 186 that reaches the conductive film 218a is created. Form (see Figures 44(A) and 44(B)).

[0562] In this embodiment, the insulating film 136 is a photosensitive acrylic resin film with a thickness of 1.5 μm. It forms.

[0563] Next, a conductive film is formed on the insulating film 136 and the conductive film 218a, and the conductive film is processed into an island shape. This process forms a conductive film 138 (see Figures 45(A) and 45(B)).

[0564] In this embodiment, the conductive film 138 is an ITSO film with a thickness of 10 nm and a film with a thickness of 200 nm. A reflective metal film of m (here, a metal film having silver, palladium, and copper) and a thickness of 10 A laminated film with an nm-thick ITSO film is used. Furthermore, wet etching is used for processing the conductive film 138. A ching device is used.

[0565] Next, island-shaped insulating films 140 are formed on the insulating film 136 and the conductive film 138 (Figure 46(A)). (See (B)).

[0566] As the insulating film 140, a photosensitive polyimide-based resin film with a thickness of 1.5 μm is used.

[0567] Next, an EL layer 142 is formed on the conductive film 138, and then the insulating film 140 and the EL layer 142 By forming the conductive film 144 on top, the light-emitting element 160 is formed (see Figure 47(A)(B)). see).

[0568] The method for forming the light-emitting element 160 will be described in Embodiment 4.

[0569] By following the above steps, the semiconductor device 200 shown in Figures 40(A) and 40(B) can be manufactured.

[0570] The configuration and method shown in this embodiment may be appropriately combined with the configuration and method shown in other embodiments. They can be used together.

[0571] (Embodiment 4) In this embodiment, regarding a light-emitting element that can be used in a semiconductor device according to one aspect of the present invention This will be explained using Figures 48 to 50.

[0572] <4-1. Example of light-emitting element configuration> First, regarding the configuration of a light-emitting element that can be used in a semiconductor device according to one aspect of the present invention, see Figure 4. This will be explained using figure 8. Figure 48 is a schematic cross-sectional view of the light-emitting element 160.

[0573] Furthermore, the light-emitting element 160 may be made of either an inorganic compound or an organic compound, or both. It can be used. The organic compound used in the light-emitting element 160 is a low molecular weight compound or Polymer compounds are examples. Polymer compounds are thermally stable and can be easily applied uniformly by coating methods, etc. It is suitable because it can form a thin film with excellent properties.

[0574] The light-emitting element 160 shown in Figure 48 has a pair of electrodes (conductive film 138 and conductive film 144), The device has an EL layer 142 provided between the pair of electrodes. The EL layer 142 is at least an emissive layer. It has 150.

[0575] Furthermore, the EL layer 142 shown in Figure 48 includes, in addition to the light-emitting layer 150, a hole injection layer 151 and a hole transport layer. It has functional layers such as layer 152, electron transport layer 153, and electron injection layer 154.

[0576] In this embodiment, of the pair of electrodes, the conductive film 138 is used as the anode, and the conductive film Although 144 is described as the cathode, this is not the case for the configuration of the light-emitting element 160. Furthermore, conductive film 138 is used as the cathode, conductive film 144 as the anode, and the stacking of each layer between these electrodes is as follows: The order can also be reversed. That is, from the anode side, the hole injection layer 151 and the hole transport layer 152 If the order in which the light-emitting layer 150, the electron transport layer 153, and the electron injection layer 154 are stacked is... Yes.

[0577] Note that the configuration of the EL layer 142 is not limited to the configuration shown in Figure 48, and in addition to the light-emitting layer 150, From among the pore injection layer 151, hole transport layer 152, electron transport layer 153, and electron injection layer 154 The configuration should have at least one selected element. Alternatively, the EL layer 142 may have holes. or reduce the electron injection barrier, improve hole or electron transport, It has functions such as inhibiting transportability or suppressing quenching by electrodes. The configuration may have multiple functional layers. Note that each functional layer may be a single layer, or multiple layers may be combined. It may also be a stacked configuration.

[0578] Low molecular weight compounds and high molecular weight compounds can be used in the light-emitting layer 150.

[0579] In this specification, a polymer compound is defined as having a molecular weight distribution and an average molecular weight of 1× 10 3 〜1×10 8 It is a polymer. Furthermore, a low molecular weight compound is a polymer that has a molecular weight distribution. The molecular weight is 1 × 10 4 The following compounds are involved.

[0580] Furthermore, polymer compounds are compounds in which one or more constituent units are polymerized. The constituent unit refers to one or more units that a polymer compound has.

[0581] Furthermore, polymer compounds include block copolymers, random copolymers, alternating copolymers, and graft copolymers. It may be any copolymer, or any other embodiment.

[0582] When the terminal groups of a polymer compound have polymerization-active groups, the luminescence characteristics or brightness in a light-emitting element may change. This can lead to a reduction in lifespan. Therefore, the end groups of polymer compounds should be stable. It is preferable that the group is an end group. Preferably, the stable end group is one that is covalently bonded to the main chain. A group that is bonded to an aryl group or a heterocyclic group via a carbon-carbon bond is preferred.

[0583] When a low molecular weight compound is used in the light-emitting layer 150, the low molecular weight compound that functions as the host material is added to it. Furthermore, it is preferable to have a luminescent low-molecular-weight compound as a guest material. In the luminescent layer 150 The host material is present in a greater proportion by weight than the guest material, and the guest material is the host It is dispersed within the material.

[0584] As a guest material, any luminescent organic compound may be used, and as such a luminescent organic compound This refers to a substance that can emit fluorescence (hereinafter also called a fluorescent compound) or a substance that emits phosphorescence. A substance capable of this (hereinafter also referred to as a phosphorescent compound) can be used.

[0585] In one embodiment of the present invention, the light-emitting element 160 comprises a pair of electrodes (conductive film 138 and conductive film 14 4) By applying a voltage between them, electrons are released from the cathode and holes from the anode. These are injected into the EL layer 142, and current flows. Then, the injected electrons and holes recombine. By doing so, excitons are formed. Through the recombination of carriers (electrons and holes) The ratio of singlet excitons to triplet excitons among the generated excitons (hereinafter referred to as the exciton generation probability) is, The ratio is 1:3 according to the statistical probability. Therefore, in light-emitting devices using fluorescent compounds, The proportion of singlet excitons that contribute to light generation is 25%, while triplet excitons that do not contribute to light emission are generated. The rate at which offspring are generated is 75%. On the other hand, in light-emitting devices using phosphorescent compounds, Both multiplet and triplet excitons can contribute to luminescence. Therefore, fluorescence Light-emitting devices using phosphorescent compounds have higher luminescence efficiency than light-emitting devices using compounds. Therefore, it is preferable.

[0586] An exciton is a carrier (electron and hole) pair. An exciton possesses energy. Therefore, the material from which excitons are generated enters an excited state.

[0587] When a polymer compound is used in the light-emitting layer 150, the polymer compound has holes as its constituent units. A framework that has the function of transporting (hole transport) and a framework that has the function of transporting electrons (electron transport). It is preferable to have a skeleton that is π-electron-rich complex aromatic skeleton or aromatic ammonium It is preferable that it has at least one of the n-frameworks and a π-electron-deficient complex aromatic skeleton. These skeletons are connected directly or via other skeletons.

[0588] Furthermore, the polymer compound has a backbone that has hole-transporting properties and a backbone that has electron-transporting properties. In this case, it becomes possible to easily control your career balance. Control of the combined region can also be easily performed. For this purpose, a framework with hole transport properties and electricity The ratio of the skeletal structure with nutrient transport properties to the other material is preferably in the range of 1:9 to 9:1 (molar ratio). The electron-transporting skeleton has a higher proportion of components than the hole-transporting skeleton. It is preferable.

[0589] Furthermore, polymer compounds, as constituent units, possess a hole-transporting skeleton and electron-transporting properties. In addition to the crystalline structure, it may also have a luminescent crystalline structure. In this case, it is preferable that the proportion of the luminescent skeleton to the total constituent units of the polymer compound is low. Specifically, preferably 0.1 mol% or more and 10 mol% or less, more preferably The concentration is between 0.1 mol% and 5 mol%.

[0590] Furthermore, the polymer compound used in the light-emitting element 160 has specific bonding directions and bonding angles for each constituent unit. The compounds may have different bond lengths, etc. Furthermore, each structural unit may have different substituents. The polymerization method of each constituent unit may also be They may be different.

[0591] Furthermore, the light-emitting layer 150, in addition to the polymer compound that functions as the host material, also contains low-luminescence components. The child material may be used as a guest material. In this case, the polymerized host material may function as a host material. A low molecular weight luminescent compound is dispersed in the compound as a guest material, and the high molecular weight compound is small However, it is present in greater weight proportion than luminescent low-molecular-weight compounds. Content of luminescent low-molecular-weight compounds The weight ratio of this to the polymer compound is preferably 0.1 wt% to 10 wt%. More preferably, the amount is 0.1 wt% or more and 5 wt% or less.

[0592] <4-2. Method for fabricating light-emitting elements> Here, we will explain the method for forming the EL layer 142 using the droplet ejection method with reference to Figure 49. Figures 49(A) to 49(D) are cross-sectional views illustrating the method for fabricating the EL layer 142. ru.

[0593] In Figure 49(A), the insulating film 136, the conductive film 138, and the insulating film 140 are formed. The circuit board is shown in the diagram.

[0594] First, liquid droplets are dispensed from the droplet dispenser 683 onto the exposed portion of the conductive film 138, which is an opening in the insulating film 140. A droplet 684 is dispensed to form a layer 685 containing the composition. The droplet 684 is a composition containing a solvent. It adheres to the conductive film 138 (see Figure 49(B)).

[0595] The process of dispensing the droplet 684 may also be carried out under reduced pressure.

[0596] Next, the solvent is removed from the layer 685 containing the composition and solidified to form the EL layer 142. This is achieved (see Figure 49(C)).

[0597] The solvent can be removed by either a drying or heating process.

[0598] Next, a conductive film 144 is formed on the EL layer 142 to form the light-emitting element 160 (Figure 49(D )reference).

[0599] By performing the EL layer 142 using the droplet ejection method, the composition can be selectively ejected. Therefore, material loss can be reduced. Also, lithography processing for shaping Because no special steps are required, the process can be simplified, resulting in lower costs.

[0600] Note that Figure 49 illustrates the process of forming the EL layer 142 in a single layer, but Figure 48 shows As such, if the EL layer 142 has a functional layer in addition to the light-emitting layer 150, each layer is treated with a conductive film 13 It is fine to form them sequentially starting from side 8. At this time, hole injection layer 151, hole transport layer 152, Even if the photolayer 150, electron transport layer 153, and electron injection layer 154 are formed using the droplet ejection method Often, the hole injection layer 151, the hole transport layer 152, and the light-emitting layer 150 are formed using a droplet ejection method. The electron transport layer 153 and electron injection layer 154 may be formed by a vapor deposition method or the like. The light layer may be formed by methods such as droplet ejection and vapor deposition.

[0601] For example, the hole injection layer 151 is poly(ethylenedioxythiophene) / poly(styrene Lensulfonic acid can be formed using coating methods such as droplet dispensing or spin coating. Furthermore, the hole transport layer 152 can be formed from a hole transport material, for example. For example, polyvinylcarbazole is formed using coating methods such as droplet dispensing or spin coating. This can be done. After the formation of the hole injection layer 151 and the hole transport layer 152, the atmospheric atmosphere The heat treatment may be carried out under ambient air or under an inert gas atmosphere such as nitrogen.

[0602] The light-emitting layer 150 can be purple, blue, blue-green, green, yellow-green, yellow, orange, or red. By selecting at least one luminescent polymer or low molecular weight compound from among them It can be formed. High molecular weight and low molecular weight compounds exhibit fluorescence or phosphorescence. Luminescent organic compounds can be used. High molecular weight and low molecular weight compounds can be dissolved. By dissolving it in a medium, it can be formed by coating methods such as droplet dispensing or spin coating. It can be done. Also, after the formation of the light-emitting layer 150, in an atmospheric atmosphere or an inert gas atmosphere such as nitrogen. Heat treatment may be performed below. Furthermore, fluorescent or phosphorescent organic compounds may be used as guest materials. Furthermore, the guest material is a polymer compound or low molecular weight compound with a greater excitation energy than the guest material. The material may be dispersed. Furthermore, the luminescent organic compound may be used to form a film on its own, but other materials may be used as well. It may be mixed with other materials to form a film. Alternatively, the light-emitting layer 150 may have a two-layer structure. In that case, the two light-emitting layers each contain a light-emitting organic compound that exhibits a different light emission color from the other. It is preferable to have it. Also, when a low molecular weight compound is used in the light-emitting layer 150, a vapor deposition method is used. It can be formed by [doing something].

[0603] The electron transport layer 153 can be formed by depositing a material with high electron transport properties. Furthermore, the electron injection layer 154 is formed by depositing a material with high electron injection properties. This is possible. The electron transport layer 153 and the electron injection layer 154 are formed using a vapor deposition method. It is possible.

[0604] The conductive film 144 can be formed using a vapor deposition method. The conductive film 144 is transparent It can be formed using a conductive film having reflective properties. Furthermore, the conductive film 144 can have reflective properties. A conductive film having light-transmitting properties and a conductive film having light-transmitting properties may be laminated together.

[0605] The droplet ejection method described above refers to methods such as inkjet printing and nozzle printing, which are used to dispense the composition. Discharges droplets from a nozzle having an outlet, or from a head having one or more nozzles. This term refers to all those who possess the means to do so.

[0606] <4-3.Droplet discharge device> Next, the droplet dispensing device used in the droplet dispensing method will be explained using Figure 50. Figure 50 is This is a conceptual diagram illustrating the droplet dispensing device 1400.

[0607] The droplet dispensing device 1400 has a droplet dispensing means 1403. It has a head 1405 and a head 1412.

[0608] Heads 1405 and 1412 are connected to control means 1407, which is a computer By controlling it with the TA1410, it is possible to draw on a pre-programmed pattern. Cut.

[0609] Furthermore, as for the timing of drawing, for example, the marker 14 formed on the substrate 1402 You can use 11 as the reference point. Alternatively, you can determine the reference point by using the outer edge of substrate 1402 as the reference point. It is also acceptable. Here, the marker 1411 is detected by the imaging means 1404, and the image processing means 14 The signal converted to digital in step 09 is recognized by computer 1410, which then generates a control signal. Then send it to control means 1407.

[0610] The imaging means 1404 may include a charge-coupled device (CCD) or a complementary metal-oxide-semiconductor (C) Image sensors using MOS (Motion Sensors) can be used. The information of the pattern to be formed is stored in the storage medium 1408, and based on this information A control signal is sent to the control means 1407, and the individual heads 1405 of the droplet dispensing means 1403, The head 1412 can be controlled individually. The material to be dispensed is supplied by the material supply source 1413. The material is supplied from the material source 1414 through piping to heads 1405 and 1412, respectively. It can be done.

[0611] The inside of the head 1405 has a space 1406 for filling with liquid material, as indicated by the dotted line, and a discharge space. It has a structure that includes a nozzle, which is the opening. Although not shown in the diagram, head 1412 and head 14 It has a similar internal structure to 05. The nozzles of head 1405 and head 1412 are different sizes. By using a single head, it is possible to draw different materials at different widths simultaneously. It can extrude and draw with multiple types of luminescent materials, and when drawing over a wide area... To improve throughput, the same material is simultaneously dispensed from multiple nozzles for drawing. This is possible. When using a large substrate, heads 1405 and 1412 move across the substrate as shown in Figure 50. You can freely scan in the direction of the X, Y, and Z arrows shown inside and freely set the area to be drawn. This allows for the same pattern to be drawn multiple times on a single circuit board.

[0612] Furthermore, the process of extruding the composition may be carried out under reduced pressure. The substrate may be heated during extruding. Alternatively, after the composition is extruded, one or both of the drying and / or calcination steps are performed. Both processes involve heat treatment, but their purpose, temperature, and time differ. Drying process, baking The forming process is carried out under normal pressure or reduced pressure using laser irradiation, instantaneous heat annealing, heating furnaces, etc. The process is carried out. The timing and number of times this heat treatment is performed are not particularly limited. In order to carry out the firing process successfully, the temperature at that time depends on the properties of the substrate material and composition. To depend on.

[0613] As described above, the EL layer 142 can be formed using a droplet dispensing device.

[0614] The configuration shown in this embodiment can be used in appropriate combination with other embodiments. ru.

[0615] (Embodiment 5) In this embodiment, an example of a display device having the semiconductor device illustrated in the previous embodiment is provided. This will be explained below using Figures 51 to 53.

[0616] <5-1. Top view of the display device> Figure 51 is a top view showing an example of a display device. The display device 700 shown in Figure 51 is a first A pixel unit 702 provided on the substrate 701 and a source dry provided on the first substrate 701 The circuit section 704 and the gate driver circuit section 706, the pixel section 702, and the source driver circuit A sealing material 712 is arranged to surround section 704 and gate driver circuit section 706, It has a second substrate 705 which is provided opposite to the first substrate 701. The first substrate 701 and the second substrate 705 are sealed together by a sealing material 712. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are, It is sealed by the first substrate 701, the sealing material 712, and the second substrate 705. Although not shown in Figure 51, a display element is provided between the first substrate 701 and the second substrate 705. It is possible.

[0617] Furthermore, the display device 700 is located in an area surrounded by the sealing material 712 on the first substrate 701. In a region different from the area, there is a pixel unit 702, a source driver circuit unit 704, and a gate driver. The circuit section 706 and the FPC terminal section 708 (FPC: Flexi) which are electrically connected to each other. A printed circuit (FPC) is provided. Also, at the FPC terminal section 708 The FPC716 is connected, and the FPC716 controls the pixel unit 702 and the source driver circuit. Various signals are supplied to section 704 and gate driver circuit section 706. Also, pixel section 7 02, Source driver circuit section 704, Gate driver circuit section 706, and FPC terminal section 7 Signal lines 710 are connected to each of the 08 terminals. Various signals are supplied by the FPC716. These are transmitted via the signal line 710 to the pixel unit 702, the source driver circuit unit 704, and the gate driver. This is supplied to the IBA circuit section 706 and the FPC terminal section 708.

[0618] Furthermore, the display device 700 may be provided with multiple gate driver circuit units 706. The component 700 comprises a source driver circuit section 704 and a gate driver circuit section 706. Although an example is shown in which the base part 702 is formed on the same first substrate 701, the configuration is not limited to this. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit section 704 may be formed on the first substrate 701. In addition, a substrate on which a source driver circuit or gate driver circuit, etc., is formed (for example, a single crystal A semiconductor film (a drive circuit substrate formed of a polycrystalline semiconductor film) is formed on the first substrate 701. The configuration is also good. Furthermore, the method of connecting the separately formed drive circuit board is not particularly limited, C Methods such as OG (Chip On Glass) and wire bonding can be used. can.

[0619] Furthermore, the display device 700 has a pixel section 702, a source driver circuit section 704 and a gated The driver circuit section 706 has multiple transistors.

[0620] Furthermore, the display device 700 can have various elements. An example of such elements is: For example, electroluminescent (EL) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (which emit light in response to current) Transistors, electron emission elements, liquid crystal elements, electron ink elements, electrophoretic elements, electro Wetting elements, plasma display panels (PDPs), MEMS (micro-electromechanical systems). (Lectro-Mechanical System) Display (e.g., grating light bulb) (GLV), Digital Micromirror Device (DMD), Digital Microshutter DMS elements, interferometric modulation (IMOD) elements, etc. Examples include piezoelectric ceramic displays.

[0621] Another example of a display device using EL elements is an EL display. An example of a display device using an emission element is a field emission display (FED). ) or SED type flat-panel display (SED: Surface-conduction Examples include Electron-emitter Displays, which use liquid crystal elements. Examples of display devices include liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays) Display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display (i) and others. An example of a display device using an electronic ink element or electrophoretic element is an electronic ink element. There are sub-papers, etc. Furthermore, semi-transmissive liquid crystal displays and reflective liquid crystal displays are also being implemented. In such cases, some or all of the pixel electrodes will function as reflective electrodes. This would work. For example, some or all of the pixel electrodes could be made of aluminum, silver, etc. This should be done. Furthermore, in that case, a memory circuit such as SRAM should be placed below the reflective electrode. It is also possible to install it. This will further reduce power consumption.

[0622] The display method used in the display device 700 may be progressive or interlaced. It can be used. Also, when displaying in color, the color elements controlled by pixels are RG. It is not limited to the three colors B (R represents red, G represents green, and B represents blue). For example, a pixel with R and a pixel with G It may consist of four pixels: a plain pixel, a B pixel, and a W (white) pixel. Alternatively, it may be a pentile array. As shown above, two of the RGB colors make up one color element, and the two different colors are determined by the color element. You may also select and configure this option. Alternatively, you can add one or more colors to RGB, such as yellow, cyan, magenta, etc. Additional elements may be added. Note that the size of the display area for each color element dot may differ. However, the disclosed invention is not limited to a color display device, but also includes a monochrome display device. It can also be applied to...

[0623] Also, white light emission is emitted from the backlight (organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.) In order to display full color on a display device using W), a color layer (also called a color filter) is used. .) may be used. The colored layer may be, for example, red (R), green (G), and blue (B). Yellow (Y) and other colors can be used in appropriate combinations. By using a colored layer, Compared to not using a colored layer, the color reproduction can be improved. In this case, the colored layer By arranging regions that have a colored layer and regions that do not have a colored layer, the region that does not have a colored layer White light in the area may be used directly for display. A portion of the area may be placed without a colored layer. This reduces the decrease in brightness caused by the colored layer when displaying bright content, and reduces power consumption by 20%. In some cases, this can be reduced by about 30%. However, this is not possible with self-emissive elements such as organic EL elements and inorganic EL elements. When using elements for full-color display, R, G, B, Y, and W are used, each having its own emitted color. It is also acceptable to emit light from an element. By using an element that emits light, it is possible to achieve better results than when using a colored layer. In some cases, power consumption can be reduced even further.

[0624] Furthermore, the colorization method involves passing a portion of the light emitted from the white light source through a color filter. In addition to the method of converting to red, green, and blue (color filter method), there is also the method of converting to red, green, and blue A method that uses the light emitted by each of these three colors (three-color method), or a method that uses red or green light to emit a portion of the light from the blue light. A method for converting to color (color conversion method, quantum dot method) may also be applied.

[0625] <5-2. Cross-sectional view of the display device> Next, regarding the configuration of a display device using the semiconductor device 100A shown in Embodiment 1, see Figure 52. This will be explained using the following. Note that Figure 52 is a cross-section corresponding to the dashed line QR shown in Figure 51. This is a view drawing.

[0626] The display device 700 shown in Figure 52 has a trap between the first substrate 701 and the second substrate 705. It comprises transistor Tr1, transistor Tr2, and light-emitting element 160.

[0627] For example, glass substrates can be used as the first substrate 701 and the second substrate 705. Furthermore, flexible substrates are used as the first substrate 701 and the second substrate 705. This is also acceptable. Examples of such flexible substrates include plastic substrates.

[0628] Furthermore, a structure 778 is provided between the first substrate 701 and the second substrate 705. Body 778 is a columnar spacer obtained by selectively etching an insulating film, and A device is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. Furthermore, a spherical spacer may be used as the structure 778.

[0629] Furthermore, the first substrate 701 has the transistor Tr1 described in Embodiment 1 and the transistor Start Tr2 is provided.

[0630] Transistors Tr1 and Tr2 were purified to suppress the formation of oxygen vacancies. It has an oxide semiconductor. Therefore, transistors Tr1 and Tr2 are turned off. Because the current can be kept extremely low, the holding time of electrical signals such as image signals can be extended. This is possible, and the writing interval can also be set to be longer when the power is on. Therefore, refresh operation This reduces the frequency of such occurrences, thereby suppressing the power consumption of the display device.

[0631] Furthermore, transistor Tr2 can achieve relatively high field-effect mobility, enabling high-speed operation. It is possible. For example, by using such high-speed drive transistors in a display device... , the switching transistors in the pixel section and the driver transistors used in the drive circuit section It can be formed on the same substrate. That is, a separate drive circuit can be used, such as a silicon wafer. Since it is not necessary to use semiconductor devices formed by this method, the number of components in the semiconductor device is reduced. This is possible. Furthermore, by using transistors capable of high-speed driving in the pixel section, This allows us to provide high-quality images.

[0632] Furthermore, the second substrate 705 side has a light-shielding film 738 that functions as a black matrix, and A colored film 736 that functions as a light filter, and an insulating film 738 that is in contact with the colored film 736. A border film 734 is provided.

[0633] In this embodiment, the light-emitting element 160 has a top-emission structure. Therefore Furthermore, the conductive film 144 is light-transmitting and transmits the light emitted by the EL layer 142. In terms of form, a top-emission structure is given as an example, but it is not limited to this. For example, a bottom emission structure that emits light towards the conductive film 138, or the conductive film 138 and A dual emission structure may be used in which light is emitted from both the conductive film 144 and the conductive film 144.

[0634] Furthermore, a colored film 736 is provided in a position that overlaps with the light-emitting element 160, and overlaps with the insulating film 140. A light-shielding film 738 is provided at the position. In addition, the colored film 736 and the light-shielding film 738 are insulating films. It is covered with 734. Also, between the light-emitting element 160 and the insulating film 734, there is a sealing film 732. It is filled. In addition, in the display device 700 shown in Figure 52, a colored film 736 is provided. The configuration is illustrated by an example, but is not l...

Claims

1. A device comprising a first transistor, a second transistor, and a capacitive element, The first gate of the first transistor is electrically connected to the second gate of the first transistor. The source and drain of the first transistor are electrically connected to the first gate of the second transistor and to one electrode of the capacitive element. The second gate of the second transistor is electrically connected to the second electrode of the capacitive element. The first semiconductor layer having the channel formation region of the first transistor and the second semiconductor layer having the channel formation region of the second transistor are provided on different insulating films. A display device wherein the second semiconductor layer has a region that overlaps with the first conductive layer, which functions as either the source electrode or the drain electrode of the first transistor.

2. In Claim 1, The first semiconductor layer is an oxide semiconductor, and the display device is provided.

3. In claim 1 or 2, The display device has an oxide semiconductor as the second semiconductor layer.

4. In any one of claims 1 to 3, It has an luminescent element, A display device wherein one of the sources and drains of the second transistor is electrically connected to the light-emitting element.

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