Method for manufacturing semiconductor devices and method for forming semiconductor layers

JP7898714B2Active Publication Date: 2026-08-03EDUCATIONAL FOUND OF KOKUSHIKAN
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
EDUCATIONAL FOUND OF KOKUSHIKAN
Filing Date
2022-08-08
Publication Date
2026-08-03

AI Technical Summary

Benefits of technology

【0008】 本発明の製造方法によれば、従来の成膜技術(例えばスピンコート法)を使用して半導体層を成膜する構成と比較して、半導体層における結晶粒界を抑制することができる。ひいては、半導体素子の性能を向上させることが可能になる。

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Abstract

To provide a method for manufacturing a semiconductor element that suppresses a crystal grain boundary in a semiconductor layer to improve performance of the semiconductor element.SOLUTION: A semiconductor element includes: a substrate 11; a gate electrode 12 formed on a surface of the substrate 11; an insulating layer 13 covering the gate electrode 12; a source electrode 14 and a drain electrode 15 formed on a surface of the insulating layer 13; and a semiconductor layer connected to the source electrode 14 and the drain electrode 15. A method for manufacturing the semiconductor element includes a step of linearly applying a precursor solution S by moving a rod-like member P for discharging the precursor solution S of the semiconductor layer from a tip Q between the source electrode 14 and the drain electrode 15. In this step, the member P is caused to move without allowing the tip Q to be separated from the precursor solution S to be discharged.SELECTED DRAWING: Figure 5
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Description

Technical Field

[0001] The present invention relates to the technology of semiconductor devices.

Background Art

[0002] Semiconductor devices such as thin film transistors (TFTs) have been proposed conventionally. A semiconductor device includes a source electrode, a drain electrode, and a semiconductor layer connecting the source electrode and the drain electrode. The semiconductor layer is composed of, for example, a metal oxide or an organic material.

[0003] For forming a semiconductor layer in a wet process, for example, the spin coating method has been generally used conventionally (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] However, when forming a semiconductor layer using the spin coating method, there is a problem that grain boundaries are formed in the semiconductor layer. In particular, grain boundaries formed along a direction crossing (typically orthogonal) to the direction in which the source electrode and the drain electrode are arranged in the semiconductor layer (that is, the direction from the source electrode to the drain electrode) inhibit the flow of current between the source electrode and the drain electrode, causing a decrease in the performance of the semiconductor device. In view of the above circumstances, an object of the present invention is to suppress grain boundaries formed in the semiconductor layer.

Means for Solving the Problems

[0006] The present invention relates to a method for manufacturing a semiconductor device comprising a substrate, a gate electrode formed on the surface of the substrate, an insulating layer covering the gate electrode, a source electrode and a drain electrode formed on the surface of the insulating layer, and a semiconductor layer connected to the source electrode and the drain electrode, the method comprising the step of applying a precursor solution to the semiconductor layer in a linear manner by moving a rod-shaped member that discharges a precursor solution from its tip between the source electrode and the drain electrode, wherein the member is moved without separating its tip from the discharged precursor solution.

[0007] The film deposition method according to the present invention is a film deposition method for depositing a semiconductor layer connected to a source electrode and a drain electrode, and includes a step of applying the precursor solution in a linear manner by moving a rod-shaped member that discharges the precursor solution of the semiconductor layer from its tip between the source electrode and the drain electrode, wherein in the step, the member is moved without separating its tip from the discharged precursor solution. [Effects of the Invention]

[0008] The manufacturing method of the present invention can suppress crystal grain boundaries in the semiconductor layer compared to a configuration in which a semiconductor layer is formed using conventional film deposition techniques (e.g., spin coating). This, in turn, makes it possible to improve the performance of the semiconductor device.

[0009] The film deposition method of the present invention can suppress crystal grain boundaries in the semiconductor layer compared to conventional film deposition techniques (e.g., spin coating). [Brief explanation of the drawing]

[0010] [Figure 1] This is a schematic cross-sectional view of the semiconductor element according to this embodiment. [Figure 2] This is an image of a semiconductor layer manufactured using the manufacturing method described in the comparative example, captured with a polarizing microscope. [Figure 3] This is an image of a semiconductor layer manufactured using the manufacturing method described in the comparative example, captured with a polarizing microscope. [Figure 4]This is an explanatory diagram illustrating the method for manufacturing a semiconductor device according to this embodiment. [Figure 5] This is an explanatory diagram illustrating the method for manufacturing a semiconductor device according to this embodiment. [Figure 6] This is an image of a semiconductor device manufactured by the manufacturing method according to this embodiment. [Figure 7] This is an image of a semiconductor layer manufactured by the manufacturing method according to this embodiment, captured with a polarizing microscope. [Figure 8] This is a photograph of a glass pen used in the manufacturing method according to this embodiment. [Modes for carrying out the invention]

[0011] A method for manufacturing a semiconductor element according to this embodiment will now be described. The semiconductor element is, for example, a thin-film transistor (TFT) and is used in various sensors such as pressure sensors, pH sensors, or biosensors.

[0012] Figure 1 is a cross-sectional view relating to an example of a semiconductor device 100. Specifically, the semiconductor device 100 includes a substrate 11, a gate electrode 12, a gate insulating layer 13, a source electrode 14, a drain electrode 15, and a semiconductor layer 16.

[0013] In the following explanation, the stacking direction in the semiconductor element 100 will be referred to as the Z direction, and the directions mutually orthogonal to the Z direction will be referred to as the X direction and the Y direction.

[0014] The substrate 11 is an insulating plate-shaped member such as a glass substrate or a quartz substrate. The gate electrode 12 is formed on the surface of the substrate 11. The gate insulating layer 13 is formed to cover the gate electrode 12.

[0015] The source electrode 14 and the drain electrode 15 are formed to be spaced apart from each other on the surface of the gate insulating layer 13 (the surface opposite to the substrate 11). It can also be said that in the semiconductor element 100, the direction in which the source electrode 14 and the drain electrode 15 are arranged (the direction from the source electrode toward the drain electrode) is the X direction. The distance between the source electrode 14 and the drain electrode 15 (spacing D) is, for example, 20 to 100 μm.

[0016] For the gate electrode 12, the source electrode 14, and the drain electrode 15, any known conductive material (for example, metal, metal oxide, polymer) is used. Further, for the formation of the gate electrode 12, the source electrode 14, and the drain electrode 15, any known film formation technique (for example, vacuum evaporation method or sputtering method) is used.

[0017] For the gate insulating layer 13, any known insulating material (for example, inorganic compound such as inorganic nitride or inorganic oxide or polymer compound) is used. Further, for the film formation of the gate insulating layer 13, any known film formation technique (for example, chemical vapor deposition method, sputtering method or spin coating method) is used.

[0018] The semiconductor layer 16 is formed so as to be connected to the source electrode 14 and the drain electrode 15. The semiconductor layer 16 only needs to be formed at least across the source electrode 14 and the drain electrode 15. That is, it is not essential to form the semiconductor layer 16 on the surfaces of the source electrode 14 and the drain electrode 15 (the surfaces opposite to the gate insulating layer 13). The film thickness of the semiconductor layer 16 is, for example, 30 nm to 150 nm.

[0019] The semiconductor layer 16 is made of any known semiconductor material (such as an organic substance or a metal oxide). The organic substance may be a low-molecular compound or a high-molecular compound. Examples of the low-molecular compound include polycyclic aromatic compounds. Specific examples include acene compounds such as tetracene and pentacene, oligothiophene compounds, phthalocyanine compounds, perylene compounds, rubrene compounds, or arylamine compounds such as triarylamine compounds. Examples of the high-molecular compound include polythiophene-based polymers, polyacetylene-based polymers, polyaniline-based polymers, polyphenylene-based polymers, polyphenylene vinylene-based polymers, polyfluorene-based polymers, polypyrrole-based polymers, and triarylamine polymers. Further, fullerene may be used as the organic substance.

[0020] The metal oxide is an oxide containing at least one element selected from zinc (Zn), indium (In), tin (Sn), tungsten (W), zirconium (Zr), and gallium (Ga).

[0021] The semiconductor layer 16 is formed by film formation after forming the source electrode 14 and the drain electrode 15 on the gate insulating layer 13.

[0022] In the present invention, the semiconductor layer 16 is formed by a wet process using a precursor solution of the semiconductor layer 16. The precursor solution of the semiconductor layer 16 is a solution containing the raw material of the semiconductor layer 16. Examples of the precursor solution include a solution in which the semiconductor material itself is dissolved or a solution containing a precursor of the semiconductor material. Any known substance may be used as the semiconductor material itself and the precursor of the semiconductor material, and one kind or a plurality of kinds may be used. The specific film formation method of the semiconductor layer 16 according to the present embodiment will be described later.

[0023] Here, a method of forming a semiconductor layer using a spin coating method (hereinafter referred to as "comparative example") will be described. The spin coating method is a method of forming a semiconductor layer by dropping a precursor solution of the semiconductor layer over the surfaces of the gate insulating layer, the source electrode, and the drain electrode and then rotating the substrate.

[0024] Figure 2 is an image of the semiconductor layer deposited using the comparative example method, magnified (100x) with a polarizing microscope. Figure 3 is an image taken with a digital camera attached to the polarizing microscope in Figure 2. Figures 2 and 3 are images taken from a direction perpendicular to the semiconductor layer. In the comparative example, a semiconductor layer made of TIPS pentacene (6,13-bis(triisopropylsilylethynyl)pentacene) with a concentration of 0.01 (g / ml) was used as a precursor solution. The rotation speed was 600 rpm and the rotation time was 45 seconds.

[0025] In Figures 2 and 3, the areas where the color changes indicate the locations where grain boundaries are formed. In the semiconductor layer of the comparative example, it can be confirmed that many grain boundaries are formed between the source electrode and the drain electrode. Grain boundaries obstruct the flow of current between the source electrode and the drain electrode. In particular, grain boundaries formed along the direction intersecting the X direction in which the source electrode and the drain electrode are aligned (the Y direction perpendicular to the X direction in Figures 2 and 3) (hereinafter referred to as "specific grain boundaries") greatly obstruct the flow of current between the source electrode and the drain electrode. It is presumed that specific grain boundaries are formed by the parallel progression of crystal growth from the source electrode side towards the drain electrode side and crystal growth from the drain electrode side towards the source electrode side.

[0026] Furthermore, grain boundaries can occur not only in the spin coating method but also in various conventional film deposition methods (e.g., drop casting, dip coating, spray coating, blade coating, roll coating, and inkjet methods).

[0027] Taking the above circumstances into consideration, the present invention proposes a novel method for manufacturing a semiconductor device 100 that suppresses the formation of crystal grain boundaries in the semiconductor layer 16.

[0028] Figures 4 and 5 illustrate the process of forming a semiconductor layer 16 (hereinafter referred to as the "film formation process") in the manufacturing method according to the present invention. Figure 4 is a plan view of an array substrate in which semiconductor elements 100 are arranged in an array on a single substrate 11, and Figure 5 is a cross-sectional view focusing on one semiconductor element 100 in Figure 4.

[0029] Figure 4 illustrates a case where multiple (four in Figure 4) semiconductor elements 100 are arranged in arrays (R1, R2) along the Y direction on a substrate 11. Array R1 shows the state after the semiconductor layer 16 has been formed, while array R2 shows the state before the semiconductor layer 16 is formed. As illustrated in Figure 4, the semiconductor layer 16 is formed in a long, elongated shape along the Y direction at positions overlapping by a spacing D in a plan view from the Z direction.

[0030] The distance D between the source electrode 14 and the drain electrode 15 is shaped to extend along the Y direction. In each array (R1, R2), multiple (4) semiconductor elements 100 are arranged such that the distance D between each semiconductor element 100 is linear along the Y direction.

[0031] As illustrated in array R1, the film formation process of this embodiment is a process of linearly coating the precursor solution S of the semiconductor layer 16 between the source electrode 14 and the drain electrode 15.

[0032] As illustrated in Figures 4 and 5, a rod-shaped member (hereinafter referred to as "film-forming member") P is used in the film-forming process. The film-forming member P dispenses a precursor solution S for the semiconductor layer 16 from its tip Q. The form of the film-forming member P is arbitrary as long as it can hold the precursor solution S and dispense the precursor solution S from its tip Q while moving. For example, a pen-type film-forming member P may be used. For example, a glass pen with a groove near the tip Q may be used as the pen-type film-forming member P. By immersing the tip Q in the precursor solution S and drawing the precursor solution S into the groove, the precursor solution S is held in the glass pen. Note that a pen-type film-forming member P other than a glass pen may also be used.

[0033] As illustrated in Figure 5, the film-forming member P is moved without separating the tip Q from the discharged precursor solution S (i.e., with the discharged precursor solution S and the tip Q in contact). The precursor solution S is sandwiched between the surface of the gate insulating layer 13 at the interval D and the tip Q.

[0034] The distance F (shortest distance) between the tip Q and the surface of the gate insulating layer 13 can be arbitrary as long as the tip Q is in contact with the precursor solution S ejected from the tip Q, but is for example about 5 to 150 μm. Also, as long as the tip Q is in contact with the precursor solution S ejected from the tip Q, the distance F does not need to be constant during the film formation process. In the inkjet method, the precursor solution is ejected as droplets from the tip of the nozzle (ejection part) (i.e., the ejected precursor solution and the tip of the nozzle are separated).

[0035] In the film formation process, as long as the tip Q of the film formation member P is in contact with the precursor solution S discharged from the tip Q, it is optional whether or not the tip Q is in contact with the surface of the source electrode 14 and the surface of the drain electrode 15. Figure 5 illustrates the case where the tip Q of the film formation member P is not in contact with the surface of the source electrode 14 and the surface of the drain electrode 15.

[0036] Then, with the tip Q of the film-forming member P not separated from the precursor solution S being discharged, the precursor solution S is applied linearly between the source electrode 14 and the drain electrode 15 (gap D), as illustrated in Figure 4. The tip Q of the film-forming member P is positioned to face the gap D (i.e., to cover the gap D).

[0037] Specifically, the film-forming member P is moved along the Y direction on the spacing D. This can also be described as moving the film-forming member P along the direction in which the spacing D extends. Therefore, the precursor solution S is applied linearly along the Y direction at the spacing D. That is, a semiconductor layer 16 is formed linearly, as shown in the arrangement R1 of Figure 4. The width (length in the X direction) of the semiconductor layer 16 is, for example, equal to or greater than the spacing D, and about 100 times or less the spacing D.

[0038] When manufacturing multiple (four) semiconductor elements 100 arranged as shown in Figure 4, the film deposition member P is continuously moved along the spacing D between each semiconductor element 100. Whether or not the precursor solution S is applied to the surface of the source electrode 14 and the drain electrode 15 is optional. If there are multiple sequences R (R1 and R2 in Figure 4), the precursor solution S may be applied to multiple sequences R simultaneously using multiple film-forming members P corresponding to each sequence R (for example, a film-forming member P corresponding to sequence R1 and a film-forming member P corresponding to sequence R2).

[0039] The shape of the tip Q of the film-forming member P is arbitrary, as long as it is possible to coat (inject) the precursor solution S into the gap D.

[0040] The temperature of the substrate 11 during the film deposition process is set to, for example, 30 to 70°C, preferably 40 to 60°C. Any heating device, such as a heater, can be used to heat the substrate 11.

[0041] In the film formation process, the speed at which the film formation member P is moved (i.e., the speed at which a straight line is drawn) is, from the viewpoint of significantly suppressing grain boundaries, for example, 0.08 to 0.25 mm / s, preferably 0.10 to 0.20 mm / s, and more preferably 0.14 to 0.18 mm / s.

[0042] As can be understood from the above description, the manufacturing method of this embodiment includes a film formation step in which a rod-shaped film-forming member P that discharges a precursor solution S of the semiconductor layer 16 from its tip Q is moved between the source electrode 14 and the drain electrode 15 (distance D), thereby coating the precursor solution in a linear manner, and in this film formation step, the film-forming member P is moved without separating its tip Q from the discharged precursor solution.

[0043] Other steps may be performed as appropriate after the film formation process. The steps performed after the film formation process may be changed depending on the type of precursor solution S. For example, if the semiconductor material itself is dissolved in the precursor solution S, the semiconductor layer 16 is formed by performing a drying step to dry the precursor solution S applied after the film formation process.

[0044] Furthermore, when a semiconductor material precursor is used in the precursor solution S, a process appropriate to the type of precursor is performed after the film formation process. For example, a process that transforms the precursor into a semiconductor material by heating, light irradiation, or firing the coated precursor solution S may be appropriately employed.

[0045] Furthermore, when forming a semiconductor layer 16 made of a metal oxide, a solution containing a metal oxide precursor (for example, a nitrate, phosphate, carbonate, fluoride, or chloride of a metal element) is used as a precursor solution S. In the film formation process, after applying the precursor solution S, a step is performed to chemically react the precursor, for example by heating or firing, to convert it into a metal oxide.

[0046] Figure 6 is a photograph of an array substrate consisting of multiple semiconductor elements manufactured by the manufacturing method of this embodiment. Figure 7 is a magnified (50x) image of one semiconductor element in Figure 6 using a polarizing microscope. In Figure 7, similar to the comparative example described above, a semiconductor layer made of TIPS pentacene was formed using a solution in which TIPS pentacene at a concentration of 0.01 (g / ml) was dissolved as a precursor solution.

[0047] In Figure 6, the substrate temperature was set to 45°C, and the deposition material's movement speed was set to 0.16 mm / s. In Figure 6, a glass pen was used as the deposition material. A semiconductor layer was deposited linearly by moving the glass pen along the Y-direction between the source electrode and the drain electrode. Figure 8 shows a photograph of the glass pen actually used for reference.

[0048] As illustrated in Figure 7, it was confirmed that, compared to the comparative example, the manufacturing method of this embodiment suppressed grain boundaries (especially specific grain boundaries) in the semiconductor layer. Furthermore, it was found that the crystallinity was also good.

[0049] In the present invention, the suppression of specific grain boundaries is presumed to be due to the fact that, during the film formation process, the tip of the film-forming member was not separated from the ejected precursor solution (i.e., the ejected precursor solution and the tip of the film-forming member were kept in contact), thereby suppressing evaporation of the ejected precursor solution from above (the positive side in the Z direction in Figure 5), and causing a change in the direction in which crystal growth progresses in the semiconductor layer.

[0050] As can be understood from the above explanation, the manufacturing method of this embodiment makes it possible to suppress grain boundaries compared to the comparative example using the spin coating method. Furthermore, it is assumed that the manufacturing method of this embodiment has the effect of suppressing grain boundaries even when compared to configurations using other film deposition methods other than the spin coating method (for example, drop casting, dip coating, spray coating, blade coating, roll coating, and inkjet methods).

[0051] Furthermore, the spin coating method suffers from a low yield because, after dropping the precursor solution over a wide area spanning the gate insulating layer and the surfaces of the source and drain electrodes, the substrate is rotated to remove excess precursor solution. In contrast, the manufacturing method of this embodiment applies the precursor solution linearly using a rod-shaped member to a narrow area corresponding to the space between the source and drain electrodes. Therefore, the manufacturing method of the present invention has the advantage of a better yield compared to the spin coating method. Specifically, in the array substrate shown in Figure 6, approximately 0.01 ml of precursor solution was used to deposit the semiconductor layer. In contrast, in the comparative example using the spin coating method, approximately 1 ml of precursor solution was used to deposit the semiconductor layer. In other words, the manufacturing method of this embodiment achieves a yield approximately 100 times better than the comparative example.

[0052] The present invention can also be conceived as a film deposition method for forming a semiconductor layer connected to a source electrode and a drain electrode. The film deposition method of the present invention includes a step of linearly coating a semiconductor layer precursor solution by moving a rod-shaped member that discharges the precursor solution from its tip between the source electrode and the drain electrode, wherein the member is moved without separating its tip from the discharged precursor solution. The film deposition method of the present invention achieves the same effects as the manufacturing method described above. [Explanation of symbols]

[0053] 11: Circuit board 12: Gridgate 13: Gate insulating layer 14: Source electrode 15: Drain electrode 16: Semiconductor layer 100: Semiconductor element P: Film-forming material S: Precursor solution

Claims

1. A method for manufacturing a semiconductor device comprising a substrate, a gate electrode formed on the surface of the substrate, an insulating layer covering the gate electrode, a source electrode and a drain electrode formed on the surface of the insulating layer, and a semiconductor layer connected to the source electrode and the drain electrode, The process includes moving a rod-shaped member that discharges the semiconductor layer precursor solution from its tip between the source electrode and the drain electrode, thereby applying the precursor solution in a linear fashion. In the above step, the member is moved without separating its tip from the precursor solution being discharged. The speed at which the member is moved is 0.08 to 0.25 mm / s. Manufacturing method.

2. In the above step, the member is moved along a direction that intersects the direction in which the source electrode and the drain electrode are arranged in a plan view. The method for manufacturing claim 1.

3. The above process is carried out while the substrate is heated to 30 to 70°C. The method for manufacturing claim 1.

4. A method for forming a semiconductor layer connected to a source electrode and a drain electrode, The process includes moving a rod-shaped member that discharges the semiconductor layer precursor solution from its tip between the source electrode and the drain electrode, thereby applying the precursor solution in a linear fashion. In the above step, the member is moved without separating its tip from the precursor solution being discharged. The speed at which the member is moved is 0.08 to 0.25 mm / s. Film formation method.