High-frequency power supply device
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- DAIHEN CORP
- Filing Date
- 2022-12-28
- Publication Date
- 2026-08-03
AI Technical Summary
【0010】 本発明によれば、直流パルス電圧の影響により高周波交流電圧に発生する相互変調歪みを、効率良く抑制することができる。
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Abstract
Description
Technical Field
[0001] The present invention relates to a high-frequency power supply device.
Background Art
[0002] There is known a high-frequency power supply device that simultaneously inputs a high-frequency AC voltage for maintaining plasma and a DC pulse voltage including a continuous pulse waveform for operating the plasma into a plasma generating device. Such a high-frequency power supply device is used when anisotropically etching a sample such as a semiconductor wafer in a plasma generating device.
[0003] When a high-frequency AC voltage and a DC pulse voltage are simultaneously input into a plasma generating device, intermodulation distortion (hereinafter also referred to as IMD) occurs in the high-frequency AC voltage. Due to the occurrence of IMD, the reflected power returning to the HF power supply that generates the high-frequency AC voltage varies according to each pulse waveform included in the DC pulse voltage. The high-frequency power supply device includes a matcher between the HF power supply and the plasma generating device. However, the impedance change speed of the matcher is slower than the change speed of the reflected power due to IMD, and it is difficult to reduce the reflected power due to IMD.
[0004] For example, Patent Documents 1 and 2 describe high-frequency power supply devices that superimpose a high-frequency AC voltage and a low-frequency AC voltage and supply them to a plasma generator. The high-frequency power supply devices described in Patent Documents 1 and 2 frequency modulate the high-frequency AC voltage according to the waveform of the low-frequency AC voltage. As a result, the high-frequency power supply devices described in Patent Documents 1 and 2 can cancel out IMD generated in the high-frequency AC voltage due to the influence of the low-frequency AC voltage and reduce reflected power. However, the DC pulse voltage, which contains a continuous pulse waveform for manipulating the plasma, is higher than the low-frequency AC voltage described in Patent Documents 1 and 2. For this reason, when a high-frequency power supply device frequency modulates the high-frequency AC voltage according to the pulse waveform contained in the DC pulse voltage, the degree of frequency modulation becomes very large, so it was necessary to provide a wideband HF power supply. Consequently, when a high-frequency power supply device frequency modulates the high-frequency AC voltage according to the pulse waveform contained in the DC pulse voltage, the device becomes large and cannot supply power efficiently.
[0005] Furthermore, Patent Document 3 describes a high-frequency power supply device equipped with a narrow-band bandpass filter installed between the HF power supply and the matching circuit. The high-frequency power supply device described in Patent Document 3 attenuates or prevents reflected waves from passing through using the bandpass filter. As a result, the high-frequency power supply device described in Patent Document 3 can contain reflected waves between the bandpass filter and the matching circuit, thereby suppressing IMD (Integrated Mid-Voltage).
[0006] However, a matching circuit calculates impedance by measuring the current and voltage at the input terminal of the matching circuit. Alternatively, a matching circuit calculates impedance by measuring the forward and reflected waves at the input terminal of the matching circuit. Then, the matching circuit performs matching operation based on the calculated impedance. However, in the high-frequency power supply device described in Patent Document 3, a bandpass filter is inserted between the HF power supply and the matching circuit, so the reflected wave output from the matching circuit and the reflected wave returning to the HF power supply are different. Therefore, the high-frequency power supply device described in Patent Document 3 cannot perform matching operation in a way that reduces the reflected wave returning to the HF power supply, and thus could not perform accurate matching operation. [Prior art documents] [Patent Documents]
[0007] [Patent Document 1] Japanese Patent Publication No. 2007-103102 [Patent Document 2] Japanese Patent Publication No. 2022-102688 [Patent Document 3] Special Publication No. 2022-514377 [Overview of the project] [Problems that the invention aims to solve]
[0008] This invention has been made in view of the above problems, and aims to provide a high-frequency power supply device that efficiently suppresses intermodulation distortion generated in high-frequency AC voltage due to the influence of DC pulse voltage. [Means for solving the problem]
[0009] To solve the above-mentioned problems and achieve the objective, the high-frequency power supply device according to the present invention comprises: a first power supply that outputs a high-frequency AC voltage which is an AC voltage of a first frequency; a second power supply that outputs a DC pulse voltage which includes one or more consecutive pulse waveforms; a matching circuit which receives the high-frequency AC voltage from the first power supply, performs impedance matching so that the impedance seen from the first power supply is constant, and outputs the high-frequency AC voltage; a filter which receives the DC pulse voltage from the second power supply, filters the DC pulse voltage, and outputs it to the pulse power input terminal of the load; and an IMD suppression circuit which includes a first inductor having a predetermined inductance and is provided between the matching circuit and the AC power input terminal of the load, receives the high-frequency AC voltage output from the matching circuit, passes the input high-frequency AC voltage through the first inductor, and outputs it to the AC power input terminal of the load. [Effects of the Invention]
[0010] According to the present invention, intermodulation distortion generated in high-frequency AC voltage due to the influence of DC pulse voltage can be efficiently suppressed. [Brief explanation of the drawing]
[0011] [Figure 1] This diagram shows the configuration of the high-frequency power supply unit together with the plasma generator. [Figure 2] This diagram shows waveforms of high-frequency AC voltage and DC pulse voltage. [Figure 3] This diagram shows the configuration of the matching circuit and IMD suppression circuit. [Figure 4] This figure shows the simulated waveform of the load capacity change. [Figure 5] This figure shows the impedance trajectory when a high-frequency AC voltage is simulated without frequency modulation. [Figure 6] This figure shows the frequency change of a high-frequency AC voltage when performing a simulation by frequency modulating the high-frequency AC voltage. [Figure 7]This figure shows the impedance trajectory when a high-frequency AC voltage is frequency-modulated and simulated. [Modes for carrying out the invention]
[0012] Figure 1 is a diagram showing the configuration of the high-frequency power supply unit 10 according to the embodiment, together with the plasma generator 20.
[0013] The high-frequency power supply unit 10 supplies a high-frequency AC voltage, which is an AC voltage of a first frequency, to the AC power input terminal 22 of the plasma generator 20 (load) that generates plasma. The plasma generator 20 can turn the gas in the vacuum chamber into plasma using the power of the high-frequency AC voltage supplied by the high-frequency power supply unit 10.
[0014] Furthermore, the high-frequency power supply 10, simultaneously with supplying a high-frequency AC voltage, outputs a DC pulse voltage containing one or more consecutive pulse waveforms to a pulse power input terminal 24, which is different from the AC power input terminal 22 of the plasma generator 20. The plasma generator 20 manipulates the plasma generated in the vacuum chamber using the power of the DC pulse voltage supplied by the high-frequency power supply 10. For example, the plasma generator 20 performs anisotropic etching on a sample such as a semiconductor wafer by manipulating the plasma. In this embodiment, each of the one or more pulse waveforms included in the DC pulse voltage is a triangular wave. The pulse waveforms included in the DC pulse voltage are not limited to triangular waves, but may be any waveform such as a square wave.
[0015] Furthermore, the high-frequency power supply unit 10 may intermittently output a high-frequency AC voltage. That is, the high-frequency power supply unit 10 may alternately output and stop the high-frequency AC voltage. Also, the high-frequency power supply unit 10 may intermittently output a DC pulse voltage. That is, the high-frequency power supply unit 10 may alternately output and stop the DC pulse voltage. The high-frequency AC voltage and DC pulse voltage will be explained in more detail with reference to Figure 2.
[0016] As shown in FIG. 1, the high-frequency power supply device 10 includes a pulse signal generation circuit 32, a high-frequency power supply 34 (first power supply), a DC pulse power supply 36 (second power supply), a matcher 38, a filter 40, and an IMD suppression circuit 42.
[0017] The pulse signal generation circuit 32 outputs a first pulse signal indicating the output and stop timings of a high-frequency AC voltage. The pulse signal generation circuit32 supplies the first pulse signal to the high-frequency power supply 34. Further, the pulse signal generation circuit 32 outputs a second pulse signal indicating the output and stop timings of a DC pulse voltage. The pulse signal generation circuit 32 supplies the second pulse signal to the DC pulse power supply 36.
[0018] The high-frequency power supply 34 outputs a high-frequency AC voltage that is an AC voltage of a first frequency. In the present embodiment, the high-frequency power supply 34 alternately repeats the output and stop of the high-frequency AC voltage in synchronization with the timing of the first pulse signal. The high-frequency power supply 34 outputs the generated high-frequency AC voltage to the matcher 38.
[0019] The DC pulse power supply 36 outputs a DC pulse voltage including one or more continuous pulse waveforms. In the present embodiment, the DC pulse power supply 36 alternately repeats the output and stop of the DC pulse voltage in synchronization with the timing of the second pulse signal. The DC pulse power supply 36 outputs the generated DC pulse voltage to the filter 40.
[0020] The matcher 38 receives the high-frequency AC voltage from the high-frequency power supply 34. The matcher 38 performs impedance matching so that the input impedance, that is, the impedance seen from the high-frequency power supply 34 to the load side, becomes constant. Then, the matcher 38 outputs the high-frequency AC voltage to the IMD suppression circuit 42.
[0021] Filter 40 receives a DC pulse voltage from the DC pulse power supply 36. Filter 40 filters the DC pulse voltage and outputs it to the pulse power input terminal 24 of the plasma generator 20, which is the load. Filter 40 includes, for example, a resistor, a capacitor, and an inductor. Filter 40 filters each of the one or more pulse waveforms contained in the DC pulse voltage output from the DC pulse power supply 36 to a predetermined shape. For example, filter 40 filters a square wave pulse waveform contained in the DC pulse voltage output from the DC pulse power supply 36 to become a triangular wave.
[0022] The IMD suppression circuit 42 includes a first inductor 50 having a predetermined inductance. The first inductor 50 is provided between the matching unit 38 and the AC power input terminal 22 of the plasma generator 20, which is the load. The IMD suppression circuit 42 receives the high-frequency AC voltage output from the matching unit 38, passes the input high-frequency AC voltage through the first inductor 50, and outputs it to the AC power input terminal 22 of the plasma generator 20.
[0023] Figure 2 shows the waveforms of the first pulse signal (A), high-frequency AC voltage (B), second pulse signal (C), and DC pulse voltage (D).
[0024] The first pulse signal is a binary signal representing either H logic or L logic, as shown in Figure 2(A). The first pulse signal, for example, indicates the period during which a high-frequency AC voltage is output, where the H logic period is, for example, the period during which the output of the high-frequency AC voltage is stopped, where the L logic period is, for example, the period during which the output of the high-frequency AC voltage is stopped.
[0025] The second pulse signal is a binary signal representing either H logic or L logic, as shown in Figure 2(C). The second pulse signal, for example, the H logic period indicates the period during which a DC pulse voltage is output. The second pulse signal, for example, the L logic period indicates the period during which the output of the DC pulse voltage is stopped.
[0026] In the example shown in Figure 2, the switching between the first and second pulse signals between high logic and low logic is synchronized. However, the switching timing between the first and second pulse signals between high logic and low logic does not need to be synchronized.
[0027] The high-frequency AC voltage is a sinusoidal voltage, as shown in Figure 2(B). The high-frequency power supply 34 outputs the high-frequency AC voltage during the period when the first pulse signal is in high logic, and stops outputting the high-frequency AC voltage during the period when the first pulse signal is in low logic. In this example, the frequency of the high-frequency AC voltage is 40.68 MHz. Note that the frequency of the high-frequency AC voltage is not limited to 40.68 MHz and may be other frequencies.
[0028] As shown in Figure 2(D), each pulse waveform of the DC pulse voltage is a triangular wave. Furthermore, the DC pulse voltage may include periods between pulse waveforms where the reference voltage (e.g., 0 volts) is present. Figure 2(D) shows the DC pulse voltage supplied from the filter 40 to the plasma generator 20. The DC pulse power supply 36 outputs the DC pulse voltage during the period when the second pulse signal is in high logic, and stops outputting the DC pulse voltage during the period when the second pulse signal is in low logic.
[0029] Furthermore, the high-frequency AC voltage may be a waveform in which the frequency modulation is synchronized with each of the one or more pulse waveforms contained in the DC pulse voltage, relative to the first frequency sine wave signal. For example, the high-frequency AC voltage may have a reference frequency of 40.68 MHz during the period when the DC pulse voltage is a reference voltage (e.g., 0 volts), and during the period when the DC pulse voltage is changing from the reference voltage (e.g., 0 volts), the frequency may be the reference frequency plus a modulation frequency proportional to the amplitude value of the pulse waveform (40.68 MHz + modulation frequency). This allows the high-frequency power supply 10 to significantly reduce the amount of IMD generated in the high-frequency AC voltage due to the influence of the DC pulse voltage.
[0030] The first and second pulse signals are generated by the pulse signal generation circuit 32. The pulse signal generation circuit 32 generates the first and second pulse signals based on a reference clock. Therefore, the temporal position of each pulse waveform included in the DC pulse voltage relative to the high-frequency AC voltage is determined based on the reference clock. Accordingly, by operating in synchronization with the reference clock, the high-frequency power supply 34 can accurately output a high-frequency AC voltage with a waveform whose frequency modulation is synchronized with each of the one or more pulse waveforms included in the DC pulse voltage relative to the first frequency sine wave signal.
[0031] Figure 3 shows the configuration of the matching circuit 38 and the IMD suppression circuit 42. The matching circuit 38 includes a VI detection circuit 52, a matching circuit 54, and a control circuit 56.
[0032] The VI detection circuit 52 measures the voltage (V) and current (I) at the input terminal of the matching unit 38 at predetermined intervals.
[0033] The matching circuit 54 is supplied with a high-frequency AC voltage from the high-frequency power supply 34 via the VI detection circuit 52. The matching circuit 54 is a network circuit including multiple inductors and multiple capacitors. The impedance of the matching circuit 54 is changeable. The impedance between the input terminal and output terminal of the matching circuit 54 is changed in response to a control signal given from the control circuit 56.
[0034] The control circuit 56 is implemented by a processor such as a CPU (Central Processing Unit) or a reconfigurable semiconductor device such as an FPGA (Field-Programmable Gate Array). Functionally, the control circuit 56 includes an impedance calculation unit 62, a matching position calculation unit 64, and an operation control unit 66.
[0035] The impedance calculation unit 62 acquires the voltage (V) and current (I) detected by the VI detection circuit 52 at predetermined intervals. At predetermined intervals, the impedance calculation unit 62 calculates the impedance at the input terminal to which the high-frequency AC voltage is supplied based on the acquired voltage (V) and current (I).
[0036] The matching position calculation unit 64 calculates the impedance of the matching circuit 54 at predetermined intervals such that the impedance at the input terminal of the matching device 38 becomes a preset value. The operation control unit 66 provides a control signal to the matching circuit 54 at predetermined intervals to change the impedance of the matching circuit 54 to the impedance calculated by the matching position calculation unit 64.
[0037] A matching circuit 38 with this configuration can change the impedance of the matching circuit 54 at predetermined intervals so that the impedance of the matching circuit 38 as seen from the high-frequency power supply 34 remains constant at a preset value. As a result, the matching circuit 38 can keep the impedance seen from the high-frequency power supply 34 to the load side constant, regardless of fluctuations in the impedance of the load, the plasma generator 20.
[0038] The matching circuit 38 may include a directional coupler instead of the VI detection circuit 52. The directional coupler detects the forward wave voltage and reflected wave voltage at the input terminal to which the high-frequency AC voltage is supplied. In this case, the impedance calculation unit 62 calculates the reflection coefficient at the input terminal to which the high-frequency AC voltage is supplied based on the forward wave voltage and reflected wave voltage at predetermined time intervals. Since the impedance seen from the high-frequency power supply 34 to the load side and the reflection coefficient at the input terminal to which the high-frequency AC voltage is supplied are mutually convertible, either one may be detected.
[0039] The first inductor 50 included in the IMD suppression circuit 42 has one terminal connected to the output terminal of the matching unit 38 and the other terminal connected to the AC power input terminal 22 of the plasma generator 20. As a result, the IMD suppression circuit 42 can pass the high-frequency AC voltage output from the matching unit 38 through the first inductor 50 and output it to the AC power input terminal 22 of the plasma generator 20.
[0040] This configuration enhances the suppression effect of IMD generated on the high-frequency power supply 34 side. Specifically, the capacitance of the plasma generator 20 fluctuates due to the influence of each pulse waveform included in the DC pulse voltage. The matching unit 38 exhibits a transient response due to this capacitance fluctuation. In this case, because the transient response time due to the influence of the DC pulse voltage output from the DC pulse power supply 36 is short relative to the frequency of the pulse waveform of the DC pulse voltage, the impedance change during the transient response becomes large. However, by inserting the first inductor 50, the rapid impedance change during the transient response is suppressed. As a result, the IMD suppression effect is enhanced. Note that the appropriate inductance value of the first inductor 50 decreases as the frequency of the pulse waveform included in the DC pulse voltage (e.g., triangular wave) increases.
[0041] The plasma generator 20 changes the plasma generation position in the opposing direction of the two positive and negative electrodes in the vacuum chamber according to the pulse waveform contained in the DC pulse voltage. As a result, the capacitance of the virtual capacitor formed between the two positive and negative electrodes changes in synchronization with the pulse waveform. Because this change in capacitance is fast, the high-frequency power supply 10 cannot make the impedance for the first frequency follow the change in capacitance, even when using the impedance automatic matching function of the matching unit 38. For this reason, if the high-frequency power supply 10 does not have an IMD suppression circuit 42, it will generate IMD in the high-frequency AC voltage of the first frequency according to the pulse waveform contained in the DC pulse voltage.
[0042] The simulation results showed that this IMD is caused by the transient response of the matching circuit 38, which is generated by electrostatic fluctuations in the plasma generator 20 due to the influence of the DC pulse voltage. It was also found that this transient response of the matching circuit 38 can be suppressed by inserting an inductance between the matching circuit 38 and the plasma generator 20. Therefore, even when the change in capacitance is faster than the automatic impedance matching function of the matching circuit 38, the high-frequency power supply 10 can suppress IMD caused by the influence of the DC pulse voltage by providing the IMD suppression circuit 42. As a result, the high-frequency power supply 10 according to this embodiment can efficiently suppress IMD generated in the high-frequency AC voltage due to the influence of the DC pulse voltage and efficiently supply the high-frequency AC voltage to the plasma generator 20.
[0043] Furthermore, the IMD suppression circuit 42 is provided downstream of the matching unit 38, that is, between the matching unit 38 and the plasma generator 20. Therefore, in the high-frequency power supply unit 10 according to this embodiment, no filter or the like is provided between the matching unit 38 and the high-frequency power supply 34, so the matching unit 38 can perform impedance matching in such a way that it reduces reflected waves reflected by the high-frequency power supply 34. As a result, the high-frequency power supply unit 10 according to this embodiment can perform highly accurate impedance matching.
[0044] Furthermore, as shown in Figure 3(A), the IMD suppression circuit 42 may include a first capacitor 70 connected in series with the first inductor 50, in addition to the first inductor 50. More specifically, the circuit consisting of the first inductor 50 and the first capacitor 70 connected in series has one terminal connected to the output terminal of the matching unit 38 and the other terminal connected to the AC power input terminal 22 of the plasma generator 20.
[0045] The first capacitor 70 has a capacitance such that its reactance with respect to the first frequency, which is the frequency of the high-frequency AC voltage, cancels out the reactance of the first inductor 50 with respect to the first frequency. As a result, the combined reactance of the IMD suppression circuit 42 with respect to the first frequency becomes approximately zero. Because the reactance of the IMD suppression circuit 42 becomes zero, the impedance matching range of the matching unit 38 becomes the same as the matching range when the IMD suppression circuit 42 is not provided. Therefore, even when the IMD suppression circuit 42 is provided, the matching unit 38 can perform impedance matching without changing the initial setting value or the matching range during matching operation.
[0046] (simulation) I will now explain the results of the first simulation.
[0047] The inventors performed a simulation of the high-frequency power supply unit 10 using a circuit simulator. In the first simulation, a 40.68 MHz sinusoidal high-frequency AC voltage was generated from the high-frequency power supply unit 10, and the capacitance of the variable capacitor was changed as shown in Figure 4, assuming that the capacitor component in the load was a variable capacitor. Then, in the first simulation, the trajectory of the impedance at the input terminal of the matching circuit 38 was calculated in the case of the above simulation.
[0048] Figure 4 shows the time-varying waveform of the variable capacitance in the first simulation. The plasma generator 20 changes its capacitance as shown in Figure 4 when a DC pulse voltage containing a pulse waveform synchronized with the waveform shown in Figure 4 is applied to the pulse power input terminal 24. Therefore, in the first simulation, the load as seen from the AC power input terminal 22 of the plasma generator 20 was considered as a series circuit of a resistor and a variable capacitor. In the first simulation, the resistance value of the resistor was set to 4Ω. Then, in the first simulation, the capacitance of the variable capacitor was varied in the range of 0.5nF to 4.5nF to produce a triangular wave, as shown in Figure 4.
[0049] Figures 5(A), 5(B), and 5(C) show the trajectory of the impedance normalized by the characteristic impedance at the input terminal of the matching circuit 38, calculated by the first simulation. Figures 5(A), 5(B), and 5(C) are polar charts, where the vertical axis represents the imaginary component of the impedance (v) and the horizontal axis represents the real component of the impedance (u).
[0050] Furthermore, Figure 5(A) shows the impedance trajectory when the inductance of the first inductor 50 of the IMD suppression circuit 42 is 0 and the capacitance of the first capacitor 70 is infinite, that is, when the IMD suppression circuit 42 is not provided. Also, Figure 5(B) shows the impedance trajectory when the inductance of the first inductor 50 is 306 nH and the capacitance of the first capacitor 70 is 50 pF. Figure 5(C) shows the impedance trajectory when the inductance of the first inductor 50 is 1.05 μH and the capacitance of the first capacitor 70 is 15 pF.
[0051] Compared to Figure 5(A), the change in impedance is smaller in Figures 5(B) and 5(C). In particular, the change in impedance is extremely small in Figure 5(C).
[0052] Table 1 shows the reflection coefficient at the input terminal of the matching circuit 38 in the first simulation. The high-frequency power supply 10 according to the embodiment can reduce the reflection coefficient by including the IMD suppression circuit 42, as shown in Table 1. [Table 1]
[0053] Thus, the high-frequency power supply 10 according to the embodiment can reduce the change in impedance at the input terminal of the matching unit 38 by including the IMD suppression circuit 42, even when the capacitance of the plasma generator 20 fluctuates according to the pulse waveform included in the DC pulse voltage. As a result, the high-frequency power supply 10 according to the embodiment can suppress IMD and efficiently supply a high-frequency AC voltage to the plasma generator 20. In particular, the IMD suppression circuit 42 can further reduce the change in impedance at the input terminal of the matching unit 38 when the inductance of the first inductor 50 is 300 nH or more.
[0054] Next, I will explain the results of the second simulation.
[0055] In the second simulation, a high-frequency AC voltage was generated by frequency-modulating a 40.68 MHz sine wave from the high-frequency power supply 10, and the load was varied as shown in Figure 4, similar to the first simulation. Then, in the second simulation, the trajectory of the impedance at the input terminal of the matching circuit 38 was calculated under the above-described simulation.
[0056] Figure 6 shows the frequency change of the high-frequency AC voltage in relation to the time-varying waveform of the variable capacitance of the plasma generator 20 in the second simulation.
[0057] The variable capacitance is constant at 0.5nF from the first time point (t1) to the second time point (t2). Subsequently, the variable capacitance increases linearly from the second time point (t2) to the third time point (t3), reaching 4.5nF at the third time point (t3). Then, the variable capacitance decreases linearly from the third time point (t3) to the fourth time point (t4), reaching 0.5nF at the fourth time point (t4). The variable capacitance then repeats, with the period from the first time point (t1) to the fourth time point (t4) constituting one cycle, and the capacitance changes in this cycle.
[0058] Note that the second time point (t2) is 1.5 microseconds after the first time point (t1). The third time point (t3) is 0.5 microseconds after the second time point (t2). The fourth time point (t4) is 0.5 microseconds after the third time point (t3).
[0059] In the second simulation, the high-frequency power supply unit 10 maintains a constant frequency of 40.68 MHz for the high-frequency AC voltage during the first period (T1). The first period (T1) is the period during which the variable capacitance is constant at 0.5 nF, and it begins at the first time (t1) and ends at the second time (t2).
[0060] In the second simulation, the high-frequency power supply 10 linearly decreases the frequency of the high-frequency AC voltage from 40.68 MHz to a frequency obtained by adding a preset frequency to 40.68 MHz during the second period (T2). The second period (T2) begins at the second time (t2) and ends 0.2 μs after the second time (t2). The preset frequency is a negative value.
[0061] In the second simulation, the high-frequency power supply unit 10 keeps the frequency of the high-frequency AC voltage constant at a frequency obtained by adding a set frequency to 40.68 MHz during the third period (T3). The third period (T3) is a period that starts 0.2 μs after the second time (t2) and ends 0.6 μs after the second time (t2).
[0062] In the second simulation, the high-frequency power supply 10 linearly increases the frequency of the high-frequency AC voltage during the fourth period (T4) from a frequency obtained by adding a set frequency to 40.68 MHz to 40.68 MHz. The fourth period (T4) is a period that starts 0.8 μs after the second time (t2) and ends at the fourth time (t4).
[0063] In the second simulation, the high-frequency power supply unit 10 repeatedly changes the frequency of the high-frequency AC voltage, with the first period (T1), second period (T2), third period (T3), and fourth period (T4) forming one cycle.
[0064] Figures 7(A), 7(B), and 7(C) show the trajectory of the impedance normalized by the characteristic impedance at the input terminal of the matching circuit 38, calculated by the second simulation. Figures 7(A), 7(B), and 7(C) are polar charts, where the vertical axis represents the imaginary component of the impedance (v) and the horizontal axis represents the real component of the impedance (u).
[0065] Furthermore, Figure 7(A) shows the impedance trajectory when the inductance of the first inductor 50 of the IMD suppression circuit 42 is 0, the capacitance of the first capacitor 70 is infinite, and the set frequency is -2.1 MHz, that is, when the IMD suppression circuit 42 is not provided and the set frequency is -2.1 MHz. Also, Figure 7(B) shows the impedance trajectory when the inductance of the first inductor 50 is 306 nH, the capacitance of the first capacitor 70 is 50 pF, and the set frequency is -0.8 MHz. Figure 7(C) shows the impedance trajectory when the inductance of the first inductor 50 is 1.05 μH, the capacitance of the first capacitor 70 is 15 pF, and the set frequency is -0.4 MHz.
[0066] Compared to Figure 7(A), the impedance change is smaller in Figures 7(B) and 7(C). In particular, the impedance change is extremely small in Figure 7(C). Furthermore, the set frequency, i.e., the frequency modulation degree of the high-frequency AC voltage, is also smaller in Figures 7(B) and 7(C) compared to Figure 7(A).
[0067] Table 2 shows the reflection coefficient at the input terminal of the matching circuit 38 in the second simulation. The high-frequency power supply 10 according to the embodiment can reduce the reflection coefficient by including the IMD suppression circuit 42, as shown in Table 1. [Table 2]
[0068] Thus, in the embodiment, when the capacitance of the plasma generator 20 fluctuates in response to the DC pulse voltage, the IMD suppression circuit 42 in the high-frequency power supply 10 can reduce the change in impedance at the input terminal of the matching unit 38, and also reduce the frequency modulation degree of the high-frequency AC voltage. As a result, the high-frequency power supply 10 in the embodiment does not require a large, wide-bandwidth high-frequency power supply 10, and can efficiently suppress the IMD of the high-frequency AC voltage and supply it to the plasma generator 20.
[0069] The embodiments of the present invention described above are presented as examples and are not intended to limit the scope of the invention. Various modifications can be made to the embodiments. [Explanation of symbols]
[0070] 10 High-frequency power supply unit, 20 Plasma generator, 22 AC power input terminal, 24 Pulse power input terminal, 32 Pulse signal generation circuit, 34 High-frequency power supply, 36 DC pulse power supply, 38 Matching unit, 40 Filter, 42 IMD suppression circuit, 50 First inductor, 70 First capacitor
Claims
1. A first power supply that outputs a high-frequency AC voltage, which is an AC voltage of a first frequency, A second power supply that outputs a DC pulse voltage containing one or more consecutive pulse waveforms, A matching circuit receives the high-frequency AC voltage from the first power supply and outputs the high-frequency AC voltage after impedance matching so that the impedance seen from the first power supply remains constant. A filter receives the DC pulse voltage from the second power supply and filters the DC pulse voltage before outputting it to the pulse power input terminal of the load. An IMD suppression circuit includes a first inductor having a predetermined inductance, provided between the matching circuit and the AC power input terminal of the load, the high-frequency AC voltage output from the matching circuit is input, and the input high-frequency AC voltage is passed through the first inductor and output to the AC power input terminal of the load, A high-frequency power supply device equipped with the following features.
2. The IMD suppression circuit further includes a first capacitor having a predetermined capacitance. The first capacitor has a capacitance such that its reactance for the first frequency cancels out the reactance of the first inductor for the first frequency. The high-frequency power supply device according to claim 1.
3. The aforementioned high-frequency AC voltage is a waveform obtained by frequency modulating the first frequency sine wave signal in synchronization with each of the one or more pulse waveforms contained in the DC pulse voltage. The high-frequency power supply device according to claim 1.
4. The aforementioned load is a plasma generator that generates plasma. A high-frequency power supply device according to any one of claims 1 to 3.