Semiconductor device, insulating sheet, and method for manufacturing a semiconductor device.

JP7899133B2Active Publication Date: 2026-08-03SONY INTERACTIVE ENTERTAINMENT LLC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
SONY INTERACTIVE ENTERTAINMENT LLC
Filing Date
2023-07-06
Publication Date
2026-08-03

AI Technical Summary

Benefits of technology

【0010】 本開示で提案する絶縁シートは、半導体チップと、前記半導体チップの下側に配置される基板とを有し、前記半導体チップが実装される領域である第1の領域と、回路パターンと電気部品の少なくとも一方を含む導体要素が設けられている領域である第2の領域とを前記基板が有している半導体装置に取り付けるための絶縁シートである。この絶縁シートは、前記導体要素の上側に位置する上壁と、前記上壁の内側に位置し前記上壁から下がっている内壁とを有し、前記導体要素を覆う収容部と、前記内壁に接続され前記上壁より低い位置にある被取付部と、を有している。この絶縁シートによると、熱伝導材料が広がる範囲を導体要素が存在しない領域に制限できる。また、導体要素と半導体チップとの高さの差が小さい場合でも、絶縁シートを比較的容易に基板に取り付けることができる。

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Abstract

To prevent a thermally conductive material from entering an unintended region even in a case where a change in attitude of a semiconductor device or vibration occurs, in a structure using a metal having fluidity as the thermally conductive material.SOLUTION: An electronic apparatus has a thermally conductive material (31) formed between a radiator (50) and a semiconductor chip (11). The thermally conductive material (31) has fluidity at least at a time of operation of the semiconductor chip (11). In addition, the thermally conductive material (31) has electric conductivity. The thermally conductive material (31) is surrounded by a seal member (33). A capacitor (16) is covered by an insulating portion (15).SELECTED DRAWING: Figure 1A
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Description

Technical Field

[0001] This disclosure relates to a technique for improving the cooling performance of semiconductor devices.

Background Art

[0002] Semiconductor chips that function as a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), etc. are thermally connected to a radiator such as a heat sink or a heat pipe and cooled. There are many electronic devices in which grease is used as a heat conductive material provided between the semiconductor chip and the radiator.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, as the heat generation amount of the semiconductor chip increases, it becomes difficult to sufficiently cool the semiconductor chip due to the thermal resistance of the grease. In the semiconductor device of Patent Document 2, instead of grease, a metal that liquefies by the heat during the operation of the semiconductor chip is used as a heat conductive material between the semiconductor chip and the radiator. By using such a metal, the thermal resistance between the semiconductor chip and the radiator can be reduced, and the cooling performance of the semiconductor chip can be improved.

[0005] In structures that utilize fluid metals as thermal conductive materials, it is crucial to limit the extent to which the thermal conductive material spreads, even when the semiconductor device experiences changes in orientation or vibrations, in order to ensure sufficient cooling performance. Furthermore, it is important that the heat sink exerts sufficient force on the semiconductor chip when pressed against it. In other words, the close contact between the semiconductor chip and the heat sink is also important. [Means for solving the problem]

[0006] An example of an electronic device proposed in this disclosure includes a semiconductor chip, a substrate having a first region located below the semiconductor chip and on which the semiconductor chip is mounted, and a second region on which conductive elements including at least one of a circuit pattern and an electrical component are provided, a heat sink located above the semiconductor chip, and a thermal conductive material between the heat sink and the semiconductor chip. The electronic device further includes a sealing member surrounding the thermal conductive material and an insulating portion covering the conductive elements, wherein the thermal conductive material is conductive and has fluidity at least when the semiconductor chip is operating. With this electronic device, the sealing member and the insulating portion can limit the extent to which the thermal conductive material spreads. In this electronic device, the insulating portion is, for example, a hardened portion of the insulating material or a sheet formed of the insulating material.

[0007] Another example of an electronic device proposed in this disclosure includes a semiconductor chip, a substrate having a first region located below the semiconductor chip and on which the semiconductor chip is mounted, and a second region having conductive elements including at least one of a circuit pattern and an electrical component, a heat sink located above the semiconductor chip, and a thermal conductive material between the heat sink and the semiconductor chip. The electronic device further has an insulating portion covering the conductive elements, the thermal conductive material is conductive and fluid at least during the operation of the semiconductor chip, and the distance from at least a portion of the upper surface of the insulating portion to the lower surface of the heat sink is greater than the distance from the upper surface of the semiconductor chip to the lower surface of the heat sink. With this electronic device, the area over which the thermal conductive material spreads can be limited to areas where conductive elements are not present. Furthermore, close contact between the heat sink and the semiconductor chip can be ensured.

[0008] An example of a semiconductor device proposed in this disclosure includes a semiconductor chip, a substrate having a first region located below the semiconductor chip and on which the semiconductor chip is mounted, and a second region on which conductive elements including at least one of a circuit pattern and an electrical component are provided, and an insulating sheet covering the conductive elements. With this semiconductor device, the area over which the thermal conductive material spreads can be limited to areas where conductive elements are not present.

[0009] Another example of a semiconductor device proposed in this disclosure includes a semiconductor chip, a substrate located below the semiconductor chip and having a first region on which the semiconductor chip is mounted, and a second region on which conductive elements including at least one of a circuit pattern and an electrical component are provided, and an insulating portion covering the conductive elements. The height of at least a portion of the upper surface of the insulating portion relative to the substrate is smaller than the height of the upper surface of the semiconductor chip relative to the substrate. With this semiconductor device, the area over which the thermal conductive material spreads can be limited to areas where conductive elements are not present. Furthermore, close contact between the heat sink and the semiconductor chip can be ensured.

[0010] The insulating sheet proposed in this disclosure is an insulating sheet for attachment to a semiconductor device having a semiconductor chip and a substrate disposed below the semiconductor chip, wherein the substrate has a first region on which the semiconductor chip is mounted and a second region on which a conductive element including at least one of a circuit pattern and an electrical component is provided. The insulating sheet has an upper wall located above the conductive element and an inner wall located inside the upper wall and extending downward from the upper wall, and has a housing portion that covers the conductive element and a mounting portion connected to the inner wall and located lower than the upper wall. With this insulating sheet, the area over which the heat conductive material spreads can be limited to areas where no conductive element exists. Furthermore, even when the height difference between the conductive element and the semiconductor chip is small, the insulating sheet can be attached to the substrate relatively easily.

[0011] An example of a semiconductor device manufacturing method proposed in this disclosure includes the steps of preparing a substrate having a first region located below the semiconductor chip and on which the semiconductor chip is mounted, and a second region on which conductive elements including at least one of a circuit pattern and an electrical component are provided, and covering the conductive elements with an insulating portion. In the step of covering the conductive elements with the insulating portion, the height of the upper surface of the insulating portion with respect to the substrate is made smaller than the height of the upper surface of the semiconductor chip with respect to the substrate. This method makes it possible to limit the area over which the heat conductive material spreads to an area where conductive elements such as electrical components do not exist. Furthermore, it is possible to ensure good contact between the heat sink and the semiconductor chip. [Brief explanation of the drawing]

[0012] [Figure 1A] This is a cross-sectional view showing an example of the electronic device proposed in this disclosure. [Figure 1B] This is an enlarged view of the main part shown in Figure 1A. [Figure 2] This is a plan view of the semiconductor device found in electronic equipment. [Figure 3A] This is a cross-sectional view showing a modified example regarding the position of the sealing member. [Figure 3B] This is a cross-sectional view showing a modified example regarding the position of the sealing member. [Figure 3C] It is a cross-sectional view showing a modified example of the position of the seal member. [Figure 4] It is a diagram for explaining the manufacturing process of an electronic device. [Figure 5A] It is a cross-sectional view showing another example of the electronic device proposed in the present disclosure. [Figure 5B] It is an enlarged view of FIG. 5A. [Figure 6] It is a perspective view of the insulating sheet included in the electronic device shown in FIG. 5A. [Figure 7] It is a diagram showing a modified example of the mounting structure of the insulating sheet. [Figure 8] It is a diagram showing yet another modified example of the mounting structure of the insulating sheet. [Figure 9A] It is a cross-sectional view showing yet another example of the electronic device proposed in the present disclosure. [Figure 9B] It is an enlarged view of FIG. 9A.

Mode for Carrying Out the Invention

[0013] Hereinafter, the semiconductor device and the electronic device proposed in the present disclosure will be described.In this specification, as an example of the semiconductor device and the electronic device proposed in the present disclosure, the semiconductor device 10 and the electronic device 1 will be described.The electronic device proposed in the present disclosure can be applied to, for example, a game machine, a development machine for executing various programs under development (for example, a game program), and an information processing device different from a game machine (for example, a personal computer, a server device, a control device for a transport vehicle). <​​​​​​​​As shown in FIG. 1A, the electronic device 1 includes a semiconductor device 10, a circuit board 2, and a heat sink 50. In the description in this specification, the circuit board 2 is disposed below the semiconductor device 10, and the heat sink 50 is disposed above the semiconductor device 10.

[0016] The semiconductor device 10 includes a semiconductor chip 11 and a substrate (package substrate) 17 located below the semiconductor chip 11. The semiconductor chip 11 functions as a CPU, a GPU, or the like. The semiconductor chip 11 is mounted, for example, in a flip chip manner on the upper surface 17a of the substrate 17 (see FIG. 1B). That is, a plurality of solder bumps 18 formed on the lower surface of the semiconductor chip 11 and bumps (not shown) formed on the substrate 17 are soldered. An underfill 23 is filled in the gap between the semiconductor chip 11 and the substrate 17. The underfill 23 is formed of, for example, a resin and is cured between the semiconductor chip 11 and the substrate 17. The method of mounting the semiconductor chip 11 on the substrate 17 may be wire bonding, tape bonding, or the like.

[0017] In addition to the semiconductor chip 11, a plurality of electrical components are mounted on the upper surface 17a of the substrate 17. In the example shown in FIGS. 1A and 1B, a plurality of capacitors 16 are mounted on the substrate 17. In this specification, in the semiconductor device 10, the region where the semiconductor chip 11 is disposed is referred to as a first region A1 (see FIGS. 1A and 2), and the region around the semiconductor chip 11 where a plurality of electrical components such as the capacitors 16 are disposed is referred to as a second region A2 (see FIGS. 1A and 2). In the second region A2, a circuit pattern (including through holes and vias) may be formed together with or instead of the mounting of the capacitors 16. A stiffener 14 described later is attached to the outer peripheral edge of the substrate 17. The second region A2 is a region between the inner surface of the stiffener 14 and the side surface of the semiconductor chip 11. An insulating portion 15 described later is formed in the second region A2.

[0018] The stiffener 14 is a square frame made of metal and is attached to the outer edge of the substrate 17. The material of the stiffener 14 can be, for example, aluminum or copper. Adhesive or solder may be used to attach the stiffener 14 to the substrate 17. The stiffener 14 reduces the warping of the substrate 17. A first region A1 and a second region A2 are defined inside the stiffener 14.

[0019] As shown in Figure 1A, the substrate 17 is mounted on the circuit board 2 of the electronic device 1. A Ball Grid Array (BGA) 19 is formed on the underside of the substrate 17. That is, a plurality of solder bumps arranged in a grid pattern are formed on the underside of the substrate 17. The BGA 19 is soldered to conductive pads formed on the circuit board 2. The method of mounting the substrate 17 to the circuit board 2 is not necessarily limited to using the BGA 19, and various other mounting methods may be employed. For example, a PGA (Pin Grid Array) with pin-shaped lead terminals or an LGA (Land Grid Array) with electrodes arranged in an array may be used. In addition to the BGA 19, a plurality of capacitors 21 may be mounted on the underside of the substrate 17.

[0020] The heat sink 50 is, for example, a heat sink and, as shown in Figure 1A, has a plate-shaped heat receiving section 50a and fins 50b. The fins 50b are formed, for example, on the upper side of the heat receiving section 50a. A vapor chamber consisting of a plate-shaped container and a working fluid contained within the container may be used as the heat receiving section 50a. In yet another example, the heat sink 50 may include a heat pipe. The heat sink 50 may be biased toward the semiconductor chip 11 by an elastic member (e.g., a spring) not shown. The electronic device 1 may also have a cooling fan (not shown) that forms an airflow toward the heat sink 50.

[0021] [Thermal conductive materials] As shown in Figure 1A, the lower surface 50c of the heat sink 50 faces the upper surface 11a of the semiconductor chip 11. A thermal conductive material 31 is placed between the lower surface 50c of the heat sink 50 and the upper surface 11a of the semiconductor chip 11. The thermal conductive material 31 is in direct contact with both the lower surface 50c of the heat sink 50 and the upper surface 11a of the semiconductor chip 11. The heat sink 50 and the semiconductor chip 11 are thermally connected by the thermal conductive material 31.

[0022] The thermal conductive material 31 is a fluid material. More specifically, the thermal conductive material 31 is a fluid material at least when the semiconductor chip 11 is operating. Preferably, the thermal conductive material 31 is liquid or paste-like at least when the semiconductor chip 11 is operating. The thermal conductive material 31 may be a material that becomes fluid when the semiconductor chip 11 is operating but does not have fluidity when the semiconductor chip 11 is not operating (in other words, at room temperature (e.g., 20°C)). That is, the thermal conductive material 31 may be a material that becomes fluid due to the heat generated by the operation of the semiconductor chip 11. When the semiconductor chip 11 is not operating, for example, during manufacturing, transportation, or when the power to the electronic device is turned off. In contrast, the thermal conductive material 31 may be a material that is fluid even when the semiconductor chip 11 is not operating. That is, when the chip is not operating, the thermal conductive material 31 may be in any state, such as liquid, paste, powder, plate, or block.

[0023] The fluidity of the thermal conductive material 31 reduces the thermal resistance between the upper surface 11a of the semiconductor chip 11 and the lower surface 50c of the heat sink 50, which is caused by slight warping of the upper surface 11a of the semiconductor chip 11 and microscopic irregularities on the lower surface 50c of the heat sink 50, thereby improving the cooling performance of the semiconductor chip 11. Furthermore, if the thermal conductive material 31 is fluid at room temperature, it becomes possible to separate the heat sink 50 from the semiconductor chip 11. As a result, for example, when repairing the electronic device 1, it becomes possible to remove the heat sink 50 from the semiconductor device 10 before performing the repair work. In addition, the thermal conductive material 31 is an electrically conductive material, in other words, a material with high thermal conductivity.

[0024] As the thermal conductive material 31, for example, a liquid metal that is liquid at room temperature can be used. The liquid metal can be, for example, one or more low-melting-point metals selected from the group consisting of Ga (melting point: 29.8°C, thermal conductivity 40.6 W / mk), In (melting point: 156.4°C, thermal conductivity 81.6 W / mk), and Sn (melting point: 231.97°C, thermal conductivity 66.6 W / mk), or an alloy containing the above one or more low-melting-point metals. Specific examples of alloys include In-Ag, Sn-Ag-Cu, and In-Sn-Bi. As another example of the thermal conductive material 31, a conductive paste may be used. As the conductive paste, a silver paste in which silver powder is dispersed in a resin can be used.

[0025] Preferably, the thermal conductive material 31 is applied to the entire upper surface 11a of the semiconductor chip 11. The thermal conductive material 31 may also be in contact with a portion of the side surface 11b (see Figure 1B) of the semiconductor chip 11. The area on the lower surface 50c of the heat sink 50 to which the thermal conductive material 31 is applied may be larger than the semiconductor chip 11.

[0026] [Sealing material and insulating part] Since the thermal conductive material 31 is fluid, it is necessary to limit the area over which the thermal conductive material 31 spreads in order to achieve cooling performance. Also, since the thermal conductive material 31 is conductive, it is necessary to limit the area over which the thermal conductive material 31 spreads so that it does not come into contact with the capacitor 16 or circuit pattern located in the second region A2. Furthermore, it is undesirable for the thermal conductive material 31 to come into contact with other components of the electronic device 1 located outside the semiconductor device 10 (outside the stiffener 14). Therefore, the electronic device 1 has the following structure.

[0027] [Insulation part] As shown in Figure 1A, the semiconductor device 10 has an insulating portion 15 that covers the conductive elements, namely the capacitor 16 and the circuit pattern, provided in the second region A2 (see Figure 2). In the example of the semiconductor device 10, the insulating portion 15 is formed between the inner surface of the stiffener 14 and the side surface 11b of the semiconductor chip 11, as shown in Figure 1B. The insulating portion 15 is formed over the entire second region A2 and is in contact with the inner surface of the stiffener 14 and the side surface 11b of the semiconductor chip 11. Therefore, the inner circumference of the insulating portion 15 overlaps the outer circumference 23a (see Figure 1B) of the underfill 23 formed between the semiconductor chip 11 and the substrate 17. The insulating portion 15 is not formed in the first region A1, and the upper surface 11a of the semiconductor chip 11 is exposed from the insulating portion 15.

[0028] The insulating portion 15 is, for example, a resin. More specifically, the insulating portion 15 is a hardened portion of liquid or gel-like resin. For example, an ultraviolet-curable resin can be used as the insulating portion 15. The resin is applied to cover the conductive elements in the second region A2 (i.e., the capacitor 16 and circuit patterns), and then hardened by exposure to ultraviolet light to form the insulating portion 15. This insulating portion 15 prevents the heat conductive material 31 from coming into contact with the conductive elements in the second region A2.

[0029] As shown in Figure 1B, the height H2 of the upper surface 15a of the insulating portion 15 (height from the upper surface 17a of the substrate 17) is smaller than the height H1 of the upper surface 11a of the semiconductor chip 11 (height from the upper surface 17a of the substrate 17). As a result, the distance from the upper surface 15a of the insulating portion 15 to the lower surface 50c of the heat sink 50 is greater than the distance from the upper surface 11a of the semiconductor chip 11 to the lower surface 50c of the heat sink 50. Therefore, when the heat sink 50 is pushed toward the semiconductor chip 11, no interference occurs between the insulating portion 15 and the lower surface 50c of the heat sink 50, and sufficient contact between the heat sink 50 and the semiconductor chip 11 can be ensured.

[0030] As shown in Figure 1B, in the example of the semiconductor device 10, the height of the upper surface 16a of the capacitor 16 (height from the upper surface 17a of the substrate 17) is smaller than the height H1 of the upper surface 11a of the semiconductor chip 11. It is desirable that the insulating portion 15 covers the upper surface 16a of the capacitor 16. In other words, it is preferable that the entire capacitor 16 is covered by the insulating portion 15. This ensures that the heat conductive material 31 does not come into contact with the capacitor 16. The entire capacitor 16 may be embedded in the insulating portion 15.

[0031] Furthermore, as shown in Figure 1B, the height H3 of the upper surface 14a of the stiffener 14 (height from the upper surface 17a of the substrate 17) is smaller than the height H1 of the upper surface 11a of the semiconductor chip 11. The height H2 of the upper surface 15a of the insulating portion 15 is smaller than the height H3 of the upper surface 14a of the stiffener 14. Therefore, when the heat sink 50 is pushed toward the semiconductor chip 11, no interference occurs between the stiffener 14 and the lower surface 50c of the heat sink 50, and sufficient contact between the heat sink 50 and the semiconductor chip 11 can be ensured. Unlike the example shown in Figure 1B, the height H2 of the upper surface 15a of the insulating portion 15 may be the same as the height H3 of the upper surface 14a of the stiffener 14.

[0032] If the circuit patterns and conductive elements such as capacitors 16 exposed on the upper surface 17a of the substrate 17 are formed only in a part of the second region A2, the insulating portion 15 may be formed only in this part of the second region A2. For example, as shown in Figure 3C, the insulating portion 15 may be separated from the side surface 11b of the semiconductor chip 11. In the example shown in this figure, a sealing member 33, which will be described later, is placed between the insulating portion 15 and the side surface 11b of the semiconductor chip 11. Such an insulating portion 15 may be, for example, the part in which a liquid or gel-like resin (specifically, an ultraviolet-curable resin) supplied between the sealing member 33 and the stiffener 14 has hardened.

[0033] [Sealing material] The electronic device 1 has a sealing member 33 (see Figure 1A) surrounding the heat conductive material 31. The sealing member 33 has a square opening in plan view, and the heat conductive material 31 and the semiconductor chip 11 are located inside the sealing member 33 (see Figure 2). As shown in Figure 1B, the sealing member 33 is located between the semiconductor device 10 and the lower surface 50c of the heat sink 50, sealing the gap between them and retaining the heat conductive material 31 inside the semiconductor device 10. The sealing member 33 is separated from the outer edge (side surface 11b) of the semiconductor chip 11. Therefore, it is possible to apply the heat conductive material 31 to the entire upper surface 11a of the semiconductor chip 11. That is, it is possible to continuously apply the heat conductive material 31 to all four edges of the upper surface 11a.

[0034] The sealing member 33 is positioned, for example, between the upper surface 15a of the insulating part 15 and the lower surface 50c of the heat sink 50, and is sandwiched between these two surfaces 15a and 50c. The sealing member 33 may be attached to the lower surface 50c of the heat sink 50. The sealing member 33 may be bonded, for example, to the lower surface 50c of the heat sink 50. Conversely, the sealing member 33 may be attached to the upper surface 15a of the insulating part 15. The sealing member 33 may be bonded, for example, to the upper surface 15a of the insulating part 15.

[0035] Furthermore, the sealing member 33 may have a portion located above the capacitor 16 covered by the insulating portion 15. That is, the sealing member 33 may have a portion that overlaps with the capacitor 16 in a plan view of the semiconductor device 10. With a semiconductor device 10 having such a positional relationship, it becomes possible to use a sealing member 33 with a large width in the horizontal direction, thereby improving sealing performance. A space S containing air is formed inside the sealing member 33.

[0036] The sealing member 33 is formed of, for example, a cushioning material. That is, the sealing member 33 is made of a material that allows for changes in the thickness of the sealing member 33 in the direction in which the upper surface 11a of the semiconductor chip 11 and the lower surface 50c of the heat sink 50 face each other, i.e., in the vertical direction. The material of the sealing member 33 can be, for example, rubber, sponge, foaming resin, or silicone. By doing so, even when the heat sink 50 is pressed against the semiconductor chip 11 by an elastic member, the load acting on the semiconductor device 10 through the sealing member 33 can be reduced.

[0037] The position of the sealing member 33 is not limited to the example shown in Figure 1B. For example, as shown in Figure 3A, the sealing member 33 may be located between the upper surface 15a of the insulating portion 15 and the lower surface 50c of the heat sink 50, while avoiding the position of the capacitor 16. In other words, the sealing member 33 may be positioned so as not to overlap with the capacitor 16 in a plan view. By doing so, it is possible to prevent a load from being applied from the heat sink 50 to the capacitor 16 through the sealing member 33.

[0038] In another example, as shown in Figure 3B, the sealing member 33 may be positioned between the upper surface 14a of the stiffener 14 and the lower surface 50c of the heat sink 50, sandwiched between these two surfaces 14a and 50a. The stiffener 14 is made of metal and has higher rigidity than the insulating part 15. Since the sealing member 33 is pressed against the stiffener 14, which has high rigidity, the contact pressure between the sealing member 33 and the stiffener 14 can be improved. As a result, the sealing performance of the sealing member 33 can be improved.

[0039] As described above, the insulating portion 15 may be formed at the location of the capacitor 16 and may be separated from the side surface 11b of the semiconductor chip 11. In this case, as shown in Figure 3C, the sealing member 33 may be located inside the insulating portion 15. The sealing member 33 may be placed between the upper surface 17a of the substrate 17 and the lower surface 50c of the heat sink 50, and may be sandwiched between these two surfaces 17a and 50c.

[0040] In other words, the inner circumferential surface 33a of the sealing member 33 (the surface surrounding the semiconductor chip 11) should be located outside the outer edge of the semiconductor chip 11 and should not overlap with the semiconductor chip 11. The outer circumferential surface 33b of the sealing member 11 (the surface facing the opposite direction from the inner circumferential surface 33a) should be located inside the outer edge of the semiconductor device 10 (in the example of the semiconductor device 10, the outer edge of the stiffener 14).

[0041] [Manufacturing method] Examples of manufacturing methods for electronic equipment 1 and semiconductor device 10 will be described.

[0042] First, a semiconductor chip 11, a capacitor 16, and a stiffener 14 are mounted on the substrate 17. Underfill 23 is filled between the semiconductor chip 11 and the substrate 17. A liquid or gel-type UV-curable resin is supplied around the capacitor 16. That is, UV-curable resin is accumulated between the stiffener 14 and the semiconductor chip 11. The amount of resin is enough to bury the upper surface 16a of the capacitor 16 in the resin. The resin is irradiated with ultraviolet light to cure it. This gives rise to the insulating portion 15. Note that, as shown in Figure 3C, when manufacturing a structure in which the insulating portion 15 is formed between the sealing member 33 and the stiffener 14, the insulating portion 15 can be formed by supplying a liquid or gel-type UV-curable resin between the sealing member 33 and the stiffener 14 after attaching the sealing member 33 to the substrate 17.

[0043] Next, as shown in Figure 4, the thermal conductive material 31 is applied to the upper surface 11a of the semiconductor chip 11 and the lower surface 50c of the heat sink 50. It is desirable to spread the thermal conductive material 31 over the entire upper surface 11a of the semiconductor chip 11 by utilizing the fluidity of the thermal conductive material 31. It is also desirable to spread the thermal conductive material 31 over the entire area on the lower surface 50c of the heat sink 50 that corresponds to the semiconductor chip 11. It is desirable that the area on the heat sink 50 to which the thermal conductive material 31 is applied is larger than the size of the semiconductor chip 11.

[0044] Furthermore, a sealing member 33 is attached to the lower surface 50c of the heat sink 50. Then, the heat sink 50 is attached to the semiconductor chip 11, and the heat sink 50 is pressed against the semiconductor chip 11 using, for example, an elastic member such as a spring. As a result, the lower surface 50c of the heat sink 50 is in close contact with the upper surface 11a of the semiconductor chip 11.

[0045] In the method of applying the thermal conductive material 31 to only one of the surfaces, the upper surface 11a of the semiconductor chip 11 and the lower surface 50c of the heat sink 50, when the heat sink 50 is attached to the semiconductor chip 11, the thermal conductive material 31 does not spread easily on the other surface, and the thermal resistance between the semiconductor chip 11 and the heat sink 50 increases. As shown in Figure 4, this problem can be solved by applying the thermal conductive material 31 to both the upper surface 11a of the semiconductor chip 11 and the lower surface 50c of the heat sink 50.

[0046] [Differentiation] Figure 5A is a cross-sectional view showing a modified example of the electronic device 1. Figure 5B is an enlarged view of Figure 5A. In these figures, the electronic device 1 has a semiconductor device 110 as a modified example of the semiconductor device 10. In these figures, the same reference numerals are used for parts or components that have been described previously.

[0047] The semiconductor device 110 has an insulating sheet 115 (see Figure 5A) as an insulating part that covers conductive elements such as the capacitor 16 and circuit patterns. The insulating sheet 115 is a sheet molded from resin. Engineering plastics such as polycarbonate and polyamide can be used as materials for the insulating sheet 115. Figure 6 is a perspective view of the insulating sheet 115. In Figures 5A and 5B, the insulating sheet 115 is shown with a reduced width in the left-right direction compared to the insulating sheet 115 shown in Figure 6.

[0048] As shown in Figure 5B, the insulating sheet 115 has a housing section 115a. The capacitor 16 is placed inside the housing section 115a (the space defined by the housing section 115a and the upper surface 17a of the substrate 17). The housing section 115a has an upper wall 115b, an inner wall 115c, and an outer wall 115d. The upper wall 115b is located above the capacitor 16. The inner wall 115c is located inside the capacitor 16 (i.e., closer to the center of the semiconductor device 10 relative to the capacitor 16) and slopes downward from the upper wall 115b toward the substrate 17. The outer wall 115d is located outside the capacitor 16 and slopes downward from the upper wall 115b toward the substrate 17. Thus, a space for the capacitor 16 to be placed is formed inside the housing section 115a.

[0049] [Height of storage area] As shown in Figure 5B, the height H4 of the highest part of the upper surface of the insulating sheet 115 (the highest part of the upper surface of the upper wall 115b) is smaller than the height H1 of the upper surface 11a of the semiconductor chip 11. As a result, the distance from the upper surface of the insulating sheet 115 to the lower surface 50c of the heat sink 50 is greater than the distance from the upper surface 11a of the semiconductor chip 11 to the lower surface 50c of the heat sink 50. Therefore, when the heat sink 50 is pushed toward the semiconductor chip 11, no interference occurs between the insulating sheet 115 and the lower surface 50c of the heat sink 50, and sufficient contact between the heat sink 50 and the semiconductor chip 11 can be ensured.

[0050] As shown in Figure 5B, the height H3 of the upper surface 14a of the stiffener 14 is smaller than the height H1 of the upper surface 11a of the semiconductor chip 11. The height H4 of the upper surface of the insulating sheet 115 is smaller than the height H3 of the upper surface 14a of the stiffener 14. When the heat sink 50 is pushed toward the semiconductor chip 11, no interference occurs between the stiffener 14 and the lower surface 50c of the heat sink 50, and sufficient contact between the heat sink 50 and the semiconductor chip 11 can be ensured. Unlike the example shown in Figure 5B, the height H4 of the upper surface of the insulating sheet 115 may be the same as the height H3 of the upper surface 14a of the stiffener 14.

[0051] Furthermore, a metal plate having a size that matches the size of the semiconductor chip 11 may be welded to the lower surface 50c of the heat sink 50. In this case, the height H4 of the upper surface of the insulating sheet 115 may be higher than the height H1 of the upper surface 11a of the semiconductor chip 11. With this structure, by adjusting the thickness of the metal plate, the distance from the upper surface of the insulating sheet 115 to the lower surface 50c of the heat sink 50 can be made larger than the distance from the upper surface 11a of the semiconductor chip 11 to the lower surface of the heat sink 50 (the lower surface of the metal plate). As a result, interference between the insulating sheet 115 and the lower surface 50c of the heat sink 50 does not occur, and sufficient contact between the heat sink 50 and the semiconductor chip 11 can be ensured.

[0052] [Mounting part] As shown in Figure 5B, the insulating sheet 115 is attached to the semiconductor device 110. In one example, the insulating sheet 115 has mounting portions 115h and 115i that form the edge of the housing portion 115a and are attached to the substrate 17. The mounting portions 115h and 115i are attached to the substrate 17 by adhesive E1. As the adhesive E1, for example, an ultraviolet-curable resin can be used.

[0053] As shown in Figure 5B, the inner mounting portion 115h is connected to the lower end of the inner wall 115c. The mounting portion 115h extends horizontally, for example, from the lower edge of the inner wall 115c and is positioned along the substrate 17. The mounting portion 115h is located between the capacitor 16 and the side surface 11b of the semiconductor chip 11. The position of the mounting portion 115h is lower than the upper wall 115b of the housing portion 115a. This shape of the insulating sheet 115 makes it easier to insulate the capacitor 16 from the thermal conductive material 31. In other words, in the structure illustrated in Figure 1A, if the difference between the height of the upper surface 16a of the capacitor 16 and the height of the upper surface 11a of the semiconductor chip 11 is small, it becomes difficult to control the height at which the resin is injected so as not to exceed the upper surface 15a of the insulating portion 15. In contrast, with an insulating sheet 115 having a mounting portion 115h at a position lower than the upper wall 115b, the insulating sheet 115 can be easily attached to the semiconductor device 10 even if the difference in height between the upper surface 16a of the capacitor 16 and the upper surface 11a of the semiconductor chip 11 is small. Furthermore, the mounting portion 115h extends in a direction along the surface of the substrate 17. Therefore, the attachment strength of the mounting portion 115h to the substrate 17 can be increased. Note that the mounting portion 115h does not necessarily have to extend in a direction along the surface of the substrate 17. In this case, the lower edge of the inner wall 115c may be adhered to the substrate 17 and function as the mounting portion 115h.

[0054] As shown in Figure 5B, the outer mounting portion 115i is connected to the lower edge of the outer wall 115d. The mounting portion 115i extends horizontally from, for example, the lower edge of the outer wall 115d and is positioned along the substrate 17. The position of the mounting portion 115i is also lower than the upper wall 115b. This shape of the insulating sheet 115 makes it easier to insulate the capacitor 16 from the heat conductive material 31. In other words, in the structure illustrated in Figure 1A, when the difference between the height of the upper surface 16a of the capacitor 16 and the height of the upper surface 14a of the stiffener 14 is small, there is a problem in that it is difficult to control the height of resin injection so as not to exceed the upper surface 15a of the insulating portion 15. In contrast, with the shape of the insulating sheet 115 having the mounting portion 115i at a position lower than the upper wall 115b, the insulating sheet 115 can be easily attached to the semiconductor device 10 even if the difference between the height of the upper surface 16a of the capacitor 16 and the height of the upper surface 14a of the stiffener 14 is small. Furthermore, the mounting portion 115i extends in a direction along the surface of the substrate 17. Therefore, the mounting strength of the mounting portion 115i to the substrate 17 can be increased. Note that the mounting portion 115i does not necessarily have to extend in a direction along the surface of the substrate 17. In this case, the lower edge of the outer wall 115d may be bonded to the substrate 17 and function as the mounting portion 115i.

[0055] In the structure shown in Figure 5B, the inner mounting portion 115h is in direct contact with the upper surface 17a of the substrate 17. However, the mounting portion 115h may be indirectly attached to the substrate 17. For example, the mounting portion 115h may be positioned above the outer peripheral portion 23a of the underfill 23 and bonded to the underfill 23. In yet another example, the mounting portion 115h may be formed below the underfill 23 and attached to the upper surface 17a of the substrate 17 by the underfill 23. This structure reduces the number of steps required to bond the mounting portion 115h.

[0056] Mounting portions 115h and 115i are provided along the entire edge of the housing portion 115a, and the inside of the housing portion 115a is sealed. As shown in Figure 6, the insulating sheet 115 is a rectangle with an opening formed on the inside for which the semiconductor chip 11 is placed. The insulating sheet 115 has four housing portions 115a, each along the four sides 11b of the semiconductor chip 11. The insulating sheet 115 has mounting portions 115h along its entire inner peripheral edge and mounting portions 115i along its entire outer peripheral edge. Note that the positions of the mounting portions 115h and 115i are not limited to these. For example, in positions where insulation is not required, the edge of the insulating sheet 115 does not need to be attached to the substrate 17.

[0057] The shape of the insulating sheet 115 is not limited to the example shown in Figure 6. For example, if electrical components such as capacitors 16 are present in only one or two directions relative to the semiconductor chip 11, the insulating sheet 115 does not have to be shaped to surround the semiconductor chip 11. For example, the insulating sheet 115 may be present on only one or two sides of the semiconductor chip 11, such as the right side, left side, front side, or rear side.

[0058] In the structure shown in Figure 5B, the outer mounting portion 115i is in direct contact with the upper surface 17a of the substrate 17. However, the mounting portion 115i may be indirectly attached to the substrate 17. For example, as shown in Figure 7, the mounting portion 115i may be located on the upper surface 14a of the stiffener 14. The mounting portion 115i may then be bonded to the upper surface 14a. In this case, it is desirable that the position of the mounting portion 115i be lower than the upper surface 11a of the semiconductor chip 11. This ensures that when the heat sink 50 is pressed against the semiconductor chip 11, the mounting portion 115i does not interfere with the heat sink 50, thus ensuring good contact between the heat sink 50 and the semiconductor chip 11.

[0059] In yet another example, the insulating sheet 115 does not necessarily have mounting portions 115i and 115h. For example, as shown in Figure 8, the inside of the housing portion 115a of the insulating sheet 115 may be filled with insulating material. This insulating material 115M may be a material that functions as an adhesive (for example, an ultraviolet-curable resin). In this case, the insulating sheet 115 is attached to the substrate 17 by this insulating material 115M.

[0060] [Sealing material] In the examples shown in Figures 5A, 7, and 8, the sealing member 33 is positioned between the upper surface 14a of the stiffener 14 and the lower surface 50c of the heat sink 50, and is sandwiched between these two surfaces 14a and 50c. The stiffener 14 is made of metal and has higher rigidity than the insulating sheet 115. Since the sealing member 33 is pressed against the stiffener 14, which has high rigidity, the contact pressure between the sealing member 33 and the stiffener 14 can be improved. As a result, the sealing performance of the sealing member 33 can be improved.

[0061] [Manufacturing method] An example of a method for manufacturing a semiconductor device 110 and an electronic device 1 containing it will be described. First, a semiconductor chip 11, a capacitor 16, and a stiffener 14 are mounted on a substrate 17. Underfill 23 is filled between the semiconductor chip 11 and the substrate 17. Next, an insulating sheet 115 is placed over the capacitor 16. Then, adhesive is applied to the mounting portions 115h and 115i and cured. This seals the inside of the housing portion 115a. An ultraviolet-curable resin can be used as the adhesive. Subsequent steps may be the same as the steps for manufacturing a semiconductor device 10 and an electronic device 1 containing it.

[0062] [Further variations] Figure 9A is a cross-sectional view showing yet another modified example of the electronic device 1. Figure 9B is an enlarged view of Figure 9A. In these figures, the electronic device 1 has a semiconductor device 210 as a modified example of the semiconductor device 10. In these figures, the same reference numerals are used for parts or components that have been described previously.

[0063] The semiconductor device 210 has an insulating sheet 215 (see Figure 5A) as an insulating part that covers conductive elements such as the capacitor 16 and circuit patterns. The insulating sheet 215 is a sheet molded from resin. As with the insulating sheet 115 described above, engineering plastics such as polycarbonate or polyamide can be used as the material for the insulating sheet 215.

[0064] [Liquid gasket] As shown in Figure 9B, the insulating sheet 215 has an upper wall 215b located above the capacitor 16 and an inner wall 215c located inside the capacitor 16. The upper wall 215b and the inner wall 215c form a housing portion 215a for housing conductive elements such as the capacitor 16. The insulating sheet 215 is attached to the substrate 17 by liquid gasket E2. In detail, a mounting portion 215h is formed at the lower end of the inner wall 215c, and this mounting portion 215h is attached by liquid gasket E2.

[0065] A liquid gasket is a material that is fluid at room temperature and, after being applied to the bonding surface, dries or becomes uniform after a certain period of time, forming an elastic or adhesive thin layer. Examples of liquid gasket materials include phenolic, modified ester, silicone, and acrylic types. By using such a liquid gasket, high sealing performance can be ensured between the mounting portion 215h of the insulating sheet 215 and the substrate 17.

[0066] The mounting portion 215h, formed on the lower edge of the inner wall 215c, is bent relative to the inner wall 215c and follows the upper surface 17a of the substrate 17. The liquid gasket E2 is placed, for example, between the upper surface 17a of the substrate 17 and the mounting portion 215h. This prevents the liquid gasket E2 from resting on the upper side of the semiconductor chip 11 during the assembly process of the semiconductor device 210, thereby preventing it from affecting the thermal conductivity between the semiconductor chip 11 and the heat sink 50.

[0067] [Double-layered insulating sheet] As shown in Figure 9B, the semiconductor device 210 further includes an insulating sheet 225 as a sheet covering conductive elements such as the capacitor 16 and circuit patterns. The insulating sheet 225 is positioned below the insulating sheet 215. The two sheets 215 and 225 overlap. (In the following description, the insulating sheet 215 will be referred to as the upper sheet, and the insulating sheet 225 as the lower sheet.) The lower sheet 225 is also attached to the substrate 17. In detail, the lower sheet 225 also has an inner wall 225c on the inside of the capacitor 16, and a mounting portion 225h formed on its lower edge is attached to the substrate 17.

[0068] A space for housing conductive elements such as the capacitor 16 and circuit patterns is formed between the lower sheet 225 and the substrate 17. Therefore, this space is separated from the space where the thermal conductive material 31 exists by a double sheet. That is, the upper sheet 215 forms a space (inside the housing section 215a) separated from the space where the thermal conductive material 31 exists, and the lower sheet 225 forms a space inside its housing section 215a that is separated from the space outside the lower sheet 225.

[0069] The lower sheet 225 is attached to the substrate 17 using a material different from the liquid gasket. The mounting portion 225h of the lower sheet 225 is bent relative to the inner wall 225c and follows the upper surface 17a of the substrate 17. The lower sheet 225 is attached to the substrate 17 by adhesive tape (tape with adhesive applied to both sides) placed between the mounting portion 225h and the substrate 17. The method of attaching the lower sheet 225 to the substrate 17 is not limited to using adhesive tape. For example, the mounting portion 215h of the lower sheet 225 may be attached by adhesive applied to the substrate 17.

[0070] As described above, a fluid thermal conductive material 31 is placed between the lower surface 50c of the heat sink 50 and the upper surface 11a of the semiconductor chip 11. Because the thermal conductive material 31 is fluid, it may seep out from between the lower surface 50c of the heat sink 50 and the upper surface 11a of the semiconductor chip 11 and adhere to the liquid gasket E2. When it is necessary to remove the heat sink 50 and the upper sheet 215 for repair of the electronic equipment or replacement of defective parts, care must be taken to prevent the liquid gasket E2 to which the thermal conductive material 31 is attached from scattering. In the semiconductor device 210, the lower sheet 225 is placed below the upper sheet 215 and further covers the capacitor 16 within the housing 215a. This allows the liquid gasket E2 to be limited to areas where the capacitor 16 is not present, even if it scatters when the heat sink 50 and the upper sheet 215 are removed.

[0071] The lower sheet 225 and the upper sheet 215 may be made of different materials. For example, the lower sheet 225 may be made of a material with lower rigidity than the upper sheet 215. Also, in the example of the semiconductor device 210, the lower sheet 225 is a thinner sheet than the upper sheet 215. An example of the material for the lower sheet 225 is polyethylene terephthalate, and the lower sheet 225 may be flexible. By doing so, the cost increase caused by the lower sheet 225 can be suppressed.

[0072] In the example shown in Figure 9B, the mounting portion 225h of the lower sheet 225 is located below the mounting portion 215h of the upper sheet 215, and they partially overlap in a plan view. A portion of the liquid gasket E2 is positioned above the mounting portion 225h of the lower sheet 225. The relationship between the two mounting portions 215h·225h is not limited to the example shown in the figure. The mounting portion 225h of the lower sheet 225 may be horizontally separated from the mounting portion 215h of the upper sheet 215.

[0073] The semiconductor device 210 has a sealing material 33 made of a cushioning material. In the example shown in Figures 9A and 9B, the sealing material 33 is located above the capacitor 16 and is sandwiched between the upper sheet 215 and the lower surface 50c of the heat sink 50. The sealing material 33 is positioned along the inner edge of the upper wall 215b of the upper sheet 215. The position of the sealing material 33 is not limited to the example shown in these figures; for example, it may be located above the stiffener 14.

[0074] In the example shown in Figures 9A and 9B, sheets 215 and 225 extend horizontally outward beyond the position of the sealing material 33 and have upper walls 215b and 225b, respectively, that cover the capacitor 16 and the stiffener 14. Sheets 215 and 225 extend downward from the outer edges of the upper walls 215b and 225b and have outer walls 215d and 225d, respectively, that cover the stiffener 14. The outer walls 215d and 225d are not attached to the stiffener 14 or to the substrate 17. This reduces the work required to attach sheets 215 and 225 to the substrate 17.

[0075] In contrast, the outer walls 215d and 225d may be attached to the stiffener 14 or the substrate 17. For example, the outer wall 215d of the upper sheet 215 may be attached to the substrate 17 by a liquid gasket, and the outer wall 225d of the lower sheet 225 may be attached to the substrate 17 or the stiffener 14 by means other than a liquid gasket (e.g., adhesive or double-sided sheet).

[0076] The structure of sheets 215 and 225 is not limited to the examples shown in these figures. For example, sheets 215 and 225 may have an outer wall located between the stiffener 14 and the capacitor 16, similar to the example shown in Figure 5B. The lower edge (mounting portion) of the outer wall may be attached to the substrate 17. In this case, the lower edge (mounting portion) of the outer wall of the upper sheet 215 may be attached to the substrate 17 by a liquid gasket, and the lower edge (mounting portion) of the outer wall of the lower sheet 225 may be attached to the substrate 17 by means other than a liquid gasket (e.g., adhesive or double-sided sheet).

[0077] [Manufacturing method] An example of a method for manufacturing a semiconductor device 210 and an electronic device 1 including it will be described. First, a semiconductor chip 11, a capacitor 16, and a stiffener 14 are mounted on a substrate 17. Underfill 23 is filled between the semiconductor chip 11 and the substrate 17. Next, an insulating sheet (lower sheet) 225 is placed over the capacitor 16. Then, the mounting portion 225h is attached to the substrate 17 with an adhesive sheet. Next, liquid gasket E2 is applied to the substrate 17, and then an insulating sheet (upper sheet) 215 is placed over the lower sheet 225. Then, the mounting portion 215h of the upper sheet 215 is attached to the substrate 17 with liquid gasket. Subsequent steps may be the same as the steps for manufacturing a semiconductor device 10 and an electronic device 1 including it.

[0078] [summary] In the electronic device 1 described above, a thermal conductive material 31 is placed between the heat sink 50 and the semiconductor chip 11. The thermal conductive material 31 is electrically conductive and has fluidity at least when the semiconductor chip 11 is operating. The sealing member 33 surrounds the thermal conductive material 31, and conductive elements such as circuit patterns and electrical components are covered by an insulating part (insulating part 15 or insulating sheets 115, 215, 225). With this structure, the sealing member 33 and the insulating part can limit the area over which the thermal conductive material 31 spreads.

[0079] Furthermore, in the electronic device 1, a thermal conductive material 31 is placed between the heat sink 50 and the semiconductor chip 11. The thermal conductive material 31 is conductive and has fluidity at least when the semiconductor chip 11 is operating. Conductive elements such as circuit patterns and electrical components are covered by an insulating part (insulating part 15 or insulating sheets 115, 215, 225). The distance from at least a portion of the upper surface of the insulating part to the lower surface 50c of the heat sink 50 is greater than the distance from the upper surface 11a of the semiconductor chip 11 to the lower surface 50c of the heat sink 50. This structure allows the area over which the thermal conductive material spreads to be limited to areas where conductive elements such as electrical components do not exist. It also ensures good contact between the heat sink and the semiconductor chip.

[0080] The semiconductor devices 110 and 210 have insulating sheets 115, 215, and 225 that cover conductive elements such as circuit patterns and electrical components. With these semiconductor devices 110 and 210, the area over which the thermal conductive material 31 spreads can be limited to areas where no conductive elements are present.

[0081] The semiconductor devices 10, 110, and 210 have insulating portions (insulating portion 15 or insulating sheets 115, 215, and 225) that cover conductive elements such as circuit patterns and electrical components. The height of at least a portion of the upper surface of the insulating portion relative to the substrate 17 is smaller than the height of the upper surface 11a of the semiconductor chip 11 relative to the substrate 17. This structure allows for ensuring close contact between the heat sink 50 and the semiconductor chip 11 while limiting the area over which the heat conductive material 31 spreads to areas where conductive elements such as electrical components do not exist.

[0082] The insulating sheets 115 and 215 have housing portions 115a and 215a, which have upper walls 115b and 215b located above the conductor element, and inner walls 115c and 215c located inside the upper walls 115b and 215b and extending downward from them. The insulating sheets 115 and 215 also have mounting portions 115h and 215h connected to the inner walls 115c and 215c and located lower than the upper walls 115b and 215b. With these insulating sheets 115 and 215, the area over which the heat conductive material 31 spreads can be limited to areas where no conductor element is present. Furthermore, even when the height difference between the conductor element (e.g., capacitor 16) and the semiconductor chip 11 is small, the insulating sheets 115 and 215 can be attached to the substrate relatively easily.

[0083] An example of a manufacturing method for semiconductor devices 10, 110, and 210 includes a step of covering conductive elements such as circuit patterns and electrical components with an insulating portion (insulating portion 15 or insulating sheets 115, 215, and 225). In the step of covering conductive elements with an insulating portion, the height of the upper surface of the insulating portion relative to the substrate 17 is smaller than the height of the upper surface 11a of the semiconductor chip 11 relative to the substrate 17. This method allows the area over which the thermal conductive material 31 spreads to be limited to areas where conductive elements such as electrical components do not exist. Furthermore, it ensures good adhesion between the heat sink 50 and the semiconductor chip 11.

[0084] Furthermore, the inventions disclosed herein are not limited to the electronic devices, semiconductor devices, insulating sheets, and manufacturing methods described above, and any appropriate modifications made while maintaining the spirit of the invention are included within the scope of the present invention.

Claims

1. Semiconductor chips and A substrate having a first region located below the semiconductor chip and on which the semiconductor chip is mounted, and a second region on which a conductive element including at least one of a circuit pattern and an electrical component is provided, The device has an insulating sheet that has an opening for exposing the semiconductor chip and covers the conductive element, The aforementioned insulating sheet is A housing portion for covering the conductor element has an upper wall located above the conductor element and an inner wall located inside the conductor element and extending downward from the upper wall, The mounting portion comprises a portion that forms the edge of the housing portion and is attached directly or indirectly to the substrate at a position lower than the upper wall. Semiconductor equipment.

2. The insulating sheet has an upper wall located above the conductor element and a first mounting portion located between the conductor element and the semiconductor chip, which is directly or indirectly attached to the substrate. The position of the first mounting portion is lower than the upper wall. A semiconductor device as described in claim 1.

3. A stiffener is attached to the aforementioned substrate. The insulating sheet has an upper wall located above the conductor element and a second mounting portion located between the conductor element and the stiffener, which is directly or indirectly attached to the substrate. The position of the second mounting portion is lower than the upper wall. A semiconductor device as described in claim 1.

4. A stiffener is attached to the aforementioned substrate. The outer edge of the insulating sheet is attached to the stiffener. A semiconductor device as described in claim 1.

5. An insulating sheet for attachment to a semiconductor device comprising a semiconductor chip and a substrate disposed below the semiconductor chip, wherein the substrate has a first region on which the semiconductor chip is mounted and a second region on which conductive elements including at least one of a circuit pattern and an electrical component are provided, An opening in which the semiconductor chip can be placed is formed in the center of the plan view, A housing portion for covering the conductor element has an upper wall located above the conductor element and an inner wall located inside the conductor element and extending downward from the upper wall, It has a mounting portion located at a lower position than the upper wall and forming the edge of the housing portion. Insulating sheet.

6. A step of preparing a substrate having a first region which is a region for mounting a semiconductor chip, and a second region which is a region on which a conductive element including at least one of a circuit pattern and an electrical component is provided, A sheet having a housing portion formed of an insulating material and an inner wall located inside the upper wall and the conductor element and lowering from the upper wall, and an opening formed therein, covers the conductor element with the housing portion of the sheet and exposes the semiconductor chip through the opening, and adheres the mounting portion that constitutes the edge of the housing portion of the sheet to the substrate directly or indirectly at a position lower than the upper wall. A method for manufacturing a semiconductor device containing [a specific component].