Surface protection composition, surface protection sheet, and method for manufacturing electronic component devices.

JP7899307B2Active Publication Date: 2026-08-03NITTO DENKO CORP
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
NITTO DENKO CORP
Filing Date
2023-04-03
Publication Date
2026-08-03

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Abstract

Provided is a composition for surface protection which protects at least one surface of a substrate, and contains: a polymer that has a hydrophilic group in a molecule; and a compound that generates an acid or a base by means of at least one of heating or active energy ray irradiation.
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Description

Cross-reference of related applications

[0001] This application claims priority to Japanese Patent Application No. 2022-063386, which is incorporated into the description of this application by reference. [Technical Field]

[0002] The present invention relates to a surface protection composition and a surface protection sheet used, for example, in the manufacture of electronic component devices such as semiconductor integrated circuits. The present invention also relates to a method for manufacturing electronic component devices using the above-mentioned surface protection composition or surface protection sheet. [Background technology]

[0003] Conventionally, there are known methods for manufacturing electronic components, such as semiconductor integrated circuits. In this type of electronic component manufacturing method, for example, a substrate such as a silicon wafer is divided into smaller pieces to produce a large number of chips. During this type of processing, when the substrate is divided into smaller pieces, a small portion of the substrate may become a minute fragment, resulting in the generation of minute foreign matter. If circuit components such as circuit wiring or electrodes are located on one side of the substrate, minute foreign matter may adhere to the circuit wiring or electrodes. Furthermore, foreign matter may also adhere to the other side, where no circuit components such as circuit wiring or electrodes are located. If a large amount of foreign matter adheres to the surface of the substrate, the reliability of the manufactured electronic component device may be reduced, regardless of whether or not circuit components are located on the side where the foreign matter is attached.

[0004] In contrast, a method for manufacturing electronic component devices is known in which protective adhesive tape is attached to at least one side of the substrate before performing the above-described processing (for example, Patent Document 1).

[0005] In the method for manufacturing an electronic component device described in Patent Document 1, a semiconductor protective adhesive tape is used as the protective adhesive tape, which has a base material and a photocurable adhesive layer (protective layer) superimposed on one side of the base material. The base material is designed to have a specific thickness and a specific heat shrinkage rate after being heated at 150°C for 30 minutes. The photocurable adhesive layer (protective layer) is formed from a composition with a predetermined compound composition, has a predetermined thickness, and is designed to have a relatively small predetermined adhesive strength after light irradiation. More specifically, in the method for manufacturing an electronic component device described in Patent Document 1, first, a photocurable adhesive layer (protective layer) of protective adhesive tape is placed on the circuit surface of a substrate on which a circuit is formed (hereinafter referred to as a semiconductor package), and the protective adhesive tape and the semiconductor package are divided into smaller pieces while they are stacked together. Next, the small pieces of semiconductor package and protective adhesive tape are attached to a temporary fixing tape so that the circuit surface of the small pieces of semiconductor package faces the temporary fixing tape, and the temporary fixing tape and the base material of the protective adhesive tape are in contact. Subsequently, a metal film is formed on a part of the surface of the semiconductor package while it is temporarily fixed. Finally, the semiconductor package is picked up by peeling it apart from the circuit surface of the semiconductor package and the photocurable adhesive layer.

[0006] According to the manufacturing method for electronic component devices described in Patent Document 1, when processing the semiconductor package and protective adhesive tape into smaller pieces, the circuit surface of the semiconductor package can be protected by covering it with the protective adhesive tape. Subsequently, the protective adhesive tape can be removed by peeling it off from the circuit surface of the semiconductor package and the photocurable adhesive layer of the protective adhesive tape fixed to the temporary fixing tape. The peeling force when removing the photocurable adhesive layer (protective layer) of the protective adhesive tape is weakened by the hardening of the photocurable adhesive layer by light irradiation. In addition, the heat generated when forming a metal film on a part of the surface of the semiconductor package creates shrinkage stress (residual strain) inside the substrate, and because the substrate becomes more easily deformed by the shrinkage stress (residual strain), the above-mentioned peeling is more likely to occur. [Prior art documents] [Patent Documents]

[0007] [Patent Document 1] Japanese Patent Publication No. 2021-147579 [Overview of the project] [Problems that the invention aims to solve]

[0008] However, in the method for manufacturing electronic component devices described in Patent Document 1, it is necessary to adjust the peeling speed, for example, to prevent damage to the circuit surface from the peeling force when separating the circuit surface of the semiconductor package from the photocurable adhesive layer (protective layer), and the process of removing the protective layer is not necessarily simple. Furthermore, the process of removing the protective layer can become complicated due to the use of temporary fixing tape for the peeling process described above. In addition, some of the photocurable adhesive layer (protective layer) may remain on the circuit surface after peeling, and it is not always possible to remove the photocurable adhesive layer (protective layer) simply. Even when removing a photocurable adhesive layer (protective layer) that overlaps a non-circuit surface where no circuit surface is formed, the above-mentioned problems may occur.

[0009] Therefore, there is a need for a surface protection composition that can not only protect at least one of the surfaces of a substrate to be protected when the substrate is being processed, but also form a protective layer that can be removed relatively easily from the protected surface after the processing is complete. In particular, there is a need for a surface protection composition that can form a protective layer that can be removed relatively easily by dissolving at least a portion of it when it comes into contact with a solvent such as water.

[0010] However, surface protection compositions that can cover and protect at least one of the surfaces of a substrate to be protected, and that can form a protective layer that can be removed relatively easily by contact with a water-containing liquid after protection, have not yet been sufficiently investigated.

[0011] Therefore, an object of the present invention is to provide a surface protection composition for forming a protective layer that can be relatively easily removed when contacted with a liquid containing water after covering and protecting at least one side of a substrate in a manufactured electronic component device. Another object is to provide a surface protection sheet provided with a protective layer formed from the surface protection composition. Still another object is to provide a method for manufacturing an electronic component device using the protective layer to manufacture the electronic component device.

Means for Solving the Problems

[0012] In order to solve the above problems, the surface protection composition according to the present invention is a surface protection composition for protecting at least one surface of a substrate, and includes a polymer having a hydrophilic group in the molecule and a compound that generates an acid or a base by at least one of heating or irradiation with active energy rays.

[0013] The surface protection sheet according to the present invention includes a protective layer formed from the above surface protection composition.

[0014] The method for manufacturing an electronic component device according to the present invention is a step of protecting a protected surface by overlapping a protective layer formed from a surface protection composition on at least one protected surface to be protected of both surfaces of a substrate, and a step of removing the protective layer overlapping the protected surface, and the surface protection composition includes a polymer having a hydrophilic group in the molecule and a compound that generates an acid or a base by at least one of heating or irradiation with active energy rays, and in the removing step, the acid or the base is generated from the compound by heating or irradiation with active energy rays to increase the hydrophilicity of the protective layer, and the protective layer is removed by dissolving at least a part of the protective layer in a liquid containing water.

Brief Description of the Drawings

[0015] [Figure 1]Schematic cross-sectional view of an example of the surface protection sheet of this embodiment cut in the thickness direction. [Figure 2A] Schematic cross-sectional view showing an example of the state of the wetting process in the method for manufacturing an electronic component device of this embodiment. [Figure 2B] Schematic cross-sectional view showing an example of the state of the protection process in the method for manufacturing an electronic component device of this embodiment. [Figure 2C] Schematic cross-sectional view showing an example of the state of the protection process in the method for manufacturing an electronic component device of this embodiment. [Figure 2D] Schematic cross-sectional view showing an example of the state before dicing the substrate in the method for manufacturing an electronic component device of this embodiment. [Figure 2E] Schematic cross-sectional view showing an example of the state after dicing the substrate in the method for manufacturing an electronic component device of this embodiment. [Figure 2F] Schematic cross-sectional view showing an example of the state of the removal process in the method for manufacturing an electronic component device of this embodiment. [Figure 2G] Schematic cross-sectional view showing an example of the state of the removal process in the method for manufacturing an electronic component device of this embodiment. [Figure 3A] Cross-sectional view of an example of a dicing tape cut in the thickness direction. [Figure 3B] Cross-sectional view of an example of a dicing die bond film cut in the thickness direction. [Figure 4A] Cross-sectional view schematically showing the state after performing the mounting process and the protection process in the first embodiment. [Figure 4B] Cross-sectional view schematically showing the state during the blade dicing process in the first embodiment. [Figure 4C] Cross-sectional view schematically showing the state after performing the blade dicing process in the first embodiment. [Figure 4D] Cross-sectional view schematically showing the state of the removal process in the first embodiment. [Figure 4E] Cross-sectional view schematically showing the state of the removal process in the first embodiment. [Figure 4F] Cross-sectional view schematically showing the state of the pickup process in the first embodiment. [Figure 4G] A schematic cross-sectional view illustrating the joining process in the first embodiment. [Figure 4H] A schematic cross-sectional view showing the half-cutting process of a semiconductor wafer in another example of the first embodiment. [Figure 4I] A schematic cross-sectional view showing the half-cutting process of a semiconductor wafer in another example of the first embodiment. [Figure 4J] A schematic cross-sectional view showing the half-cutting process of a semiconductor wafer in another example of the first embodiment. [Figure 4K] A schematic cross-sectional view illustrating the mounting process in another example of the first embodiment. [Figure 5A] A cross-sectional view of an example of a semiconductor wafer, cut in the thickness direction. [Figure 5B] A cross-sectional view of an example of a semiconductor chip fabricated by dividing a semiconductor wafer, cut in the thickness direction. [Figure 6A] A schematic cross-sectional view showing the state before the mounting process in the second embodiment. [Figure 6B] A schematic cross-sectional view illustrating the mounting process in the second embodiment. [Figure 6C] A schematic cross-sectional view showing the state after the mounting process in the second embodiment. [Figure 6D] A schematic cross-sectional view illustrating the protection process in the second embodiment. [Figure 6E] A schematic cross-sectional view showing the stealth processing step in the second embodiment. [Figure 6F] A schematic cross-sectional view showing the expansion process in the second embodiment. [Figure 6G] A schematic cross-sectional view illustrating the removal process in the second embodiment. [Figure 6H] A schematic cross-sectional view illustrating the removal process in the second embodiment. [Figure 6I] A schematic cross-sectional view illustrating the pickup process in the second embodiment. [Figure 6J] A schematic cross-sectional view illustrating the joining process in the second embodiment. [Figure 7A]A schematic cross-sectional view showing the semiconductor wafer and backgrind tape in the third embodiment. [Figure 7B] A schematic cross-sectional view illustrating the protection process in the third embodiment. [Figure 7C] A schematic cross-sectional view showing the state before the mounting process in the third embodiment. [Figure 7D] A schematic cross-sectional view illustrating the mounting process in the third embodiment. [Figure 8A] A schematic cross-sectional view showing the semiconductor wafer and backgrind tape in the fourth embodiment. [Figure 8B] A schematic cross-sectional view showing the stealth processing step in the fourth embodiment. [Figure 8C] A schematic cross-sectional view illustrating the protection process in the fourth embodiment. [Figure 8D] A schematic cross-sectional view showing the state before the mounting process in the fourth embodiment. [Figure 8E] A schematic cross-sectional view illustrating the mounting process in the fourth embodiment. [Figure 9A] A schematic cross-sectional view showing the grinding process after the protection step in the fifth embodiment. [Figure 9B] A schematic cross-sectional view showing the state after grinding in the fifth embodiment. [Figure 9C] A schematic cross-sectional view showing the stealth processing step in the fifth embodiment. [Figure 9D] A schematic cross-sectional view showing the state after the stealth processing step in the fifth embodiment. [Modes for carrying out the invention]

[0016] Hereinafter, embodiments of the surface protection composition, surface protection sheet, and method for manufacturing electronic component devices according to the present invention will be described in order with reference to the drawings.

[0017] The surface protection composition of this embodiment is a surface protection composition for protecting at least one surface of a substrate, and comprises a polymer having hydrophilic groups in its molecule and a compound that generates an acid or a base upon heating or irradiation with active energy rays (hereinafter also referred to as an ion-generating compound). The surface protection composition of this embodiment is used, for example, to form a protective layer that protects at least one surface of a substrate to be protected (hereinafter also referred to as the protected surface).

[0018] By overlapping a protective layer formed from the above-mentioned surface protection composition onto at least one surface of a substrate, it is possible to prevent foreign matter from adhering to the substrate surface to be protected (the protected surface) until the protective layer overlapping that surface is removed. For example, when processing to break down the substrate and the protective layer into smaller pieces while the protective layer formed from the surface protection composition and the substrate are overlapping, it is possible to prevent foreign matter such as fragments that may be generated as a result of the breaking down from adhering to the protected surface, thereby protecting the protected surface. Furthermore, by subjecting the protective layer to heat treatment or irradiation with active energy rays, an acid or base is generated from the above-mentioned compound. This increases the hydrophilicity of the protective layer formed from the surface protective composition. At least a portion of the protective layer with increased hydrophilicity can dissolve relatively easily in a liquid containing water upon contact with such liquid. Therefore, all or part of the protective layer with increased hydrophilicity dissolves in a liquid containing water, and the protective layer easily detaches from the protected surface. Consequently, the protective layer can be removed more easily from the protected surface than, for example, by applying a release tape to the protective layer and removing the protective layer together with the release tape. In particular, when removing a protective layer that has been divided into smaller pieces, multiple pieces of the protective layer can be removed more easily from the protected surface than by using a release tape. Thus, the protective layer formed with the above-described surface protective composition can not only protect the protected surface of the substrate, which is a component of the manufactured electronic device, but can also be removed relatively easily from the protected surface with a water-containing liquid after protection.

[0019] In this embodiment, the hydrophilic group of the polymer is, for example, a hydroxyl group or a carboxyl group. The hydrophilic group may also be a polyoxyethylene chain. In this embodiment, the ion-generating compound is, for example, an acid generator that produces an acid by heating or irradiation with active energy rays, or a base generator that produces a base by heating or irradiation with active energy rays. Examples of the ion-generating compound include a photoacid generator, a photobase generator, a thermoacid generator, or a thermobase generator.

[0020] The above surface protection composition contains the above ion-generating compound and therefore has the property of becoming more hydrophilic upon at least one of heat treatment or irradiation with active energy rays such as ultraviolet light. The above surface protection composition only needs to have a predetermined level of hydrophilicity after such treatment. Therefore, before the above treatment, the above surface protection composition may have less than the predetermined level of hydrophilicity or more than the predetermined level. When the above surface protection composition has a predetermined level of hydrophilicity, at least a portion of the above surface protection composition usually dissolves in a liquid containing water. As the above ion-generating compound, an ion-generating compound that produces an acid or base upon irradiation with active energy rays (particularly ultraviolet light) is preferred.

[0021] The surface protection composition, after its hydrophilicity has been increased by the above treatment, preferably has a hydrophilicity of a predetermined level or higher, that is, it is preferable that the water absorption rate of the surface protection composition is 1.5% by mass or more. This makes the surface protection composition, after heat treatment or irradiation with active energy rays, more easily soluble in liquids containing water. The water absorption rate can be increased, for example, by increasing the content of the ion-generating compound in the surface protection composition. The water absorption rate may be, for example, 10.0% by mass or less. Furthermore, when the hydrophilicity of the surface protection composition is increased by irradiation with active energy rays, the above water absorption rate is 500 mJ / cm² using a high-pressure mercury lamp. 2 These are the values ​​after the irradiation treatment has been performed.

[0022] Furthermore, the water absorption rate of the surface protection composition before undergoing the heat treatment or irradiation treatment with active energy rays described above may be less than 1.5% by mass. This prevents the protective layer from being unintentionally removed even if it comes into contact with water before the removal step (described in detail later) in which the protective layer formed with the surface protection composition is removed. On the other hand, the water absorption rate of the surface protection composition before undergoing the heat treatment or irradiation treatment with active energy rays as described above may be 0.1% by mass or more. This allows the surface protection composition that has undergone the heat treatment or irradiation treatment with active energy rays to have higher hydrophilicity. The water absorption rate of the surface protection composition before the above-described treatment can be increased, for example, by increasing the number of hydrophilic groups of the polymer contained in the surface protection composition.

[0023] The water absorption rate of the above-mentioned surface protection composition is determined from measurements using the Karl Fischer coulometric titration method. Measurements are performed using the surface protection composition before and after the heat treatment or irradiation treatment with active energy rays as described above. Specifically, a test sample that has reached a steady state in an environment of 23°C and 50 RH% humidity is heated at 150°C for 3 minutes using a water vaporizer, and the vaporized water is measured. The water absorption rate is determined from the ratio of the measured amount of water to the mass of the test sample after heating. If the above-mentioned surface protection composition contains a solvent, the water absorption rate of the surface protection composition is measured after removing the solvent by volatilization treatment or the like.

[0024] For example, the surface protection composition of this embodiment includes a polymer having a main chain and a plurality of side chains in its molecule, where each of the plurality of side chains has at least one of either an ester group or a hydrophilic group, and the hydrophilic group may be a hydroxyl group or a carboxyl group.

[0025] Because the above polymer contains at least one of a hydroxyl group or a carboxyl group as a hydrophilic group in its molecule, the protective layer formed from the surface protective composition can adhere more firmly to the surface to be protected by the hydroxyl group or carboxyl group. Therefore, it can adhere well to the surface to be protected until the protective layer is subjected to treatment such as heating or irradiation with active energy rays, and after treatment, the protective layer can be removed from the surface to be protected relatively easily as described above.

[0026] The polymers described above have a main chain and side chains in their molecules. The main chain is a covalent chain formed, for example, by a radical polymerization reaction. For example, the main chain is a covalent chain formed by the polymerization reaction of vinyl acetate, alkyl (meth)acrylate (alkyl methacrylate), hydroxyalkyl (meth)acrylate (hydroxyalkyl methacrylate), (meth)acrylic acid, etc.

[0027] Each of the multiple side chains contains at least one of a hydrophilic group and an ester group. For example, among the many side chains contained in the polymer described above, some side chains have hydrophilic groups and others have ester groups. The hydrophilic group is, for example, at least one of a hydroxyl group or a carboxyl group. The ester group is represented as -C(=O)-O-. In the ester group, the carbon atoms may be positioned closer to the main chain than the oxygen atoms of the ether group, or further from the main chain than the oxygen atoms of the ether group. In other words, the side chain may have an ester group atomic arrangement of -C(=O)-O- from the main chain toward the end of the side chain, or it may have an ester group atomic arrangement of -O-(C=O)-.

[0028] In each side chain containing a hydrophilic group, the hydrophilic group may be located at the terminal portion of the side chain or at the central portion. Preferably, the hydrophilic group in the side chain is located at the terminal portion of the side chain. The hydrophilic group located at the terminal portion of the side chain may be bonded to the main chain via an ester group. For example, the groups may be arranged in the order of ester group, alkyl group, and hydrophilic group from the main chain toward the end of the side chain.

[0029] In a side chain containing an ester group, the ester group is preferably located in the central part of the side chain. Preferably, in the side chain, an alkyl group having 1 to 4 carbon atoms is bonded to the main chain via the ester group.

[0030] Examples of the polymers mentioned above include polyvinyl alcohol obtained by hydrolyzing some of the ester bonds in a vinyl acetate polymer, copolymers of alkyl (meth)acrylate and at least one of (meth)acrylic acid or hydroxyalkyl (meth)acrylate, or polyethylene oxide (for example, molecular weight of 50,000 or more). In this specification, the term "(meth)acrylate" includes both acrylate and methacrylate. Similarly, the term "(meth)acrylic acid" includes both acrylic acid and methacrylic acid.

[0031] When the polymer is polyvinyl alcohol (PVA), the degree of saponification (mol%) of the polyvinyl alcohol may be 20 to 100 before the protective layer formed with the surface protective composition is subjected to heat treatment or irradiation with active energy rays (described in detail later). The degree of saponification of the polyvinyl alcohol is preferably 25 or higher, and more preferably 35 or higher. A higher degree of saponification of the polyvinyl alcohol results in the protective layer formed with the above surface protective composition having higher hydrophilicity after heat treatment or irradiation with active energy rays. Therefore, the protective layer can be removed more easily with a liquid containing water. On the other hand, the degree of saponification of polyvinyl alcohol is preferably 80 or less, and more preferably 60 or less. A lower degree of saponification of polyvinyl alcohol can further improve adhesion to the substrate.

[0032] <Method and conditions for measuring the degree of saponification> The degree of saponification described above is determined by proton magnetic resonance spectroscopy performed under the following analytical conditions: 1 It is measured by H MNR. Furthermore, if the surface protection composition contains components other than PVA, the PVA should be separated and extracted by methanol extraction or the like before measurement to avoid peak overlap in the measurement chart. Analyzer: FT-NMR (For example, the "AVANCEIII-400" manufactured by Bruker Biospin) Observation frequency: 400MHz (1H) Measurement solvent: Heavy water or heavy dimethyl sulfoxide (heavy DMSO) Measurement temperature: 80℃ Chemical shift standard: External standard TSP-d4 (0.00ppm) (when measuring heavy water) : Measurement solvent (2.50 ppm) (when measuring heavy DMSO)

[0033] <Calculation of Saponification Degree> The degree of saponification is calculated using the following formula based on the methylene group-derived peaks of the vinyl alcohol unit (VOH) (heavy water; 2.0-1.1 ppm, heavy DMSO; 1.9-1.0 ppm) and the acetyl group-derived peaks of the vinyl acetate unit (VAc) (heavy water; around 2.1 ppm, heavy DMSO; around 2.0 ppm). In the following formula, VOH(-CH2-) represents the intensity of the methylene group-derived peak of the vinyl alcohol unit (VOH), and VAc(CH3CO-) represents the intensity of the acetyl group-derived peak of the vinyl acetate unit (VAc).

number

[0034] The average degree of polymerization of the above polyvinyl alcohol is preferably 100 or more, and more preferably 200 or more. Furthermore, the average degree of polymerization is preferably 1000 or less, and more preferably 800 or less. A higher average degree of polymerization of polyvinyl alcohol (200 or higher) makes it easier to form a protective layer with the surface protection composition described above. On the other hand, a lower average degree of polymerization of polyvinyl alcohol (1000 or lower) increases the hydrophilicity of the polyvinyl alcohol, making the protective layer formed by the surface protection composition more easily soluble in liquids containing water.

[0035] The average degree of polymerization mentioned above is determined by the following measurement method and conditions. <Method and conditions for measuring the average degree of polymerization> • Analytical equipment: Gel permeation chromatography analyzer (For example, Agilent's "1260 Infinity" device) • Columns: TSKgel G6000PWXL and TSKgel G3000PWXL (manufactured by Tosoh Corporation, connected in series) Column temperature: 40°C • Eluent: 0.2M sodium nitrate aqueous solution ·Flow rate: 0.8mL / min ·Injection volume: 100μL • Detector: Differential refractometer (RI) • Standard samples: PEG standard samples and PVA standard samples The mass-average molecular weight (Mw) of the sample under test (PVA) and the PVA standard sample with a known average degree of polymerization are calculated using GPC measurement with PEG standard samples. A calibration curve is created from the average degree of polymerization of the PVA standard sample and the calculated mass-average molecular weight (Mw) of the PVA standard sample. Using this calibration curve, the average degree of polymerization of the sample under test (PVA) is determined from its mass-average molecular weight (Mw).

[0036] The above-mentioned compound (ion-generating compound) contained in the surface protection composition of this embodiment is a compound that newly generates an acid or a base by at least one of heat treatment and irradiation treatment with active energy rays. A compound that newly generates an acid is preferred as the above-mentioned ion-generating compound because the generated acid can ionize the hydrophilic groups of the polymer and easily increase the hydrophilicity of the surface protection composition. Heat treatment and irradiation with active energy rays will be described in detail later.

[0037] Examples of the ion-generating compounds mentioned above include photo-ion generators such as photo-acid generators or photo-base generators, or thermal ion generators such as thermal acid generators or thermal base generators, with the photo-ion generators being preferred. It should be noted that a single compound may possess the functions of both a photo-acid generator and a thermal acid generator. In other words, for example, a particular acid generator may generate acid through both heat treatment and irradiation with active energy rays. The same applies to base generators. Because the above-mentioned ion-generating compound is a photoacid generator, photobase generator, thermal acid generator, or thermal base generator, the protective layer formed with the above-mentioned surface protective composition generates more acid or base when subjected to heat treatment or irradiation with active energy rays such as ultraviolet irradiation. As a result, the hydrophilicity of the protective layer is further enhanced. Consequently, the protective layer can be more easily removed from the protected surface with a liquid containing water.

[0038] Photoacid generators, as acid generators, are photocationic polymerization initiators commonly used for cationic polymerization, for example, while thermal acid generators, as acid generators, are thermal cationic polymerization initiators commonly used for cationic polymerization, for example, Photobase generators, as base generators, are photoanionic polymerization initiators commonly used for anionic polymerization, for example, while thermal base generators, as base generators, are thermal anionic polymerization initiators commonly used for anionic polymerization, for example, Commercially available products can be used as the photoacid generator, thermal acid generator, photobase generator, or thermal base generator mentioned above.

[0039] Examples of photoacid generators include ionic and nonionic types. Ionic photoacid generators have both a cationic and anionic structure. Examples of ionic photoacid generators include onium salt compounds, sulfonimide compounds, or disulfonyl diazomethane compounds, depending on the type of cationic structure.

[0040] Examples of onium salt compounds include iodonium salt compounds, sulfonium salt compounds, oximesulfonate compounds, and diazonium salt compounds. Among these, iodonium salt compounds or sulfonium salt compounds are preferred, and sulfonium salt compounds are more preferred.

[0041] Examples of iodonium salt compounds include diphenyliodonium hexafluorophosphate, diphenyliodonium hexafluoroarsenate, bis(4-t-butylphenyl)iodonium hexafluorophosphate, diphenyliodonium trifluoromethanesulfate, diphenyliodonium nonafluoron-butanesulfonate, diphenyliodonium perfluoron-octanesulfonate, benzyl-4-hydroxyphenylmethylsulfonium hexafluorophosphate, diphenyliodonium camphor sulfonate, bis(4-tert-butylphenyl)iodonium camphor sulfonate, bis(4-tert-butylphenyl)iodonium trifluoromethanesulfonate, bis(4-fluorophenyl)iodonium triflate, and diphenyliodonium hexafluorophosphate. Other examples include the iodonium salt compounds used in the following examples.

[0042] Examples of sulfonium salt compounds include diphenyl[4-(phenylsulfanyl)phenyl]sulfonium=trifluorotris(pentafluoroethyl)-λ 5Examples include phosphanoids, triphenylsulfonium hexafluoroantimonate, triphenylsulfonium nonafluoron-butanesulfonate, triphenylsulfonium camphorsulfonate, 4,7-di-n-butoxy-1-naphthyltetrahydrothiophenium trifluoromethanesulfonate, triphenylsulfonium trifluoromethanesulfonate, triphenylsulfonium adamantane carboxylate trifluoroethanesulfonate, triphenylsulfonium p-toluenesulfonate, triphenylsulfonium methanesulfonate, triphenylsulfonium phenolsulfonate, triphenylsulfonium nitrate, triphenylsulfonium maleate, bis(triphenylsulfonium) maleate, triphenylsulfonium hydrochloride, triphenylsulfonium acetate, triphenylsulfonium trifluoroacetate, triphenylsulfonium salicylate, triphenylsulfonium benzoate, and triphenylsulfonium hydroxide. Other examples include the sulfonium salt compounds used in the following examples.

[0043] Examples of oxime sulfonate compounds include (5-propylsulfonyloxyimino-5H-thiophene-2-ylidene)-(2-methylphenyl)acetonitrile, (5-octylsulfonyloxyimino-5H-thiophene-2-ylidene)-(2-methylphenyl)acetonitrile, (camphorsulfonyloxyimino-5H-thiophene-2-ylidene)-(2-methylphenyl)acetonitrile, (5-p-toluenesulfonyloxyimino-5H-thiophene-2-ylidene)-(2-methylphenyl)acetonitrile, and (5-octylsulfonyloxyimino)-(4-methoxyphenyl)acetonitrile.

[0044] Examples of diazonium salt compounds include 4-nitrobenzenediazonium tetrafluoroborate.

[0045] Examples of commercially available onium salt compounds include, for example, Optomer SP-150, Optomer SP-170, Optomer SP-171 (all manufactured by ADEKA), UVE-1014 (manufactured by General Electronics), OMNICAT250, OMNICAT270 (both manufactured by IGM Resin), IRGACURE290 (manufactured by BASF), SunAid SI-60L, SunAid SI-80L, SunAid SI-100L (all manufactured by Sanshin Chemical Industry Co., Ltd.), CPI-100P, CPI-101A, CPI-200K (all manufactured by SunApro Co., Ltd.).

[0046] Examples of sulfonimide compounds used as photoacid generators include N-(trifluoromethanesulfonyloxy)succinimide, N-(nonafluoron-butanesulfonyloxy)succinimide, N-(camphorsulfonyloxy)succinimide, N-(trifluoromethanesulfonyloxy)naphthalimide, N-(camphorsulfonyloxy)succinimide, N-(4-methylphenylsulfonyloxy)succinimide, N-(2-trifluoromethylphenylsulfonyloxy)succinimide, N-(4-fluorophenylsulfonyloxy)succinimide, N-(trifluoromethylsulfonyloxy)phthalimide, N-(camphorsulfonyloxy)phthalimide, N-(2-trifluoromethylphenylsulfonyloxy)phthalimide, N-(2-fluorophenylsulfonyloxy)phthalimide, N-(trifluoromethylsulfonyloxy)diphenylmaleimide, N-(camphorsulfonyloxy)diphenylmaleimide, and 4-methylphenylsulfonyloxy)diphenylmaleimide.

[0047] Examples of disulfonyl diazomethane compounds used as photoacid generators include bis(trifluoromethylsulfonyl)diazomethane, bis(cyclohexylsulfonyl)diazomethane, bis(phenylsulfonyl)diazomethane, bis(p-toluenesulfonyl)diazomethane, bis(2,4-dimethylbenzenesulfonyl)diazomethane, and methylsulfonyl-p-toluenesulfonyldiazomethane.

[0048] Other examples of photoacid generators include 2,4-bis(trichloromethyl)-6-[2-(furan-2-yl)vinyl]-1,3,5-triazine.

[0049] Examples of thermal acid generators include aryldiazonium salts, diaryliodonium salts, triarylsulfonium salts, triarylsulfoxonium salts, pyridinium salts, quinolinium salts, isoquinolinium salts, sulfonic acid esters, and iron arene complexes.

[0050] Acid generators, such as photoacid generators or thermal acid generators, preferably have good compatibility with the polymers contained in the surface protection composition. Ionic acid generators are preferred as acid generators, and ionic photoacid generators are more preferred. Stronger acids are preferred for the acid generator.

[0051] Gas phase acidity [ΔGacid] can be used as an indicator of the acidic strength of an acid generator. Gas phase acidity is an indicator of acidity that minimizes the solvent effect. In other words, gas phase acidity is an indicator of acidity in the gas phase.

[0052] The reactivity of an acid generator is influenced by the type of counter-anion (conjugate acid) it contains. The gas-phase acidity of the anion in the acid generator is preferably 280 [kJ / mol] or less, and more preferably 260 [kJ / mol] or less. A smaller value indicates a stronger acid.

[0053] Examples of typical anions and their gas-phase acidity include (CF3CF2)3PF3. - (Gas phase acidity: 256 [kJ / mol]), SbF6 - (Gas phase acidity: 256 [kJ / mol]), PF6 - (Gas phase acidity: 277 [kJ / mol]), BF4 -(Gas-phase acidity: 288 [kJ / mol]) and the like. As the acid generator, an acid generator having (CF3CF2)3PF3 - or SbF6 - as an anion is preferred.

[0054] The gas-phase acidity is defined by IUPAC as the Gibbs energy change accompanying acid dissociation. The gas-phase acidity can be calculated by a known method as described in, for example, "J. Am. Chem. Soc. 2000, | 122, 5114 - 5124 ".

[0055] Examples of the photo-base generator include heterocyclic group-containing radiation-sensitive base generators such as 4-(methylthiobenzoyl)-1-methyl-1-morpholinoethane, (4-morpholinobenzoyl)-1-benzyl-1-dimethylaminopropane, 2-benzyl-2-dimethylamino-1-(4-morpholinophenyl)-butanone, N-(2-nitrobenzyloxycarbonyl)pyrrolidine, 1-(anthraquinone-2-yl)ethylimidazole carboxylate, etc. Other examples include 2-nitrobenzyl cyclohexylcarbamate, [[(2,6-dinitrobenzyl)oxy]carbonyl]cyclohexylamine, bis[[(2-nitrobenzyl)oxy]carbonyl]hexane-1,6-diamine, triphenylmethanol, o-carbamoylhydroxylamide, o-carbamoyloxime, hexaamminecobalt(III) tris(triphenylmethyl borate), 1,2-dicyclohexyl-4,4,5,5-tetramethylbiguanidium n-butyltriphenylborate, acetophenone O-benzoyloxime, 2-(9-oxoxanthene-2-yl)propionic acid 1,5,7-triazabicyclo[4.4.0]dec-5-ene, etc. Further, the photo-base generators used in the following examples are also included.

[0056] Examples of thermal base generators include carbamate derivatives such as 1-methyl-1-(4-biphenylyl)ethyl carbamate, 1,1-dimethyl-2-cyanoethyl carbamate, and benzoylcyclohexyl carbamate; urea or urea derivatives such as N,N-dimethyl-N'-methylurea; dihydropyridine derivatives such as 1,4-dihydronicotinamide; and quaternized ammonium salts of organosilanes or organoboranes.

[0057] In the above surface protection composition, the amount of the ion-generating compound per 100 parts by mass of the polymer is preferably 1 part by mass or more, and more preferably 3 parts by mass or more. As a result, the protective layer formed with the surface protection composition can have higher hydrophilicity after heat treatment or irradiation with active energy rays. The amount of the ion-generating compound per 100 parts by mass of the polymer is preferably 10 parts by mass or less. This makes it possible to more effectively suppress the residue of the ion-generating compound in the surface protective composition.

[0058] The surface protection composition of this embodiment may further contain, in addition to the above-mentioned components, a solvent, a surfactant, and the like. Examples of solvents include water or an organic solvent. As the organic solvent, a relatively volatile organic solvent is preferred. Examples of such organic solvents include ethanol and methanol.

[0059] The surface protection composition of this embodiment may be a solid that does not flow, or it may be flowable. If the surface protection composition contains a solvent, it may be flowable.

[0060] The surface protection composition of this embodiment can be manufactured by mixing the polymer described above, an ion-generating compound such as the photoacid generator described above, and a solvent as needed, using a general method. Alternatively, the surface protection composition of this embodiment may be manufactured by volatilizing the solvent after the above mixing.

[0061] The surface protection composition of this embodiment can be used, for example, to produce a surface protection sheet, which will be described later.

[0062] Next, the surface protection sheet 10 of this embodiment will be described.

[0063] The surface protection sheet 10 of this embodiment comprises at least a protective layer 11, as shown in Figure 1. The surface protection sheet 10 of this embodiment may further comprise a release liner 15 that overlaps at least one side of the protective layer 11. The release liner 15 may overlap one or both sides of the protective layer 11. Please note that each figure in the drawings is a schematic representation and does not necessarily reflect the actual aspect ratio of the object. The same applies to the other drawings.

[0064] In this embodiment, the protective layer 11 of the surface protection sheet 10 is formed in sheet form from the surface protection composition described above. When the surface protection sheet 10 is used, for example, the release liner 15 is peeled off from the protective layer 11 and the protective layer 11 is attached to at least one surface (surface to be protected) of the substrate.

[0065] The protective layer 11 described above has flexibility that allows it to be deformed with relatively weak force. Furthermore, the protective layer 11 has adhesive properties that allow it to adhere to, for example, the surface of a substrate to be protected.

[0066] The protective layer 11 may be formed, for example, by applying the surface protective composition containing the solvent to one side of the substrate and then volatilizing the solvent. Alternatively, the protective layer 11 may be formed by applying the surface protective composition containing the solvent to one side of the release liner 15 and then volatilizing the solvent. Preferably, the formed protective layer 11 does not contain the solvent that is added to the surface protective composition to impart fluidity. The protective layer 11 may be formed, for example, from the above-mentioned surface protective composition that does not contain a solvent by a general molding method.

[0067] In the above-described surface protection sheet, the thickness of the protective layer 11 is not particularly limited, but is, for example, 1 μm or more and 100 μm or less. Such a thickness may be 3 μm or more, or 5 μm or more. Such a thickness may also be 40 μm or less. If the protective layer 11 is a laminate, the above thickness is the total thickness of the laminate.

[0068] The protective layer 11 described above may have the property of being broken into smaller pieces when stretched in the planar direction. A protective layer 11 having such properties is preferably used when manufacturing electronic component devices via a stealth processing process using a stealth dicing apparatus, which will be described later. Similarly, it is preferably used when manufacturing electronic component devices via a DBG process (described in detail later). Furthermore, since the protective layer 11 described above can also be suitably used when manufacturing electronic component devices through a blade dicing process (described in detail later), it does not necessarily have to possess the physical properties described above.

[0069] The adhesion of the protective layer 11 to the substrate is indicated, for example, by the peeling force when peeling the protective layer 11 from a silicon bare wafer used as a substrate. The peeling force of the protective layer 11 at 25°C may be 10.0 [N / 10mm] or less, or 8.0 N / 10mm] or less. The peeling force may also be 0.01 [N / 10mm] or more. The above peeling force values ​​are the values ​​before at least one of the heat treatment and the active energy ray irradiation treatment is applied to the protective layer 11.

[0070] The peeling force described above is measured under the following measurement conditions. To measure the peel force of one side of the protective layer 11 (the side that is attached to the silicon bare wafer), a sample for measurement is prepared as follows. First, at 25°C, backing tape is applied to the side of the protective layer 11 opposite to the aforementioned side using a hand roller. Next, the sample for measurement is processed to a width of 100 mm, and the bare wafer is bonded to the aforementioned side of the protective layer 11. Bonding is performed at 90°C and a speed of 10 mm / second. Then, in an atmosphere of 23°C, the protective layer 11 is peeled from the bare wafer together with the backing tape at a peel angle of 180° and a peel speed of 300 mm / min, and the peel force is measured. Finally, the measured value is converted to be expressed in units of [N / 10 mm]. For example, an "Autograph (manufactured by SHIMADZU)" can be used as the measuring device.

[0071] The surface free energy of the protective layer 11 is 70 [mJ / m²] at 25°C. 2 It may be less than or equal to 65[mJ / m 2 It may be less than or equal to 20 [mJ / m]. Note that the above surface free energy is 20 [mJ / m]. 2 This is also acceptable. Because the surface free energy is within the above range, the wettability of the protective layer 11 to water is moderately good, allowing for easier removal of the protective layer 11 in the removal process described later. The above surface free energy values ​​are those before at least one of the heat treatment and the active energy ray irradiation treatment is applied to the protective layer 11.

[0072] The protective sheet 1 of this embodiment is used, for example, in the process of manufacturing electronic component devices. Specifically, the protective sheet 1 of this embodiment is used for purposes such as temporarily protecting the protected surface (surface to be protected) of an electronic component (a type of substrate). More specifically, the protective sheet 1 of this embodiment is used by being attached to the protected surface of an electronic component (a type of substrate). Examples of the electronic components mentioned above include semiconductor wafers, semiconductor chips, substrates such as wiring circuit boards, interconnected wiring circuit boards formed by connecting multiple wiring circuit boards, or pseudo-wafers.

[0073] The semiconductor chip described above typically comprises a semiconductor chip body and electrode portions arranged on one or both sides of the semiconductor chip body and electrically connected to electrode portions of other components. Examples of other components include a wiring circuit board or other semiconductor chips. The semiconductor chip has, for example, a circuit surface on at least one side where a circuit is formed. Specifically, the semiconductor chip described above may be a TSV (Through Silicon Via) type semiconductor chip comprising a pair of electrode portions arranged on both sides of the semiconductor chip body, and a conductive portion that penetrates the semiconductor chip body in the thickness direction so as to conduct electricity between one of the electrode portions and the other. In a TSV type semiconductor chip, the circuit surface may be formed on only one side, or the circuit surface may be formed on both sides. Furthermore, the semiconductor chip circuit may be equipped with sensor elements (for example, light-receiving elements or vibration elements). An example of this type of semiconductor chip is a sensor chip. Examples of sensor chips include CMOS (Complementary Metal-Oxide Semiconductor) chips and MEMS (Micro Electro Systems) chips.

[0074] The pseudo-wafer described above comprises, for example, a support substrate and a package in which a plurality of semiconductor chips arranged on the support substrate are collectively sealed in resin. The pseudo-wafer may also be the package removed from the support substrate. A redistribution layer may be formed on at least a portion of the surface of the pseudo-wafer. The protective sheet 1 may be used to cover such redistribution layer. Note that the divided pseudo-wafer, each containing at least one semiconductor chip, may be an electronic component.

[0075] As described above, there are various types of electronic components that have a protected surface (surface to be protected), and various electronic components can serve as substrates.

[0076] Next, the manufacturing method of the electronic component device according to this embodiment will be described.

[0077] The method for manufacturing the electronic component device of this embodiment is: A step of protecting the surface to be protected by overlapping a protective layer 11 formed from a surface protection composition onto at least one of the two surfaces of the substrate to be protected (protection step), The process includes removing the protective layer 11 that overlaps the protected surface (removal step), The aforementioned surface protection composition is The material comprises a polymer having a hydrophilic group in its molecule and a compound that generates an acid or a base upon heating or irradiation with active energy rays (the ion-generating compound described above), In the removal step, the acid or base is generated from the compound (ion-generating compound) by heating or irradiation with active energy rays to increase the hydrophilicity of the protective layer 11, and the protective layer 11 is removed by dissolving at least a portion of the protective layer 11 in a liquid containing water.

[0078] The manufacturing method of the electronic component device of this embodiment may further include a step of increasing the humidity of the gas in contact with the surface to be protected Sa (wetting step) before the above-described protection step (see Figure 2A). By performing the wetting step, the adhesion of the protective layer 11 to the surface to be protected Sa can be improved. The wetting process can be carried out, for example, by bringing a gas containing water vapor into contact with the surface to be protected, spraying mist-like water onto the surface to be protected, or applying water to the surface to be protected.

[0079] In the above protection process, as shown in Figure 2B, a surface protection sheet 10 having a release liner 15 on one side of the protective layer 11 may be used to protect the surface Sa of the substrate S. For example, after placing the protective layer 11 of the surface protection sheet 10 on the surface Sa of the substrate S, the release liner 15 may be peeled off from the protective layer 11 (see Figure 2C).

[0080] The manufacturing method of the electronic component device of this embodiment is further as shown in Figures 2D and 2E, The process may include a step of dividing the stacked substrate S and protective layer 11 into smaller pieces with spacing in the planar direction, thereby producing multiple small pieces of the stacked material in which the small pieces of substrate chips S' and small pieces of protective layer 11' overlap. Note that before division, the substrate S may have weakened areas or other structures formed inside to facilitate fragmentation.

[0081] In the removal process described above, as shown in Figure 2F, the multiple small pieces 11' of the protective layer are subjected to, for example, heat treatment or irradiation with active energy rays such as ultraviolet light, thereby generating new acids or bases from the ion-generating compounds contained in each small piece 11' and increasing the hydrophilicity of each small piece 11'. Then, in the removal process described above, as shown in Figure 2G, each small piece 11' of the protective layer overlapping the circuit surface of the chip S' is removed with a liquid containing water. Furthermore, the manufacturing method of the electronic component device in this embodiment may further include the step of arranging the circuit surface of the chip S' facing the adherend and joining the chip S' and the adherend.

[0082] The electronic component device manufactured by the manufacturing method of this embodiment comprises at least one of the various electronic components described above. Examples of electronic component devices include semiconductor devices such as semiconductor integrated circuits equipped with semiconductor chips, devices equipped with system LSIs having complementary MOS (CMOS), or devices equipped with MEMS (Micro Electro Mechanical Systems) in which mechanical components, sensors, actuators, or electronic circuits are integrated on a single silicon substrate, glass substrate, or organic material substrate by microfabrication technology. The manufactured electronic component device may also be a device equipped with a wiring circuit board.

[0083] In the method for manufacturing an electronic component device according to this embodiment, at least one surface of the substrate is protected by a protective layer. The protected surface (hereinafter also simply referred to as the protected surface) may be only one side of the substrate or both sides. Circuit components (described in detail later) may or may not be arranged on the protected surface.

[0084] The substrate is not particularly limited in material as long as it is in the form of a plate. Examples of substrate materials include glass, silicon, stainless steel (SUS), plastic, or ceramic. Examples of substrates include semiconductor wafers, sensor wafers such as CMOS or MEMS, pseudo-wafers, or wiring circuit boards.

[0085] In the above protection step, the protective layer 11 may be placed on the surface of the substrate on which at least one of the circuit wiring, sensor part, and electrode part is arranged as a circuit component. For example, the protective layer 11 may be placed on one side (circuit side) of the substrate on which the circuit wiring is arranged, on one side of the substrate on which the sensor part is arranged, or on one side of the substrate on which the electrode part is arranged. In the above protection step, it is preferable to place the protective layer 11 on at least one side of the substrate so as to cover the circuit wiring, sensor part, or electrode part with the protective layer 11. Examples of circuit components include circuit wiring, electrode parts, or elements such as transistors, diodes, or sensor parts (such as light receiving sensors or vibration sensors).

[0086] The following provides a detailed explanation of the process of manufacturing semiconductor integrated circuits (semiconductor devices) as electronic components.

[0087] Generally, a semiconductor device manufacturing method comprises a front-end process in which a circuit surface is formed on one side of a wafer using highly integrated electronic circuits, and a back-end process in which chips are cut out from the wafer with the circuit surface formed on it and assembled.

[0088] In the subsequent process, for example, a weak area is formed on the wafer (semiconductor wafer) that has a circuit surface formed on it, in order to break it into smaller semiconductor chips (dies), and the adhesive layer of dicing tape is attached to the side opposite to the circuit surface. Then, while the semiconductor wafer is attached to the adhesive layer of the dicing tape, the dicing tape is stretched in the planar direction, thereby breaking the semiconductor wafer into smaller semiconductor chips using the weak area as the boundary. After that, the small semiconductor chips are peeled off from the adhesive layer of the dicing tape.

[0089] The subsequent processes described above include, for example, a stealth processing step in which a fragile area is formed on the wafer using laser light or the like to break down the wafer into smaller chips (dies); a mounting step in which the semiconductor wafer is fixed by attaching the side of the semiconductor wafer opposite to the circuit side to a dicing tape; an expanding step in which the semiconductor wafer is broken down into semiconductor chips (dies) by stretching the dicing tape in the planar direction; a pick-up step in which the semiconductor chip is peeled off and removed from the adhesive layer; and a bonding step in which the removed semiconductor chip is bonded to a substrate. Semiconductor integrated circuits (semiconductor devices) are manufactured, for example, through these processes.

[0090] In the method for manufacturing a semiconductor device (electronic component device) of this embodiment, for example, a semiconductor chip is cut out from a semiconductor wafer on which a circuit surface has been formed, and a semiconductor device having the cut-out semiconductor chip is assembled. In the method for manufacturing a semiconductor device of this embodiment, the semiconductor device is manufactured as follows, using at least the protective layer 11 of the surface protection sheet 10 and the dicing tape 20 (see Figure 3A). These sheets and tapes are used as auxiliary tools for manufacturing the semiconductor device. Alternatively, a dicing die bond film in which a die bond sheet 30 is superimposed on the adhesive layer 22 of the dicing tape 20 can also be used (see Figure 3B). Commercially available products can be used as the dicing tape 20 and the dicing die bond film.

[0091] The following describes in detail specific embodiments of the semiconductor device manufacturing method, from the first embodiment to the fifth embodiment. In addition, the drawing showing the manufacturing method of the first embodiment is labeled "I". Similarly, the second to fifth embodiments are labeled "II" to "V" in the drawings, respectively.

[0092] "First Embodiment" The first embodiment of the semiconductor device manufacturing method includes an assembly step of cutting out a semiconductor chip X from a semiconductor wafer W (substrate) on which a circuit surface is formed, and assembling a semiconductor device having the semiconductor chip X. Such an assembly process includes a step of protecting the circuit surface (protected surface) by superimposing a protective layer 11 for protecting the circuit components onto at least one surface of the semiconductor wafer W, which is the circuit surface on which any of the circuit components are formed, (protection step), A process to produce multiple small pieces of a laminate in which the semiconductor wafer W and protective layer 11 are stacked and divided into small pieces with spacing in the planar direction, thereby creating multiple small pieces of the laminate in which the semiconductor chip X, which is a small piece of semiconductor wafer W, and the small piece 11' of protective layer are stacked, The process involves applying heat treatment or irradiation with active energy rays to each small piece 11' of the protective layer overlapping the circuit surface of the semiconductor chip X to generate an acid or base from the ion-generating compound in each small piece 11' to increase the hydrophilicity of each small piece 11', and then removing each small piece 11' of the protective layer with a liquid containing water (removal process), The process includes a step of joining a semiconductor chip X to an adherend.

[0093] The assembly process of the first embodiment includes, for example, the following steps: Specifically, the assembly process of the first embodiment is as follows: A mounting process involves attaching a semiconductor wafer W, on which circuit components are formed on one side, to a dicing die bond film (a die bond sheet 30 superimposed on a dicing tape 20) to fix the semiconductor wafer W to the dicing die bond film. A protection step to protect the circuit surface by attaching a protective layer 11 to the circuit surface of the semiconductor wafer W, A blade dicing process (a process for producing multiple small pieces of the above-mentioned laminate) involves dividing a semiconductor wafer W, to which a die bond sheet 30 and a protective layer 11 are attached, into small pieces using a dicing blade T or the like to create semiconductor chips (dies) from the semiconductor wafer W. After undergoing the above-mentioned heat treatment or irradiation treatment with active energy rays, a removal step (the above-mentioned removal step) is performed to remove multiple small pieces 11' of the protective layer attached to the semiconductor chip X, A pickup process involves separating the semiconductor chip X from the small piece 30' of the die bond sheet and removing the semiconductor chip X with the small piece 30' of the die bond sheet attached. The process includes a bonding step (the bonding step described above) in which the extracted semiconductor chip X is bonded to the adherend via a small piece 30' of the die bond sheet. When these steps are carried out, the dicing die bond film having the protective layer 11 and the dicing tape 20 described above is used as a manufacturing aid.

[0094] The semiconductor wafer W is configured to produce multiple semiconductor chips X. More specifically, the semiconductor wafer W is divided into smaller pieces with spacing in multiple directions along the surface (for example, directions along the surface that are mutually orthogonal), thereby enabling the fabrication of multiple semiconductor chips X. The semiconductor wafer W also has a circuit surface on at least one of its surfaces on which at least one type of circuit component is arranged. For example, the semiconductor wafer W used in the first embodiment has a circuit surface formed on either one of its surfaces.

[0095] In the semiconductor industry in recent years, with the further advancement of integration technology, there is a demand for thinner semiconductor chips (for example, with a thickness of 20 μm to 50 μm). The shape of a semiconductor chip when viewed from one side in the thickness direction is, for example, rectangular, and the length of one side is a predetermined length, for example, 5 mm to 20 mm.

[0096] In the mounting process, as shown in Figure 4A, the dicing ring R is attached to the adhesive layer 22 of the dicing tape 20, while the semiconductor wafer W is attached and fixed to the die bond sheet 30 which is superimposed on the dicing tape 20.

[0097] In the protection process, for example, as shown in Figure 4A, the protective layer 11 is superimposed on one of the circuit surfaces of the semiconductor wafer W. In the protection process, for example, the protective layer 11 may be superimposed on the circuit surface by directly pressing and attaching it to the circuit surface. Alternatively, a surface protection composition containing a solid component constituting the protective layer 11 and a solvent that dissolves the solid component may be prepared, and after applying the prepared surface protection composition to the circuit surface, the solvent may be evaporated to form a protective layer 11 in contact with the circuit surface, thereby superimposing the protective layer 11 on the circuit surface. By overlaying a protective layer 11 onto the circuit surface of a semiconductor wafer W, the circuit surface can be protected by the protective layer 11 until the protective layer 11 is removed. Therefore, it is possible to prevent dust and other debris from adhering to the circuit surface of the semiconductor wafer W covered with the protective layer 11. Furthermore, the protection process may be performed after the mounting process, or the mounting process may be performed after the protection process.

[0098] In the blade dicing process, the semiconductor wafer W is diced, for example, as shown in Figures 4B and 4C. More specifically, the semiconductor wafer W is cut to a predetermined size together with the die bond sheet 30 to form a semiconductor chip with the die bond sheet 30. The blade dicing process is carried out according to a conventional method, for example, using a dicing blade T. In the blade dicing process, a cutting method called full cut, which cuts all the way to the die bond sheet 30, can be employed. The dicing apparatus used in the blade dicing process is not particularly limited, and conventionally known apparatus can be used. In the blade dicing process, foreign matter such as fragments may be generated when the semiconductor wafer W is cut. However, since the protected surface of the semiconductor wafer W is protected by the protective layer 11, the adhesion of foreign matter to the protected surface can be suppressed. Alternatively, before the blade dicing process, the dicing ring R may be attached to the adhesive layer 22 of the dicing tape 20, and then fixed to the holder H of the expander.

[0099] In the removal process, as shown in Figure 4D, multiple small pieces 11' of the protective layer are subjected to a treatment that generates an acid or base from the ion-generating compound. Such a treatment may be at least one of heat treatment or irradiation with active energy rays. The heat treatment is carried out, for example, by exposing multiple small pieces 11' of the protective layer to an environment of 90°C to 250°C for a period of 10 minutes to 300 minutes. In irradiation treatment with active energy rays, for example, 10 mW / cm² 2 More than 300mW / cm 2 The following intensity of ultraviolet light was adopted as the active energy ray, with an integrated light intensity of 50 mJ / cm². 2 More than 1000mJ / cm 2 The following is achieved by irradiating multiple small pieces 11' of the protective layer with ultraviolet light. In the removal process, by performing the above-described treatment on multiple small pieces 11' of the protective layer, an acid or base is generated from the ion-generating compound contained in the small pieces 11'. The hydrophilicity of the multiple small pieces 11' of the protective layer increases due to the newly generated acid or base. As a result, when the small pieces 11' later come into contact with a liquid containing water, the small pieces 11' can be removed relatively easily from the surface of the semiconductor chip X.

[0100] In the removal process, as shown in Figure 4E, a liquid containing water is brought into contact with a plurality of small pieces 11' of the protective layer, and at least a portion of each small piece 11' is dissolved in the liquid, thereby removing each small piece 11' of the protective layer from the surface (protected surface) of the semiconductor chip X. By removing the small pieces 11' of the protective layer in this way, all of the multiple small pieces 11' of the protective layer can be removed relatively easily, and the number of foreign substances adhering to the semiconductor chip surface can be reduced relatively easily by the above-mentioned liquid. In addition, the surface (protected surface) of each semiconductor chip X where the small pieces 11' of the protective layer were overlapping can also be cleaned with the liquid.

[0101] In the removal process, the fragmented protective layer (multiple small pieces 11' of the protective layer) may be removed by dissolving all of the fragmented protective layer (multiple small pieces 11' of the protective layer) in the liquid. Alternatively, multiple small pieces 11' of the protective layer may be removed by dissolving some of the constituent components of the small pieces 11' of the protective layer in the liquid and peeling each small piece 11', whose adhesion to the semiconductor chip X has weakened, away from the semiconductor chip X.

[0102] The liquid containing water is not particularly limited as long as it is a liquid substance containing water. Such a liquid may contain 30% by mass or more of water, 50% by mass or more, 70% by mass or more, 80% by mass or more, or 90% by mass or more. The above liquid may contain components that dissolve in water in addition to water. Examples of such components include water-soluble organic solvents. Examples of such water-soluble organic solvents include monohydric alcohols with 4 or fewer carbon atoms, such as methanol, ethanol, propanols such as isopropyl alcohol, or butanols such as t-butanol.

[0103] In the removal step of the first embodiment, the protective layer pieces 11' may be immersed in the stirred liquid to bring the liquid into contact with the protective layer pieces 11'. Alternatively, the liquid sprayed from a nozzle or the like may be brought into contact with the protective layer pieces 11'. The temperature of the liquid is not particularly limited and may be set to, for example, 10°C or more and 90°C or less.

[0104] For example, in the removal process, a disc-shaped stage supporting the dicing tape 20 from below is rotated circumferentially, and the liquid is sprayed onto the semiconductor chips X attached to each of the small pieces 30' of the die bond sheet. This makes it possible to remove multiple small pieces 11' of the protective layer that are superimposed on the semiconductor chips X. The rotation speed of the stage may be, for example, 500 rpm to 4000 rpm, the amount of liquid sprayed may be, for example, 0.05 L / min to 5.0 L / min, and the spraying time may be, for example, 5 seconds to 300 seconds.

[0105] According to the semiconductor device manufacturing method of the first embodiment, a protective layer 11 is superimposed on the surface (circuit surface) of the semiconductor wafer W on which circuit components are formed, so that the circuit surface can be protected until the protective layer 11 is removed. Specifically, since the semiconductor wafer W is cut into small pieces to produce a semiconductor chip X while the semiconductor wafer W and the protective layer 11 are superimposed, it is possible to prevent foreign matter such as fragments that may be generated due to the cleavage of the semiconductor wafer W from adhering to the circuit surface of the semiconductor chip X. Even if foreign matter is adhering to the circuit surface of the semiconductor chip X before the protective layer 11 is superimposed, that foreign matter can also be removed when the small piece 11' of the protective layer superimposed on the circuit surface of the semiconductor chip X is removed. Therefore, it is possible to suppress the adhesion of foreign matter to the circuit surface of the manufactured semiconductor chip X.

[0106] In the pickup process, as shown in Figure 4F, the semiconductor chip X is peeled from the adhesive layer 22 of the dicing tape 20. Specifically, the pin member P is raised to push up the semiconductor chip X to be picked up via the dicing tape 20. The pushed-up semiconductor chip X is held by the suction jig J.

[0107] When performing the pickup process as described above, it is necessary that the small pieces 30' of the die bond sheet attached to the semiconductor chip X be easily peeled off from the adhesive layer 22 of the dicing tape 20. Furthermore, when performing the expansion process described above, it is necessary to stretch the dicing tape 20 to effectively break down the die bond sheet 30, the semiconductor wafer W, and the protective layer 11 into small pieces. The dicing tape 20 described above is designed to effectively perform these functions. For example, the dicing tape 20 is configured such that when irradiated with active energy rays (e.g., ultraviolet light), the adhesive layer 22 hardens, reducing the adhesive strength of the adhesive layer 22. Because the adhesive strength of the adhesive layer 22 can be reduced by hardening it after irradiation, the semiconductor chip X and the small pieces 30' of the die bond sheet can be peeled off from the adhesive layer 22 relatively easily after irradiation. Dicing tapes 20 with such a configuration are commercially available.

[0108] In the bonding process, the semiconductor chip X, with small pieces 30' of the die bond sheet attached, is bonded to the substrate Z. In other words, the semiconductor chip X is bonded to the substrate Z via the small pieces 30' of the die bond sheet. In the bonding process, as shown in Figure 4G, multiple stacks of semiconductor chip X with small pieces 30' of the die bond sheet attached may be made. In the first embodiment, the semiconductor chip X is bonded to a substrate or other substrate via the small pieces 30' of the die bond sheet. When stacking multiple semiconductor chips X as described above during the bonding process, the number of foreign objects that can get between one semiconductor chip X and the other is reduced because the stacking of multiple semiconductor chips X is such that the adhesion of foreign objects to the circuit surface is suppressed. Examples of the adherend Z include an interposer, a wiring circuit board, or a small piece of a substrate (when small pieces of substrate are stacked and laminated).

[0109] In the first embodiment, a resin encapsulation step may be performed to encapsulate (cover) the semiconductor chip X with a thermosetting resin or the like in order to protect the semiconductor chip X after the bonding process.

[0110] In the above description of the first embodiment, an example was given in which the semiconductor wafer W is cut into smaller pieces by a blade dicing process. However, the semiconductor wafer W may also be cut into smaller pieces by a so-called DBG process, which involves half-cutting the semiconductor wafer W and then thinning the thickness of the semiconductor wafer W. In half-cut processing, for example, grooves are formed in the semiconductor wafer W to process it into chips (dies) by a cutting process, and then the semiconductor wafer W is ground down to reduce its thickness. In the half-cut process, for example, as shown in Figures 4H to 4K, wafer processing tape E is attached to the side of the semiconductor wafer W opposite to the circuit side. With the wafer processing tape E attached, grooves for division are formed. Backgrind tape B is attached to the grooved side, while the wafer processing tape E that was initially attached is peeled off. With the backgrind tape B attached, the semiconductor wafer W is ground down until it reaches a predetermined thickness. Then, a mounting process is carried out, and after that, a semiconductor device is manufactured in the same manner as described above.

[0111] Next, the second embodiment will be described in detail. Note that the same explanation as in the first embodiment will not be repeated for the second embodiment. Unless otherwise specified, the same operations as in the first embodiment may be performed in the second embodiment.

[0112] "Second Embodiment" A method for manufacturing a semiconductor device according to the second embodiment is, for example, A mounting process involves attaching a semiconductor wafer W, on which circuit components are formed on both sides, to a dicing tape 20 to fix the semiconductor wafer W to the dicing tape 20, A protection step to protect the circuit surface by attaching a protective layer 11 to the exposed circuit surface of the semiconductor wafer W, A stealth processing step is performed to prepare the semiconductor wafer W for fragmentation into semiconductor chips (dies) by forming a vulnerable area inside the semiconductor wafer W to which the protective layer 11 has been attached using laser light, An expansion process in which both the semiconductor wafer W and the protective layer 11 are made into small pieces by stretching the dicing tape 20, After undergoing the above-mentioned heat treatment or irradiation treatment with active energy rays, a removal step is performed to remove multiple small pieces 11' of the protective layer attached to the semiconductor chip X, A pickup process to remove the semiconductor chip X by separating it from the adhesive layer 22, The process includes a bonding step of bonding the extracted semiconductor chip X to an adherend. When carrying out these processes, the protective layer 11 and dicing tape 20 described above are used as manufacturing aids.

[0113] The dicing tape 20 described above can be the same as the one used in the first embodiment.

[0114] The semiconductor wafer W (substrate) before being cut into smaller pieces for semiconductor chips X may, for example, be ground to a desired thickness by backgrinding. Specifically, in backgrinding, a semiconductor wafer W with a backgrind tape B attached to the circuit surface may be ground to reduce the thickness of the semiconductor wafer W until it reaches the thickness of the semiconductor chip X to be manufactured later.

[0115] In the second embodiment, the semiconductor wafer W has circuit surfaces formed on both sides. On the other hand, in the other embodiments, the semiconductor wafer W has a circuit surface formed on one of its sides. As shown in Figures 5A and 5B, electrode portions D are arranged on one side where the circuit surface is formed, and electrode portions D are also arranged on the other side where the circuit surface is formed. The electrode portions D on one side are electrically connected to the electrode portions D on the other side.

[0116] More specifically, a semiconductor chip X, fabricated by dividing a semiconductor wafer W, has electrode portions D arranged on both sides and which are electrically connected to each other. More specifically, as shown in Figure 5B, electrode portions D are arranged on both sides of the semiconductor chip X, and conductive through-vias V are arranged to penetrate in the thickness direction of the semiconductor chip X. The electrode portions D on both sides are electrically connected to each other via these through-vias V.

[0117] In the second embodiment, as shown in Figure 6A, a glass carrier G is attached to one circuit surface of a semiconductor wafer W. The glass carrier G is superimposed on one circuit surface of the semiconductor wafer W to support a relatively thin semiconductor wafer and to facilitate handling of such a semiconductor wafer. For example, the glass carrier G is attached to the circuit surface after the formation of the one circuit surface and is used to arrange further circuit components on the other surface of the semiconductor wafer W. The thickness of the glass carrier G is, for example, 0.5 mm or more and 5.0 mm or less.

[0118] In the mounting process, the dicing ring R is attached to the adhesive layer 22 of the dicing tape 20, while the semiconductor wafer W is attached to the exposed surface of the adhesive layer 22 (see Figure 6B). Next, the glass carrier G is peeled off from the semiconductor wafer W (see Figure 6C).

[0119] In the subsequent protection step, the protective layer 11 is superimposed on one of the circuit surfaces of the semiconductor wafer W (see Figure 6D). In the protection step, for example, the protective layer 11 may be superimposed on the circuit surface by directly pressing and attaching it to the circuit surface. Alternatively, a surface protection composition containing a solid component constituting the protective layer 11 and a solvent that dissolves the solid component may be prepared, and after applying the prepared surface protection composition to the circuit surface, the solvent is evaporated to form a protective layer 11 in contact with the circuit surface, thereby superimposing the protective layer 11 on the circuit surface. By overlaying a protective layer 11 onto the circuit surface of a semiconductor wafer W, the circuit surface can be protected by the protective layer 11 until the protective layer 11 is removed. Therefore, it is possible to prevent dust and other debris from adhering to the circuit surface of the semiconductor wafer W covered with the protective layer 11.

[0120] In the stealth processing step, a vulnerable area is formed inside the semiconductor wafer W to allow it to be divided into smaller semiconductor chips X. This vulnerable area is formed inside the semiconductor wafer W by irradiating it with laser light L (see Figure 6E). The laser light L is irradiated onto the semiconductor wafer W from, for example, the dicing tape side. The laser light L is irradiated onto the semiconductor wafer W in such a way that each semiconductor chip X, which is produced by dividing the semiconductor wafer W in a subsequent expansion step, has the electrode portion D as designed in advance. The stealth processing step can be carried out, for example, using a commercially available stealth dicing apparatus.

[0121] In the expanding process, as shown in Figure 6F, the dicing tape 20 and protective layer 11 are placed on both sides of the semiconductor wafer W, respectively, and the dicing tape 20 is stretched in the planar direction to increase its surface area. This divides the laminate of the semiconductor wafer W and protective layer 11 into smaller pieces, and widens the spacing between adjacent semiconductor chips X formed by these pieces along the planar direction. Specifically, the dicing tape 20 is stretched in the planar direction by pushing up the dicing tape 20 from below using a push-up member U provided by the expanding apparatus. This causes the semiconductor wafer W and protective layer 11 to be divided into smaller pieces under specific temperature conditions. The above temperature conditions are, for example, -20°C to 0°C. The expanded state is released by lowering the push-up member U (this completes the low-temperature expanding process). When the expansion process is carried out at low temperatures, the protective layer 11 needs to be fractured and broken into smaller pieces. The protective layer 11 described above is designed to fracture well at this time. Furthermore, in the expansion process, the dicing tape 20 is stretched under higher temperature conditions (for example, between 10°C and 25°C) to increase its surface area. This pulls adjacent semiconductor chips X apart in the planar direction of the dicing tape 20, further widening the kerf (spacing) (room temperature expansion process). In the expanding process, the dicing tape 20 is stretched in the planar direction to increase its surface area, thereby dividing the protective layer 11 along with the semiconductor wafer W into smaller pieces. More specifically, by stretching the dicing tape 20, the semiconductor wafer W can be divided into smaller semiconductor chips X using the aforementioned vulnerable areas within the semiconductor wafer as boundaries. At this time, the semiconductor wafer W is divided into smaller semiconductor chips X, and the protective layer 11 is also divided into smaller pieces.

[0122] The removal process in the second embodiment can be carried out in the same manner as the removal process in the first embodiment, as shown in Figures 6G and 6H.

[0123] In the pickup process of the second embodiment, as shown in Figure 6I, the semiconductor chip X is peeled off from the adhesive layer 22 of the dicing tape 20. When the pickup process is performed in this way, the semiconductor chip X is peeled off from the adhesive layer 22 of the dicing tape 20.

[0124] As described above, electrode portions D that are electrically conductive to each other are arranged on both sides of the semiconductor chip X that has been extracted by the pickup process. Electrode portions D and non-electrode portions other than electrode portions D are arranged on the surface layers of one and the other surfaces of the semiconductor chip X. The non-electrode portions are made of, for example, an insulating material (silicon oxide). As shown in Figure 5B, the surfaces of the electrode portions D and the non-electrode portions are flush on one and the other surfaces of the semiconductor chip X. The electrode portions D are formed to have a thickness of, for example, 5 nm to 10 μm from the surface of the semiconductor chip X. The through-vias V, which are arranged to penetrate the semiconductor chip X in the thickness direction, are covered with the insulating material in all parts except those in contact with the electrode portions D. In other words, a portion of the surface of the through-vias V extending in the thickness direction of the semiconductor chip X is covered with the insulating material, while another portion is in contact with the electrode portions D.

[0125] The bonding process is performed after the removal process and the pickup process. In the bonding process, as shown in Figure 6J, the semiconductor chip X may be bonded to the adherend with the side from which the protective layer fragments 11' of the semiconductor chip X have been removed (circuit side) facing the adherend.

[0126] In the bonding process, for example, a semiconductor chip X is bonded to an adherend Z (such as a wiring board). At this time, the adherend Z and the semiconductor chip X are bonded in such a way that the electrode portion D of the adherend Z and the electrode portion D of the semiconductor chip X are electrically connected. Furthermore, in the bonding process, for example, at least two semiconductor chips X are stacked, and the electrode portion D of one semiconductor chip X, which is the adherend, is directly connected to the electrode portion D of the other semiconductor chip X. When stacking multiple semiconductor chips X as described above during the bonding process, the number of foreign objects that can get between one semiconductor chip X and the other is reduced because the stacking of multiple semiconductor chips X is such that the adhesion of foreign objects to the circuit surface is suppressed. Therefore, the electrode portions D of adjacent semiconductor chips X can be connected to each other more reliably. Thus, the circuits of multiple semiconductor chips X are electrically connected to each other with high reliability.

[0127] When directly connecting the electrode sections D to each other, for example, an atomic diffusion bonding method can be employed. Atomic diffusion bonding can be carried out, for example, using a commercially available atomic diffusion bonding apparatus.

[0128] Next, the third to fifth embodiments will be described in detail. Note that the same explanations as those for the first or second embodiment will not be repeated for the third to fifth embodiments. Unless otherwise specified, the same operations as those for the first or second embodiment may be performed in the third to fifth embodiments.

[0129] "Third Embodiment" The method for manufacturing a semiconductor device according to the third embodiment includes the steps described above, similar to the method for manufacturing a semiconductor device according to the second embodiment. However, the semiconductor device manufacturing method of the third embodiment differs from the second embodiment mainly in that the circuit components are arranged on one side of the semiconductor wafer W, and in the mounting process, instead of attaching the semiconductor wafer W, which is stacked on the glass carrier G, to the adhesive layer 22 of the dicing tape 20, the semiconductor wafer W is attached to the adhesive layer 22 in a state where the semiconductor wafer W and the surface protection sheet 10 are laminated together.

[0130] More specifically, in the semiconductor device manufacturing method of the third embodiment, a semiconductor wafer W attached to a backgrind tape B is prepared as shown in Figure 7A.

[0131] In the protection process, as shown in Figure 7B, the protective layer 11 of the surface protection sheet 10 is attached to the semiconductor wafer W. At this time, the protective layer 11 of the surface protection sheet 10 is attached to one side of the semiconductor wafer W, and the backgrind tape B is attached to the other side. The circuit surface is formed on the aforementioned one side of the semiconductor wafer W.

[0132] Next, in the mounting process, as shown in Figure 7C, the backgrind tape B is peeled off from the semiconductor wafer W while the semiconductor wafer W and the surface protection sheet 10 are overlapping. As a result, the semiconductor wafer W and the surface protection sheet 10 overlap, and the other side of the semiconductor wafer W (the side without the circuit surface) is exposed.

[0133] In the mounting process of the third embodiment, as shown in Figure 7D, with the semiconductor wafer W and the protective layer 11 overlapping, the other exposed surface of the semiconductor wafer W is attached to the adhesive layer 22 of the dicing tape 20. At this time, since the protective layer 11 is attached to one surface of the semiconductor wafer W, and the release liner 15 is also attached, the semiconductor wafer W can be pressed against the adhesive layer 22 via the protective layer 11 and the release liner 15. Thus, the semiconductor wafer W can be attached to the adhesive layer 22 while protecting the circuit surface of the semiconductor wafer W.

[0134] In the mounting process, it is preferable to place the protective layer 11 on the semiconductor wafer W with the release liner 15 laminated with the protective layer 11, and to peel off the release liner 15 from the protective layer 11 before the protective layer 11 is broken down into small pieces in the expanding process.

[0135] In the third embodiment, steps not specifically mentioned can be carried out in the same manner as in the steps of the first to fifth embodiments.

[0136] Next, the fourth embodiment will be described in detail. Note that the same descriptions as those for the embodiments described above will not be repeated for the fourth embodiment. In the fourth embodiment, unless otherwise specified, the same operations as those in the first to third embodiments may be performed.

[0137] "Fourth Embodiment" The method for manufacturing a semiconductor device according to the fourth embodiment differs from the third embodiment mainly in that, before the mounting process, laser light is irradiated onto the semiconductor wafer W to form a vulnerable area inside the wafer. More specifically, the method for manufacturing a semiconductor device according to the fourth embodiment includes a stealth processing step in which, in order to form the aforementioned vulnerable areas, a backgrind tape B is attached to the semiconductor wafer W and a laser beam is used to form the vulnerable areas, and the semiconductor wafer W is prepared for being cut into smaller pieces.

[0138] In the fourth embodiment, as shown in Figure 8A, a semiconductor wafer W is prepared in a state where it is overlapping with a backgrind tape B. In this state, the semiconductor wafer W is thinned to a desired thickness by, for example, backgrinding while the backgrind tape B is still attached.

[0139] In the stealth processing step of the fourth embodiment, as shown in Figure 8B, a laser beam is irradiated onto the semiconductor wafer W in a state where it is overlapping with the backgrind tape B. The backgrind tape B is attached, for example, to the side of the semiconductor wafer W opposite to the circuit side. The laser beam is irradiated, for example, from the circuit side of the semiconductor wafer W.

[0140] In the protection step of the fourth embodiment, as in the third embodiment, the protective layer 11 of the surface protection sheet 10 is attached to the semiconductor wafer W as shown in Figure 8C. As a result, the protective layer 11 overlaps one side (circuit side) of the semiconductor wafer W, and the backgrind tape B overlaps the other side. Then, the backgrind tape B is peeled off from the semiconductor wafer W. Note that the protective layer 11 may also have a release liner 15 overlapping it, as shown in Figure 8C.

[0141] Subsequently, as shown in Figures 8D and 8E, the mounting process can be carried out in the same manner as in the third embodiment.

[0142] In the fourth embodiment, steps not specifically mentioned can be carried out in the same manner as in the first to third embodiments.

[0143] Finally, the fifth embodiment will be described in detail. Note that the same explanations as those for the first to fourth embodiments will not be repeated for the fifth embodiment. Unless otherwise specified, the same operations as those in the first to fourth embodiments may be performed in the fifth embodiment.

[0144] "Fifth Embodiment" The fifth embodiment of the semiconductor device manufacturing method differs from the other embodiments mainly in that a protective layer 11 is placed between the semiconductor wafer W and the backgrind tape B, and the semiconductor wafer W is then attached to the adhesive layer 22 of the dicing tape 20. More specifically, in the semiconductor device manufacturing method of the fifth embodiment, as shown in Figure 9A, a protective layer 11 is placed on the circuit surface of a semiconductor wafer W, and then a backgrind tape B is placed on top of the protective layer 11. Alternatively, the backgrind tape B may be placed on one side of the protective layer 11 before the semiconductor wafer W is placed on the other side of the protective layer 11, or the semiconductor wafer W may be placed on the other side of the protective layer 11 before the backgrind tape B is placed on one side of the protective layer 11.

[0145] With the semiconductor wafer W, protective layer 11, and backgrind tape B stacked, grinding is performed on the surface of the semiconductor wafer W where no circuit components are placed. Specifically, as shown in Figure 9A, grinding (backgrinding) is performed with a grinding pad K until the semiconductor wafer W reaches a predetermined thickness. The thickness of the semiconductor wafer W is reduced to a predetermined thickness by the grinding process (see Figure 9B).

[0146] Next, in the mounting process, the side of the ground semiconductor wafer W (the side without circuit components) is placed on top of the adhesive layer 22 of the dicing tape 20. At this time, as shown in Figure 9C, a protective layer 11 is attached to the circuit side of the semiconductor wafer W, and a backgrind tape B is attached to the protective layer 11.

[0147] After the semiconductor wafer W is placed on the adhesive layer 22 of the dicing tape 20, the stealth processing step can be performed in the same manner as described above. Then, the protective layer 11 attached to the semiconductor wafer W is separated from the backgrind tape B and the backgrind tape B is removed (see Figure 9D). Alternatively, the stealth processing step may be performed after the backgrind tape B has been removed.

[0148] Subsequently, an expand process to break down the semiconductor wafer W and protective layer 11 into smaller pieces, a removal process to remove the small pieces 11' of the protective layer attached to the semiconductor chip X, a pick-up process to remove the semiconductor chip X, and a bonding process to bond the semiconductor chip X to the substrate can be carried out in the same manner as described above.

[0149] The method for manufacturing an electronic component device according to the embodiments of the present invention is as illustrated above, but the present invention is not limited to the method for manufacturing an electronic component device as illustrated above. In other words, various forms used in general electronic component device manufacturing methods can be adopted as long as they do not impair the effects of the present invention.

[0150] For example, as described above, the semiconductor wafer used in the manufacturing method of the present invention may be a semiconductor wafer with circuit surfaces formed on both sides, as described in the first embodiment, or it may be a semiconductor wafer with circuit surfaces formed on only one side, as described in the other embodiments. In other words, circuit components may be arranged on only one of the two sides of the semiconductor chip produced by the manufacturing method of the present invention, or circuit components may be arranged on both sides.

[0151] The matters disclosed herein include the following: (1) A surface protection composition for protecting at least one side of a substrate, A surface protection composition comprising a polymer having hydrophilic groups in its molecule and a compound that generates an acid or a base upon heating or irradiation with active energy rays, or at least one of the two. Such surface protection compositions can form a protective layer that covers at least one side of a substrate in a manufactured electronic component, and can be removed relatively easily upon contact with a liquid containing water. (2) The surface protection composition according to (1) above, wherein the compound is a compound that produces an acid or a base upon irradiation with the active energy ray. (3) The surface protection composition according to (1) or (2) above, wherein the hydrophilic group of the polymer is a hydroxyl group or a carboxyl group. (4) The water absorption rate before the heating or irradiation with the active energy rays is 0.1% by mass or more and less than 1.5% by mass. The water absorption rate after the aforementioned heating, or the irradiation of the aforementioned active energy ray with a high-pressure mercury lamp at 500 mJ / cm². 2 A surface protective composition according to any one of (1) to (3) above, wherein the water absorption rate after irradiation is 1.5% by mass or more. (5) The surface protection composition according to any one of (1) to (4) above, wherein the polymer is polyvinyl alcohol or polyethylene oxide. (6) A surface protection sheet comprising a protective layer formed of a surface protection composition described in any of (1) to (5) above. (7) The surface protection sheet according to (6) above, further comprising a release liner overlapping at least one surface of the protective layer. (8) A step of protecting a surface to be protected by overlapping a protective layer formed from a surface protection composition onto at least one of the two surfaces of the substrate to be protected, The step includes removing the protective layer that overlaps the protected surface, The aforementioned surface protection composition is The material comprises a polymer having a hydrophilic group in its molecule and a compound that produces an acid or a base upon heating or irradiation with active energy rays, A method for manufacturing an electronic component device, comprising the removal step of generating the acid or base from the compound by heating or irradiation with active energy rays to increase the hydrophilicity of the protective layer, and removing the protective layer by dissolving at least a portion of the protective layer in a liquid containing water. In this method of manufacturing electronic component devices, the protective layer can prevent foreign matter from adhering to at least one side of the substrate of the manufactured electronic component device, and furthermore, the protective layer can be removed relatively easily thereafter by bringing it into contact with a liquid containing water. (9) A method for manufacturing an electronic component device according to (8) above, wherein a circuit component is arranged on the protected surface of the substrate. [Examples]

[0152] The present invention will be further explained with experimental examples, but the present invention is not limited to these.

[0153] A commercially available dicing tape (product name "V-12SR," manufactured by Nitto Denko Corporation) was used. In addition, a bare silicon wafer (50 μm thick, 300 mm in diameter, in a disc shape) was used instead of a semiconductor wafer. A surface protection sheet was prepared as follows. Specifically, a surface protection composition containing a solvent was applied to one side of a release liner, and the solvent was evaporated to laminate the protective layer and the release liner. Furthermore, the release liner was bonded to the protective layer, and a surface protection sheet was prepared in which the protective layer was placed between the two release liners.

[0154] [Example 1~ 8, 10, Reference example 9 [Comparative Example] (Preparation of surface protection sheet a) The following commercially available polyvinyl alcohol was prepared. This polyvinyl alcohol (PVA) was dissolved in one of the following alcohol aqueous solutions to prepare a PVA solution. To the prepared PVA solution, the following photoacid generator or photobase generator was added and mixed in the amounts shown in Table 1 per 100 parts by mass of PVA. Each PVA solution was applied onto a release liner a (PET film, 50 μm thick). Each release liner a had a surface treated with silicone release agent, and the above PVA solution was applied to this surface using an applicator. Furthermore, a drying treatment was performed at 110°C for 2 minutes to form a protective layer with a thickness of 10 μm overlapping one side of each release liner a. Then, release liner b (PET film, 25 μm thick) was placed on the exposed surface of each protective layer. Each release liner b had a surface treated with silicone release agent, and this side was attached to the protective layer. In this way, surface protective sheets a sandwiched between two release liners were prepared. • Polyvinyl alcohol Saponification degree: 35 (mol%), Average degree of polymerization: 200 • Alcohol solution 50% ethanol aqueous solution (Examples 1-3, 9, 10, Comparative Example) 60% aqueous solution of isopropyl alcohol (Examples 4-8) • Photoacid generator Sulfonium salt type. Product name: "CPI-200K". Manufactured by Sunapro Co., Ltd. (Vapor acidity: 256) Chemical name: Diphenyl[4-(phenylsulfanyl)phenyl]sulfonium=trifluorotris(pentafluoroethyl)-λ5 -Phosphanoid [Also known as: Diphenyl[4-(phenylthio)phenyl]sulfonium, trifluorotris(1,1,2,2,2-pentafluoroethyl)phosphate(1-) (1:1)] Sulfonium salt type. Product name: "CPI-310FG". Manufactured by Sunapro Co., Ltd. (Vapor acidity: 259) Iodonium salt type, product name "IK-1", manufactured by Sunapro Co., Ltd. (gas phase acidity: 256) Chemical name: (4-isopropylphenyl)(4-tolyl)iodonium=trifluoro[tris(pentafluoroethyl)]-λ 5 -Phosphanoid [Also known as: [4-(1-Methylethyl)phenyl](4-methylphenyl)iodonium trifluorotris(1,1,2,2,2-pentafluoroethyl)phosphate(1-) (1:1)] • Photobase generator Product name: "WPBG-266" Manufactured by Fujifilm Corporation Chemical name: 2-(3-Benzoylphenyl)propionic acid 1,2-diisopropyl-3[bis(dimethylamino)methylene]guanidine [Also known as: Benzeneacetic acid, 3-benzoyl-α-methyl-, compd. with N,N,N',N'-tetramethyl-N''-[[(1-methylethyl)amino][(1-methylethyl)imino]methyl]guanidine (1:1)] (Mounting and protection processes) The release liner b was peeled off and removed from the fabricated surface protection sheet a, exposing one side of the protective layer. This exposed side was then attached to the silicon bare wafer (substrate) that was overlapping the dicing tape. The exposed surface of the wafer (the surface opposite to the contact surface with the dicing tape) was bonded to the exposed surface of the protective layer from which the release liner b had been peeled off. A Nitto Seiki MV3000 vacuum mounter, heated to a stage temperature of 90°C, was used for bonding. In this way, the dicing tape, silicon bare wafer, and protective layer were stacked in this order. (Removal process) The protective layer was subjected to a high-pressure mercury lamp at a rate of 500 mJ / cm². 2 The protective layer was treated with light irradiation (including ultraviolet light) to enhance its hydrophilicity. Subsequently, to remove the protective layer, a cleaning unit manufactured by DISCO (product name DFD6361) was used, and the removal process was carried out as follows: While rotating a disc-shaped stage that supported the dicing tape from below in the circumferential direction, 25°C water was sprayed onto the semiconductor chips attached to each small piece of the die bond sheet. The rotation speed of the stage was 1000 rpm, and the water spraying time was as shown in Table 1.

[0155] [Comparative Example] Surface protective sheet b was prepared in the same manner as in Example 1, except that a photoacid generator was not added to the PVA aqueous solution when preparing the protective layer of the surface protective sheet, ultraviolet light was not irradiated onto the fragmented protective layer during the removal process, and the water spraying time during the removal process was changed.

[0156] <Water absorption rate of the protective layer before and after UV irradiation> The water absorption rate of the protective layer was measured using the Karl Fischer coulometric titration method with a moisture meter (product name "CA-07") and a moisture vaporizer (product name "VA-07") manufactured by Mitsubishi Chemical Analytics. Specifically, a test sample of the protective layer weighed at approximately 4 mg was placed in a steady state at 23°C and 50 RH%. Subsequently, the moisture in the test sample was evaporated by heating it at 150°C for 3 minutes using the moisture vaporizer, and the amount of vaporized moisture was measured. The water absorption rate was determined from the ratio of the measured water content to the mass of the test sample before heating.

[0157] <Evaluation: Adhesion to the substrate (before UV irradiation)> The adhesion of the protective layer to the silicon bare wafer was evaluated according to the following evaluation criteria. (Good) The adhesion strength of the protective layer to the silicon bare wafer is 0.2 N / 100 mm or more. (Defective) Adhesion of the protective layer to the silicon bare wafer is less than 0.2 N / 100 mm.

[0158] <Evaluation: Ease of removing the protective layer (after UV irradiation)> After carrying out the removal process as described above, the water used to remove the protective layer was removed. Furthermore, the surface of the silicon bare wafer was analyzed using a Fourier transform infrared spectrophotometer (FT-IR). This analysis confirmed the presence or absence of residual organic matter. The evaluation criteria related to the ease of removing the protective layer are as follows. (Good) No residue from the protective layer was observed visually (800-4000cm) -1 (The maximum absorption at this point is 0.05 or less.) (Slightly good) No residue from the protective layer was observed visually (however, this is only true for 800-4000 cm) -1 (Maximum absorption at this point exceeds 0.05) (Defective) Residue of the protective layer was visually confirmed.

[0159] The manufacturing methods for each example and comparative example were carried out as described above. Details of the protective layer of the surface protective sheet used in each manufacturing method and the evaluation results are shown in Table 1.

[0160] [Table 1]

[0161] As can be seen from the evaluation results above, by manufacturing semiconductor devices using the semiconductor device manufacturing method of the example, the adhesion of foreign matter to the circuit surface of the semiconductor chip (die) was suppressed, thus protecting the circuit surface. Furthermore, in the removal process, the multiple fragmented protective layers could be removed relatively easily with water, enabling efficient manufacturing of semiconductor devices. It should be noted that there was no significant difference in the removeability of the protective layer regardless of whether the amount of energy irradiated onto the protective layer in the removal process was high or low (whether the ultraviolet irradiation time was long or short).

[0162] By implementing the semiconductor device manufacturing method described in the above embodiment, it is possible to efficiently manufacture semiconductor devices in which multiple semiconductor chips with virtually no foreign matter attached are stacked. [Industrial applicability]

[0163] The method for manufacturing electronic component devices of the present invention is suitably used, for example, to manufacture semiconductor devices having semiconductor integrated circuits. [Explanation of symbols]

[0164] 10: Surface protective sheet, 11: Protective layer, 11': Small piece of protective layer, 15: Release liner, 20: Dicing tape, 21: Base material layer, 22: Adhesive layer, 30: Diebond sheet, G: Glass carrier, W: Semiconductor wafer, X: Semiconductor chip, V: Through-hole via, D: Electrode section B: Backgrind tape.

Claims

1. A surface protection composition for protecting at least one side of a substrate, The material comprises a polymer having a hydrophilic group in its molecule and a compound that produces an acid or base upon irradiation with active energy rays. The water absorption rate before irradiation with the aforementioned active energy rays is 0.1% by mass or more and less than 1.5% by mass. The aforementioned activation energy irradiation was performed using a high-pressure mercury lamp at a rate of 500 mJ / cm². 2 A surface protection composition having a water absorption rate of 1.5% by mass or more and 10.0% by mass or less after irradiation.

2. The surface protective composition according to claim 1, wherein the hydrophilic group of the polymer is a hydroxyl group or a carboxyl group.

3. A surface protection sheet comprising a protective layer formed of the surface protection composition described in claim 1 or 2.

4. The surface protection sheet according to claim 3, further comprising a release liner overlapping at least one surface of the protective layer.

5. A step of protecting a surface to be protected by overlapping a protective layer formed from a surface protection composition onto at least one of the two surfaces of the substrate to be protected, The step includes removing the protective layer that overlaps the protected surface, The surface protection composition comprises a polymer having hydrophilic groups in its molecule and a compound that generates an acid or base upon irradiation with active energy rays. In the removal step, the acid or base is generated from the compound by irradiation with active energy rays to increase the hydrophilicity of the protective layer, and the protective layer is removed by dissolving at least a portion of the protective layer in a liquid containing water. The water absorption rate of the surface protective composition before irradiation with the active energy rays is 0.1% by mass or more and less than 1.5% by mass. The aforementioned activation energy irradiation was performed using a high-pressure mercury lamp at a rate of 500 mJ / cm². 2 A method for manufacturing an electronic component device, wherein the water absorption rate of the surface protective composition after irradiation is 1.5% by mass or more and 10.0% by mass or less.

6. The method for manufacturing an electronic component device according to claim 5, wherein a circuit component is arranged on the protected surface of the substrate.