Image forming apparatus

Abstract

To solve such the problem that a bottom emission type exposure device has insufficient light intensity for exposing a photoreceptor drum and a top emission type light-emitting device is used for exposing a photoreceptor drum but such a case that a stronger light intensity is needed for exposing a photoreceptor drum may occur.SOLUTION: An image formation device exposes a photoreceptor drum using light passing through a light-transmissive electrode that is laminated on a light-emitting layer on an opposite side to a first electrode that is laminated on a silicon substrate and arranged two-dimensionally while interposing the light-emitting layer therebetween.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] It relates to an electrophotographic image forming apparatus.

Background Art

[0002] Generally, an electrophotographic image forming apparatus that forms an image by exposing a photosensitive drum using an exposure head having LEDs (Light Emitting Diodes) or organic ELs (Organic Electro Luminescence) is known. The exposure head includes a plurality of light emitting units arranged in a direction substantially orthogonal to the rotation direction of the photosensitive drum. The exposure head further has a rod lens array for forming an image of the light emitted from each light emitting unit on the photosensitive drum. The number of light emitting units and the interval between adjacent light emitting units are determined by the width of the image forming area on the photosensitive drum and the resolution of the output image of the image forming apparatus. For example, in the case of a printer with an output resolution of 1200 dpi, since the width of one pixel is 21.16 μm (omitting three decimal places), the center-to-center distance between adjacent light emitting units is formed to be 21.16 μm. Such an image forming apparatus using an exposure head does not use a deflection device such as a polygon mirror like a laser beam printer of the laser scanning method, and thus has fewer components used compared to a laser scanning method printer, enabling miniaturization and cost reduction of the apparatus.

[0003] As such an exposure head, an exposure head using a TFT circuit and organic EL on a transparent glass substrate has been proposed (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The light-emitting device provided in the exposure head disclosed in Patent Document 1 is a so-called bottom-emission type light-emitting device that emits light from the organic layer from the TFT circuit side. In a bottom-emission type light-emitting device, the light path is limited by the TFT circuit, so the ratio of the amount of light emitted from the light-emitting device to the amount of light emitted in the light-emitting layer is small. Therefore, when a bottom-emission type light-emitting device is used as the exposure light source for a photoreceptor, there is a problem in that the amount of light emitted must be increased. [Means for solving the problem]

[0006] The present invention has been made in view of the above problems, and the image forming apparatus of the present invention is an image forming apparatus comprising a photoreceptor that is driven to rotate around a rotation axis, a silicon substrate, A light-emitting chip having: a first electrode layer formed in layers and transparent to light; a second electrode layer formed in layers between the first electrode layer and the silicon substrate in a vertical direction perpendicular to the surface of the silicon substrate, and having a plurality of electrodes arranged two-dimensionally in the direction of the rotation axis of the photoreceptor and the rotation direction of the photoreceptor; and a light-emitting layer formed between the first electrode layer and the second electrode layer in the vertical direction; and a drive circuit provided on the silicon substrate that applies a voltage to at least one of the plurality of electrodes based on image data so that the light-emitting layer emits light. Equipped with, The light-emitting layer emits light so as to transmit light through at least a portion of the first electrode layer, and the plurality of electrodes include a first electrode row arranged along the direction of the rotation axis and a second electrode row arranged along the direction of the rotation axis and positioned differently from the first electrode row in the direction of rotation, and the drive circuit includes a first memory circuit group that holds image data, a second memory circuit group that holds image data, and is connected to either the first memory circuit group or the second memory circuit group, and the connected one of the first memory circuit group and the second memory circuit group The system further includes: a first signal generation unit that generates a signal to drive the first electrode array based on image data held by one of the first and second memory circuit groups; a second signal generation unit that is connected to the unconnected one of the first and second memory circuit groups and generates a signal to drive the second electrode array based on image data held by the connected one of the first and second memory circuit groups; and a selector that switches the connection between the first and second memory circuit groups and the first and second signal generation units. An image forming apparatus characterized by the following: [Effects of the Invention]

[0007] An image forming apparatus can be provided that exposes a photosensitive drum using a light-emitting device with a top-emission structure. [Brief explanation of the drawing]

[0008] [Figure 1] Schematic cross-sectional view of the image forming apparatus according to this embodiment. [Figure 2] This diagram shows the positional relationship between the exposure head and the photosensitive drum in this embodiment. [Figure 3] Schematic diagram of the exposure head according to this embodiment [Figure 4] This diagram shows the arrangement of multiple light-emitting devices on a printed circuit board according to this embodiment. [Figure 5] Top view showing the arrangement relationship between the rod lens array and the printed circuit board in this embodiment. [Figure 6] Top view of the light-emitting device according to this embodiment [Figure 7] Diagram showing the arrangement of the lower electrodes in this embodiment. [Figure 8] Schematic cross-sectional view of the light-emitting device according to this embodiment. [Figure 9] Diagram illustrating the appearance of multiple spots according to this embodiment. [Figure 10] Block diagram of the image controller unit and drive board according to this embodiment [Figure 11] Circuit diagram of the light-emitting device according to this embodiment [Figure 12] A diagram showing the waveforms of each signal and the shift of the image data. [Figure 13] This figure shows the waveforms of each signal and image data for performing multiple exposure according to this embodiment. [Figure 14] Block diagram of the analog section and circuit diagram of the drive section according to this embodiment. [Figure 15] Circuit diagram of a light-emitting device for switching the order of light emission according to this embodiment. [Modes for carrying out the invention]

[0009] [Example 1] Figure 1 is a schematic cross-sectional view showing the configuration of an electrophotographic image forming apparatus in Example 1. The image forming apparatus shown in Figure 1 is a multifunction printer (MFP) equipped with scanner and printer functions, and consists of a scanner unit 100, an image forming unit 103, a fuser unit 104, a paper feeding / transport unit 105, and a printer control unit (not shown) that controls these. The scanner unit 100 illuminates a document placed on the document table to optically read the document image, and converts the read image into an electrical signal to create image data.

[0010] The image forming section 103 includes four consecutive image forming stations arranged in the order of cyan (C), magenta (M), yellow (Y), and black (K) along the rotation direction (counterclockwise direction) of the endless conveyor belt 111. The four image forming stations have the same configuration, and each image forming station includes a photosensitive drum 102 which is a photosensitive member that rotates in the direction of the arrow (clockwise direction), an exposure head 106, a charger 107, and a developer 108. Note that the subscripts a, b, c, and d of the photosensitive drum 102, exposure head 106, charger 107, and developer 108 indicate that they correspond to the configurations for black (K), yellow (Y), magenta (M), and cyan (C) of the image forming stations, respectively. Hereinafter, unless otherwise specified when referring to a specific photosensitive drum or the like, the subscripts of the reference numerals will be omitted.

[0011] In the image forming section 103, the photosensitive drum 102 is rotationally driven, and the charger 107 charges the photosensitive drum 102. The exposure head 106, which is an exposure means, causes the light emitting device to emit light according to the image data, and condenses the light generated by the light emitting device onto the photosensitive drum 102 (on the photosensitive member) by a rod lens array to form an electrostatic latent image. The developer 108, which is a developing means, develops the electrostatic latent image formed on the photosensitive drum 102 with toner. Then, the developed toner image is transferred onto the recording paper on the conveyor belt 111 that conveys the recording paper. Such a series of electrophotographic processes are executed at each image forming station. Note that at the time of image formation, after the image formation at the cyan (C) image forming station is started and a predetermined time has elapsed, the image forming operations are sequentially executed at the magenta (M), yellow (Y), and black (K) image forming stations. Thereby, a full-color image is formed.

[0012] The image forming apparatus shown in FIG. 1 includes an internal paper feeding unit 109a, 109b of the paper feeding / conveying unit 105, an external paper feeding unit 109c which is a large-capacity paper feeding unit, and a manual paper feeding unit 109d as units for feeding recording paper. At the time of image formation, among these, recording paper is fed from the paper feeding unit instructed in advance, and the fed recording paper is conveyed to the registration roller 110. The registration roller 110 conveys the recording paper to the conveying belt 111 at the timing when the toner image formed in the image forming unit 103 described above is transferred to the recording paper. Toner images formed on the photosensitive drums 102 of each image forming station are sequentially transferred to the recording paper conveyed by the conveying belt 111. The recording paper with the unfixed toner image transferred thereon is conveyed to the fixing unit 104. The fixing unit 104 incorporates a heat source such as a halogen heater, and fixes the toner image on the recording paper to the recording paper by heating and pressing with two rollers. The recording paper on which the toner image is fixed by the fixing unit 104 is discharged to the outside of the image forming apparatus by the discharge roller 112.

[0013] On the downstream side in the recording paper conveying direction of the black (K) image forming station, an optical sensor 113 which is a detection means is disposed at a position facing the conveying belt 111. The optical sensor 113 detects the position of a test image formed on the conveying belt 111 in order to derive the amount of color shift of the toner image between each image forming station. The amount of color shift derived by the optical sensor 113 is notified to an image controller unit 700 (see FIG. 7) etc. described later, and the image positions of each color are corrected so that a full-color toner image without color shift is transferred onto the recording paper. Also, the printer control unit (not shown) executes an image forming operation while controlling the scanner unit 100, the image forming unit 103, the fixing unit 104, the paper feeding / conveying unit 105, etc. described above in accordance with an instruction from an MFP control unit (not shown) that controls the entire multi-function peripheral (MFP).

[0014] Here, as an example of an electrophotographic image forming apparatus, an image forming apparatus in which toner images formed on photosensitive drums 102 of each image forming station are directly transferred to recording paper on a transport belt 111 has been described. However, the embodiment is not limited to a printer in which toner images on photosensitive drums 102 are directly transferred to recording paper. For example, the embodiment may be an image forming apparatus comprising a primary transfer unit that transfers the toner image on the photosensitive drum 102 to an intermediate transfer belt, and a secondary transfer unit that transfers the toner image on the intermediate transfer belt to recording paper.

[0015] [Scanning head configuration] Next, the exposure head 106, which exposes the photosensitive drum 102, will be described with reference to Figure 2. Figure 2(a) is a perspective view showing the positional relationship between the exposure head 106 and the photosensitive drum 102, and Figure 2(b) is a diagram illustrating the internal structure of the exposure head 106 and how the light beam from the exposure head 106 is focused onto the photosensitive drum 102 by the rod lens array 203. As shown in Figure 2(a), the exposure head 106 is attached to the image forming apparatus by a mounting member (not shown) at a position opposite the photosensitive drum 102, which rotates in the direction of the arrow (Figure 1).

[0016] As shown in Figure 2(b), the exposure head 106 consists of a printed circuit board 202, a group of light-emitting devices 400 mounted on the printed circuit board 202, a rod lens array 203, and a housing 204. The rod lens array 203 and the printed circuit board 202 are mounted in the housing 204. As shown in Figure 2, the rod lens array 203 is positioned between the group of light-emitting devices 400 and the photosensitive drum 102. The rod lens array 203 is provided along the longitudinal direction of the printed circuit board 202 and focuses the light beams emitted by each of the light-emitting devices onto the photosensitive drum 102. In the factory, assembly and adjustment work is performed on the exposure head 106 alone, and focus adjustment and light intensity adjustment are performed. Here, the distance between the photosensitive drum 102 and the rod lens array 203, and the distance between the rod lens array 203 and the group of light-emitting devices 400 are assembled and adjusted to a predetermined interval. As a result, the light from the group of light-emitting devices 400 is imaged onto the photosensitive drum 102. Therefore, during focus adjustment at the factory, the mounting position of the rod lens array 203 is adjusted so that the distance between the rod lens array 203 and the light-emitting device group 400 is a predetermined value. Also, during light intensity adjustment at the factory, the lower electrode of the light-emitting device 401 (described later) is driven, and the voltage applied to the light-emitting device (described later) is adjusted so that the light focused onto the photosensitive drum 102 via the rod lens array 203 becomes a predetermined light intensity.

[0017] Figure 3 illustrates the printed circuit board 202 and the light-emitting device group 400 mounted on the printed circuit board. Figure 3(a) is a schematic diagram showing the configuration of the side of the printed circuit board 202 on which the light-emitting device group 400 is mounted, and Figure 3(b) is a schematic diagram showing the configuration of the side of the printed circuit board 202 opposite to the side on which the light-emitting device group 400 is mounted (the first side) (the second side).

[0018] As shown in Figure 3(a), the group of light-emitting devices 400 mounted on the second substrate, the printed circuit board 202, has a configuration in which the light-emitting devices 401-1 to 401-20, which are independent chips, are arranged in two rows in a staggered pattern along the longitudinal direction of the printed circuit board 202. That is, on the printed circuit board 202 (the second substrate), the odd-numbered light-emitting devices 401-1... and the even-numbered light-emitting devices 401-2... are arranged at different positions in the rotational direction of the photosensitive drum 102. Hereafter, when referring to the light-emitting devices 401-1 to 401-20 collectively, they will be described as light-emitting device 400. In Figure 3(a), the vertical direction indicates the first direction, which is the rotational direction of the photosensitive drum 102, and the horizontal direction indicates the second direction, which is the longitudinal direction, perpendicular to the first direction. The longitudinal direction is also the direction of intersection, which intersects with the rotational direction of the photosensitive drum 102. Each light-emitting device group 400 has a total of 748 lower electrodes, which will be described later. In this embodiment, one lower electrode is placed every 21.16 μm (≒2.54 cm / 1200 dots). As a result, the distance from end to end of the 748 lower electrodes within one light-emitting device is approximately 15.8 mm (≒21.16 μm × 748). The light-emitting device group 400 consists of 20 light-emitting devices 401-1 to 401-20. The number of lower electrodes in the light-emitting device group 400 is 14,960 (=748 electrodes × 20 chips), and the light-emitting device group 400 enables exposure corresponding to an image width in the longitudinal direction of approximately 316 mm (≒approximately 15.8 mm × 20 chips).

[0019] As shown in Figure 3(b), a connector 305 is mounted on the side of the printed circuit board 202 opposite to the side on which the light-emitting device group 400 is mounted. The connector 305 is for connecting control signals and power lines for controlling the light-emitting device group 400 from an image controller unit 700 (not shown), and each light-emitting device 401-1 to 401-748 is driven via the connector 305.

[0020] Figure 4 shows the boundary between chips of light-emitting devices 401 arranged in two rows in the longitudinal direction, with the horizontal direction being the longitudinal direction of the light-emitting device group 401 in Figure 3(a). Figure 4 shows the boundary between chips of the light-emitting devices 401 (the part where the ends of the chips overlap in the longitudinal direction (overlapping portion)). At the boundary between light-emitting devices 401-2n and 401-2n+1, the pitch of the lower electrodes at the ends between different light-emitting devices (the distance between the center points of the two lower electrodes) is approximately 21.16 μm, which is the pitch at a resolution of 1200 dpi.

[0021] Figure 5 is a top view showing the arrangement of the rod lens array 203 and the printed circuit board 202 according to this embodiment. The rod lens array 203 is a group of lenses in which rod lenses with optical axes extending in the Z direction are arranged as shown in Figure 5. Multiple rod lenses 500 are arranged over a length greater than the length of the light-emitting area of ​​the light-emitting devices 401-1 to 401-748 mounted on the printed circuit board 202. In addition to the rod lens array 203, a microlens array or the like can be used.

[0022] [Configuration of the light-emitting device] Figure 6 is a schematic diagram showing the internal configuration of the light-emitting device 401. Here, as shown in Figure 6, the longitudinal direction of the light-emitting device 401 is the X direction, and the transverse direction is the Y direction. Here, the Y direction is the rotation direction of the photosensitive drum 102, in other words, the direction of movement of the photosensitive surface (photoreceptor surface) of the rotating photosensitive drum 102. The X direction is approximately perpendicular to the Y direction, i.e., the rotation direction of the photosensitive drum 102. It is also approximately parallel to the rotation direction of the photosensitive drum 102. Note that approximately perpendicular allows for an inclination of about ±1° with respect to an angle of 90°, and approximately parallel allows for an inclination of about ±1° with respect to an angle of 0° between them. The light-emitting device 401 has wire bonding pads (hereinafter referred to as WB pads) 601-1, 601-2, 601-3, and 601-4 formed on a silicon substrate 402, which is the first substrate. Note that the silicon substrate 402 has a circuit section 602 (dashed line), which is the drive unit, built into it. The circuit section 602 can be an analog drive circuit, a digital control circuit, or a configuration including both. Power supply to the circuit section 602 and input / output of signals from outside the light-emitting device 401 are performed via the WB pad.

[0023] The light-emitting device 401 of this embodiment includes a linear light-emitting region 604 that extends along the rotation axis direction of the photosensitive drum. The light-emitting region 604 includes an anode, a cathode, and a light-emitting layer 450, which will be described later, and is a region that emits light when a potential difference is generated between the anode and the cathode.

[0024] Silicon substrate 402 has the advantage of enabling high-speed and high-performance circuits to be formed at high density, as process technology for integrated circuit formation has also advanced and it is already used as a substrate for various integrated circuits. Furthermore, silicon substrates have the advantage of being readily available in large-diameter wafers at low cost.

[0025] The light-emitting device 401 will be explained in more detail using Figures 7 and 8. In Figures 7 and 8, the X direction indicates the longitudinal direction of the exposure head. The Z direction is the direction in which each layer of the layer structure, described later, overlaps (stacking direction).

[0026] Figure 7 is an enlarged view of the main part of the schematic diagram of the AA cross section in Figure 6. Figure 8 is a schematic diagram of the lower electrodes 410-1 to 410-748, which will be described later, as seen from the Y direction. As shown in Figure 7, the light-emitting device 401 comprises a silicon substrate 402, lower electrodes 410-1 to 410-748, lower electrodes 420-1 to 420-748, a light-emitting layer 450, and an upper electrode 460.

[0027] The silicon substrate 402 is a drive substrate in which a drive circuit including a drive unit corresponding to each of the lower electrodes 410-1 to 410-748, which will be described later, is formed during the manufacturing process.

[0028] As shown in Figure 5, the lower electrodes 410-1 to 410-748 (cathodes) are a plurality of electrodes formed in layers (first electrode layer) on the silicon substrate 402. Each lower electrode 410-1 to 410-748 is formed on a plurality of drive units embedded in the silicon substrate 402 using Si integrated circuit processing technology along with the manufacturing process for the silicon substrate 402. The lower electrodes 410-1 to 410-748 are preferably made of a metal with high reflectivity to the emission wavelength of the light-emitting layer 450, which will be described later. Therefore, the lower electrodes 410-1 to 410-748 preferably contain silver (Ag), aluminum (Al), or alloys thereof, silver-magnesium alloy, etc.

[0029] As shown in Figures 7 and 8, the lower electrodes 410-1 to 410-748 are electrodes provided corresponding to each pixel in the X direction. That is, each of the lower electrodes 410-1 to 410-748 is provided to form one pixel. The lower electrodes 410-1 to 410-748 are designated as the first electrode row.

[0030] In this embodiment, the width W of the lower electrodes 410-1 to 410-748 in the X direction corresponds to the width of one pixel. The spacing d is the distance between the lower electrodes in the X direction. Since the lower electrodes 410-1 to 504-748 are formed on the silicon substrate 402 with a spacing d, each of the multiple drive units formed on the light-emitting substrate 402 can individually control the voltage of the lower electrodes 410-1 to 410-748. The spacing d is filled with the organic material of the light-emitting layer 450, and the lower electrodes are separated by the organic material.

[0031] In the light-emitting device of this embodiment, the width W of the lower electrodes 410-1 to 410-748 is set to a nominal dimension of 20.90 m, and the spacing d is set to a nominal dimension of 0.26 μm. In other words, the light-emitting device of this embodiment has one lower electrode 410 every 21.16 μm in the X direction. Since 21.16 μm is the size of one pixel at 1200 dpi, the width of each lower electrode 410 in the X direction will be equivalent to the size of one pixel corresponding to the output resolution of the image forming apparatus of this embodiment. The process rule in the light-emitting device of this embodiment is highly accurate, at approximately 0.2 μm, and it is possible to form a width d1 with a resolution of 0.26 μm.

[0032] Furthermore, the width of the lower electrodes 410-1 to 410-748 in the Y direction, which is the rotation direction of the photosensitive drum, is also W. In other words, the lower electrodes 410-1 to 410-748 in this embodiment have a shape of 20.90 μm square, and the area of ​​the lower electrode 410 is 436.81 μm². 2 This results in a size of 447.7456 μm² per pixel. 2It accounts for approximately 97.6% of the total area. Organic light-emitting materials have less light output compared to LEDs. However, by forming the lower electrode as a square and reducing the distance between adjacent lower electrodes on the silicon substrate 402 as described above, it is possible to secure a light-emitting area sufficient to obtain a light output that can change the potential of the photosensitive drum. It is desirable to secure a lower electrode area of ​​90% or more of the area occupied by one pixel. Therefore, for an image forming apparatus with an output resolution of 1200 dpi, it is desirable to form the lower electrode 410 with a side width of approximately 20.07 μm or more, and for an image forming apparatus with an output resolution of 2400 dpi, it is desirable to form the lower electrode 410 with a side width of approximately 10.04 μm or more.

[0033] On the other hand, the upper limit of the occupied area of ​​the lower electrode 410 should be set based on the transmittance of the rod lens array and the upper electrode described later, but in this embodiment, it is set to an upper limit of 110% of the occupied area of ​​one pixel. If it is designed to be larger than 110% of the occupied area of ​​one pixel, the size of the pixels formed when a highly sensitive photosensitive drum is exposed may far exceed the resolution, so the upper limit of the occupied area of ​​the lower electrode 410 is set to 110%. Accordingly, for an image forming apparatus with an output resolution of 1200 dpi, it is desirable to form the width of one side of the lower electrode 410 to be approximately 22.19 μm or less, and for an image forming apparatus with an output resolution of 2400 dpi, it is desirable to form the width of one side of the lower electrode 410 to be approximately 11.10 μm or less. In other words, it is preferable that the range of the occupied area of ​​the lower electrode relative to the occupied area of ​​one pixel is 90% to 110%.

[0034] Furthermore, the shape of the lower electrode is not limited to a square; it can be a polygon with more than four sides, a circle, an ellipse, or any other shape, as long as it emits light with an exposure area size corresponding to the output resolution of the image forming apparatus, and the image quality of the output image produced by that light meets the design specifications of the image forming apparatus.

[0035] As shown in Figure 8(a), the light-emitting device 401 of this embodiment includes lower electrodes 420-1 to 420-748 in addition to the lower electrodes 410-1 to 410-748. The lower electrodes 420-1 to 420-748 are a plurality of electrodes formed in layers (first electrode layer) on the silicon substrate 402, similar to the lower electrodes 410-1 to 410-748. The lower electrodes 420-1 to 420-748 form the second electrode row. That is, the light-emitting device 401 includes lower electrodes arranged in a two-dimensional array. The size, shape, and arrangement in the X direction of the lower electrodes 420-1 to 420-748 are the same as those of the lower electrodes 420-1 to 420-748, so a description is omitted.

[0036] The lower electrodes 420-1 to 420-748 (the second electrode row) are arranged with a gap d in the Y direction relative to the lower electrodes 410-1 to 410-748 (the first electrode row). In the Y direction, lower electrode 420-1 is positioned adjacent to lower electrode 410-1, and similarly, lower electrodes 420-2 to 420-748 are positioned adjacent to lower electrodes 410-2 to 410-748, respectively. As in this embodiment, it is not necessarily required to design the distance between the lower electrodes in the X direction and the distance between the lower electrodes in the Y direction to be equal, but it is desirable to design the distance between the lower electrodes to be equal in both directions in order to efficiently arrange the lower electrodes within a predetermined area. In addition, in this embodiment, a light-emitting device with two rows of electrodes is illustrated for simplicity of explanation, but as shown in Figure 8(b), the number of electrode rows may be any number of rows, three or more. For example, similar to the above, lower electrodes 430-1 to 430-748 may be placed adjacent to each of the lower electrodes 420-1 to 420-748, and further, lower electrodes 440-1 to 440-748 may be placed adjacent to lower electrodes 430-1 to 430-748. In the following explanation, for the sake of simplicity, we will proceed using a light-emitting device having lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 as an example.

[0037] When the lower electrodes 410-1 and 420-1 are driven simultaneously, the distance between the center positions exposed by the driving of both electrodes on the photosensitive drum 102 shifts by W+d in the rotational direction of the photosensitive drum 102. In this embodiment, the image forming apparatus exposes an area corresponding to a certain pixel in the output resolution of the image forming apparatus by driving a plurality of adjacent lower electrodes (for example, lower electrodes 410-1 and 420-1) in the rotational direction of the photosensitive drum 102. Therefore, by setting a time difference between the timing of voltage application to the lower electrode 410-1 and the timing of voltage application to the lower electrode 420-1 according to the rotational speed of the photosensitive drum 102, an area corresponding to one pixel can be exposed multiple times (multiple exposures).

[0038] Next, the light-emitting layer 450 will be described. The light-emitting layer 450 is formed by laminating it onto the silicon substrate 402 on which the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 are formed. That is, in the portions where the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 are formed, the light-emitting layer 450 is laminated on the lower electrodes 410-1 to 410-748 and 420-1 to 420-748. In the portions where the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 are not formed, the light-emitting layer 450 is laminated onto the silicon substrate 402. In this embodiment, in the light-emitting device 202, the light-emitting layer 450 is formed to span all of the lower electrodes 410-1 to 410-748 and 420-1 to 420-748, but the embodiment is not limited to this. For example, the light-emitting layer 450 may be formed by separately stacking it on each lower electrode, similar to the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748. Alternatively, the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 may be divided into multiple groups, and one light-emitting layer may be stacked on each lower electrode belonging to that group.

[0039] The light-emitting layer 450 can be made of, for example, an organic material. The light-emitting layer 450, which is an organic EL film, is a laminated structure that includes functional layers such as an electron transport layer, a hole transport layer, an electron injection layer, a hole injection layer, an electron blocking layer, and a hole blocking layer. In addition to organic materials, inorganic materials may also be used for the light-emitting layer 450.

[0040] An upper electrode 460 (anode) is laminated on the light-emitting layer 450 (a second electrode layer). The upper electrode 460 is an electrode that can transmit light of the emission wavelength of the light-emitting layer 450. Therefore, in this embodiment, the upper electrode 460 uses a material containing indium tin oxide (ITO) as a transparent electrode. Since electrodes made of indium tin oxide have a transmittance of 80% or more for light in the visible light region, they are suitable as electrodes for organic EL.

[0041] The upper electrode 460 is formed on the opposite side of the lower electrodes 410-1 to 410-748 and 420-1 to 420-748, with at least the light-emitting layer 450 in between. That is, in the Z direction, the light-emitting layer 450 is positioned between the upper electrode 460 and the lower electrodes 410-1 to 410-748, and between the upper electrode 460 and the lower electrodes 420-1 to 420-748. When the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 are projected onto the upper electrode 460 in the Z direction, the regions where the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 are formed fall within the region where the upper electrode 460 is formed. The transparent electrode does not need to be laminated over the entire light-emitting layer 450, but in order to efficiently emit the light generated in the light-emitting layer 450 to the outside of the light-emitting device, it is preferable that the area occupied by the upper electrode 460 is 100% or more of the area occupied by one pixel, and more preferably 120% or more. The upper limit of the area occupied by the upper electrode 460 is arbitrarily designed based on the area of ​​the silicon substrate 402 and the light-emitting layer 450. Wiring may be provided in the upper electrode 460 except for the part that transmits light.

[0042] In this embodiment, the upper electrode 460 is an anode commonly provided for each of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748. However, it may also be provided individually for each of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748, or one upper electrode may be provided for each of the multiple lower electrodes.

[0043] The drive circuit controls the potential of each lower electrode 410-1 to 410-748 and lower electrode 420-1 to 420-748 based on image data in order to create a potential difference between the upper electrode 460 and any of the lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748.

[0044] The light-emitting device in this embodiment is a so-called top-emission type emission device. When a voltage is applied to the upper electrode 460, which is the anode, and the lower electrodes 410 and 420, which are the cathodes, a potential difference is created between them. Electrons flow from the cathode into the light-emitting layer 450, and holes flow from the anode into the light-emitting layer 450. The light-emitting layer 450 then emits light as electrons and holes recombine. The light emitted by the light-emitting layer 450 towards the upper electrode 460 passes through the upper electrode 460 and is emitted from the light-emitting device in the direction of arrow A shown in Figure 7. Light from the light-emitting layer 450 towards the lower electrodes 410 and 420 is reflected by the lower electrodes 410 and 420 towards the upper electrode 460, respectively, and this reflected light also passes through the upper electrode 460 and is emitted from the light-emitting device. Although there is a time difference in the emission timing from the upper electrode 460 between the light emitted directly from the light-emitting layer 450 toward the upper electrode 460 and the light reflected by the lower electrodes 410 and 420 respectively and emitted from the upper electrode 460, the layers of the light-emitting device are extremely thin, so they can be considered to be emitted almost simultaneously.

[0045] By using a transparent electrode such as indium tin oxide as the upper electrode 460, the aperture ratio, which indicates the light transmission rate of the electrode, can be made substantially equivalent to the transmittance of the upper electrode 460. In other words, since there are virtually no parts other than the upper electrode 460 that attenuate or block light, the light emitted from the light-emitting layer 450 is attenuated as little as possible, or becomes emitted light without being blocked.

[0046] Furthermore, as mentioned above, by forming the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 using high-precision Si integrated circuit processing technology, the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 can be arranged at high density. As a result, almost all of the area of ​​the light-emitting section 404 (here, the sum of the area of ​​the lower electrodes 410-1 to 410-748 and 420-1 to 420-748 and the area of ​​the region between adjacent lower electrodes) can be allocated to the lower electrodes 410-1 to 410-748 and 420-1 to 420-748. In other words, this results in an exposure head with high utilization efficiency of the light-emitting area per unit area.

[0047] Furthermore, when using a moisture-sensitive light-emitting material such as an organic EL layer or an inorganic EL layer as the light-emitting layer 450, it is desirable to seal it to prevent moisture from entering the light-emitting part 404. As for the sealing method, for example, a sealing film can be formed by forming a single or laminated thin film of silicon oxide, silicon nitride, aluminum oxide, etc. As for the method of forming the sealing film, a method that has excellent coverage performance for structures such as steps is preferred, and for example, atomic layer deposition (ALD) can be used. Note that the material, composition, and formation method of the sealing film are examples and are not limited to the examples described above, and suitable ones can be selected as appropriate.

[0048] [Shape of exposure area in multiple exposure] Figure 9 shows the positional relationship of the exposure areas (spots) during multiple exposure. In Figure 9, the exposure areas on the exposure drum 106 are shown by driving the lower electrode 410-n (where n is a natural number between 1 and 748) and the lower electrode 420-n adjacent to it in the Y direction. That is, Figure 9 shows the exposure areas of the two lower electrodes 410-n and 420-n, which are aligned in the Y direction, for the nth lower electrode out of 748 lower electrodes arranged in the X direction. When a voltage is applied to the lower electrodes 410-n and 420-n of the light-emitting substrate 402 to cause the light-emitting layer 450 to emit light almost simultaneously in the Y direction, the exposure area corresponding to the lower electrode 410-n and the exposure area corresponding to the lower electrode 420-n will be in different positions in the Y direction, as shown in Figure 9(a). The position of each exposure area will be the same as the arrangement relationship between the lower electrodes 410-n and 420-n in the Y direction. In other words, the distance between the centers of each exposure region in the Y direction is W(μm) + d(μm).

[0049] Figure 9(b) shows the state of the exposed area when the timing of applying charge to the lower electrode 420-n, which is positioned to expose the area downstream of the lower electrode 410-n in the rotation direction of the photosensitive drum 106, is delayed according to equation (1), depending on the rotation direction and rotation speed Vdr (mm / s) of the photosensitive drum 102. The timing T at which the positions of the exposed areas formed on the photosensitive drum 102 coincide is controlled based on the delay time Tdelay obtained from equation (1). Tdelay = ((W + d) ÷ 1000) ÷ Vdr Equation (1)

[0050] In this embodiment, the maximum emission time Tw of each lower electrode corresponding to each pixel is generated such that the emission signal is equal to the time corresponding to the interval of one line in the Y direction, and is expressed by equation (2) with respect to the resolution (e.g., 1200 dpi) and the rotation speed Vdr. Tw=(25.4÷1200)÷Vdr Formula (2)

[0051] Multiple exposure allows exposure at approximately the same position on the photosensitive drum 102 using lower electrodes 410-n and 420-n, and the amount of light received by the photosensitive drum 102 can be increased in proportion to the number of lower electrodes arranged in the Y direction. In order to maintain this effect, it is preferable that the positional displacement of the exposure areas on the photosensitive drum 102 of each lower electrode being multiple-exposed is small.

[0052] Figure 9(c) shows an example where the positions of the exposure areas on the photosensitive drum 102 are misaligned in multiple exposure. In this example, the two exposure areas resulting from multiple exposure do not completely overlap, but partially overlap. Ideally, it is preferable for the two exposure areas to be nearly identical (completely overlapping), as shown in Figure 9(b), because this results in sharper dot formation. However, even when the exposure areas partially overlap, as shown in Figure 9(c), the required density can still be obtained, although the sharpness of the dots is inferior to that in Figure 9(b).

[0053] Therefore, even if there are variations in the control, the time Tdelay is set so that the emission timing is controlled within the allowable error amount ΔT of the emission timing so that it falls within the range of equation (3) with respect to the size Ws (μm) of the exposure area. ΔT=(Ws÷1000)÷Vdr Formula (3)

[0054] [Control Block] Figure 10 shows a block diagram of the image controller unit 700 and the drive board 202. Hereinafter, the chip select signal will be denoted as cs_x, the line synchronization signal as lsync_x, the clock signal as clk, and the image data signal as data. In this embodiment, for the sake of simplicity, the processing of a single color will be described, but the same processing will be carried out in parallel for four colors.

[0055] (Image controller section) The image controller unit 700 receives image data generated by the scanner unit 100 and transmits control signals to control the drive board 202. The image data input to the image controller unit 700 may be data generated by the scanner unit 100 as described above, or data transferred from a personal computer via network equipment (not shown). The control signals are a chip select signal cs_x representing the effective range of the image data, a clock signal clk, an image data signal data, a line synchronization signal lsync_x representing the delimiter of each line of image data, and a communication signal with the CPU 703. Each signal is transmitted to the light-emitting device 401 in the drive board 202 via the chip select signal line 705, the clock signal line 706, the image data signal line 707, the line synchronization signal line 708, and the communication signal line 709. The image controller unit 700 performs processing on the image data and processing on the printing timing. The image data generation unit 701 performs dithering on image data received from the scanner unit 100 or from outside the image forming apparatus at a resolution instructed by the CPU 703 to generate image data for print output. In this embodiment, for example, the dithering process is performed at a resolution of 1200 dpi.

[0056] The synchronization signal generation unit 704 generates a second signal, the line synchronization signal lsync_x. The CPU 703 instructs the synchronization signal generation unit 704 of the time interval of the signal period, with respect to a predetermined rotational speed of the photosensitive drum 102, as one line period. Here, one line period is the period during which the surface of the photosensitive drum 102 moves in the rotational direction by a pixel size of 1200 dpi (approximately 21.16 μm). For example, if printing is performed at a speed of 200 mm / s in the paper transport direction, the CPU 703 instructs the synchronization signal generation unit 704 of the time interval as 105.8 μs (decimal places omitted). The transport speed is calculated by the CPU 703 using the set value (fixed value) of the printing speed (image formation speed) set in the control unit (not shown) that controls the speed of the photosensitive drum 102. The printing speed is set according to the type of paper, for example.

[0057] The chip data conversion unit 702 divides the image data for one line for each light-emitting device 401 in synchronization with the line synchronization signal lsync_x generated by the synchronization signal generation unit 704. The chip data conversion unit 702 transmits the image data divided for each light-emitting device 401 to the drive board 202 along with the clock signal clk and the chip select signal cs_x. The clock signal clk is the control reference signal.

[0058] (Drive board) Next, the configuration of the drive board 202 will be described. The head information storage unit 710 is a memory device that stores head information such as the amount of light emitted and mounting position information of each light-emitting device 401, and is connected to the CPU 703 via the communication signal line 709. The clock signal line 706, image data signal line 707, line synchronization signal line 708, and communication signal line 709 are connected to all of the light-emitting devices 401. The chip select signal line 705 is connected to the input of light-emitting device 401-1. The output of light-emitting device 401-1 is connected to the input of light-emitting device 401-2 via signal line 711-1, and the output of light-emitting device 401-2 is connected to the input of light-emitting device 401-3 via signal line 711-2. In this way, the chip select signal line 705 (or signal line 711) is connected in a so-called cascaded manner via each light-emitting device 401. Each light-emitting device 401 controls the voltage of its lower electrode based on the set values ​​configured on the chip select signal line 705, clock signal line 706, line synchronization signal line 708, image data signal line 707, and communication signal line 709. Each light-emitting device 401 also generates a chip select signal for the next light-emitting device 401.

[0059] [Circuit configuration within the light-emitting device] Figure 11(a) shows a circuit block diagram of the light-emitting device 401. The circuit section 406 within the light-emitting device 401 has a digital section 800 and an analog section 806. The digital section 800 has the function of generating pulse signals to drive the lower electrodes 410-n and 420-n based on preset values ​​and various signals set by the communication signal, synchronized with the clock signal clk, and transmitting them to the analog section 806 via the pulse signal line 907. Here, the various signals refer to the chip select signal cs_x, the image data signal data, and the line synchronization signal lsync_x. The digital section 800 also has the function of generating the next chip select signal for the light-emitting device 401 from the input chip select signal cs_x.

[0060] [Digital Department] The communication interface unit 801 controls the writing and reading of setting values ​​to the register unit 802 based on the communication signal from the CPU 703. The register unit 802 stores the setting values ​​necessary for operation (pre-set setting values). These setting values ​​include exposure timing information used in the image data storage unit 804, width and phase information of the pulse signal generated by the pulse signal generation unit 805, and setting information for the drive voltage set by the analog unit 806. Note that the drive voltage can be derived from the resistance value between the lower electrode and the upper electrode, and the range of this resistance value is known in advance, so information regarding the drive current may be stored instead of the setting information for the drive voltage. The register unit 802 stores at least one of these pieces of information. The second generation unit, the chip select signal generation unit 803, delays the input first signal, the chip select signal cs_x, generates the next chip select signal for the light-emitting device 401, and transmits it via the signal line 711. The image data storage unit 804 holds the image data while the incoming chip select signal cs_x is valid, and outputs the image data to the pulse signal generation unit 805 in synchronization with the line synchronization signal lsync_x. Further details will be described later.

[0061] The pulse signal generation unit 805 generates a pulse signal based on the pulse signal width information and phase information set in the register unit 802, according to the image data input from the image data storage unit 804, and outputs it to the analog unit 806. Details will be described later. The analog unit 806 generates the signal necessary to drive the lower electrode based on the pulse signal generated by the digital unit 800. Details will be described later.

[0062] (Image data storage section) Next, the operation of the image data storage unit 804 will be described. The image data storage unit 804 in Embodiment 1 is built into the light-emitting device 401. An example in which the chip select signal cs_x and the line synchronization signal lsync_x are negative logic signals will be described, but they may also be positive logic. Figure 11(b) is a circuit diagram of the image data storage unit 804. The clock gate circuit 810 outputs the logical AND of the inverted signal of the chip select signal cs_x and the clock signal clk. The clock gate circuit 810 outputs the clock signal s_clk to the flip-flop circuit 811 only when the chip select signal cs_x is valid.

[0063] The flip-flop circuit 811 takes the image data signal data input to the image data storage unit 804 as its main input. The same number of flip-flop circuits 811 (748 in this embodiment) as the number of lower electrodes 401 provided in the longitudinal direction of the light-emitting device 401 are connected in series. The flip-flop circuit 811 operates in accordance with the clock signal s_clk sent from the clock gate circuit 810. The output of the flip-flop circuit 811 is output as image data dly_data_000~dly_data_747 to the next flip-flop circuits 811 and 812, which are connected adjacently. The flip-flop circuits 811 and 812 are provided in the longitudinal direction of the lower electrode row 401, in order of the number of lower electrodes 401 (748 in this embodiment).

[0064] Flip-flop circuit 812 takes the output of flip-flop circuit 811 as input and operates according to the line synchronization signal lsync_x. The output of flip-flop circuit 812 is output as image data buf_data_0_000~buf_data_0_747 to pulse signal generation unit 805 (805-1, 805-3, 805-5...) and flip-flop circuit 813. Each flip-flop circuit 812 functions as a memory circuit, and the flip-flop circuits 812 provided for one lower electrode row (lower electrodes 401-1~401-748) function as a memory circuit group (or first memory circuit group). Pulse signal generation units 805-1, 805-3, 805-5... function as a first pulse signal generation unit group that generates the first pulse signal. The pulse signal generation unit 805-1 generates a pulse signal to drive the lower electrode 410-1, and the pulse signal generation unit 805-3 generates a pulse signal to drive the lower electrode 410-2. In addition, the pulse signal generation unit 805-5 generates a pulse signal to drive the lower electrode 410-3.

[0065] Flip-flop circuit 813 takes the output of flip-flop circuit 812 as input and operates according to the multiple exposure timing signal lshift_0. The output of flip-flop circuit 813 is output to the pulse signal generation unit 805 (805-2, 805-4, 805-6...) as image data buf_data_1_000~buf_data_1_747. Each flip-flop circuit 813 functions as a memory circuit, and the flip-flop circuits 813 provided for one lower electrode row (402-1~402-748) function as a memory circuit group (or a second memory circuit group). The pulse signal generation units 805-2, 805-4, 805-6... function as a second pulse signal generation unit group that generates a second pulse signal. The pulse signal generation unit 805-2 generates a pulse signal to drive the lower electrode 420-1, and the pulse signal generation unit 805-4 generates a pulse signal to drive the lower electrode 420-2. In addition, the pulse signal generation unit 805-6 generates a pulse signal to drive the lower electrode 420-3.

[0066] The first generation unit, the multiple timing signal generation unit 814, generates a multiple exposure timing signal lshift_0 based on the line synchronization signal lsync_x, the clock signal clk, and the multiple timing setting signal lshift_start. That is, the multiple timing signal generation unit 814 generates a multiple exposure timing signal lshift_0 for the pulse signal generation units 805-1, 805-3, ... to generate pulse signals at different timings than the pulse signal generation units 805-1, 805-3, .... In this embodiment, the multiple timing signal generation unit 814 generates the multiple exposure timing signal lshift_0 by delaying the line synchronization signal lsync_x by the setting value set in the multiple timing setting signal lshift_start. For example, when the multiple timing setting signal lshift_start is set to 1 (lshift_start=1), the multiple exposure timing signal lshift_0 is a signal in which the line synchronization signal lsync_x is delayed by one cycle by the clock signal clk. The multiple timing signal generation unit 814 generates the multiple exposure timing signal lshift_0 based on the rotation speed of the photosensitive drum 102. That is, the multiple timing setting signal lshift_start is set based on the delay time Tdelay obtained by equation (1) described above.

[0067] Figure 12 is a timing chart showing the longitudinal operation of the light-emitting device 401 of the image data storage unit 804. In Figure 12, (i) the waveform of the clock signal clk is shown, (ii) the waveform of the line synchronization signal lsync_x is shown, (iii) the waveform of the chip select signal cs_x is shown, and (iv) the image data signal data is shown as 000 to 747. Here, "000" indicates image data corresponding to, for example, the lower electrode 410-1, and "747" indicates image data corresponding to the lower electrodes 410-748. The parts of the image data signal data that are shaded indicate data that is invalid as image data. (v) shows image data dly_data_000 etc., which is the output of the flip-flop circuit 811, and (vi) shows image data buf_data_0_000 etc., which is the output of the flip-flop circuit 812.

[0068] From time T0, when the chip select signal cs_x is 0 (cs_x=0 (low level)), to time T1, the image data is shifted through the series-connected flip-flop circuit 811 as follows. Time T1 is the time when cs_x=0 is captured by the rising edge of the clock signal clk. That is, the data is shifted sequentially as follows: data → dly_data_000 → dly_data_001 → ... → dly_data_747. During the period when the chip select signal cs_x is low level (cs_x=0), the clock signal clk is input a number of times equal to the number of lower electrodes in the longitudinal direction of the light-emitting device 401, i.e., 748. In this way, the image data for one line is held in dly_data_000 to dly_data_747.

[0069] From time T1 onward, the chip select signal cs_x is 1 (cs_x=1 (high level)), so no shift operation is performed and the image data at time T1 is retained. For example, the image data dly_data_000 retained from time T1 onward in the first flip-flop circuit 811 is 747. When the line synchronization signal lsync_x becomes 0 at time T2 (lsync_x=0 (low level)), the image data for one line is simultaneously output to the pulse signal generation unit 805 as buf_data_0_000~buf_data_0_747. Time T2 is the time when lsync_x=0 is captured by the rising edge of the clock signal clk. That is, the image data dly_data_000 etc. that was retained in the flip-flop circuit 811 is output to the pulse signal generation unit 805 as image data buf_data_0_000 etc. via the flip-flop circuit 812.

[0070] Next, Figure 13 is a timing chart showing the operation of the image data storage unit 804 in the Y direction. Figure 13 shows (i) the waveform of the line synchronization signal lsync_x and (ii) the image data buf_data_0_000 etc., which are the output of the flip-flop circuit 812. (iii) shows the waveform of the multiple exposure timing signal lshift_0, and (iv) shows the image data buf_data_1_000, etc., which are the output of the flip-flop circuit 813. In Figure 13, the image data buf_data_0_000, which is the output of the flip-flop circuit 812 at the far left of Figure 11(b), and the image data buf_data_1_000, which is the output of the flip-flop circuit 813, will be explained as representative examples. The same applies to all image data buf_data_0_001~buf_data_0_747 and buf_data_1_001~buf_data_1_747.

[0071] As shown in Figure 12, at time T10 in Figure 13, the line synchronization signal lsync_x=0 at time T0 in Figure 12, the image data dly_data_000 is input to the flip-flop circuit 812. Then, the value of the image data dly_data_000 is output from the flip-flop circuit 812 as image data buf_data_0_000. At time T11, the multiple exposure timing signal lshift_0 is input to the flip-flop circuit 813 as a low level (lshift_0=0). Then, the value of the image data buf_data_0_000 output from the flip-flop circuit 812 is output from the flip-flop circuit 813 as image data buf_data_1_000 to the pulse signal generation unit 805. Thus, the data output to the pulse signal generation unit 805 as buf_data_0_000 when lsync_x=0 is output again to the pulse signal generation unit 805 as buf_data_1_000 at the next timing of lshift_0=0. Here, the time T11 when the multiple exposure timing signal lshift_0 becomes low is delayed by the multiple timing setting signal lshift_start from the time T10 when the line synchronization signal lsync_x becomes low. The image data buf_data_0_000 is output to the pulse signal generation unit 805 corresponding to the lower electrode used for the earlier exposure in the Y direction on the photosensitive drum 102. In addition, the image data buf_data_1_000 is output to the pulse signal generation unit 805 corresponding to the lower electrode used for the later exposure in the Y direction on the photosensitive drum 102. This realizes multiple exposure.

[0072] In this embodiment, a configuration for multiple exposure using two lower electrodes 410-n and 420-n aligned in the Y direction was described as an example, but the number of lower electrodes used for multiple exposure is not limited to two. To increase the number of lower electrodes used for multiple exposure (when using m=3 or more rows for multiple exposure), the number of flip-flop circuits 812, 813 (748) shown in Figure 11(b) can be increased to m rows (m × 748). This makes it possible to store image data corresponding to m rows (m × 748) of lower electrodes. In addition, by increasing the number of pulse signal generation units 805 connected to the m rows of flip-flop circuits to m rows (m × 748), the light emission timing of each lower electrode 602 in m rows (m × 748) can be controlled, enabling multiple exposure for m rows.

[0073] In this embodiment, a flip-flop circuit was described as an example of a means for holding image data of each lower electrode 602. In this configuration, a simpler circuit with less wiring area is constructed by arranging the flip-flop circuits in parallel with the lower electrodes 410-1 to 410-748. On the other hand, even without using a flip-flop circuit, the following configuration can be used. That is, if there is a memory circuit (e.g., RAM) corresponding to the lower electrode and a control unit that controls the read timing and write timing to the memory circuit, it is not necessarily required to use a flip-flop circuit.

[0074] By increasing the number of lower electrodes used for multiple exposures and making the number of lower electrode rows used for multiple exposures selectable, more dynamic control of light intensity becomes possible. For example, if the number of rows m of the lower electrode rows is set to m=10 and the lower electrodes are arranged in the Y direction, it becomes possible to select from 2 to 10 rows of lower electrode rows used for multiple exposures according to the image formation speed of the image forming apparatus. This allows for nine levels of change in light output. Therefore, the control range of the drive current for each lower electrode can be reduced, and it becomes possible to drive the lower electrodes under approximately equal drive current conditions at all times. For example, when driving the lower electrodes with a low current (i.e., low light intensity), there are cases where the response of the lower electrodes is slow and the desired light intensity cannot be obtained. In such cases, using the multiple exposure method of this embodiment enables stable driving of the lower electrodes. In this way, when selecting which row of lower electrodes to use from multiple rows, a reset terminal can be added to the flip-flop circuits 812, 813, etc., to selectively stop the output of image data. In addition to this method, the pulse signal generation unit 805 may also be provided with means to stop the output of the pulse signal.

[0075] [Analog section] Figure 14(a) shows a block diagram of the analog unit 806. In this embodiment, for the sake of simplicity, the drive units 1001-1 and 1001-3 that drive two lower electrodes 410-1 and 410-2 in the lower electrode array 410-1 to 410-748 are illustrated and explained. However, it is assumed that similar drive units 1001-1 to 1001-748 are formed to correspond to other lower electrodes included in the lower electrode array 410-1 to 410-748, and further, that they are also formed to correspond to other lower electrode arrays. The pulse signal generation units 805-1 and 805-3 generate pulse signals that control the light emission (ON) timing of the lower electrodes 410-1 and 410-2. The pulse signal generation units 805-1 and 805-3 input pulse signals to the drive units 1001-1 and 1001-3 via pulse signal lines 907-1 and 907-3.

[0076] The digital-to-analog converter (hereinafter referred to as DAC) 1002 supplies an analog voltage that determines the drive current to the drive units 1001-1 and 1001-3 via the signal line 1003 based on the data set in the register unit 802. The drive unit selection unit 1007 supplies a drive unit select signal to the drive units 1001-1 and 1001-3 via the signal lines 1004 and 1005 based on the data set in the register unit 802. The drive unit select signal is generated such that only the signal connected to the selected drive unit 1001 is high level. For example, if drive unit 1001-1 is selected, a high-level drive unit select signal is supplied only to the signal line 1004, and a low-level drive unit select signal is supplied to the signal line 1005 and other signal lines 1005 connected to other drive units 1001-3, etc. In this embodiment, the drive unit select signal is positive logic, but it may also be negative logic.

[0077] The drive units 1001-1 and 1001-3 are each set to an analog voltage input via the signal line 1003 at a timing selected by the drive unit selection unit 1007 (the timing when the drive unit select signal becomes high level). The CPU 703 sequentially selects the drive units 1001-1 and 1001-3 via the register unit 802 and sets the voltage corresponding to the selected drive unit 1001-1 and 1001-3. In this way, the CPU 703 sets the analog voltage of all drive units 1001 with a single DAC 1002. Through the operation described above, the drive units 1001-1 and 1001-3 are input to an analog voltage that determines the drive current and a pulse signal, and the drive circuit described below controls the drive current and light emission time of each lower electrode 410-1 and 410-2 independently.

[0078] (Drive unit) Figure 14(b) shows the circuit of the drive unit 1001-1 that drives the lower electrode 410-1. The drive units 1001 for the other lower electrodes are driven by the same circuit. The MOS field-effect transistor (hereinafter referred to as MOSFET) 1102 supplies a drive current to the lower electrode 410-1 according to the gate voltage value, and controls the current so that the drive current is turned off (lights off) when the gate voltage is low.

[0079] The gate terminal of MOSFET 1104 is connected to the pulse signal line 907-1, and when the pulse signal is high level, it transfers the voltage charged to capacitor 1106 to MOSFET 1102. The gate terminal of MOSFET 1107 is connected to the drive unit select signal (transmitted via signal line 1004) transmitted from the drive unit selection unit 1007. MOSFET 1107 turns on when the received drive unit select signal is high level and charges capacitor 1106 with the analog voltage (transmitted via signal line 1003) output from DAC 1002. In this embodiment, before image formation, DAC 1002 sets the analog voltage to capacitor 1106, and during the image formation period, MOSFET 1107 is kept off to maintain the voltage level.

[0080] Through this operation, MOSFET 1102 supplies drive current to the lower electrode 410-1 according to the set analog voltage and pulse signal. If the input capacitance of the lower electrode 410-1 is large and the response speed when off is slow, MOSFET 1103 can be used to speed up the off process. MOSFET 1103 has a signal input to its gate terminal that is the pulse signal logically inverted by inverter 1105. When the pulse signal is low level, the gate terminal of MOSFET 1103 becomes high level, forcibly discharging the charge stored in the input capacitance of the lower electrode 410-1.

[0081] In this embodiment, the light intensity of the entire image is controlled by a drive current, and the light intensity of each pixel section is controlled by PWM control according to the image data. However, the present invention does not limit the method of controlling the light intensity. Both control of the entire image and control within each pixel section may be performed by drive current control or by PWM control.

[0082] [Switching the driving direction of the lower electrode (support for staggered arrangement)] As mentioned above, this embodiment uses a configuration in which the light-emitting devices 401 are arranged in a staggered pattern on the drive substrate 202 (hereinafter referred to as the staggered arrangement) as an example. When the light-emitting devices 401 are arranged in a staggered pattern, good imaging characteristics can be obtained by positioning the lower electrodes close to the center of the lens in the short-side direction of the rod lens array 203. When using an inexpensive rod lens array, there are limitations on the aperture of the rod lenses, so if the lower electrodes are positioned too far from the center of the rod lenses, light may not reach the aperture of the rod lenses, and light may not be emitted onto the photosensitive drum 102. For this reason, it is effective to position the lower electrode row to one side in the short-side direction from the center of the light-emitting device 401, so that the lower electrode row is positioned as close as possible to the center of the rod lenses.

[0083] In Figure 4, the center of the rod lens array 203 in the short direction is shown as L_center by a dashed line. The rod lens array 203 and the light-emitting devices 401 are mounted so that the center line L_center of the rod lens array 203 in the short direction (hereinafter referred to as the center line) coincides with the centers of the two light-emitting devices 401 which are arranged in a staggered pattern. The lower electrodes of each light-emitting device 401 are arranged closer to the center line L_center than to the center of the light-emitting device 401. Here, in the light-emitting device 401-2n (one of the first substrates), the side farther from the light-emitting device 401-2n+1 is designated as the end face 311, and the side closer to the light-emitting device 401-2n+1 is designated as the end face 310. Similarly, in the light-emitting device 401B (the other of the first substrates), the side farther from the light-emitting device 401A is designated as the end face 311, and the side closer to the light-emitting device 401B is designated as the end face 310. In all light-emitting devices 401, the lower electrode is positioned closer to the end face 310.

[0084] By arranging the lower electrodes in this manner, light is incident on all of the lower electrodes at the opening of the rod lens array 203. In this embodiment, the lower electrodes within the light-emitting device 401 are arranged to one side of the center in the short-side direction of the light-emitting device 401. The mounting direction of each light-emitting device 401 is determined so that the end face 310 faces the center line L_center. That is, on the light-emitting substrate 402, multiple rows of lower electrodes 410-1 to 410-748 are arranged on the side closer to the center (center line L_center) in the short-side direction of the rod lens array 203. When the light-emitting devices 401 are arranged in a staggered arrangement of two rows, the lower electrodes between light-emitting device 401A and light-emitting device 401B are arranged so that they are closer to the center line L_center, with each being rotated 180° inverted from the other.

[0085] Thus, the mounting direction of the light-emitting device 401 is determined such that the position of the lower electrode is shifted to one side within the light-emitting device 401, and the lower electrode approaches the center line L_center. This makes it possible to obtain good imaging characteristics. On the other hand, as mentioned above, since each light-emitting device 401 is arranged in a different mounting direction, it is necessary to control the lighting order of the lower electrode in the Y direction according to the direction of the light-emitting device 401. For example, in light-emitting device 401A, the lower electrode on the side closer to the end face 311 (upper side in the figure) lights up first, and in light-emitting device 401B, the lower electrode on the side closer to the end face 310 (upper side in the figure) lights up first. The control method in such cases will be explained below.

[0086] (A circuit with a selector) Figure 15 is a circuit block diagram of the inside of the light-emitting device 401 that switches the light emission order of the lower electrode rows 410-1 to 410-748 in the short direction of the drive board 202. Similar to Figure 11(b), the case in which there are two rows of lower electrode rows 410-1 to 410-748 and lower electrode rows 420-1 to 420-748 in the Y direction will be described. In addition to the circuit configuration described in Figure 11(b), the image data storage unit 804 has selectors 2200-12, 2200-34, 2200-56, ... Selector 2200-12 switches the combination of connections between flip-flop circuits 812 and 813 and pulse signal generation units 805-1 and 805-2. Selector 2200-34 switches the connection combination between flip-flop circuits 812 and 813 and pulse signal generation units 805-3 and 805-4. Selector 2200-56 switches the connection combination between flip-flop circuits 812 and 813 and pulse signal generation units 805-5 and 805-6.

[0087] Selectors 2200-12, 2200-34, 2200-56, ... are collectively referred to as Selector 2200. Selector 2200 can switch the connection relationship with the pulse signal generation unit 805, which is the destination for the image data of the flip-flop circuits 812 and 813. In other words, Selector 2200 functions as a selection unit that selects the combination of connections between the first and second memory circuit groups and the first and second pulse signal generation unit groups.

[0088] For example, in one light-emitting device 401 in the longitudinal direction of a staggered arrangement, flip-flop circuit 812 is connected to pulse signal generation unit 805-1, and flip-flop circuit 813 is connected to pulse signal generation unit 805-2. In the other light-emitting device 401 in the longitudinal direction of a staggered arrangement, flip-flop circuit 812 is connected to pulse signal generation unit 805-2, and flip-flop circuit 813 is connected to pulse signal generation unit 805-1. The connection information of the selector 2200 is set in a predetermined register of the register unit 802 based on a communication signal from the CPU 703. The selector 2200 is configured to control connections based on the connection information (register values) set in the register unit 802.

[0089] As mentioned above, by having a means to switch the lighting order of the lower electrodes, multiple exposures can be performed regardless of the orientation of the light-emitting device 401 on the drive substrate 202. In this embodiment, the usefulness of a staggered arrangement was explained, but it is also useful when the same exposure head is used in multiple different image forming apparatuses. The lighting order is selected according to the rotation direction of the photosensitive drum 102 and the mounting direction of the exposure head. This makes it possible to use the same exposure head even in image forming apparatuses with different rotation directions of the photosensitive drum 102.

[0090] As described above, in this embodiment, by arranging the lower electrodes in the Y direction and performing multiple exposures, it is possible to increase the light output of the exposure head, enabling faster image forming apparatuses and compatibility with photosensitive materials that require more light. Furthermore, by configuring the lower electrode array and circuit section 406 on a silicon substrate, it is possible to achieve higher output resolution and improve control performance by incorporating a large-scale logic circuit for the light-emitting device.

[0091] Furthermore, the light-emitting substrate 402 has means for generating image data for multiple exposures. This makes it possible to generate the necessary image data without increasing the wiring (wire bonding) of the interface of the light-emitting device 401. By optimally arranging the memory circuit (flip-flop circuit), it is possible to optimize the wiring area. In addition, the light emission timing can be controlled according to the printing speed and resolution of the image forming apparatus and the spacing of the lower electrodes of the light-emitting device 401. This makes it possible to sharpen the exposure area on the photosensitive drum 102 by multiple exposures.

[0092] In summary, according to this embodiment, we can propose an exposure head that can be driven at a higher speed and with higher light output.

Claims

1. An image forming apparatus, A photoreceptor that is driven to rotate around a rotation axis, A light-emitting chip comprising: a silicon substrate; a first electrode layer formed in layers and transparent to light; a second electrode layer formed in layers between the first electrode layer and the silicon substrate in a vertical direction perpendicular to the surface of the silicon substrate, having a plurality of electrodes arranged two-dimensionally in the direction of the rotation axis of the photoreceptor and the rotation direction of the photoreceptor; and a light-emitting layer formed between the first electrode layer and the second electrode layer in the vertical direction. A drive circuit provided on the silicon substrate applies a voltage to at least one of the plurality of electrodes based on image data so that the light-emitting layer emits light, Equipped with, The light-emitting layer emits light so as to transmit light through at least a portion of the first electrode layer. The plurality of electrodes include a first electrode row arranged along the rotation axis direction and a second electrode row arranged along the rotation axis direction and positioned differently from the first electrode row in the rotation direction. The drive circuit further includes: a first group of memory circuits that hold image data; a second group of memory circuits that hold image data; a first signal generation unit connected to either the first group of memory circuits or the second group of memory circuits, which generates a signal to drive the first electrode array based on the image data held by the connected unit of the first group of memory circuits or the second group of memory circuits; a second signal generation unit connected to the first signal generation unit and the unconnected unit of the first group of memory circuits or the second group of memory circuits, which generates a signal to drive the second electrode array based on the image data held by the connected unit of the first group of memory circuits or the second group of memory circuits; and a selector that switches the connections between the first group of memory circuits and the second group of memory circuits, and between the first signal generation unit and the second signal generation unit. An image forming apparatus characterized by the following:

2. The image forming apparatus according to claim 1, characterized in that the first electrode layer is formed in common with at least a portion of the plurality of electrodes.

3. The image forming apparatus according to claim 1, characterized in that the first electrode layer is formed in common for all of the plurality of electrodes.

4. Each of the plurality of electrodes included in the second electrode layer is provided corresponding to one pixel of the output resolution of the image forming apparatus, The image forming apparatus according to feature 1.

5. The image forming apparatus according to claim 4, characterized in that the area of ​​each of the plurality of electrodes relative to the area of ​​one pixel is 80% or more and 110% or less.

6. The image forming apparatus has a plurality of light-emitting chips, Each of the multiple light-emitting chips is arranged in a staggered pattern along the rotation axis. The image forming apparatus according to feature 1.

7. The image forming apparatus has a plurality of light-emitting chips, The plurality of light-emitting chips include a first light-emitting chip and a second light-emitting chip, The first light-emitting chip and the second light-emitting chip are positioned at different locations relative to each other in the rotational direction of the photoreceptor. The image forming apparatus according to feature 1.

8. The image forming apparatus according to claim 1, characterized in that the light-emitting layer is an organic EL.

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