Method for polishing semiconductor devices and method for observing semiconductor devices

Abstract

To provide a method for polishing a semiconductor element which can control the thickness of a semiconductor element.SOLUTION: A method for polishing a semiconductor element 3 equipped to a supporting body by a solder includes the steps of: sealing a supporting body and a semiconductor element 3 by a buried resin 5; polishing the buried resin 5 so that a side surface of the supporting body is exposed from the buried resin 5; polishing the buried resin 5 and the semiconductor element 3 from the upper surface; and observing the polished side surface of the buried resin 5 and measuring the thickness of the buried resin 5 on the upper surface of the supporting body. In the present disclosure, the polishing step and the measurement step are repeated until the thickness of the buried resin 5 becomes a predetermined thickness T.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to a method for polishing a semiconductor element and a method for observing a semiconductor element.

Background Art

[0002] Patent Document 1 discloses a technique for observing electroluminescence (hereinafter referred to as EL) with respect to a semiconductor element placed on a support. Thereby, the semiconductor element can be observed without being damaged.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the above method, in order to observe the cross section of the active layer of the semiconductor element, it is necessary to remove the semiconductor element mounted on the support by solder and then perform the observation. However, since it is necessary to melt the solder at a temperature higher than the mounting temperature, the semiconductor element may deteriorate due to heating. In addition, there is a risk of damaging the semiconductor element when picking it up with tweezers.

[0005] In order to observe the cross section of the active layer of a semiconductor element mounted on a support by solder, it is effective to polish the semiconductor element from the upper surface, expose the vicinity of the desired observation location, and then perform the observation. However, conventionally, it has been difficult to control the thickness of the semiconductor element during polishing.

[0006] In order to solve the above problems, a first object of the present disclosure is to provide a method for polishing a semiconductor element capable of controlling the thickness of the semiconductor element.

[0007] Furthermore, a second objective of this disclosure is to provide a method for observing semiconductor devices that can also be applied to semiconductor devices mounted on a support using solder. [Means for solving the problem]

[0008] The first aspect of this disclosure is, A method for polishing semiconductor elements mounted on a support by solder, A step of encapsulating the support and the semiconductor element with embedding resin, A step of polishing the embedded resin so that the side surface of the support is exposed from the embedded resin, A polishing step of polishing the embedded resin and the semiconductor element from the top surface, A measurement step of observing the polished side surface of the embedded resin and measuring the thickness of the embedded resin present on the upper surface of the support, Includes, It is preferable to repeat the polishing step and the measurement step until the thickness of the embedded resin reaches a predetermined thickness.

[0009] Furthermore, the second aspect is, support Top surface A method for polishing semiconductor devices mounted by solder, Smaller than the combined thickness of the semiconductor element and the solder. A step of mounting a structure having a predetermined thickness onto the upper surface of the support, A step of sealing the structure, the support, and the semiconductor element with an embedding resin, A step of polishing the embedded resin and the semiconductor element from the top surface until the top surface of the structure is exposed, It is preferable to include it. Furthermore, a method for polishing semiconductor elements mounted on a support by solder, A step of mounting a structure having a predetermined thickness onto the upper surface of the support, A step of sealing the structure, the support, and the semiconductor element with an embedding resin, A step of polishing the embedded resin and the semiconductor element from the top surface until the top surface of the structure is exposed, A step of polishing the embedded resin so that the side surface of the structure is exposed from the embedded resin, An observation step of observing the exposed side surface of the structure, Includes, It is desirable that the exposure of the upper surface of the aforementioned structure be confirmed by the observation process.

[0010] Also, a third aspect is a method for polishing a semiconductor element mounted on a support by solder, comprising: sealing the support and the semiconductor element with an embedding resin; a polishing step of polishing the embedding resin and the semiconductor element from above; forming a hole reaching from the polished surface of the semiconductor element to the solder bonding surface of the semiconductor element; a measuring step of measuring the depth of the hole; including it is preferable to repeat the polishing step and the measuring step until the depth of the hole reaches a predetermined depth.

[0011] Also, a fourth aspect is a method for observing the semiconductor element, comprising: performing the method for polishing a semiconductor element according to any one of claims 1 to 4; observing an active layer of the semiconductor element; including the predetermined thickness or the predetermined depth is preferably determined according to the type of the method for observing the active layer.

Advantages of the Invention

[0012] According to the first to fourth aspects of the present disclosure, there can be provided a method for polishing a semiconductor element capable of controlling the thickness of the semiconductor element, and a method for observing a semiconductor element applicable also to a semiconductor element mounted on a support by solder.

Brief Description of the Drawings

[0013] [Figure 1] It is a diagram showing a configuration of a semiconductor device having a semiconductor element which is a polishing and observation target of the present disclosure. [Figure 2] It is a diagram showing a method for polishing a semiconductor element according to Embodiment 1. [Figure 3] It is a diagram showing a semiconductor element after completion of the steps described in FIG. 2. [Figure 4] This figure shows the EL observation method for a semiconductor device according to Embodiment 1. [Figure 5] This figure shows a method for polishing semiconductor devices according to Embodiment 2. [Figure 6] This figure shows the semiconductor device after the completion of the process described in Figure 5. [Figure 7] This figure shows a method for polishing semiconductor devices according to Embodiment 3. [Figure 8] This figure shows the semiconductor device after the completion of the process described in Figure 7. [Figure 9] This figure shows the semiconductor element during the side polishing process and after the polishing process is completed. [Figure 10] This figure shows a method for polishing semiconductor devices according to Embodiment 4. [Figure 11] This figure shows the semiconductor device after the completion of the process described in Figure 10. [Modes for carrying out the invention]

[0014] A method for polishing a semiconductor element and a method for observing a semiconductor element according to embodiments of this disclosure will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repetition of the description may be omitted.

[0015] Embodiment 1 Figure 1 shows the configuration of a semiconductor device 100 having a semiconductor element 3 which is the subject of polishing and observation in this disclosure. The semiconductor device 100 comprises a block 1, a submount 2 as a support, and a semiconductor element 3.

[0016] Submount 2 is a mounting base with wiring 12 and wiring 9 on its upper surface. The surface 31 side of the semiconductor element 3 is mounted to the wiring 12 by solder 11. In other words, the semiconductor element 3 is mounted on submount 2 in an inverted state. As the material for submount 2, an electrical insulator, generally a ceramic plate such as AlN or Al2O3, is used.

[0017] Block 1 is bonded to the back surface of submount 2. The material used for block 1 is a material with excellent thermal conductivity, such as metals or alloys of Ag, Cu, Fe, Al, or insulators such as ceramics or resins coated with metal.

[0018] The semiconductor device 3 is composed of materials such as InP, GaAs, GaN, InGaAs, Ge, and Si. The semiconductor device 3 is, for example, an LD (Laser Diode) that converts electrical signals into optical signals, or a PD (Photo Diode) that performs the inverse conversion. The semiconductor device 3 includes an active layer 4 formed on the surface 31 side of the semiconductor device 3. The active layer 4 is, for example, a light-absorbing layer made of a material that generates carriers upon light incidence. The thickness of the semiconductor device 3 is, for example, 80 μm, and the active layer 4 is formed at a position of 5 μm or less from the surface 31 of the semiconductor device 3, but these values ​​are just examples and are not limited to them.

[0019] A surface electrode 10 is formed on the surface 31 of the semiconductor element 3. The surface electrode 10 is electrically and mechanically bonded to the submount 2 by solder 11. A back electrode 6 is formed on the back surface 32 of the semiconductor element 3. The thickness of the back electrode 6 is approximately 5 μm, but this value is just an example and is not limited to this. One end of a wire 7 is connected to the back electrode 6. The wire ball 8 at the other end of the wire 7 is bonded to the wiring 9.

[0020] The surface electrodes 10, solder 11, and wiring 12 are thin, and their combined thickness is only about 5 μm. However, these values ​​are just examples, and they should be sufficiently thin compared to the thickness of the semiconductor device 3.

[0021] As explained above, in this disclosure, the semiconductor element 3 to be polished and observed is mounted on the submount 2 by solder 11 in an inverted state.

[0022] The following describes a method for polishing the semiconductor device 3 from the back electrode 6 side and observing the semiconductor device 3, using Figures 2 to 4.

[0023] Figure 2 shows a method for polishing a semiconductor element 3 according to Embodiment 1.

[0024] First, the semiconductor device 100 is sealed with a curable embedding resin 5. Specifically, a curing agent is mixed with a liquid resin and cured. At this time, at least the submount 2 and the semiconductor element 3 of the semiconductor device 100 are sealed. This makes handling easier. Furthermore, the semiconductor element 3 can be protected during the polishing process described later.

[0025] Next, the embedded resin 5 is polished so that the side surface of the submount 2 is exposed from the embedded resin 5. The type of polishing may be, but is not limited to, abrasive polishing of SiC or metal, buff polishing, or mirror polishing using diamond abrasive grains. In Figure 2, line L1 indicates the position of the polished surface formed by the side polishing.

[0026] Next, a polishing process is performed to polish the embedded resin 5 and semiconductor element 3 from the top surface. Furthermore, a measurement process is performed in which the polished surface formed by the side polishing is observed with an SEM or the like, and the thickness t of the embedded resin 5 present on the upper surface of the submount 2 is measured on the polished surface. Furthermore, the polishing process and measurement process are repeated until the thickness t of the embedded resin 5 measured in the measurement process reaches a predetermined thickness T. Line L2 in Figure 2 is the position of the polished surface formed by repeating the polishing process and measurement process.

[0027] Figure 3 shows the semiconductor element 3 after the completion of the process described in Figure 2. By polishing the semiconductor element 3 until the thickness t of the embedded resin 5 on the upper surface of the submount 2 reaches a predetermined thickness T, the distance from the polished surface to the upper surface of the submount 2 can be controlled to remain constant for the semiconductor element 3 as well.

[0028] As described above, the semiconductor element 3 and the submount 2 contain surface electrodes 10, solder 11, and wiring 12, but these are thin, and the combined thickness a of the three layers (hereinafter referred to as electrode wiring thickness a) is at most about 5 μm. If the electrode wiring thickness a is considered to be sufficiently small, it may be ignored, but if the thickness of the semiconductor element 3 is to be strictly controlled, in the measurement process, the thickness obtained by subtracting the electrode wiring thickness a from the thickness t of the embedding resin 5 is taken as the thickness of the semiconductor element 3. By utilizing this relationship, it becomes possible to polish the semiconductor element 3 to leave a desired thickness.

[0029] Generally, it is considered difficult to directly measure and determine the thickness of a semiconductor element 3 embedded in an embedded resin 5 with an accuracy of several micrometers. In contrast, in this disclosure, the thickness of the semiconductor element 3 can be controlled by observing the embedded resin 5 on a submount 2 having a thickness equivalent to that of the polished semiconductor element 3 and performing polishing based on the thickness t of the embedded resin 5.

[0030] Here, the predetermined thickness T is determined according to the position of the object to be observed and the observation method. For example, if the observation method is EL observation, it is sufficient that the back surface electrode 6 can be removed by polishing, so the predetermined thickness T in this disclosure is about 70 μm to 80 μm.

[0031] On the other hand, when the object of observation is the active layer 4 and cross-sectional observation such as FIB-STEM is performed, it is necessary to process a hole that reaches from the polished surface indicated by line L2 to the active layer 4 using FIB. In this case, the thickness that allows for FIB processing without difficulty is the condition for the predetermined thickness T. Furthermore, it is essential that the thickness is such that the active layer 4 is not damaged by the top polishing process. From the above viewpoint, the predetermined thickness T in this disclosure is, for example, about 10 μm to 20 μm.

[0032] Thus, this embodiment provides a method for polishing a semiconductor element 3 that allows for thickness control.

[0033] Figure 4 shows a method for observing the electroluminescence (EL) of a semiconductor device 3 according to Embodiment 1. First, with the back electrode 6 of the semiconductor device 3 removed by the polishing process described above, a probe 13 with a positive electrode and ground is connected to the polished surface indicated by line L2. Furthermore, an electric field is applied using the probe 13. This makes it possible to generate light emission 14 from the active layer 4, and to perform EL observation.

[0034] Although EL observation is used as an example here, the observation method is not limited to EL observation. For example, cross-sectional observation using FIB-SEM (Focused Ion Beam-Scanning Electron Microscope) or FIB-STEM (Focused Ion Beam-Scanning Transmission Electron Microscope) may also be used, and multiple observation methods may be combined.

[0035] For example, after performing EL observation to identify the degradation location of the active layer 4, a polishing process and measurement process of the semiconductor device 3 may be further performed, followed by FIB-STEM observation of the degradation location. In this way, the present disclosure makes it possible to perform multiple observation methods by setting a predetermined thickness T according to each of the multiple observation methods and performing the polishing process each time. As a result, a more detailed analysis of the semiconductor device 3 becomes possible.

[0036] Furthermore, this embodiment provides a method for observing semiconductor elements 3 that can also be applied to semiconductor devices mounted on submount 2 by solder.

[0037] Here, in order to observe the active layer 4 of the semiconductor element 3 mounted on the submount 2, in addition to the method of polishing the semiconductor element 3 from the back surface 32 side as described in this disclosure, there is also a method of removing the semiconductor element 3 from the submount 2. However, removing the semiconductor element 3 mounted with solder 11 requires melting the solder 11 at a higher temperature than when it was mounted, which may degrade the semiconductor element 3 due to heating. Also, there is a risk of damaging the semiconductor element 3 when grasping it with tweezers. On the other hand, these risks can be avoided in this embodiment.

[0038] Embodiment 2 Figure 5 shows a method for polishing a semiconductor element 3 according to Embodiment 2 of the present disclosure. In this embodiment, first, a structure 200 having a predetermined thickness T is mounted on the upper surface of the submount 2 of the semiconductor device 100. The structure 200 is, for example, a metal foil or a glass plate, and is mounted on the submount 2 by soldering or the like. The mounting location of the structure 200 is the upper surface of the submount 2, and by exposing the upper surface of the structure 200 through the polishing process described later, it can be mounted anywhere on the semiconductor element 3 as long as the thickness can be controlled.

[0039] Furthermore, the structure 200 and the semiconductor device 100 are sealed with embedding resin 5. At this time, the structure 200 and at least the submount 2 and semiconductor element 3 of the semiconductor device 100 are sealed.

[0040] Furthermore, the embedded resin 5 and semiconductor element 3 are polished from the top surface until the top surface of the structure 200 is exposed. Line L1 in Figure 5 represents the position of the polished surface formed by the polishing process.

[0041] Figure 6 shows the semiconductor element 3 after the completion of the process described in Figure 5. By polishing the semiconductor element 3 until the upper surface of the structure 200 having a predetermined thickness T is exposed, the distance from the polished surface to the upper surface of the submount 2 can be controlled to remain constant for the semiconductor element 3 as well. Note that, as described in Embodiment 1, the thickness of the semiconductor element 3 is the predetermined thickness T minus the electrode wiring thickness a.

[0042] Furthermore, in this embodiment, by pre-positioning the structure 200, which serves as an indicator of thickness, on the upper surface of the submount 2, the side polishing process described in Embodiment 1 becomes unnecessary.

[0043] The method for observing the semiconductor element 3 is the same as in Embodiment 1, so a detailed explanation will be omitted. This is also true for all the embodiments described below.

[0044] <Variation 1> Furthermore, before carrying out the polishing process, a side polishing process may be performed to polish the embedded resin 5 so that the side surface of the structure 200 is exposed from the embedded resin 5. The polishing process is carried out while observing the polished surface formed in the side polishing process with an SEM or the like. By observing the structure 200 with an SEM or the like, it is possible to clearly confirm that the top surface of the structure 200 has been exposed, compared to observing the structure 200 visually from above, and the embedded resin 5 can be polished without excess or deficiency. In addition, by using a metal structure 200, the risk of peeling and charge-up of the object being observed can be reduced compared to the method of observing the embedded resin 5 as in Embodiment 1.

[0045] Embodiment 3 Figure 7 shows a method for polishing a semiconductor element 3 according to Embodiment 3 of the present disclosure. In this embodiment, first, a flat portion 300 having a predetermined thickness T is formed on the wire ball 8 of the semiconductor device 100 and bonded to the upper surface of the submount 2 via wiring 9. This step can be carried out in the manufacturing process of the semiconductor device 100. The flat portion 300 with the predetermined thickness T can be formed by the capillary method, but the method is not limited. The thickness T of the flat portion 300 of the wire ball 8 is 15 μm to 20 μm in accuracy.

[0046] Furthermore, the thickness of the wiring 9 is approximately 1 μm, which can be considered sufficiently small compared to the thickness T of the flat portion 300.

[0047] Furthermore, the semiconductor device 100 is sealed with embedding resin 5. At this time, at least the wire ball 8, submount 2, and semiconductor element 3 of the components of the semiconductor device 100 are sealed. Furthermore, the embedding resin 5 and semiconductor element 3 are polished from the top surface until the top surface of the flat portion 300 is exposed. Line L1 in Figure 7 indicates the position of the polished surface formed by the polishing process.

[0048] Figure 8 shows the semiconductor element 3 after the completion of the process described in Figure 7. By polishing the semiconductor element 3 until the upper surface of the flat portion 300 having a predetermined thickness T is exposed, the distance from the polished surface to the upper surface of the submount 2 can be controlled to remain constant for the semiconductor element 3, similar to Embodiment 2. Furthermore, since the flat portion 300 in this embodiment is formed during the manufacturing process of the semiconductor device 100, there is no need to separately form the structure 200 as in Embodiment 2.

[0049] <Variation 2> In addition, similar to Modification 1, a side polishing step may be performed before the polishing step to polish the embedded resin 5 so that the side surface of the flat portion 300 is exposed from the embedded resin 5. Furthermore, the polishing step is performed while observing the polished surface formed in the side polishing step with an SEM or the like. This makes it possible to obtain the same effect as in Modification 1. Line L2 in Figure 7 is the position of the polished surface formed in the side polishing step. Figure 9 shows the semiconductor element 3 after the side polishing step and after the polishing step is completed.

[0050] Embodiment 4 Figure 10 shows a method for polishing a semiconductor element 3 according to Embodiment 4 of the present disclosure. In this embodiment, first, the semiconductor device 100 is sealed with a curable embedding resin 5. At this time, at least the submount 2 and the semiconductor element 3 among the components of the semiconductor device 100 are sealed. Next, a polishing process is performed in which the embedding resin 5 and the semiconductor element 3 are polished from the top surface.

[0051] Furthermore, a hole 400 reaching the surface 31 is formed from the polished surface of the semiconductor element 3 formed in the polishing process using FIB or the like at an oblique angle. The angle of the FIB is, for example, 54°, but this value is just an example and is not limited to this. The cross-sectional shape of the hole 400 is triangular, and the vertical cross-section of the semiconductor element 3 is exposed on the side of the hole 400. Furthermore, a measurement process is performed in which the side of the formed hole 400 is observed with an SEM or the like and the depth d of the hole 400 is measured. The polishing process and measurement process are repeated until the depth d of the hole 400 measured in the measurement process reaches a predetermined depth D. Line L1 in Figure 10 is the polished surface formed by repeating the polishing process and measurement process.

[0052] If the thickness of the polished semiconductor element 3 is too large after the polishing process, and it is not possible to form a hole 400 that reaches the surface 31 from the polished surface of the semiconductor element 3, the polishing process can be repeated.

[0053] Figure 11 shows the semiconductor element 3 after the completion of the process described in Figure 10. The depth d of the hole 400 measured in the measurement process corresponds to the thickness of the semiconductor element 3. Therefore, the thickness of the semiconductor element 3 can be controlled by polishing the semiconductor element 3 until the depth d of the hole 400 becomes a predetermined depth D.

[0054] <Variations> This disclosure is not limited to the embodiments described above, and various modifications are possible during implementation without departing from its essence. Furthermore, each embodiment may be combined as appropriate, and the combined effects can be obtained.

[0055] The various aspects of this disclosure are summarized below as an appendix. (Note 1) A method for polishing semiconductor elements mounted on a support by solder, A step of encapsulating the support and the semiconductor element with embedding resin, A step of polishing the embedded resin so that the side surface of the support is exposed from the embedded resin, A polishing step of polishing the embedded resin and the semiconductor element from the top surface, A measurement step of observing the polished side surface of the embedded resin and measuring the thickness of the embedded resin present on the upper surface of the support, Includes, A method for polishing a semiconductor element, comprising repeating the polishing step and the measurement step until the thickness of the embedded resin reaches a predetermined thickness. (Note 2) A method for polishing semiconductor elements mounted on a support by solder, A step of mounting a structure having a predetermined thickness onto the upper surface of the support, A step of sealing the structure, the support, and the semiconductor element with an embedding resin, A step of polishing the embedded resin and the semiconductor element from the top surface until the top surface of the structure is exposed, A method for polishing semiconductor devices, including [the specified component]. (Note 3) A step of polishing the embedded resin so that the side surface of the structure is exposed from the embedded resin, An observation step of observing the exposed side surface of the structure, It further includes, The method for polishing a semiconductor element as described in Appendix 2, wherein the exposure of the upper surface of the structure is confirmed by the observation step. (Note 4) A method for polishing semiconductor elements mounted on a support by solder, A step of encapsulating the support and the semiconductor element with embedding resin, A polishing step of polishing the embedded resin and the semiconductor element from the top surface, A step of forming a hole from the polished surface of the semiconductor element that reaches the solder joint surface of the semiconductor element, A measurement step for measuring the depth of the hole, Includes, A method for polishing a semiconductor device, comprising repeating the polishing step and the measuring step until the depth of the hole reaches a predetermined depth. (Note 5) The method for polishing a semiconductor element according to Appendix 2 or 3, wherein the structure is a flat portion of a wire ball joined to the upper surface of the support. (Note 6) A method for observing the aforementioned semiconductor device, A step of performing a semiconductor device polishing method described in any of Appendix 1 to 5, A step of observing the active layer of the semiconductor device, Includes, A method for observing a semiconductor device, wherein the predetermined thickness or depth is determined by the type of method for observing the active layer. [Explanation of symbols]

[0056] 1 Block, 2 Submount, 3 Semiconductor element, 4 Active layer, 5 Embedding resin, 6 Back electrode, 7 Wire, 8 Wire ball, 9 Wiring, 10 Front electrode, 11 Solder, 12 Wiring, 13 Probe, 14 Light emission, 31 Front surface, 32 Back surface, 200 Structure, 100 Semiconductor device, 300 Flat section, 400 Hole

Claims

1. A method for polishing semiconductor elements mounted on a support by solder, A step of encapsulating the support and the semiconductor element with embedding resin, A step of polishing the embedded resin so that the side surface of the support is exposed from the embedded resin, A polishing step of polishing the embedded resin and the semiconductor element from the top surface, A measurement step of observing the polished side surface of the embedded resin and measuring the thickness of the embedded resin present on the upper surface of the support, Includes, A method for polishing a semiconductor element, comprising repeating the polishing step and the measurement step until the thickness of the embedded resin reaches a predetermined thickness.

2. A method for polishing a semiconductor element mounted on the upper surface of a support by solder, A step of mounting a structure having a predetermined thickness smaller than the combined thickness of the semiconductor element and the solder onto the upper surface of the support, A step of sealing the structure, the support, and the semiconductor element with an embedding resin, A step of polishing the embedded resin and the semiconductor element from the top surface until the top surface of the structure is exposed, A method for polishing semiconductor devices, including [the specified element].

3. A method for polishing a semiconductor element mounted on a support by solder, A step of mounting a structure having a predetermined thickness onto the upper surface of the support, A step of sealing the structure, the support, and the semiconductor element with an embedding resin, A step of polishing the embedded resin and the semiconductor element from the top surface until the top surface of the structure is exposed, A step of polishing the embedded resin so that the side surface of the structure is exposed from the embedded resin, An observation step of observing the exposed side surface of the structure, Includes, The method for polishing a semiconductor element is such that the upper surface of the aforementioned structure is exposed, as confirmed by the observation step.

4. A method for polishing semiconductor elements mounted on a support by solder, A step of encapsulating the support and the semiconductor element with embedding resin, A polishing step of polishing the embedded resin and the semiconductor element from the top surface, A step of forming a hole from the polished surface of the semiconductor element that reaches the solder joint surface of the semiconductor element, A measurement step for measuring the depth of the hole, Includes, A method for polishing a semiconductor device, comprising repeating the polishing step and the measuring step until the depth of the hole reaches a predetermined depth.

5. The method for polishing a semiconductor element according to claim 2 or 3, wherein the structure is a flat portion of a wire ball joined to the upper surface of the support.

6. A method for observing the aforementioned semiconductor device, A step of carrying out the method for polishing a semiconductor device according to any one of claims 1 to 4, A step of observing the active layer of the semiconductor device, Includes, A method for observing a semiconductor device, wherein the predetermined thickness or depth is determined by the type of method for observing the active layer.

Images