Manufacturing methods for electronic components

Abstract

This electronic component comprises: an electronic component element; and a first external electrode. The electronic component element is provided with a plurality of internal electrodes. The first external electrode includes no glass component and is composed of a metal film having pores inside. The electronic component element has a second end surface and a first end surface at which the internal electrodes are exposed. The first external electrode is formed at least on the exposed portions of the internal electrodes and on the first and second end surfaces. The pore area rate on a cross section of the metal film is not less than 3% but less than 25%.

Description

Technical Field

[0001] This invention relates to an electronic component having an external electrode on an end face of a body incorporating a laminate in which a plurality of elements are laminated.

Background Art

[0002] Patent Document 1 describes an electrolytic capacitor. A first electrode layer is formed on an end face of a capacitor element. Further, a second electrode layer is formed so as to abut on the first electrode layer. The first electrode layer is made of, for example, copper (Cu metal powder) and is formed using an AD (Aerosol Deposition) method. The second electrode layer is a conductive resin.

[0003] Patent Document 2 describes a multilayer ceramic capacitor. The external electrode of the multilayer ceramic capacitor is formed by applying a conductive paste to an end face of a dielectric ceramic and further firing it. The main component of the conductive paste is copper (Cu metal powder), and it further contains glass frit.

[0004] Patent Document 3 describes a PML (Polymer Multilayer) capacitor. The capacitor element of the chip capacitor is formed by alternately laminating resin thin film layers serving as dielectric layers and internal electrode layers. The electrode provided on the end face of the capacitor element contains a metal-containing portion formed by sputtering.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

[0006] However, in the configuration described in Patent Document 1, a second electrode layer is formed on top of the first electrode layer formed using the AD method. In other words, multiple steps are required to form the external electrode. Therefore, the number of steps required to form the external electrode may increase.

[0007] Furthermore, in the configuration described in Patent Document 2, the dielectric ceramic and the glass contained in the conductive paste react. That is, a reaction layer is formed. The formation of this reaction layer may reduce the strength of the dielectric ceramic laminate.

[0008] Furthermore, in the configuration described in Patent Document 3, the external electrodes are formed by plating or sputtering. That is, the external electrodes have high density and it is difficult for voids to be created. Therefore, if thermal shock is applied to the external electrodes, there is a risk that the external electrodes will detach from the capacitor element due to the difference in thermal expansion.

[0009] Therefore, the objective of the present invention is to simplify the process and realize highly reliable electronic components. [Means for solving the problem]

[0010] The electronic component of this invention comprises an electronic component body and a first external electrode. The electronic component body comprises a plurality of internal electrodes. The first external electrode is made of a metal film that does not contain a glass component and has pores inside. The electronic component body has a first end face and a second end face in which the internal electrodes are exposed. The first external electrode is formed at least on the exposed portion of the internal electrodes, as well as on the first and second end faces. The pore area ratio in the cross-section of the metal film is 3% or more and less than 25%.

[0011] In this configuration, an external electrode made of a glass-free electrode film is formed on the end face of the electronic component body. Since this electrode film does not contain glass, a reaction layer is not formed. In other words, the strength of the element stack does not decrease. Furthermore, because the electrode film has pores inside, even when thermal shock is applied, delamination due to the thermal expansion coefficient between the element stack and the external electrode is suppressed.

[0012] The method for manufacturing an electronic component of this invention comprises the steps of forming an electronic component body having a plurality of internal electrodes, and forming a first external electrode made of a metal film that does not contain glass components and has pores inside, on at least the exposed portion of the internal electrodes in the electronic component body, and on the first and second end faces of the electronic component body, by the AD (Aerosol Deposition) method. The pore area ratio in the cross-section of the metal film is 3% or more and less than 25%.

[0013] In this method, a glass-free electrode film is formed on the end face of the electronic component substrate using the AD method. This electrode film is an external electrode. Because the electrode film does not contain glass, no reaction layer is formed. That is, the strength of the laminate is not reduced. Furthermore, because the electrode film has pores inside, delamination due to the thermal expansion coefficient between the electronic component substrate and the electrode film is suppressed even when subjected to thermal shock. In addition, since the external electrode can be formed using only the AD method, the process can be simplified. [Effects of the Invention]

[0014] This invention simplifies the manufacturing process and enables the creation of highly reliable electronic components. [Brief explanation of the drawing]

[0015] [Figure 1] Figure 1 is an external perspective view of a multilayer ceramic capacitor according to the first embodiment of the present invention. [Figure 2] Figure 2 is a side cross-sectional view showing the configuration of a multilayer ceramic capacitor according to the first embodiment of the present invention. [Figure 3]FIG. 3 is an enlarged plan view of an end face where an internal electrode is exposed in an electronic component body of a multilayer ceramic capacitor. [Figure 4] FIG. 4(A) is a cross-sectional view of an electrode layer according to the first embodiment of the present invention, and FIG. 4(B) is a cross-sectional view of an electrode layer in a conventional configuration. [Figure 5] FIG. 5 is a flowchart showing an example of a schematic flow of a method for manufacturing a multilayer ceramic capacitor according to the first embodiment of the present invention. [Figure 6] FIG. 6 is a diagram showing the configuration of an apparatus for forming an electrode layer by the AD method. [Figure 7] FIG. 7 is a table showing the relationship between the pore area ratio, mechanical strength, and sealing property. [Figure 8] FIG. 8 is a side cross-sectional view showing the configuration of a multilayer ceramic capacitor according to the second embodiment of the present invention.

MODE FOR CARRYING OUT THE INVENTION

[0016] [First Embodiment] The electronic component and the method for manufacturing the electronic component according to the first embodiment of the present invention will be described with reference to the drawings. In each embodiment of the present invention, a multilayer ceramic capacitor is described as an example of the electronic component. However, the configuration of the present embodiment can be applied to a chip-shaped capacitor having an external electrode on an end face of an electronic component body. For example, a chip-shaped capacitor has an electronic component body formed by laminating dielectric sheets. A chip-shaped capacitor has a capacitor functional portion formed inside the electronic component body. A chip-shaped capacitor has an electrode of the capacitor functional portion exposed from an end face of the electronic component body, and includes an external electrode formed on this exposed surface.

[0017] (Description of the Configuration of Multilayer Ceramic Capacitor 10) FIG. 1 is an external perspective view of a multilayer ceramic capacitor according to a first embodiment of the present invention. FIG. 2 is a side cross-sectional view showing the configuration of the multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 3 is an enlarged plan view of an end face where internal electrodes in an electronic component element body of the multilayer ceramic capacitor are exposed. FIG. 4(A) is a cross-sectional view of an electrode layer according to the first embodiment of the present invention, and FIG. 4(B) is a cross-sectional view of an electrode layer in a conventional configuration. In FIGS. 2 and 3, for easy understanding of the configuration, the dimensions in each direction are emphasized as appropriate, and in particular, the dimension in the height direction (the z-axis direction in the figure) is emphasized.

[0018] As shown in FIGS. 1 and 2, the multilayer ceramic capacitor 10 includes a body 11, an electrode layer 61, and an electrode layer 62.

[0019] The body 11 has a rectangular parallelepiped shape and has a top surface, a bottom surface, end faces 111, 112, and two side faces. The body 11 corresponds to the "electronic component body" of the present invention. The end face 111 corresponds to the "first end face" of the present invention, and the end face 112 corresponds to the "second end face" of the present invention. Note that the top surface and the bottom surface are used for convenience of explanation, and when the multilayer ceramic capacitor 10 is mounted on a circuit board, either surface may face the circuit board side.

[0020] The body 11 includes a plurality of internal electrodes 20, 30 and a multilayer ceramic layer 50. The multilayer ceramic layer 50 is formed by laminating dielectric sheets.

[0021] The internal electrode 30 has a flat film shape and has a first end face, a second end face, a flat film surface on the top surface side, and a flat film surface on the bottom surface side. The internal electrodes 20, 30 are made of, for example, nickel (Ni).

[0022] More specifically, the body 11 is formed as follows. First, a conductive paste for internal electrodes is printed in a predetermined pattern on a dielectric sheet using screen printing or the like. By this, internal electrode patterns (internal electrodes 20, 30) are formed.

[0023] A base body 11 is formed by alternately stacking dielectric sheets with internal electrodes 20 formed on them (hereinafter referred to as the first sheet) and dielectric sheets with internal electrodes 30 formed on them (hereinafter referred to as the second sheet). As shown in Figure 2, the internal electrodes 20 are exposed on the end face 111, and the internal electrodes 30 are exposed on the end face 112. Dielectric sheets without internal electrode patterns are stacked so as to be located on the top and bottom surfaces of the base body 11.

[0024] Next, the base body 11 is fired. Furthermore, an electrode layer 61 is formed on the end face 111 of the base body 11 as an external electrode, and an electrode layer 62 is formed on the end face 112 of the base body 11 as an external electrode, thereby realizing a multilayer ceramic capacitor. Electrode layers 61 and 62 correspond to the "first external electrode" in this invention. The configuration of electrode layers 61 and 62 will be described later.

[0025] In this configuration, the internal electrode 20 and the internal electrode 30 face each other with a dielectric sheet in between, and function as a capacitor with a predetermined capacitance.

[0026] The first and second sheets are flat membranes. Multiple first sheets and multiple second sheets are arranged such that their respective flat membrane surfaces are approximately parallel to the top and bottom surfaces of the base body 11. As described above, multiple first sheets and multiple second sheets are arranged alternately in a direction perpendicular to the top and bottom surfaces (the height direction of the base body 11 (the z-axis direction in the figure)). Note that in Figure 2, the number of multiple first sheets is 3 and the number of multiple second sheets is 4, but this is not the only way to do so.

[0027] In this stacked state, the end faces 211 (see Figure 2) of the internal electrodes 20 of the multiple first sheets are in approximately the same position when viewed from the side. The end faces 311 of the internal electrodes 30 of the multiple second sheets are in approximately the same position when viewed from the side. Furthermore, the end faces 211 of the internal electrodes 20 of the multiple first sheets protrude more than the end faces 312 of the internal electrodes 30 of the multiple second sheets. Also, the end faces 311 of the internal electrodes 30 of the multiple second sheets protrude more than the end faces 212 of the internal electrodes 20 of the multiple first sheets.

[0028] As a result, the end faces 211 of the internal electrodes 20 of the multiple first sheets are exposed to the outside of the base body 11 from the end face 111 of the base body 11. In addition, the internal electrodes 30 of the multiple second sheets are exposed to the outside of the base body 11 from the end face 112 of the base body 11.

[0029] The electrode layers 61 and 62 are composed of a group of particles made of metallic material, from the viewpoint of conductivity and formation method, which will be described later. Preferably, the electrode layers 61 and 62 contain at least one of copper, nickel, tin, and zinc. The electrode layers 61 and 62 do not contain glass components such as glass frit. Note that the statement "does not contain glass frit, etc." does not include configurations in which glass components are inevitably mixed in during the manufacturing process.

[0030] As shown in Figure 3, the electrode layer 61 is formed on the end face 111 of the base body 11. More specifically, the electrode layer 61 is formed on the end faces 211 of the multiple internal electrodes 20. Furthermore, the electrode layer 61 is formed across the entire surface of the end face 111 of the base body 11. The electrode layer 61 is formed from the end face 111 of the base body 11 to a predetermined thickness (height). The thickness of the electrode layer 61 is preferably 3 μm to 25 μm. That is, the electrode layer 61 functions as an external electrode of the multilayer ceramic capacitor 10.

[0031] The electrode layer 62 is formed on the end face 112 of the base body 11. More specifically, the electrode layer 62 is formed on the end faces 311 of the multiple internal electrodes 30. Furthermore, the electrode layer 62 is formed across the entire surface of the end face 112 of the base body 11. The electrode layer 62 is formed from the end face 112 of the base body 11 to a predetermined thickness (height). The thickness of the electrode layer 62 is preferably 3 μm to 25 μm. That is, the electrode layer 62 functions as an external electrode of the multilayer ceramic capacitor 10, similar to the electrode layer 61.

[0032] The multilayer ceramic capacitor 10 is realized with the above configuration.

[0033] (Detailed configuration of electrode layers 61 and 62) As shown in Figure 3, the electrode layers 61 and 62 are metal films having pores (voids) 60P. These pores 60P are formed in the electrode layers 61 and 62 at a predetermined ratio (hereinafter referred to as the pore area ratio).

[0034] More specifically, electrode layer 61 is formed on the surface of the end face 111 of the base body 11 with a predetermined pore area (void) ratio. Similarly, electrode layer 62 is formed on the surface of the end face 112 of the base body 11 with a predetermined pore area (void) ratio. Here, the pore area ratio is expressed as the ratio (percentage) of the area containing pores 60P in a cross section parallel to the end face 111 of the base body 11 in electrode layer 61 (YZ plane in Figure 1), when the area of ​​this cross section is set to 100. The method for calculating this pore area ratio is the same for electrode layer 62.

[0035] The pore area ratio is determined by exposing the end face 111 of the substrate 11 on which the electrode layer 61 is formed in the multilayer ceramic capacitor 10 shown in Figure 3, and then observing it with an optical microscope. More specifically, the pore area ratio can be determined by analyzing the image shown in Figure 4(A). The area of ​​the electrode layer 61 is calculated by binarizing the obtained image and distinguishing between the two. As described above, the pore area ratio is calculated as the ratio of the area of ​​the pore 60P to the sum of the area of ​​the electrode layer 61 and the area of ​​the pore (void) 60P where the electrode layer 61 is not formed. The pore area ratio for the electrode layer 62 is calculated in the same way.

[0036] On the other hand, the configuration shown in Figure 4(B) represents a conventional electrode layer. Compared to Figure 4(A), the electrode layer in Figure 4(B) does not have pores (gaps). More specifically, in the structure of Figure 4(A), which is the configuration of the present invention, pores 60P are formed according to a predetermined ratio (pore area ratio), so the internal electrode 20 or internal electrode 30 is exposed. On the other hand, in Figure 4(B), which is the conventional configuration, there are no pores 60P, so the internal electrode is not exposed.

[0037] In other words, comparing Figure 4(A), which represents the configuration of the present invention, with Figure 4(B), which represents the conventional configuration, the configuration of the present invention, by having pore 60P, has its internal stresses relieved. That is, the generation of stress due to differences in thermal expansion coefficients caused by heat shock, etc., between the electrode layers 61, 62 and the base body 11 is suppressed. Therefore, delamination between the base body 11 and the electrode layers 61, 62 is suppressed.

[0038] The specific methods and shapes of the electrode layers 61 and 62 will be described later.

[0039] (Method of manufacturing a multilayer ceramic capacitor 10) The multilayer ceramic capacitor 10 having the above-described configuration is manufactured, for example, as follows. Figure 5 is a flowchart showing an example of a schematic flow of the manufacturing method of the multilayer ceramic capacitor according to this embodiment. Figure 6 is a diagram of an apparatus for forming electrode layers 61 and 62 by the AD method.

[0040] A base body 11 is formed (S11). Specifically, a first sheet with internal electrodes 20 formed on it and a dielectric sheet with internal electrodes 30 formed on it are alternately stacked, and dielectric sheets without internal electrode patterns are stacked on the top and bottom surfaces of the stack. This forms a base body 11. This process is carried out in a multi-substrate state in which multiple base bodies 11 can be formed at once. By separating this multi-substrate into individual base bodies 11, as shown in Figure 2, the internal electrodes 20 are exposed on the end face 111 and the internal electrodes 30 are exposed on the end face 112. This base body 11 is then fired.

[0041] Next, electrode layers 61 are formed on the end faces 211 of the internal electrodes 20 of the multiple first sheets and on the end faces 111 of the base body 11. The electrode layers 61 are formed using the AD method (S12). The electrode layers 61 function as external electrodes of the multilayer ceramic capacitor 10.

[0042] More specifically, as shown in Figure 6, multiple substrates 11 are fixed on a stage 92 and placed inside a chamber 91. At least the tip (discharge end) of an aerosol generator 93 is inserted into the chamber 91. The aerosol generator 93 generates an aerosol by introducing copper powder (Cu powder) 600 into the transport gas and blows it onto the end faces 111 of the substrates 11.

[0043] In this process, by appropriately setting the specifications of the aerosol (for example, the volume ratio of copper powder 600 contained in the conveying gas) and the spraying conditions (for example, the number of sprays, the spraying intensity, etc.), the copper powder 600 is slammed against the end face 111 of the base body 11 and piled up to a predetermined height (predetermined thickness).

[0044] As a result, the electrode layer 61 is formed on the end face 111 of the base body 11 and the end face 211 of the internal electrode 20 of the first sheet (see Figures 2 and 3). This end face 211 corresponds to the "exposed portion" of the present invention. In this case, the particle size of the copper powder 600 is, for example, about 3 μm, but may be 2 μm or less.

[0045] Furthermore, by using the AD method, pores 60P are formed when the electrode layer 61 is created. The pore area ratio when forming pores 60P varies depending on the spraying conditions using the AD method. The pore area ratio is determined according to the deposition rate and deposition time, etc.

[0046] Next, electrode layers 62 are formed on the end faces 112 of the base body 11 and on the end faces 311 of the internal electrodes 30 of the multiple second sheets using the AD method (S13). The electrode layers 62 function as external electrodes of the multilayer ceramic capacitor 10. The method for forming the electrode layers 62 is the same as the method for forming the electrode layers 61, so a detailed explanation is omitted.

[0047] By using the manufacturing method described above, a multilayer ceramic capacitor 10 having the above-described configuration can be manufactured easily and more reliably.

[0048] The external electrodes of the multilayer ceramic capacitor 10 are realized by forming electrode layers 61 and 62 using the AD method. In other words, some steps in forming the external electrodes can be omitted, and the external electrodes can be formed by a simple method.

[0049] Furthermore, the electrode layers 61 and 62 do not contain glass components. That is, no reaction layer is formed between the multilayer ceramic layer 50 and the electrode layers 61 and 62. Therefore, a decrease in the strength of the multilayer ceramic capacitor 10 can be suppressed.

[0050] (Relationship between the pore area ratios of electrode layers 61 and 62) Figure 7 will be used to explain the detailed relationship of the pore area ratio in electrode layers 61 and 62. Figure 7 is a table showing the relationship between the pore area ratio, mechanical strength, and sealing performance. The values ​​shown in Figure 7 show the relationship when electrode layers 61 and 62 are formed with a thickness of approximately 10 μm as an example.

[0051] The mechanical strength and sealing performance shown in Figure 7 are defined as follows: Mechanical strength is an evaluation of the physical and mechanical strength in heat cycle tests and heat shock tests. Sealing performance is an evaluation of the degree to which foreign matter is prevented from entering the interior of the multilayer ceramic capacitor 10's base body 11. Furthermore, the pore area ratio is determined by, for example, the film deposition rate and film deposition time.

[0052] As shown in Figure 7, if the capacitor does not contain glass and has a pore area ratio of 3% or more and less than 25%, the desired reliability can be reliably obtained in actual use. More specifically, by having a configuration that does not contain glass and has a pore area ratio of 3% or more and less than 25%, it is possible to realize a multilayer ceramic capacitor 10 that suppresses a decrease in mechanical strength and has high sealing performance.

[0053] [Second Embodiment] A multilayer ceramic capacitor according to a second embodiment of the present invention will be described with reference to the figures. The multilayer ceramic capacitor according to the second embodiment differs from the multilayer ceramic capacitor 10 according to the first embodiment in that it is equipped with external electrodes 81 and 82. Other components of the ceramic capacitor according to the second embodiment are the same as those of the multilayer ceramic capacitor according to the first embodiment, and the description of the similar parts will be omitted.

[0054] As shown in Figure 8, the multilayer ceramic capacitor 10A includes external electrodes 81 and 82. External electrode 81 has a laminated structure of electrode film 811 and electrode film 812. Electrode film 811 covers the outer surface of electrode layer 61, and electrode film 812 covers the outer surface of electrode film 811. External electrode 82 has a laminated structure of electrode film 821 and electrode film 822. Electrode film 821 covers the outer surface of electrode layer 62, and electrode film 822 covers the outer surface of electrode film 821. External electrodes 81 and 82 correspond to the "second external electrode" in this invention.

[0055] More specifically, the external electrode 81 consists of an electrode film 811 and an electrode film 812, and is formed by plating. For example, electrode film 811 is a nickel (Ni) plated layer, and electrode film 812 is a tin (Sn) plated layer. The external electrode 82 is also formed by plating in the same way as the external electrode 81, for example, electrode film 821 is a nickel (Ni) plated layer, and electrode film 822 is a tin (Sn) plated layer. It is preferable that the thickness of the terminal electrode consisting of electrode layer 61 and external electrode 81, and the thickness of the terminal electrode consisting of electrode layer 62 and external electrode 82, be 8 μm or more and less than 20 μm.

[0056] The electrode layers 61 and 62 of the multilayer ceramic capacitor 10A have a pore of 60P, which relieves internal stress. In other words, the difference in thermal expansion coefficient between the electrode layers 61 and 62 and the base body 11 due to heat shock, etc., is suppressed. Therefore, delamination between the base body 11 and the electrode layers 61 and 62 is suppressed.

[0057] Furthermore, the electrode layers 61 and 62 do not contain glass components. That is, no reaction layer is formed between the multilayer ceramic layer 50 and the electrode layers 61 and 62. Therefore, a decrease in the strength of the multilayer ceramic capacitor 10A can be suppressed.

[0058] Furthermore, the multilayer ceramic capacitor 10A is equipped with external electrodes 81 and 82. This further improves the sealing performance of the multilayer ceramic capacitor 10A. [Explanation of symbols]

[0059] 10,10A…Multilayer ceramic capacitor 11... Base body 20,30…Internal electrode 50…Laminated ceramic layer 60P... Poison 61,62...electrode layer 81,82...External electrode 91... Chamber 92… Stage 93... Aerosol generator 111,112,211,212,311,312...end face 600...Copper powder 811,812,821,822…electrode film

Claims

1. A process for forming an electronic component body having multiple internal electrodes, A step of forming a first external electrode, which is made of a metal film that does not contain glass components and has pores inside, on at least the exposed portion of the internal electrode in the electronic component body, and on the first and second end faces of the electronic component body, by the AD (Aerosol Deposition) method, Equipped with, The pore area ratio in the cross-section of the metal film is 3% or more and less than 25%. Manufacturing methods for electronic components.

2. The thickness of the metal film is 3 μm or more and 25 μm or less. A method for manufacturing an electronic component according to claim 1.

3. The system includes a second external electrode that covers the first external electrode, The method for manufacturing an electronic component according to claim 1, wherein the second external electrode is formed by plating.

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