Light sensor

Abstract

To integrate light-emitting and light-receiving elements, together with other elements or circuits, into a single package, while reducing crosstalk.SOLUTION: An optical sensor 10 includes: a first and second conductive layers 60, 70 which are provided to a principal surface 52 and a reverse side 54 of a substrate 50; and a conductive via layer 80 which is provided between both conductive layers 60, 70. An integrated circuit 30 that includes a light-emitting element 20 and a light-receiving element 40 is mounted to the first conductive layer 60. The optical sensor 10 further includes a light-transmissive coating member 90 for covering the light-emitting element 20 and the integrated circuit 30 together with the first conductive layer 60. The coating member 90 includes a groove 92 between the light-emitting element 20 and the integrated circuit 30 in a plan view. The first conductive layer 60 includes a first mounting part 62 where the light-emitting element 20 is mounted and a second mounting part 64 where the integrated circuit 30 is mounted. The light-emitting element 20 is electrically connected to the integrated circuit 30 via the first mounting part 62, the conductive via layer 80, the second conductive layer 70 and the second mounting part 64.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to an optical sensor.

Background Art

[0002] One type of optical sensor for detecting the presence or absence of an object without contact (so-called proximity sensor) is a reflective photosensor. The reflective photosensor detects the presence of an object by reflecting the light emitted from a light-emitting element with the object to be detected and detecting the reflected light with a light-receiving element. In such an optical sensor, optical crosstalk (hereinafter simply referred to as crosstalk) caused by diffused light from the light-emitting element is a factor that reduces the detection accuracy of the object by the light-receiving element. Patent Document 1 discloses a proximity sensor having a package structure for reducing crosstalk as an example of an optical sensor.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In recent years, miniaturization and high functionality of optical sensors have been progressing, and while reducing crosstalk, it has been required to integrate various other elements or circuits together with a light-emitting element and a light-receiving element in a single package.

Means for Solving the Problems

[0005] A light sensor according to one aspect of the present disclosure includes a substrate, a first conductive layer provided on the main surface of the substrate, a second conductive layer provided on the back surface of the substrate, a conductive via layer provided between the first conductive layer and the second conductive layer, a light-emitting element mounted on the first conductive layer, an integrated circuit mounted on the first conductive layer and including a light-receiving element, and a light-transmitting covering member provided on the substrate, covering the light-emitting element and the integrated circuit together with the first conductive layer, and including a groove between the light-emitting element and the integrated circuit in a plan view of the substrate. The first conductive layer includes a first mounting portion on which the light-emitting element is mounted and a second mounting portion on which the integrated circuit is mounted. The light-emitting element is electrically connected to the integrated circuit via the first mounting portion, the conductive via layer, the second conductive layer, and the second mounting portion. [Effects of the Invention]

[0006] One embodiment of the optical sensor can achieve miniaturization and high functionality while reducing crosstalk. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a schematic cross-sectional view of an exemplary optical sensor according to one embodiment (a cross-sectional view along the line F1-F1 in Figure 2). [Figure 2] Figure 2 is a schematic plan view of the optical sensor shown in Figure 1, illustrating the structure of the main surface side of the substrate. [Figure 3] Figure 3 is a schematic plan view (perspective view) of the optical sensor shown in Figure 1, illustrating the structure on the back side of the substrate. [Figure 4] Figure 4 is a schematic block diagram of the optical sensor system equipped with the optical sensor shown in Figure 1. [Figure 5] Figure 5 is a schematic circuit diagram showing the light-emitting element and the light-emitting element driving circuit. [Figure 6] Figure 6 is a schematic block diagram of another example of an optical sensor system including a boost circuit. [Modes for carrying out the invention]

[0008] Hereinafter, embodiments of the semiconductor light-emitting apparatus in this disclosure will be described with reference to the attached drawings. For the sake of simplicity and clarity, the components shown in the drawings are not necessarily depicted to a consistent scale. Furthermore, hatching may be omitted in cross-sectional views for ease of understanding. The accompanying drawings are merely illustrative of embodiments of this disclosure and should not be considered limiting.

[0009] The following detailed description includes apparatus, systems, and methods that embody exemplary embodiments of the present disclosure. This detailed description is for illustrative purposes only and is not intended to limit the embodiments of the present disclosure or the application and use of such embodiments.

[0010] [Simultaneous structure of an optical sensor] Figure 1 is a schematic cross-sectional view of an exemplary optical sensor 10 according to one embodiment. The optical sensor 10 comprises a light-emitting element 20 and an integrated circuit 30, the integrated circuit 30 including one or more (e.g., two) light-receiving elements 40. The optical sensor 10 is embodied, for example, as a reflective photosensor. A reflective photosensor is also called a photoreflector. The integrated circuit 30 including the light-receiving elements 40 is also called an optical integrated circuit (photo IC). The light-emitting element 20 can be a semiconductor laser element such as a vertical cavity surface-emitting laser (VCSEL). The light-receiving element 40 can be a photodiode (PD), for example.

[0011] As shown in Figure 1, the optical sensor 10 comprises a substrate 50, a plurality of conductive layers 60 and 70 (for example, two layers in Figure 1), and a conductive via layer 80 provided between the conductive layers 60 and 70. The conductive layers 60 and 70 are provided at different layer positions. In the example in Figure 1, conductive layer 60 corresponds to the first conductive layer, and conductive layer 70 corresponds to the second conductive layer. Hereafter, in order to distinguish the terminology and make the explanation easier to understand, conductive layers 60 and 70 may be referred to as the first conductive layer 60 and the second conductive layer 70, respectively.

[0012] The substrate 50 is formed of an insulating material such as a resin substrate or a ceramic substrate. An example of a resin substrate is glass epoxy resin. An example of a ceramic substrate is aluminum nitride (AlN) or alumina (Al2O3). Alternatively, the substrate 50 may be formed of other insulating materials such as a silicon substrate or a glass substrate. The substrate 50 includes a main surface 52 and an opposite back surface 54.

[0013] In this disclosure, the term "plan view" refers to viewing the optical sensor 10 (or other component) in the Z-axis direction of the mutually orthogonal XYZ axes (see, for example, Figure 1). The Z-axis corresponds to the direction perpendicular to the main surface 52 (and back surface 54) of the substrate 50. For the sake of clarity, in the following, the +Z direction is defined as up, the -Z direction as down, the +X direction as right, and the -X direction as left. Unless explicitly stated otherwise, "plan view" refers to viewing the optical sensor 10 from above in the Z-axis direction.

[0014] The conductive layers 60, 70 and the conductive via layer 80 are formed from a metallic material such as copper (Cu) or aluminum (Al). However, other metallic materials besides Cu and Al may be used. In the example shown in Figure 1, the first conductive layer 60 is provided on the main surface 52 of the substrate 50, and the second conductive layer 70 is provided on the back surface 54 of the substrate 50. The light-emitting element 20 and the integrated circuit 30 (photodetector 40) are mounted on the first conductive layer 60.

[0015] The conductive via layer 80 includes a plurality of via conductors 82 that electrically connect the first conductive layer 60 and the second conductive layer 70. In the example of FIG. 1, the via conductors 82 are provided inside the substrate 50 and penetrate the substrate 50 from the main surface 52 to the back surface 54. The via conductors 82 are so-called thermal vias and function not only as a conductive path between the first conductive layer 60 and the second conductive layer 70 but also as a heat dissipation path from the first conductive layer 60 to the second conductive layer 70. Note that the via conductors 82 are cylindrical hollow conductors in the example of FIG. 1, but may be non-hollow cylindrical conductors. Alternatively, another material with higher thermal conductivity may be filled inside each via conductor 82. In one implementation example, the conductive via layer 80 includes, as a plurality of via conductors 82, for example, nine via conductors 821, 822, 823, 824, 825, 826, 827, 828, 829 (see FIG. 2).

[0016] The optical sensor 10 further includes a light-transmissive covering member 90 provided on the substrate 50 and covering the light-emitting element 20 and the integrated circuit 30 together with the first conductive layer 60. The covering member 90 is formed of a transparent resin material such as, for example, a silicone resin. Note that the type of the resin material is not particularly limited as long as the covering member 90 has light transmissivity. In addition to the function of protecting the light-emitting element 20 and the integrated circuit 30, the covering member 90 also has a function of increasing the light extraction efficiency from the light-emitting surface 90T (the upper surface of the covering member 90 in FIG. 1) of the optical sensor 10 by diffusing the light emitted from the light-emitting element 20 inside the covering member 90.

[0017] [Configuration Example of Substrate and Conductive Layer] FIG. 2 is a schematic plan view of the optical sensor 10 showing an example of the structure arranged on the main surface 52 of the substrate 50. FIG. 3 is a schematic plan view (perspective view) of the optical sensor 10 showing an example of the structure arranged on the back surface 54 of the substrate 50. Note that FIG. 1 described above is a cross-sectional view taken along the line F1-F1 of FIG. 2. In FIG. 2, the covering member 90 is shown by a two-dot chain line for easy understanding.

[0018] The substrate 50 has, for example, a rectangular shape in plan view. However, the shape and size of the substrate 50 in plan view are not particularly limited. In the examples of FIGS. 2 and 3, in plan view, the substrate 50 has a first side 50A and a second side 50B each serving as a long side, and a third side 50C and a fourth side 50D each serving as a short side. In one example, the length of the long sides (the first and second sides 50A, 50B) is about 2.0 mm, and the length of the short sides (the third and fourth sides 50C, 50D) is about 1.0 mm.

[0019] [First Conductive Layer] As shown in FIGS. 1 and 2, the first conductive layer 60 provided on the main surface 52 of the substrate 50 includes a first mounting portion 62 on which the light-emitting element 20 is mounted and a second mounting portion 64 on which the integrated circuit 30 is mounted. The first mounting portion 62 includes a plurality (for example, two) of element-side conductive patterns 621, 622, and the second mounting portion 64 includes a plurality (for example, seven) of circuit-side conductive patterns 641, 642, 643, 644, 645, 646, 647. Note that the number and shape of the conductive patterns in each mounting portion 62, 64 are merely examples, and different numbers and shapes of conductive patterns may be adopted.

[0020] In the example of FIG. 2, the first mounting portion 62 (element-side conductive patterns 621, 622) is disposed within a rectangular region that may be 1 / 5 or less of the area of the main surface 52 of the substrate 50. In other words, the second mounting portion 64 (circuit-side conductive patterns 641 to 647) is disposed within a rectangular region that may be 4 / 5 or more of the area of the main surface 52. Therefore, the area of the second mounting portion 64 disposed on the main surface 52 is larger than that of the first mounting portion 62. This makes it possible to dispose an integrated circuit 30 with a larger chip size.

[0021] [First Mounting Portion of First Conductive Layer] First, the first mounting portion 62 will be described. Hereinafter, for easier understanding, the element-side conductive patterns 621, 622 are also referred to as the first and second element-side conductive patterns 621, 622, respectively.

[0022] The first element-side conductive pattern 621 includes an element arrangement region 62A on which the light-emitting element 20 is placed. For example, if the light-emitting element 20 is configured as a VCSEL, the first electrode 24 is placed on the main surface (top surface in Figure 2) of the light-emitting element 20, excluding the multiple light-emitting regions 22. A second electrode (not shown) is placed on the back surface of the light-emitting element 20, which is opposite to the main surface of the light-emitting element 20. For example, the first electrode 24 may be an anode electrode and the second electrode may be a cathode electrode. Light is emitted from the light-emitting region 22 in a direction approximately perpendicular to the main surface of the light-emitting element 20 (upward, in the +Z direction). This light is diffused inside the covering member 90 and emitted to the outside from the light-emitting surface 90T (see Figure 1) of the light sensor 10.

[0023] The second electrode (cathode electrode) of the light-emitting element 20 is bonded to the element placement region 62A of the first element-side conductive pattern 621 by a conductive adhesive layer (not shown). The first element-side conductive pattern 621 is also connected to the second conductive layer 70 by a via conductor 821. Therefore, the second electrode of the light-emitting element 20 is electrically connected to the second conductive layer 70 via the first element-side conductive pattern 621 and the via conductor 821.

[0024] The second element-side conductive pattern 622 includes a wire bonding region 62B to which the wire 101 is joined. One end of the wire 101 is joined to the first electrode 24 (anode electrode) of the light-emitting element 20, and the other end is joined to the wire bonding region 62B. The second element-side conductive pattern 622 is also connected to the second conductive layer 70 by a via conductor 822. Therefore, the first electrode 24 of the light-emitting element 20 is electrically connected to the second conductive layer 70 via the second element-side conductive pattern 622 and the via conductor 822.

[0025] [Second mounting portion of the first conductive layer] Next, the second mounting section 64 will be described. For the sake of clarity, the circuit-side conductive patterns 641 to 647 will also be referred to as the first to seventh circuit-side conductive patterns 641 to 647.

[0026] The first to seventh circuit-side conductive patterns 641 to 647 each include circuit placement areas 64A1, 64A2, 64A3, 64A4, 64A5, 64A6, and 64A7, respectively. The integrated circuit 30 is placed in a rectangular placement area including these circuit placement areas 64A1 to 64A7 and is bonded to the first to seventh circuit-side conductive patterns 641 to 647 (circuit placement areas 64A1 to 64A7) by a conductive adhesive layer (not shown).

[0027] Furthermore, the first to seventh circuit-side conductive patterns 641 to 647 are each connected to the second conductive layer 70 by via conductors 823 to 829. Therefore, the integrated circuit 30 including the photodetector 40 is electrically connected to the second conductive layer 70 via the first to seventh circuit-side conductive patterns 641 to 647 and the via conductors 823 to 829.

[0028] The positions of the via conductors 823 to 829 formed on the first to seventh circuit-side conductive patterns 641 to 647 are not particularly limited, and it is sufficient that the first to seventh circuit-side conductive patterns 641 to 647 are individually connected to the second conductive layer 70. For example, various other arbitrary elements and circuits may be mounted on the substrate of the integrated circuit 30 along with the photodetector 40. Therefore, the positions of the via conductors 823 to 829 should be determined according to, for example, the mounting configuration of the elements (including the photodetector 40) and circuits on the substrate, as well as the shape and position of the multiple conductive patterns of the second conductive layer 70, which will be described later.

[0029] The first to sixth circuit-side conductive patterns 641 to 646, excluding the seventh circuit-side conductive pattern 647, further include wire bonding regions 64B1, 64B2, 64B3, 64B4, 64B5, and 64B6, respectively. Wires 111, 112, 113, 114, 115, and 116 are bonded to these wire bonding regions 64B1 to 64B6, respectively. One end of each wire 111 to 116 is bonded to pads 31, 32, 33, 34, 35, and 36 of the integrated circuit 30, and the other end is bonded to the wire bonding regions 64B1 to 64B6.

[0030] [Wire bonding region of the first conductive layer] As shown in Figure 2, the wire bonding region 62B of the first mounting section 62 is located near the first side 50A. Similarly, the wire bonding regions 64B1 to 64B6 of the second mounting section 64 are located near the first side 50A. In other words, all wire bonding regions 62B, 64B1 to 64B6 are located along one side of the substrate 50, specifically the first side 50A, which is the longer side in the example shown in Figure 2. This arrangement concentrates the wire bonding positions on one side of the substrate 50, thus streamlining the layout. Furthermore, since the extension directions of all wires 111 to 116 are substantially aligned in almost one direction, the wire bonding process can be performed easily and accurately.

[0031] Although detailed illustrations are omitted, the first conductive layer 60 (first and second mounting portions 62, 64) is covered by the insulating layer 120, except for the mounting areas of the light-emitting element 20 and the integrated circuit 30, and the wire bonding areas 64B1 to 64B6. In the example in Figure 2, the opening 121 of the insulating layer 120 that opens up the mounting area of ​​the integrated circuit 30 is shown by a dashed line. Note that the insulating layer 120 is not shown in Figure 1.

[0032] [Second conductive layer] As shown in Figures 1 and 3, the second conductive layer 70 provided on the back surface 54 of the substrate 50 includes a plurality (e.g., seven) conductive patterns 721, 722, 723, 724, 725, 726, and 727. Note that the number and shape of the conductive patterns in the second conductive layer 70 are merely examples, and a different number and shape of conductive patterns may be used.

[0033] [Connection relationship between the wiring connection part of the second conductive layer and the first conductive layer] The conductive pattern 721 is provided as a wiring connection portion that electrically connects the light-emitting element 20 and the integrated circuit 30. This conductive pattern 721 is connected to via conductors 821 and 823. Therefore, the light-emitting element 20 is electrically connected to the pad 31 of the integrated circuit 30 via the first element-side conductive pattern 621 (first mounting portion 62 of the first conductive layer 60), via conductor 821 (conductive via layer 80), conductive pattern 721 (second conductive layer 70), via conductor 823 (conductive via layer 80), first circuit-side conductive pattern 641 (second mounting portion 64 of the first conductive layer 60), and wire 111. As a result, in the example in Figure 3, when the integrated circuit 30 is operating, the pad 31 is set to the potential of the second electrode (cathode electrode) of the light-emitting element 20.

[0034] [Connection relationship between the terminal portion of the second conductive layer and the first conductive layer] The conductive pattern 722 is provided as a terminal for the light-emitting element 20. In the example shown in Figure 3, the conductive pattern 722 is provided as a power terminal 722T to which the power supply voltage required to drive the light-emitting element 20 (for example, the power supply voltage for the VCSEL) is applied. The conductive pattern 722 is connected to the via conductor 822. Therefore, the power supply voltage applied to the conductive pattern 722 is supplied to the first electrode 24 (anode electrode) of the light-emitting element 20 via the via conductor 822 (conductive via layer 80), the second element-side conductive pattern 622 (first mounting portion 62 of the first conductive layer 60), and the wire 101. The via conductor 822 is an example of a first via conductor.

[0035] Conductive patterns 723 to 727 are provided as terminals for the integrated circuit 30. In Figure 3, five terminals using conductive patterns 723 to 727 are provided for the integrated circuit 30, but the number of terminals (i.e., the number of conductive patterns) is not particularly limited and may be changed as appropriate according to the configuration of the integrated circuit 30. Furthermore, the type of terminal (terminal function) assigned to the terminals (conductive patterns 723 to 727) is not particularly limited.

[0036] As an example, the conductive pattern 723 is provided as a ground terminal 723T. The ground terminal 723T of the conductive pattern 723 is provided as a common terminal for both the light-emitting element 20 and the integrated circuit 30. This conductive pattern 723 is connected to a via conductor 824. Therefore, the ground voltage applied to the conductive pattern 723 is supplied to the pad 32 of the integrated circuit 30 via the via conductor 824 (conductive via layer 80), the second circuit-side conductive pattern 642 (second mounting portion 64 of the first conductive layer 60), and the wire 112. As a result, in the example in Figure 3, when the integrated circuit 30 is operating, the pad 32 is set to ground potential. This pad 32 is electrically connected to pad 31 via the internal circuit of the integrated circuit 30 (for example, the drive circuit for the light-emitting element 20, which will be described later).

[0037] The conductive pattern 724 is provided as a power terminal 724T to which the power supply voltage required to drive the integrated circuit 30 (for example, a VDD voltage lower than the ENC voltage for the VCSEL) is applied. This conductive pattern 724 is connected to a via conductor 825. Therefore, the power supply voltage (VDD voltage) applied to the conductive pattern 724 is supplied to the pad 33 of the integrated circuit 30 via the via conductor 825 (conductive via layer 80), the third circuit-side conductive pattern 643 (second mounting portion 64 of the first conductive layer 60), and the wire 113. As a result, in the example in Figure 3, when the integrated circuit 30 is operating, the pad 33 is set to the potential of the VDD voltage. This VDD voltage is also used as the power supply voltage to drive the photodetector 40. The via conductor 825 is an example of a second via conductor.

[0038] The conductive patterns 725, 726, and 727 are provided, for example, as signal terminals 725T, 726T, and 727T for the integrated circuit 30. For example, the integrated circuit 30 is 2 When configured as a circuit compliant with the C interface, signal terminal 725T may be used as the serial clock (SCL) terminal, and signal terminal 726T may be used as the serial data (SDA) terminal. Additionally, signal terminal 727T may be used as the signal interrupt (INT) terminal.

[0039] In the example shown in Figure 3, the conductive pattern 725 includes a wiring connection portion 725A connected to via conductors 826 and 827. Therefore, the conductive pattern 725 is electrically connected to the pad 34 of the integrated circuit 30 via via conductor 826 (conductive via layer 80), the fourth circuit-side conductive pattern 644 (second mounting portion 64 of the first conductive layer 60), and the wire 114. As a result, a signal supplied to the conductive pattern 725 (e.g., a serial clock) is supplied to the pad 34 of the integrated circuit 30. The conductive pattern 725 is also electrically connected to the seventh circuit-side conductive pattern 647 via via conductor 827 (conductive via layer 80). Therefore, a signal supplied to the conductive pattern 725 is also supplied to the seventh circuit-side conductive pattern 647.

[0040] The conductive pattern 726 is connected to the via conductor 828. Therefore, the conductive pattern 726 is electrically connected to the pad 36 of the integrated circuit 30 via the via conductor 828 (conductive via layer 80), the sixth circuit-side conductive pattern 646 (second mounting portion 64 of the first conductive layer 60), and the wire 116. As a result, the signal supplied to the conductive pattern 726 (e.g., serial data) is supplied to the pad 36 of the integrated circuit 30. In this case, the conductive pattern 726 is also used as a serial data output terminal.

[0041] The conductive pattern 727 is connected to the via conductor 829. Therefore, the conductive pattern 727 is electrically connected to the pad 35 of the integrated circuit 30 via the via conductor 829 (conductive via layer 80), the fifth circuit-side conductive pattern 645 (second mounting portion 64 of the first conductive layer 60), and the wire 115. As a result, the signal supplied to the conductive pattern 727 (e.g., an interrupt signal) is supplied to the pad 35 of the integrated circuit 30.

[0042] The second conductive layer 70 is covered by an insulating layer 130 which includes openings 131-136 (shown as dashed lines in Figure 3). The conductive patterns 722-727 expose the aforementioned terminal portions 722T, 723T, 724T, 725T, 726T, and 727T through these openings 131-136. Note that the insulating layer 130 is not shown in Figure 1.

[0043] [Grooves in the covering material] As shown in Figures 1 and 2, the covering member 90 includes a groove 92 between the light-emitting element 20 and the integrated circuit 30 in a plan view of the substrate 50. In a plan view, this groove 92 divides the main surface 52 of the substrate 50 into a first region where the first mounting portion 62 is located and a second region where the second mounting portion 64 is located. In the example of Figure 1, the groove 92 is a slit that separates the covering member 90 into a first covering portion 90A and a second covering portion 90B. That is, the covering member 90 includes a first covering portion 90A that covers the light-emitting element 20 and a second covering portion 90B that covers the integrated circuit 30, and these first covering portion 90A and second covering portion 90B are spaced apart from each other, with the groove 92 defining a slit that exposes the substrate 50.

[0044] Therefore, the groove 92 penetrates the covering member 90, the insulating layer 120, and the first conductive layer 60, and the groove 92 physically divides the first conductive layer 60 into two parts: the first mounting portion 62 and the second mounting portion 64. For this reason, the first mounting portion 62 and the second mounting portion 64 are not electrically connected on the main surface 52 of the substrate 50. The groove 92 can be formed as a microslit having a width of, for example, 30 μm or more and less than 100 μm, for example, about 50 μm. Note that the groove 92 corresponds to the first groove.

[0045] By forming such grooves 92, light from the light-emitting element 20 that diffuses toward the interface between the first coating portion 90A and the grooves 92 (air layer) is refracted at the interface and returned to the first coating portion 90A. This increases the efficiency of light extraction from the light-emitting surface 90T of the light sensor 10. It also reduces crosstalk caused by diffused light from the light-emitting element 20.

[0046] [Grooves on the circuit board] As shown in Figures 1 and 2, the substrate 50 may include a groove 56 at a position corresponding to the groove 92 of the coating member 90. This groove 56 is formed as a recessed groove having a given depth (minute depth) from the main surface 52 of the substrate 50. By forming such a groove 56 in the substrate 50, the first conductive layer 60 can be more appropriately cut into two parts: the first mounting portion 62 and the second mounting portion 64. However, if the first conductive layer 60 is cut into two parts, the first mounting portion 62 and the second mounting portion 64, by the groove 92 of the coating member 90, the groove 56 in the substrate 50 does not necessarily have to be formed.

[0047] The grooves 92 in the covering member 90 and the grooves 56 in the substrate 50 can be formed, for example, by half-cutting each optical sensor structure up to the position where the grooves 56 in the substrate 50 are formed when separating multiple optical sensor structures (i.e., multiple optical sensors 10) formed on a single large substrate.

[0048] [Optical Sensor System] Figure 4 is a schematic block diagram of the optical sensor system 10S equipped with the optical sensor 10 described above.

[0049] The optical sensor system 10S includes an optical sensor 10 and a constant voltage regulator 12. This constant voltage regulator 12 is, for example, a low-dropout (LDO) regulator and is connected to a battery BT as a power source. The constant voltage regulator 12 includes a voltage input terminal 12T1 and a voltage output terminal 12T2, and steps down the first power supply voltage supplied from the battery BT to the voltage input terminal 12T1, and outputs the stepped-down voltage from the voltage input terminal 12T1. For example, the constant voltage regulator 12 steps down the first power supply voltage supplied from the battery BT to a second power supply voltage (VDD voltage) suitable for driving the integrated circuit 30.

[0050] As described above, the optical sensor 10 includes an integrated circuit 30 that includes a light-emitting element 20 (e.g., a VCSEL) and a light-receiving element 40 (e.g., a PD). Furthermore, as an example, the optical sensor 10 includes a first power supply terminal 10T1, a second power supply terminal 10T2, first to third signal terminals 10T3, 10T4, 10T5, and a ground terminal 10T6.

[0051] The first power terminal 10T1 may correspond, for example, to the power terminal section 722T of the conductive pattern 722 in Figure 3. The first power terminal 10T1 is connected to the voltage input terminal 12T1 of the constant voltage regulator 12 and the battery BT. The first power supply voltage (e.g., the power supply voltage for the VCSEL) necessary to drive the light-emitting element 20 is supplied to this first power terminal 10T1 from the battery BT. In other words, the light-emitting element 20 is directly connected to the battery BT. The first power supply voltage supplied from the battery BT may vary, for example, in the range of 2.7V to 4.2V, depending on the remaining charge of the battery BT and the operation of the light sensor system 10S.

[0052] The second power supply terminal 10T2 may correspond, for example, to the power supply terminal section 724T of the conductive pattern 724 in Figure 3. This second power supply terminal 10T2 is connected to the voltage output terminal 12T2 of the constant voltage regulator 12. Therefore, the second power supply terminal 10T2 is supplied with a second power supply voltage (VDD voltage) for the integrated circuit 30 generated by the constant voltage regulator 12. The VDD voltage may be, for example, 1.8V.

[0053] The first to third signal terminals 10T3, 10T4, and 10T5 can correspond, for example, to the signal terminal sections 725T, 726T, and 727T (e.g., serial clock terminal, serial data terminal, and signal interrupt terminal) of the conductive patterns 725, 726, and 727 in Figure 3. The ground terminal 10T6 can correspond, for example, to the ground terminal section 723T of the conductive pattern 723 in Figure 3.

[0054] [Light-emitting element driving circuit] As shown in Figure 4, in the light sensor 10, the integrated circuit 30 may include a light-emitting element driving circuit (indicated as "DRV" in Figure 4) 200 for driving the light-emitting element 20 as one of the internal circuits mounted on the integrated circuit 30.

[0055] Figure 5 is a schematic circuit diagram showing the light-emitting element 20 and the light-emitting element driving circuit 200. The light-emitting element driving circuit 200 includes a plurality (e.g., two) of switching elements 210, 220 connected in series. Each switching element 210, 220 may be, for example, an n-type MOSFET with a low breakdown voltage.

[0056] For example, the first current terminal 210A (source terminal in Figure 5) of the switching element 210 is connected to ground. The second current terminal 210B (drain terminal in Figure 5) of the switching element 210 is connected to the first current terminal 220A (source terminal in Figure 5) of the switching element 220. The second current terminal 220B (drain terminal in Figure 5) of the switching element 220 is connected to the second electrode 26 (cathode electrode in Figure 5) of the light-emitting element 20. The switching elements 210 and 220 are turned on and off by control signals supplied to the control terminals 210C and 220C. When both switching elements 210 and 220 are turned on, current flows to the light-emitting element 20 and light is emitted from the light-emitting element 20.

[0057] The light-emitting element driving circuit 200 is not shown in Figure 3, but can be mounted on the substrate of the integrated circuit 30 shown in Figure 3, for example. For example, the first current terminal 210A of the switching element 210 is connected to a pad 32 to which a ground potential is applied, and the second current terminal 220B of the switching element 220 is connected to a pad 31 to which the potential of the second electrode 26 (cathode electrode; see Figure 5) of the light-emitting element 20 is applied. This allows the light-emitting element driving circuit 200 to be integrated within the integrated circuit 30. As a result, only the light-emitting element 20 needs to be mounted in the first mounting section 62, making it possible to optimize the layout of the optical sensor 10.

[0058] Furthermore, in the light-emitting element driving circuit 200 shown in Figure 5, the two switching elements 210 and 220 connected in series each function as voltage-resistant elements. As described above, since the light-emitting element 20 is directly connected to the battery BT, the first power supply voltage from the battery BT is directly applied to the light-emitting element 20 via the first power supply terminal 10T1 (see Figure 4). In this case, the switching elements 210 and 220 are provided as voltage-resistant elements to prevent a voltage exceeding the voltage-resistant rating (maximum rating) of the light-emitting element 20 from being supplied to the battery BT. In other words, by providing the directly connected switching elements 210 and 220 as driving elements for the light-emitting element 20, the application of a voltage exceeding its maximum rating to the light-emitting element 20 is suppressed.

[0059] [Operation of the light sensor 10] Next, we will explain the operation of the light sensor 10. The light sensor 10 includes a light-transmitting covering member 90 that covers the light-emitting element 20 and the integrated circuit 30 (photodetector 40). In a plan view of the substrate 50, the covering member 90 includes a groove 92 between the light-emitting element 20 and the integrated circuit 30. This groove 92 reduces crosstalk caused by diffused light from the light-emitting element 20, thereby suppressing a decrease in the object detection accuracy of the photodetector 40.

[0060] Here, the groove 92 is formed to physically divide the first conductive layer 60 into two parts: a first mounting section 62 on which the light-emitting element 20 is mounted, and a second mounting section 64 on which the integrated circuit 30 is mounted. Therefore, the first mounting section 62 and the second mounting section 64 are not electrically connected to each other on the main surface 52 of the substrate 50.

[0061] In this regard, the optical sensor 10 includes a second conductive layer 70 provided at a different layer position (for example, on the back surface of the substrate 50) from the first conductive layer 60 (first and second mounting portions 62, 64), and the first and second mounting portions 62, 64 of the first conductive layer 60 are connected to the second conductive layer 70 by a conductive via layer 80.

[0062] For example, in Figures 1 to 3, the light-emitting element 20 is electrically connected to the pad 31 of the integrated circuit 30 via the first element-side conductive pattern 621 (first mounting portion 62 of the first conductive layer 60), via conductor 821 (conductive via layer 80), conductive pattern 721 (second conductive layer 70), via conductor 823 (conductive via layer 80), first circuit-side conductive pattern 641 (second mounting portion 64 of the first conductive layer 60), and wire 111. Therefore, even if the first mounting portion 62 and the second mounting portion 64 are physically separated by the groove 92 on the main surface 52 of the substrate 50, the first mounting portion 62 and the second mounting portion 64 can be electrically connected to each other.

[0063] One embodiment of the optical sensor 10 has the following advantages. (1) The light-emitting element 20 is electrically connected to the integrated circuit 30 via the first mounting portion 62 of the first conductive layer 60, the conductive via layer 80, the second conductive layer 70, and the second mounting portion 64 of the first conductive layer 60. As a result, even if the first mounting portion 62 and the second mounting portion 64 are physically separated by the groove 92 on the main surface 52 of the substrate 50, the first mounting portion 62 and the second mounting portion 64 can be electrically connected to each other via the conductive via layer 80 and the second conductive layer 70. As a result, the area of ​​the conductive pattern arranged on the main surface 52 of the substrate 50, i.e., the length of the wiring on the substrate 50 can be shortened, and the size of the integrated circuit 30 that can be mounted on the substrate 50 can be increased. In addition, since the first covering portion 90A that covers the light-emitting element 20 and the second covering portion 90B that covers the integrated circuit 30 (photodetector 40) are separated from each other by the groove 92 (air layer), crosstalk caused by diffused light from the light-emitting element 20 can also be reduced.

[0064] (2) The integrated circuit 30 includes a light-emitting element driving circuit 200 for driving the light-emitting element 20. This allows the light-emitting element driving circuit 200 to be integrated within the integrated circuit 30. As a result, only the light-emitting element 20 needs to be mounted in the first mounting section 62, making it possible to optimize the layout of the optical sensor 10.

[0065] (3) The light-emitting element driving circuit 200 includes a plurality of switching elements 210, 220 connected in series between the second electrode 26 of the light-emitting element 20 and the ground terminal. In this configuration, two switching elements 210, 220 connected in series each function as a voltage-resistant element. This prevents the light-emitting element 20 from being subjected to a voltage from the battery BT that exceeds its maximum rating.

[0066] (4) The first mounting section 62 is located in a first region of the substrate 50 (i.e., the light-emitting element side region) separated by the groove 92, and the second mounting section 64 is located in a second region of the substrate 50 (i.e., the integrated circuit side region) separated by the groove 92. The light-emitting element 20 is connected to the first mounting section 62 by wire 101. The integrated circuit 30 is connected to the second mounting section 64 by wires 111 to 116. In this configuration, even if the first mounting section 62 and the second mounting section 64 are physically separated by the groove 92, the wires 101, 111 to 116 do not cross the groove 92, and the first mounting section 62 and the second mounting section 64 can be electrically connected to each other.

[0067] (5) The first region of the substrate 50 (i.e., the light-emitting element side region) is less than 1 / 5 of the area of ​​the main surface 52 of the substrate 50, and the second region of the substrate 50 (i.e., the integrated circuit side region) is less than 4 / 5 of the area of ​​the main surface 52 of the substrate 50. In this configuration, the area occupied by the second mounting portion 64 relative to the area of ​​the main surface 52 is larger than that of the first mounting portion 62. This makes it possible to place an integrated circuit 30 with a larger chip size.

[0068] (6) All wire bonding areas 62B, 64B1 to 64B6 are arranged along one side of the substrate 50 (in the example in Figure 2, the first side 50A, which is the longer side). In this arrangement, the wire bonding positions are concentrated along one side of the substrate 50, making the layout more efficient. Furthermore, since the extension direction of all wires 111 to 116 is substantially aligned in one direction, the wire bonding process can be performed easily and accurately.

[0069] (7) The first conductive layer 60 is located on the main surface 52 of the substrate 50, the second conductive layer 70 is located on the back surface 54 of the substrate 50, and the conductive via layer 80 penetrates the substrate 50. In this configuration, since the wiring is done through the substrate 50, the overall thickness of the optical sensor 10 can be reduced.

[0070] (8) The substrate 50 includes grooves 56 at positions corresponding to the grooves 92 of the covering member 90. In this configuration, by forming grooves 56 in the substrate 50 when forming the grooves 92 of the covering member 90, the first conductive layer 60 can be more appropriately cut into two parts: the first mounting portion 62 and the second mounting portion 64.

[0071] (9) The width of the groove 92 is 30 μm or more and less than 100 μm. Therefore, the groove 92 can be a microslit with a very small width. (10) The light-emitting element 20 is a vertical-cavity surface-emitting laser (VCSEL), and the light-receiving element 40 is a photodiode (PD). By using a VCSEL, which has higher directivity than a light-emitting diode, as the light-emitting element 20, an optical sensor 10 suitable for a reflective photosensor can be realized.

[0072] (11) As described above, each of the multiple switching elements 210, 220 (driving elements) of the light-emitting element driving circuit 200 functions as a voltage-resistant element. This prevents the application of a voltage exceeding its maximum rating from the battery BT to the light-emitting element 20, allowing the light-emitting element 20 to be directly connected to the battery BT. For example, a suitable power supply voltage for the light-emitting element 20 can be supplied by separately providing a boost circuit to increase the output voltage of the constant voltage regulator 12, but such a boost circuit can be made unnecessary.

[0073] [Example of changes] Each of the above embodiments can be implemented with the following modifications. Furthermore, the above embodiments and the following modifications can be combined with each other to the extent that they do not contradict each other technically.

[0074] The light-emitting element 20 is not limited to being directly connected to the battery BT. For example, as shown in Figure 6, a boost circuit 300 may be connected to the voltage output terminal 12T2 of the constant voltage regulator 12. The boost circuit 300 generates a power supply voltage suitable for the light-emitting element 20 (i.e., not exceeding the maximum rating of the light-emitting element 20) by boosting the output voltage of the constant voltage regulator 12 (VDD voltage for the integrated circuit 30). In this case, the light-emitting element driving circuit 200 may consist of a single switching element.

[0075] The light-emitting element 20 is not limited to a VCSEL, but may be other semiconductor laser elements. Alternatively, the light-emitting element 20 may be a light-emitting diode. The light-receiving element 40 is not limited to a photodiode; it may also be a phototransistor.

[0076] The number of light-receiving elements 40 is not limited to two; it may be one or three or more. The substrate 50 may be square in shape when viewed from above. The light-emitting element driving circuit 200 does not necessarily have to be included in the integrated circuit 30, and may be mounted on the first mounting section 62.

[0077] The first conductive layer is not limited to the conductive layer 60 provided on the main surface 52 of the substrate 50. The second conductive layer is not limited to the conductive layer 70 provided on the back surface 54 of the substrate 50. Furthermore, the number of conductive layers is not limited to two. For example, a wiring board may be provided on the substrate 50 that includes, in addition to or instead of the conductive layers 60 and 70, two or more conductive layers, one or more interlayer insulating layers provided between adjacent conductive layers, and via conductors (conductive via layers) penetrating each interlayer insulating layer. In this case, the light-emitting element 20 and the integrated circuit 30 (photodetector 40) may be mounted on the uppermost conductive layer of the wiring board. Alternatively, the integrated circuit 30 may be embedded within the wiring board if the photodetector 40 is capable of receiving light.

[0078] As used in this disclosure, the term “on” includes the meanings of “on” and “above” unless the context clearly indicates otherwise. Therefore, for example, the expression “the first element is implemented on the second element” is intended to mean that in one embodiment the first element may be in contact with and directly positioned on the second element, while in other embodiments the first element may be positioned above the second element without contact. In other words, the term “on” does not preclude structures in which other elements are formed between the first and second elements.

[0079] The Z-axis direction used in this disclosure does not necessarily have to be vertical, nor does it have to be perfectly aligned with the vertical. Therefore, the various structures described herein (e.g., the structure shown in Figure 6) are not limited to the Z-axis direction "up" and "down" being vertical. For example, the X-axis direction may be vertical, or the Y-axis direction may be vertical.

[0080] The numerals "1st," "2nd," etc., used in this disclosure are simply used to clearly distinguish the components, and it is not necessarily required that the components be present in that order.

[0081] [Note] The technical concepts that can be understood from each of the above embodiments and their modifications are described below. The reference numerals for the components of the embodiments corresponding to the components described in each appendix are shown in parentheses. The reference numerals are shown as examples to aid understanding, and the components described in each appendix should not be limited to those indicated by the reference numerals.

[0082] (Note A1) The substrate (50) and A first conductive layer (60) provided on the substrate (50), A second conductive layer (70) is provided at a different layer position from the first conductive layer (60), A conductive via layer (80) is provided between the first conductive layer (60) and the second conductive layer (70), A light-emitting element (20) mounted on the first conductive layer (60), The first conductive layer (60) is mounted on an integrated circuit (30) which includes a photodetector (40), The substrate (50) is provided with a translucent covering member (90) that covers the light-emitting element (20) and the integrated circuit (30) together with the first conductive layer (60), and includes a groove (92) between the light-emitting element (20) and the integrated circuit (30) in a plan view of the substrate (50), The first conductive layer (60) is The first mounting section (62) on which the light-emitting element (20) is mounted, The package includes a second mounting section (64) on which the integrated circuit (30) is mounted, The light-emitting element (20) is electrically connected to the integrated circuit (30) via the first mounting portion (62), the conductive via layer (80), the second conductive layer (70), and the second mounting portion (64) to form a light sensor (10).

[0083] (Appendix A2) The integrated circuit (30) is the optical sensor (10) as described in Appendix A1, which includes a drive circuit (200) for the light-emitting element (20).

[0084] (Note A3) The light-emitting element (20) is The first electrode (24) is arranged on the main surface of the light-emitting element (20), The light-emitting element (20) includes a second electrode (26) disposed on the back surface, The light sensor (10) described in Appendix A2, wherein the second electrode (26) of the light-emitting element (20) is electrically connected to the drive circuit (200) via the first mounting portion (62), the conductive via layer (80), the second conductive layer (70), and the second mounting portion (64).

[0085] (Note A4) The drive circuit (200) is the optical sensor (10) described in Appendix A3, which includes a plurality of switching elements (210, 220) connected in series between the second electrode (26) of the light-emitting element (20) and the ground terminal.

[0086] (Note A5) The first mounting portion (62) and the second mounting portion (64) are physically separated by the groove (92). The first mounting portion (62) is located within a first region of the substrate (50) that is partitioned by the groove (92), The second mounting portion (64) is located within the second region of the substrate (50) that is separated by the groove (92), The light-emitting element (20) is connected to the first mounting section (62) by a first wire (101). The integrated circuit (30) is connected to the second mounting section (64) by second wires (111-116), and is an optical sensor (10) as described in any one of the appendices A1-A4.

[0087] (Note A6) The second conductive layer (70) is A first conductive pattern (722) to which the first power supply voltage is supplied, A second conductive pattern (724) to which a second power supply voltage lower than the first power supply voltage is supplied, Includes, The first power supply voltage is supplied from the first conductive pattern (722) to the first mounting section (62) via the first via conductor (822) arranged in the first region of the substrate (50). The second power supply voltage is supplied from the second conductive pattern (724) to the second via conductor (825) located in the second region of the substrate (50) to the second mounting section (64), as described in Appendix A5.

[0088] (Note A7) The first region is less than or equal to 1 / 5 of the area of ​​the main surface (52) of the substrate (50). The second region is 4 / 5 or more of the area of ​​the main surface (52) of the substrate (50), as described in Appendix A5 or A6, for the optical sensor (10).

[0089] (Note A8) The light-emitting element (20) is The first electrode (24) is arranged on the main surface of the light-emitting element (20), The light-emitting element (20) includes a second electrode (26) disposed on the back surface, The first implementation unit (62) is, A first element-side conductive pattern (621) including an element placement region (62A) on which the second electrode (26) of the light-emitting element (20) is mounted, The second element side conductive pattern (622) includes a wire bonding region (62B) connected by a wire to the first electrode (24) of the light-emitting element (20), The second mounting section (64) includes a plurality of circuit-side conductive patterns (641 to 647) which include a plurality of circuit placement regions (64A1 to 64A7) and a plurality of wire bonding regions (64B1 to 64B6), The integrated circuit (30) is mounted in a rectangular arrangement area that includes the plurality of circuit arrangement areas (64A1 to 64A7), The plurality of wire bonding regions (64B1 to 64B6) are connected to the plurality of pads (31 to 36) of the integrated circuit (30) by a plurality of wires (111 to 116). The optical sensor (10) described in Appendix A1 or A2, wherein the wire bonding region (62B) of the second element-side conductive pattern (622) and the plurality of wire bonding regions (64B1 to 64B6) of the plurality of circuit-side conductive patterns (641 to 647) are arranged along one side (50A) of the substrate (50).

[0090] (Note A9) The substrate (50) is rectangular in plan view, The optical sensor (10) described in Appendix A8, wherein one side (50A) of the substrate (50) is the longer side of the substrate (50).

[0091] (Note A10) The first conductive layer (60) is arranged on the main surface (52) of the substrate (50), The second conductive layer (70) is located on the back surface (54) of the substrate (50). The conductive via layer (80) penetrates the substrate (50), and the optical sensor (10) is as described in any one of the appendices A1 to A9.

[0092] (Note A11) The covering member (90) is A first covering portion (90A) that covers the light-emitting element (20), The integrated circuit (30) includes a second covering portion (90B), The first covering portion (90A) and the second covering portion (90B) are spaced apart from each other, and a slit that exposes the substrate (50) is defined as the groove (92), as described in any one of the appendices A1 to A10, for the optical sensor (10).

[0093] (Note A12) The substrate (50) includes a groove (56) in the covering member (90) at a position corresponding to the slit (92), as described in Appendix A11, for the optical sensor (10).

[0094] (Note A13) The optical sensor (10) described in any one of the appendices A1 to A12, wherein the width of the groove (92) of the covering member (90) is 30 μm or more and less than 100 μm.

[0095] (Note A14) The aforementioned light-emitting element (20) is a vertical cavity type surface-emitting laser, The aforementioned light-receiving element (40) is a photodiode, as described in any one of the appendices A1 to A13, for the light sensor (10).

[0096] (Note B1) The substrate (50) and A light-emitting element (20) is provided on the substrate (50) and operates on a first power supply voltage supplied from a power supply (BT), An integrated circuit (30) provided on the substrate (50) and operating at a second power supply voltage lower than the first power supply voltage, the integrated circuit (30) including a photodetector (40), New light sensor (10).

[0097] (Note C1) Light sensor (10), A constant voltage regulator (12) is provided, The constant voltage regulator (12) is A voltage input terminal (12T1) that receives the first power supply voltage supplied from the power supply (BT), A voltage output terminal (12T2) that outputs a second power supply voltage lower than the first power supply voltage, Includes, The aforementioned light sensor (10) The first power supply terminal (10T1) connected to the power supply (BT) and the voltage input terminal (12T1) of the constant voltage regulator (12), A light-emitting element (20) that operates with the first power supply voltage supplied to the first power supply terminal (10T1), The second power supply terminal (10T2) connected to the voltage output terminal (12T2) of the constant voltage regulator (12), An integrated circuit (30) that operates with the second power supply voltage supplied to the second power supply terminal (10T2), the integrated circuit (30) including a photodetector (40), Includes an optical sensor system (10S).

[0098] The above description is illustrative only. Those skilled in the art will recognize that many more possible combinations and substitutions are possible beyond the components and methods (manufacturing processes) enumerated for the purpose of illustrating the technology of this disclosure. This disclosure is intended to encompass all alternatives, variations, and modifications that fall within the scope of this disclosure, including the claims. [Explanation of symbols]

[0099] 10…Light sensor 10S…Optical sensor system 12… Constant voltage regulator 20…Light-emitting element 24...1st electrode 26…Second electrode 30… Integrated circuits 31-36... pads 40…Photodetector 50... Circuit board 52…Main surface 54…Back side 56…Groove (concave groove) 60...First conductive layer 62…First Implementation Section 621...Conductive pattern on the first element side 622...Second element side conductive pattern 62A... Element arrangement region 62B…Wire bonding area 64…Second Implementation Section 641~647...Circuit-side conductive pattern 64A1~64A7…Circuit placement area 64B1~64B6...Wire bonding area 70...Second conductive layer 721-727... Conductive patterns 80...Conductive via layer 82… Via conductor 821~829… Via conductors 90... Covering material 90A...First coating section 90B...Second covering section 92...Groove 101, 111~116… wire 200... Light-emitting element driving circuit 210,220… Switching elements

Claims

1. circuit board and A first conductive layer provided on the main surface of the substrate, A second conductive layer provided on the back surface of the aforementioned substrate, A conductive via layer provided between the first conductive layer and the second conductive layer, A light-emitting element mounted on the first conductive layer, An integrated circuit mounted on the first conductive layer includes a light-receiving element and a driving circuit for the light-emitting element, The substrate is provided with a translucent covering member that covers the light-emitting element and the integrated circuit together with the first conductive layer, and includes a groove between the light-emitting element and the integrated circuit in a plan view of the substrate, The first conductive layer is A first mounting section on which the light-emitting element is mounted, The package includes a second mounting section on which the aforementioned integrated circuit is mounted, The light-emitting element includes a first electrode disposed on the main surface of the light-emitting element and a second electrode disposed on the back surface of the light-emitting element, the second electrode being electrically connected to the drive circuit via the first mounting portion, the conductive via layer, the second conductive layer, and the second mounting portion. The light sensor is configured such that the drive circuit includes a plurality of switching elements connected in series between the second electrode of the light-emitting element and the ground terminal, thereby enabling the light-emitting element to be directly connected to an external battery.

2. The first mounting portion and the second mounting portion are physically separated by the groove. The first mounting portion is located within a first region of the substrate that is partitioned by the groove, The second mounting portion is located within the second region of the substrate, which is partitioned by the groove. The light-emitting element is connected to the first mounting section by a first wire. The optical sensor according to claim 1, wherein the integrated circuit is connected to the second mounting portion by a second wire.

3. The aforementioned second conductive layer is A first conductive pattern to which the first power supply voltage is supplied, A second conductive pattern to which a second power supply voltage lower than the first power supply voltage is supplied, Includes, The first power supply voltage is supplied from the first conductive pattern to the first mounting section via the first via conductor arranged in the first region of the substrate. The optical sensor according to claim 2, wherein the second power supply voltage is supplied from the second conductive pattern to the second mounting portion via a second via conductor arranged in the second region of the substrate.

4. The first region is 1 / 5 or less of the area of ​​the main surface of the substrate. The optical sensor according to claim 2 or 3, wherein the second region is 4 / 5 or more of the area of ​​the main surface of the substrate.

5. The first mounting unit is A first element-side conductive pattern including an element arrangement region on which the second electrode of the light-emitting element is mounted, The second element side conductive pattern includes a wire bonding region connected to the first electrode of the light-emitting element by a wire, The second mounting section includes a plurality of circuit-side conductive patterns, which include a plurality of circuit placement regions and a plurality of wire bonding regions. The integrated circuit is mounted in a rectangular arrangement area that includes the plurality of circuit arrangement areas. The plurality of wire bonding regions are connected to the plurality of pads of the integrated circuit by a plurality of wires. The optical sensor according to claim 1, wherein the wire bonding region of the second element-side conductive pattern and the plurality of wire bonding regions of the plurality of circuit-side conductive patterns are arranged along one side of the substrate.

6. The substrate is rectangular in plan view, The optical sensor according to claim 5, wherein one side of the substrate is the long side of the substrate.

7. The optical sensor according to any one of claims 1 to 6, wherein the conductive via layer penetrates the substrate.

8. The covering member is A first covering portion that covers the light-emitting element, It includes a second covering portion that covers the aforementioned integrated circuit, The optical sensor according to any one of claims 1 to 7, wherein the first covering portion and the second covering portion are spaced apart from each other, and a slit that exposes the substrate is defined as the groove.

9. The optical sensor according to claim 8, wherein the substrate includes a groove at a position corresponding to the slit of the covering member.

10. The optical sensor according to any one of claims 1 to 9, wherein the width of the groove in the covering member is 30 μm or more and less than 100 μm.

11. The aforementioned light-emitting element is a vertical cavity type surface-emitting laser, The light sensor according to any one of claims 1 to 10, wherein the light-receiving element is a photodiode.

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