Switching power supply and switching control circuit
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- NISSHINBO MICRO DEVICES INC
- Filing Date
- 2022-11-25
- Publication Date
- 2026-08-04
AI Technical Summary
【0014】 本発明に係るスイッチング電源装置及びスイッチング制御回路によれば、過渡応答特性を改善したスイッチング電源装置及びスイッチング制御回路を提供することができる。
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a switching power supply and a switching control circuit. [Background technology]
[0002] Conventionally, a flyback converter has been disclosed that uses the flyback voltage generated in the primary winding of the transformer as a feedback signal, thereby enabling feedback control without using feedback signals from the secondary or auxiliary windings of the transformer (Patent Document 1).
[0003] As a power supply circuit that uses such a flyback voltage as a feedback signal, the one shown in Figure 4 can be considered. The switching control IC 100 shown in Figure 4 switches the current flowing through the primary winding L1 of the transformer TR on and off using transistor M1, and controls the time ratio, i.e., the on-duty cycle, thereby changing the current output to the secondary winding L2 and the output voltage V OUT Control is performed so that it remains constant.
[0004] When transistor M1 turns off, a flyback voltage VFLBK is generated at the drain terminal, i.e., the primary winding L1, and this flyback voltage VFLBK is equal to the output voltage V OUT The voltage will be proportional to this.
[0005] This flyback voltage VFLBK is then converted into a current by resistor RF and input into the switching control IC 100 to become the feedback signal Vfb. The current converted by resistor RF flows through resistor REI, which is externally connected to the switching control IC 100, and is converted into the feedback signal Vfb.
[0006] The feedback signal Vfb is input to the inverting input terminal of the error amplifier 102 via the sample-and-hold circuit 101. The error amplifier 102 compares the sampled and held feedback signal Vfb with a reference voltage Vref, and the comparison signal is input to the PWM comparator 103. A phase compensation capacitor CC and a resistor RC are connected to the output of the error amplifier 102 for phase compensation. The PWM comparator 103 compares the sawtooth wave with the error amplifier output signal, generates a PWM signal with a duty cycle corresponding to the error amplifier output signal, and drives the gate of transistor M1. [Prior art documents] [Patent Documents]
[0007] [Patent Document 1] U.S. Patent No. 5841643 [Overview of the project] [Problems that the invention aims to solve]
[0008] As described above, the flyback voltage VFLBK is converted into a gate drive signal for transistor M1, and the output voltage V OUT A feedback operation is performed to control it, but there are two operational delay elements in the feedback path.
[0009] The first operational delay element is the sample-and-hold circuit 101 provided at the input of the error amplifier 102. Typically, the sample-and-hold circuit 101 consists of a switch and a hold capacitor. As mentioned above, the current converted from the flyback voltage VFLBK is converted into a voltage by resistor REI, but a time delay occurs when this voltage charges the hold capacitor. This delay time is roughly determined by the time constants of resistor REI and the hold capacitor.
[0010] The second delay element is a phase compensation capacitor CC connected to the output of the error amplifier 102, which is charged and discharged by the current output from the error amplifier 102. The delay time at this time is determined by the capacitance value of the phase compensation capacitor CC and the output current of the error amplifier 102, and is proportional to the product of the reciprocal of the output current I of the error amplifier 102 (1 / I) and the phase compensation capacitor CC (CC / I).
[0011] When time delay elements like those described above are included in the feedback control path, problems arise with the responsiveness of the power supply. In particular, with an input voltage V IN When voltage fluctuations or load current fluctuations occurred, the time required for charging and discharging the hold capacitor of the sample-and-hold circuit 101 and the phase compensation capacitor CC increased as part of the feedback control operation, leading to a significant deterioration in transient response characteristics.
[0012] The present invention has been made in view of the above circumstances, and its object is to provide a switching power supply and a switching control circuit with improved transient response characteristics. [Means for solving the problem]
[0013] To achieve the aforementioned objectives, the switching power supply and switching control circuit according to the present invention are characterized by the following [1] to [7]. [1] A transformer in which the primary and secondary windings for boosting or lowering the input voltage are magnetically coupled, A transistor that switches the input voltage supplied to the primary winding on and off, The system includes a switching control circuit that controls the on / off state of the transistor based on the flyback voltage generated in the primary winding when the transistor is off. A flyback type switching power supply, The aforementioned switching control circuit is An error amplifier that outputs an error signal between a feedback signal corresponding to the flyback voltage and a reference voltage, A sample hold circuit provided at the output of the error amplifier and holding the error signal output from the error amplifier when the transistor is off, A PWM control circuit that outputs a PWM signal with a duty ratio corresponding to the error signal output from the sample hold circuit to the transistor, A switching power supply device. [2] In the switching power supply device according to [1], The switching control circuit, A first resistor to which the flyback voltage is applied and through which a current corresponding to the flyback voltage flows, A second resistor through which the current flowing through the first resistor flows, Using the voltage generated in the second resistor as the feedback signal and inputting it to the error amplifier, A switching power supply device. [3] In the switching power supply device according to [1], The switching control circuit, A phase compensation capacitor connected to the input of the PWM control circuit, A charge / discharge circuit that charges or discharges the phase compensation capacitor when it detects that the feedback signal has deviated from a certain range including the reference voltage, A switching power supply device. [4] A transformer in which a primary winding and a secondary winding for boosting or bucking an input voltage are magnetically coupled, A transistor that turns on and off the input voltage supplied to the primary winding, A switching control circuit that controls the on / off of the transistor based on the flyback voltage generated in the primary winding when the transistor is off, A flyback type switching power supply device, The switching control circuit, A sample hold circuit that holds a feedback signal corresponding to the flyback voltage when the transistor is off, An error amplifier that outputs an error signal between the feedback signal held by the sample-and-hold circuit and the reference voltage, A PWM control circuit that outputs a PWM signal with a duty cycle corresponding to the error signal output from the error amplifier to the transistor, A phase compensation capacitor connected to the input of the PWM control circuit, The circuit includes a charge / discharge circuit that charges and discharges the phase compensation capacitor when it detects that the feedback signal has fallen outside a certain range including the reference voltage. Switching power supply. [5] In the switching power supply device described in [3] or [4], The aforementioned charging and discharging circuit is A first current source for charging the phase compensation capacitance, A second current source for discharging the phase compensation capacitance, A first comparator compares the feedback signal with the upper limit of a certain range and outputs the comparison result, When the first comparator outputs a comparison result indicating that the feedback signal exceeds the upper limit, a first latch circuit holds the output of a signal that connects one of the first current source and the second current source to the phase compensation capacitor until a reset signal is input. A second comparator compares the feedback signal with the lower limit of the certain range and outputs the comparison result, The second comparator outputs a comparison result indicating that the feedback signal has fallen below the lower limit, and the second latch circuit holds the output of a signal that connects the first current source and the other of the second current source to the phase compensation capacitor until the reset signal is input. The reset signal is synchronized with the on / off cycle of the transistor. Switching power supply. [6] A switching control circuit that controls the on / off switching of a transistor that switches the input voltage supplied to the primary winding of a transformer in a flyback type switching power supply, based on the flyback voltage generated in the primary winding of the transformer, An error amplifier that outputs an error signal between a feedback signal corresponding to the flyback voltage and a reference voltage, A sample-and-hold circuit is provided at the output of the error amplifier and holds the error signal output from the error amplifier when the transistor is off, The circuit includes a PWM control circuit that outputs a PWM signal to the transistor with a duty cycle corresponding to the error signal output from the sample-and-hold circuit. Switching control circuit. [7] A switching control circuit that controls the on / off switching of a transistor that switches the input voltage supplied to the primary winding of a transformer in a flyback type switching power supply, based on the flyback voltage generated in the primary winding of the transformer, A sample-and-hold circuit that holds a feedback signal corresponding to the flyback voltage when the transistor is off, An error amplifier that outputs an error signal between the feedback signal held by the sample-and-hold circuit and the reference voltage, A PWM control circuit that outputs a PWM signal with a duty cycle corresponding to the error signal output from the error amplifier to the transistor, A phase compensation capacitor connected to the input of the PWM control circuit, The system includes a charge / discharge circuit that charges and discharges the phase compensation capacitor when it detects that the feedback signal has fallen outside a certain range including the reference voltage. Switching control circuit. [Effects of the Invention]
[0014] According to the switching power supply and switching control circuit of the present invention, it is possible to provide a switching power supply and a switching control circuit with improved transient response characteristics.
[0015] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by referring to the attached drawings and reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments"). [Brief explanation of the drawing]
[0016] [Figure 1] Figure 1 is a circuit diagram showing a flyback converter as a switching power supply device of the present invention in the first embodiment. [Figure 2] Figure 2 is a circuit diagram showing a flyback converter as a switching power supply device of the present invention in a second embodiment. [Figure 3] Figure 3 is a circuit diagram showing a flyback converter as a switching power supply device of the present invention in a third embodiment. [Figure 4] Figure 4 is a circuit diagram showing an example of a conventional flyback converter. [Modes for carrying out the invention]
[0017] (First Embodiment) A specific first embodiment of the present invention will be described below with reference to the figures.
[0018] The flyback converter 1, which functions as a switching power supply as shown in Figure 1, supplies a DC input voltage V to its input terminal IN. IN The voltage is boosted or stepped down by a transformer (TR), and the DC output voltage V is output from the output terminal OUT. OUT Output as follows.
[0019] The flyback converter 1 consists of a transformer TR in which the primary winding L1 and secondary winding L2 are magnetically coupled, and an input voltage V supplied to the primary winding L1. IN A transistor M1 switches the circuit on and off, a diode D1 rectifies the current flowing through the secondary winding L2, and an output capacitor C. OUT It also includes a switching control circuit 2 that controls the on / off state of transistor M1.
[0020] The primary winding L1 and the secondary winding L2 are wound around the core of the transformer TR. An input terminal IN is connected to one end of the primary winding L1. The drain of the transistor M1 is connected to the other end of the primary winding L1. The transistor M1 is composed of an Nch field-effect transistor. The gate of the transistor M1 is connected to the terminal T5 of the switching control IC10, and the source is connected to the ground.
[0021] One end of the secondary winding L2 is connected to the anode of the diode D1, and the other end is connected to the ground. The diode D1 is connected between one end of the secondary winding L2 and the output terminal OUT. The output capacitor C OUT is connected between the output terminal OUT and the ground.
[0022] When the above-mentioned transistor M1 is turned on, the input voltage V IN is supplied to the primary winding L1, and a current flows through the primary winding L1. Magnetic energy is stored in the core of the transformer TR by this current. At this time, an induced electromotive force is generated in the secondary winding L2, but it is blocked by the diode D1, no current flows through the secondary winding L2, and the energy of the transformer TR does not flow out. Also, at this time, the output capacitor C OUT is discharged by a load not shown in the figure.
[0023] Next, when the transistor M1 is turned off, the magnetic energy stored in the core of the transformer TR is output as a current to the output capacitor C OUT via the secondary winding L2 and the diode D1, and the output capacitor C OUT is charged. Next, the transistor M1 is turned on again and this is repeated. That is, the current output from the secondary winding L2 is smoothed by the output capacitor C OUT [[ID=&]]and output as a DC output voltage V [[ID=2&]] OUT
[0024] The switching control circuit 2 controls the on / off state of transistor M1 so that the flyback voltage VFLBK, which is an induced voltage generated in the primary winding L1 of transformer TR when transistor M1 is off, becomes a desired voltage. The flyback voltage VFLBK is the output voltage V OUT The voltage is corresponding to the voltage.
[0025] The switching control circuit 2 comprises a current conversion circuit 21, a resistor REI as a second resistor, an error amplifier 22, a sample-and-hold circuit 23, a current conversion circuit 24, a phase compensation circuit 25, and a PWM control circuit 26. In this embodiment, the transistors M21 and M22, the current source 211, the error amplifier 22, the sample-and-hold circuit 23, the current conversion circuit 24, and the PWM control circuit 26, which constitute the current conversion circuit 21, are built into the switching control IC (Integrated Circuit) 10. In addition, the resistor RF as a first resistor, the resistor REI as a second resistor, and the phase compensation circuit 25, which constitute the current conversion circuit 21, are externally connected to the switching control IC 10.
[0026] The current conversion circuit 21 converts the flyback voltage VFLBK into current. The current conversion circuit 21 includes a resistor RF, transistors M21 and M22 with their gates connected in common, and a current source 211. The resistor RF is connected between the connection point between the primary winding L1 and the drain of transistor M1 and terminal T1 of the switching control IC 10.
[0027] Transistors M21 and M22 are composed of P-channel field-effect transistors. The source of transistor M21 is connected to terminal T2, which is connected to the input terminal IN. The drain of transistor M21 is connected to its own gate and current source 211. Transistor M22 has its source connected to terminal T1, and its gate is connected to the gate and drain of transistor M21. The drain of transistor M22 is connected to terminal T3.
[0028] With the above configuration, the voltage at terminal T2 is equal to the input voltage V INThis becomes equal to: Since transistors M21 and M22 have common gates, the same current as current source 211 flows through transistor M22, so the gate-source voltages of transistors M21 and M22 become approximately equal, and the voltage at terminal T1 becomes equal to the voltage at terminal T2 (= input voltage V IN This becomes equal to ). Therefore, a flyback voltage VFLBK is applied across resistor RF, and a current corresponding to the flyback voltage VFLBK flows through resistor RF.
[0029] Resistor REI is connected between terminal T3 and ground, and carries a current equivalent to that flowing through resistor RF. A feedback signal Vfb is generated across resistor REI, corresponding to the current flowing through resistor RF, i.e., the flyback voltage VFLBK.
[0030] The drain of transistor M1 is connected to the input voltage V IN The flyback voltage VFLBK is added to this to obtain a high voltage. Therefore, as described above, the flyback voltage VFLBK is first converted to current by the current conversion circuit 21, and then converted back to voltage by the resistor REI, thereby inputting the voltage V to the switching control IC 10. IN It is designed to prevent a voltage exceeding a certain level from being applied.
[0031] Error amplifier 22 has terminal T3 connected to its non-inverting input, to which the feedback signal Vfb is input. Error amplifier 22 also has a reference voltage Vref input to its inverting input. Error amplifier 22 outputs an error signal Verr1 corresponding to the error between the feedback signal Vfb and the reference voltage Vref. The reference voltage Vref is set to the voltage generated across resistor REI when the flyback voltage VFLBK reaches a desired voltage. Error amplifier 22 outputs an error signal Verr1 that increases as the feedback signal Vfb increases.
[0032] The sample-and-hold circuit 23 includes a switch SW that is turned on when transistor M1 is off, and a hold capacitor CS. Switch SW is connected to the output of error amplifier 22 and one end of hold capacitor CS. The other end of hold capacitor CS is connected to ground. The sample-and-hold circuit 23 holds (retains) the error signal Verr1 output from error amplifier 22 when transistor M1 is off. By providing the sample-and-hold circuit 23, the error signal Verr1 can continue to be output even when transistor M1 is on and the flyback voltage VFLBK is not generated.
[0033] The current conversion circuit 24 converts the held error signal Verr1 into a current and charges and discharges the phase compensation capacitor CC of the phase compensation circuit 25. The phase compensation circuit 25 performs phase compensation and outputs an error signal Verr2 corresponding to the charging and discharging by the current conversion circuit 24.
[0034] The current conversion circuit 24 includes a current source 241 and a transistor M3. Transistor M3 is made of an N-channel field-effect transistor. The drain of transistor M3 is connected to the current source 241 and the source is connected to ground. The gate of transistor M3 is connected to one end of the hold capacitor CS. The drain of transistor M3 is connected to terminal T4. The phase compensation circuit 25 includes a resistor RC and a phase compensation capacitor CC connected in series between terminal T4 and ground.
[0035] Transistor M3 draws a larger current as the error signal Verr1 increases. When the feedback signal Vfb is higher than the reference voltage Vref and the error signal Verr1 is high, the current flowing through transistor M3 becomes greater than the constant current supplied from current source 241, and the phase compensation capacitor CC is discharged. When the phase compensation capacitor CC is discharged, the error signal Verr2 output from terminal T4 becomes lower. When the feedback signal Vfb is lower than the reference voltage Vref and the error signal Verr1 is low, the current flowing through transistor M3 becomes less than the constant current supplied from current source 241, and the phase compensation capacitor CC is charged. When the phase compensation capacitor CC is charged, the error signal Verr2 output from terminal T4 becomes higher.
[0036] The PWM control circuit 26 outputs a PWM signal Vpwm with a duty cycle corresponding to the error signal Verr2 to the gate of transistor M1. The error signal Verr2 is a voltage corresponding to the error signal Verr1, as described above.
[0037] The PWM control circuit 26 includes a PWM comparator 261 and an oscillator circuit 262 that outputs a sawtooth wave with a constant period. Terminal T4 is connected to the non-inverting input of the PWM comparator 261, and the error signal Verr2 is input to it. The output of OSC262 is connected to the inverting input of the PWM comparator 261, and the sawtooth wave output from OSC262 is input to it. The gate of transistor M1 is connected to the output of the PWM comparator 261 via terminal T5.
[0038] The PWM comparator 261 compares the error signal Verr2 with a sawtooth wave and outputs a PWM signal Vpwm that is high level while the error signal Verr2 is higher than the sawtooth wave. In other words, the PWM comparator 261 outputs a PWM signal Vpwm whose duty cycle decreases as the error signal Verr2 decreases. As a result, when the flyback voltage VFLBK rises above the desired voltage, the PWM signal Vpwm with a low duty cycle is output, causing the flyback voltage VFLBK to decrease to the desired voltage.
[0039] Furthermore, the PWM comparator 261 outputs a PWM signal Vpwm whose duty cycle increases as the error signal Verr2 increases. As a result, when the flyback voltage VFLBK falls below the desired voltage, the PWM signal Vpwm with a high duty cycle is output, causing the flyback voltage VFLBK to rise to the desired voltage.
[0040] According to the embodiment described above, the sample-and-hold circuit 23 is provided at the output of the error amplifier 22. The charge-discharge time constant of the hold capacitor CS is determined by the output resistance of the error amplifier 22 and the capacitance of the hold capacitor CS. The output resistance of the error amplifier 22 can be designed to be smaller than that of an external resistor REI (the resistor REI cannot be designed to be small because reducing its resistance value would lower the voltage input to the error amplifier 22).
[0041] Furthermore, by incorporating the hold capacitor CS into the switching control IC 10, which is less susceptible to external noise, it can be designed with a small capacitance. As a result, the charge and discharge time constant of the hold capacitor CS in the sample-and-hold circuit 23 can be reduced, improving the transient response characteristics.
[0042] (Second Embodiment) Next, the second embodiment will be described with reference to Figure 2. In Figure 2, parts equivalent to those already described in the first embodiment with respect to Figure 1 are denoted by the same reference numerals, and their detailed descriptions are omitted.
[0043] The flyback converter 1B consists of a transformer TR with magnetically coupled primary winding L1 and secondary winding L2, a transistor M1, a diode D1, and an output capacitor C. OUT It also includes a switching control circuit 2B.
[0044] The switching control circuit 2B includes a current conversion circuit 21, a resistor REI, an error amplifier 22, a sample-and-hold circuit 23, a current conversion circuit 24, a phase compensation circuit 25, a PWM control circuit 26, and a charge / discharge circuit 27. The difference between the switching control circuit 2B of the second embodiment and the switching control circuit 2 of the first embodiment is the inclusion of the charge / discharge circuit 27. In the second embodiment, the charge / discharge circuit 27 is built into the switching control IC 10B.
[0045] The switching control circuit 2B controls the on / off state of transistor M1 so that the feedback signal Vfb and the reference voltage Vref are equal, similar to the switching control circuit 2 of the first embodiment. Therefore, in the steady state, the feedback signal Vfb and the reference voltage Vref are approximately equal, and the feedback signal Vfb fluctuates within a certain range centered on the reference voltage Vref. Input voltage V IN When the load current fluctuates, the flyback voltage VFLBK fluctuates significantly, and the feedback signal Vfb, which corresponds to the flyback voltage VFLBK, also fluctuates significantly beyond a certain range.
[0046] The charge / discharge circuit 27 is a circuit that, when it detects that the feedback signal Vfb has fallen outside a certain range centered on the reference voltage Vref, discharges or charges the phase compensation capacitance CC to improve the transient response characteristics. The charge / discharge circuit 27 includes a current source 271 as a first current source, a current source 272 as a second current source, a comparator 273 as a first comparator, a latch circuit 274 as a first latch circuit, a comparator 275 as a second comparator, an inverter 276, and a latch circuit 277 as a second latch circuit.
[0047] Current source 271 is located between terminal T4 and the power supply. When current source 271 is connected to terminal T4, it charges the phase compensation capacitor CC with current ICH. Current source 272 is located between terminal T4 and ground. When current source 272 is connected to terminal T4, it discharges the phase compensation capacitor CC with current IDCH.
[0048] Comparator 273 compares the feedback signal Vfb with an upper limit value VROV within a certain range. Comparator 273 receives the feedback signal Vfb as its non-inverting input and the upper limit value VROV as its inverting input. Comparator 273 outputs a Hi-level comparison signal if the feedback signal Vfb is higher than the upper limit value VROV, and outputs a Lo-level comparison signal if the feedback signal Vfb is lower than the upper limit value VROV.
[0049] When the latch circuit 274 receives a comparison result (a high-level comparison signal) from the comparator 273 indicating that the feedback signal Vfb exceeds the upper limit VROV, it holds the output of a high-level signal until a reset signal RST is input. When a high-level signal is output from the latch circuit 274, the current source 272 is connected to terminal T4, and the phase compensation capacitor CC is discharged. The reset signal RST is synchronized with the on / off cycle of transistor M1, and the latch circuit 274 is reset when transistor M1 turns off.
[0050] Therefore, when the feedback signal Vfb exceeds the upper limit VROV, the phase compensation capacitance CC is discharged not only by the current conversion circuit 24 but also by the current IDCH from the current source 272. As a result, the discharge component due to current IDCH and the error signal Verr2 decrease rapidly, and the duty cycle of the PWM signal Vpwm can be rapidly reduced, thereby improving the transient response characteristics.
[0051] Comparator 275 compares the feedback signal Vfb with a lower limit value VRLV within a certain range. Comparator 275 receives the feedback signal Vfb as its non-inverting input and the lower limit value VRLV as its inverting input. Comparator 275 outputs a Hi-level comparison signal when the feedback signal Vfb is higher than the lower limit value VRLV, and outputs a Lo-level comparison signal when the feedback signal Vfb is lower than the lower limit value VRLV.
[0052] The inverter 276 inverts the output of the comparator 275 and inputs it to the latch circuit 277. When the latch circuit 277 receives a comparison result (a high-level comparison signal) from the inverter 276 indicating that the feedback signal Vfb exceeds the lower limit VRLV, it holds the output of a high-level signal until a reset signal RST is input. When a high-level signal is output from the latch circuit 277, the current source 271 is connected to terminal T4 and the phase compensation capacitor CC is charged. The reset signal RST is synchronized with the on / off cycle of transistor M1, and the latch circuit 277 is reset when transistor M1 turns off.
[0053] Therefore, when the feedback signal Vfb exceeds the lower limit VRLV, the phase compensation capacitance CC is charged not only by the current conversion circuit 24 but also by the current ICH from the current source 271. As a result, the charge from current ICH causes the error signal Verr2 to rise rapidly, and the duty cycle of the PWM signal Vpwm can be increased rapidly, thereby improving the transient response characteristics.
[0054] (Third embodiment) Next, the third embodiment will be described with reference to Figure 3. In Figure 3, parts equivalent to those already described in the second embodiment in Figure 2 are denoted by the same reference numerals, and their detailed descriptions are omitted.
[0055] The flyback converter 1C consists of a transformer TR with magnetically coupled primary winding L1 and secondary winding L2, a transistor M1, a diode D1, and an output capacitor C. OUT It also includes a switching control circuit 2C.
[0056] The switching control circuit 2C includes a current conversion circuit 21, a resistor REI, an error amplifier 22C, a sample-and-hold circuit 23C, a PWM control circuit 26, and a charge / discharge circuit 27. The difference between the switching control circuit 2B of the second embodiment and the switching control circuit 2C of the third embodiment is the placement of the sample-and-hold circuit 23C. The sample-and-hold circuit 23C is built into the switching control IC 10C.
[0057] The sample-and-hold circuit 23C is a circuit that holds the feedback signal Vfb when transistor M1 is off and outputs it to the error amplifier 22C. The sample-and-hold circuit 23C is omitted from Figure 3, but like the first embodiment, it consists of a switch SW and a hold capacitor CS.
[0058] The error amplifier 22C is composed of the error amplifier 22 of the first and second embodiments and the current conversion circuit 24. When the feedback signal Vfb is higher than the reference voltage Vref, the phase compensation capacitance CC is discharged, and when the feedback signal Vfb is lower than the reference voltage Vref, the phase compensation capacitance CC is charged.
[0059] Even if the placement of the sample-and-hold circuit 23C is changed, the transient response characteristics can be improved by the charge-discharge circuit 27.
[0060] Furthermore, the present invention is not limited to the embodiments described above, and can be modified, improved, etc., as appropriate. In addition, the material, shape, dimensions, number, placement, etc. of each component in the embodiments described above are arbitrary and not limited, as long as they can achieve the present invention.
[0061] In the embodiment described above, the current conversion circuit 24 had the current source 241 connected to the power supply side and the transistor M3 connected to the ground side, but it is not limited to this configuration. The transistor M3 may be connected to the power supply side and the current source 241 to the ground side.
[0062] In the embodiment described above, the feedback signal Vfb was input to the non-inverting input of the error amplifier 22, the reference voltage Vref was input to the inverting input, the error signal Verr2 was input to the non-inverting input of the PWM comparator 261, and a sawtooth wave was input to the inverting input. However, this is not the only configuration. Alternatively, the feedback signal Vfb may be input to the inverting input of the error amplifier 22, the reference voltage Vref may be input to the non-inverting input, the error signal Verr2 may be input to the inverting input of the PWM comparator 261, and a sawtooth wave may be input to the non-inverting input.
[0063] As described above, when the inputs of the error amplifier 22 and the PWM comparator 261 are reversed, the signal output from the latch circuit 274 connects the current source 271 to terminal T4, charging the phase compensation capacitor CC, and the signal output from the latch circuit 277 connects the current source 272 to terminal T4, discharging the phase compensation capacitor CC. In other words, the charge / discharge circuit 27 should be configured such that when the feedback signal Vfb rises, the phase compensation capacitor CC is discharged so that the duty cycle of the PWM signal Vpwm decreases rapidly, and when the feedback signal Vfb decreases, the phase compensation capacitor CC is charged so that the duty cycle of the PWM signal Vpwm increases rapidly.
[0064] Furthermore, the secondary winding L2 of the transformer TR may have multiple windings. Even if there are multiple secondary windings L2 of the transformer TR, the input voltage V to the primary winding L1 remains the same. IN By using the flyback voltage VFLBK that occurs when the power supply is not available as a feedback signal Vfb to perform feedback control, operation equivalent to that of the above embodiment is possible. [Explanation of symbols]
[0065] 1,1B,1C Flyback Converter (Switching Power Supply) 2,2B,2C switching control circuit 22,22C Error Amplifier 23,23C Sample-and-Hold Circuit 26 PWM control circuit 27 Charge / discharge circuit 271 Current source (first current source) 272 Current source (second current source) 273 Comparator (First Comparator) 274 Latch Circuit (First Latch Circuit) 275 Comparator (Second Comparator) 277 Latch Circuit (Second Latch Circuit) CC Phase Compensation Capacitor M1 Transistor TR Transformer L1 Primary winding L2 Secondary winding REI resistor (second resistor) RF resistor (first resistor) RST reset signal VROV upper limit VRLV lower limit Verr1,Verr2 error signal Vfb feedback signal VFLBK Flyback Voltage V IN Input Voltage Vpwm PWM signal Vref Reference Voltage
Claims
1. A transformer in which the primary and secondary windings for boosting or lowering the input voltage are magnetically coupled, A transistor that switches the input voltage supplied to the primary winding on and off, The system includes a switching control circuit that controls the on / off state of the transistor based on the flyback voltage generated in the primary winding when the transistor is off. A flyback type switching power supply, The aforementioned switching control circuit is An error amplifier that outputs an error signal between a feedback signal corresponding to the flyback voltage and a reference voltage, A sample-and-hold circuit is provided at the output of the error amplifier and holds the error signal output from the error amplifier when the transistor is off, The circuit includes a PWM control circuit that outputs a PWM signal to the transistor with a duty cycle corresponding to the error signal output from the sample-and-hold circuit. Switching power supply.
2. In the switching power supply device according to claim 1, The aforementioned switching control circuit is The flyback voltage is applied to a first resistor through which a current corresponding to the flyback voltage flows, It has a second resistor through which the current flowing through the first resistor flows, The voltage generated across the second resistor is input to the error amplifier as the feedback signal. Switching power supply.
3. In the switching power supply device according to claim 1, The aforementioned switching control circuit is A phase compensation capacitor connected to the input of the PWM control circuit, The system includes a charge / discharge circuit that charges or discharges the phase compensation capacitor when it detects that the feedback signal has fallen outside a certain range including the reference voltage. Switching power supply.
4. A transformer in which the primary and secondary windings for boosting or lowering the input voltage are magnetically coupled, A transistor that switches the input voltage supplied to the primary winding on and off, The system includes a switching control circuit that controls the on / off state of the transistor based on the flyback voltage generated in the primary winding when the transistor is off. A flyback type switching power supply, The aforementioned switching control circuit is A sample-and-hold circuit that holds a feedback signal corresponding to the flyback voltage when the transistor is off, An error amplifier that outputs an error signal between the feedback signal held by the sample-and-hold circuit and the reference voltage, A PWM control circuit that outputs a PWM signal with a duty cycle corresponding to the error signal output from the error amplifier to the transistor, A phase compensation capacitor connected to the input of the PWM control circuit, The circuit includes a charge / discharge circuit that charges and discharges the phase compensation capacitor when it detects that the feedback signal has fallen outside a certain range including the reference voltage. Switching power supply.
5. In the switching power supply device according to claim 3 or 4, The aforementioned charging and discharging circuit is A first current source for charging the phase compensation capacitance, A second current source for discharging the phase compensation capacitance, A first comparator compares the feedback signal with the upper limit of a certain range and outputs the comparison result, When the first comparator outputs a comparison result indicating that the feedback signal exceeds the upper limit, a first latch circuit holds the output of a signal that connects one of the first current source and the second current source to the phase compensation capacitor until a reset signal is input. A second comparator compares the feedback signal with the lower limit of the certain range and outputs the comparison result. The second comparator outputs a comparison result indicating that the feedback signal has fallen below the lower limit, and the second latch circuit holds the output of a signal that connects the first current source and the other of the second current source to the phase compensation capacitor until the reset signal is input. The reset signal is synchronized with the on / off cycle of the transistor. Switching power supply.
6. A switching control circuit that controls the on / off switching of a transistor that switches the input voltage supplied to the primary winding of a transformer in a flyback type switching power supply, based on the flyback voltage generated in the primary winding of the transformer, An error amplifier that outputs an error signal between a feedback signal corresponding to the flyback voltage and a reference voltage, A sample-and-hold circuit is provided at the output of the error amplifier and holds the error signal output from the error amplifier when the transistor is off, The circuit includes a PWM control circuit that outputs a PWM signal to the transistor with a duty cycle corresponding to the error signal output from the sample-and-hold circuit. Switching control circuit.
7. A switching control circuit that controls the on / off switching of a transistor that switches the input voltage supplied to the primary winding of a transformer in a flyback type switching power supply, based on the flyback voltage generated in the primary winding of the transformer, A sample-and-hold circuit that holds a feedback signal corresponding to the flyback voltage when the transistor is off, An error amplifier that outputs an error signal between the feedback signal held by the sample-and-hold circuit and the reference voltage, A PWM control circuit that outputs a PWM signal with a duty cycle corresponding to the error signal output from the error amplifier to the transistor, A phase compensation capacitor connected to the input of the PWM control circuit, The system includes a charge / discharge circuit that charges and discharges the phase compensation capacitor when it detects that the feedback signal has fallen outside a certain range including the reference voltage. Switching control circuit.