Semiconductor device manufacturing system and manufacturing method

Abstract

The purpose of the present invention is to provide a technique capable of improving the yield of processing.　One of the semiconductor device manufacturing systems of the present invention includes a semiconductor manufacturing apparatus and a wafer temperature calculation system. The semiconductor manufacturing apparatus is provided with: N heaters disposed in N zones disposed inside a stage in a processing chamber; and P temperature sensors disposed at predetermined measurement locations inside the stage. The wafer temperature calculation system has a storage apparatus that stores, for each of a plurality of temperature distribution conditions obtained in advance: a plurality of first correlation data that indicate correlation functions between operation states of the N heaters and temperatures at L locations on a wafer on the stage; and a plurality of second correlation data that indicate correlation functions between the operation states of the N heaters and temperatures at P locations measured by the P temperature sensors, and that are respectively paired with the plurality of first correlation data.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device manufacturing system and manufacturing method. [Background technology]

[0002] With the increasing three-dimensionality of semiconductor device structures, the demand for manufacturing technologies that can uniformly fabricate complex device structures on a wafer surface is growing year by year. In semiconductor device manufacturing, the desired pattern is formed on the entire wafer surface by repeatedly using a process involving multiple semiconductor manufacturing equipment such as exposure equipment, heat treatment equipment, dry etching equipment, wet cleaning equipment, film deposition equipment, and CMP (Chemical Mechanical Polishing) equipment, thereby fabricating a chip.

[0003] Furthermore, in order to confirm that the fabricated chip is a good chip that meets the required specifications, semiconductor inspection equipment such as CD-SEM (Critical Dimension Scanning Electron Microscope), OCD (Optical Critical Dimension), STEM (Scanning Transmission Electron Microscope), TEM (Transmission Electron Microscope), optical film thickness gauge, and ellipsometer are used to measure predetermined physical quantities such as the dimensions and film thickness of the multi-layer film patterns formed on the surface of the wafer.

[0004] In measurements using these semiconductor inspection devices, it is common practice to measure multiple locations on the wafer surface, rather than just one, in order to check the number of good chips that can be obtained from within the wafer surface. Furthermore, the measurement results obtained in this way, such as dimensions and film thickness, are fed back or feedforward to each semiconductor manufacturing device and reflected in the wafer processing conditions (process conditions). For example, the operation of the semiconductor manufacturing device is adjusted to realize processing conditions that can obtain the desired wafer surface shape, thereby increasing the number of good chips that can be obtained from a single wafer surface and improving the processing yield. In this way, each semiconductor manufacturing device is equipped with a control method that uses feedback or feedforward control based on the data measured by the semiconductor inspection device to make the distribution of predetermined physical quantities on the wafer surface uniform and desired.

[0005] One known method for controlling the in-plane distribution of predetermined physical quantities, such as pattern dimensions and film thickness, to a desired level is to control the temperature distribution in the in-plane direction of the wafer when processing the wafer in a semiconductor manufacturing apparatus. As an example of such prior art, Patent Document 1 addresses the problem of setting the temperature of a hot plate so that the line width of the resist pattern is formed uniformly on the wafer surface, and discloses the following as a method for setting the temperature of a heat treatment plate, a heat treatment plate temperature setting apparatus, a program, and a computer-readable recording medium on which the program is stored: "The hot plate of a post-exposure baking apparatus is divided into multiple hot plate regions, and the temperature can be set for each hot plate region. Each hot plate region of the hot plate is set with a temperature correction value for adjusting the temperature on the wafer surface on which it is placed. The temperature correction value for each hot plate region of the hot plate is calculated and set by a calculation model created from the correlation between the line width of the resist pattern formed by heat treatment on the hot plate and the temperature correction value. The calculation model calculates a temperature correction value that makes the line width on the wafer surface uniform based on the measured line width of the resist pattern." Patent Document 1 discloses a method for controlling the in-plane temperature of a heat treatment plate, which is divided into multiple regions and heated separately, in a post-exposure baking process to promote chemical reactions within a resist film after exposure of a resist pattern with an exposure apparatus, thereby controlling the pattern dimensions in the in-plane direction of a wafer held above the heat treatment plate. It also discloses a method for calculating a target temperature distribution in the in-plane direction for uniform pattern formation on the wafer surface from a relationship between the temperature of the heat treatment plate and the pattern dimensions, which has been acquired in advance, and setting the temperature of each region of the heat treatment plate to achieve that temperature distribution. Furthermore, Patent Document 2 discloses the following regarding substrate temperature adjustment for improving the uniformity of CDs: "A plasma etching system comprises a substrate support assembly having a plurality of independently controllable heater regions. The plasma etching system is configured to control the etching temperature at predetermined locations so as to compensate for non-uniformity of pre-etching and / or post-etching of critical device parameters." Patent Document 2 discloses a technique for a plasma etching apparatus in which an in-plane temperature distribution for forming a uniform pattern on the wafer surface is calculated from a previously acquired relationship between wafer temperature and pattern dimensions, and the output of heater power is controlled to achieve a target in-plane temperature distribution. Furthermore, Patent Document 3 discloses the following regarding dynamic temperature control of a substrate support in a substrate processing system: "A temperature-controlled substrate support for a substrate processing system comprises a substrate support installed in a processing chamber. The substrate support comprises N zones and N resistance heating elements, where N is an integer greater than 1. A temperature sensor is installed in one of the N zones. The controller is configured to calculate the resistance N of the operating N resistance heating element and to adjust the power to N-1 of the N resistance heating element during operation of the substrate processing system in response to the temperature in one of the N zones measured by the temperature sensor, the resistance N of the N resistance heating element, and the resistance ratio of N-1." Patent Document 3 discloses a method for controlling the heaters of N zones by calculating the heater resistance value of one zone and one temperature sensor, calculating the relative temperature relationship between this zone and the other N-1 zones from the ratio of the heater resistance values ​​of each zone, and using the temperature sensor detection value as an indicator. Furthermore, Patent Document 4 discloses the following regarding a plasma processing apparatus and a plasma processing method: "In order to provide a plasma processing apparatus or a plasma processing method that improves the yield of wafer processing, the apparatus comprises: a processing chamber disposed inside a vacuum vessel, in which a wafer to be processed is placed inside and plasma is formed; a sample stage disposed inside the processing chamber and having a cylindrical shape on which the wafer is placed; a plurality of heaters disposed inside the sample stage and arranged in each of three or more radial regions including a circular region and a ring-shaped region surrounding its outer periphery, which are arranged concentrically around the center on multiple radii in the radial direction from the center to the outer periphery, and including a plurality of heaters disposed in each of a plurality of arc-shaped regions divided in the circumferential direction around the center of at least one of the ring-shaped regions; a plurality of temperature sensors disposed inside the sample stage below each of the plurality of radial regions, fewer than the number of the plurality of heaters; and a control unit that adjusts the output of the plurality of heaters according to the output from the temperature sensors so that the temperature of the sample stage approaches a target value, and then adjusts the output of each of the plurality of heaters to a predetermined value." Patent Document 4 discloses a plasma etching apparatus that uses multiple temperature sensors arranged in multiple radial regions, fewer than the number of heaters, and adjusts the output of multiple heaters according to the output from the temperature sensors to bring the temperature of the sample stage closer to a target value, and then adjusts the output of each of the multiple heaters to a predetermined value, thereby improving the yield of wafer processing and changing the temperature distribution in a short time. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2006-228816 [Patent Document 2] Special Publication No. 2013-513967 [Patent Document 3] Special Publication No. 2021-530109 [Patent Document 4] International Publication No. 2021 / 214854 [Overview of the project] [Problems that the invention aims to solve]

[0007] With the advancements in semiconductor technology, the conventional technologies described above have presented new problems in the following respects. In other words, when calculating the target in-plane temperature distribution for the formation of a desired semiconductor device circuit pattern on the wafer surface from a relationship between the wafer temperature and pattern dimensions, such as the CD (Critical Dimension) value, and applying this to adjusting the heater power output to achieve the target in-plane temperature distribution, it has become necessary to divide the in-plane area more finely and perform more precise temperature control. However, as the number of heater regions increases, the number of temperature sensors also increases, leading to challenges such as increased costs and difficulty in securing space to place the temperature sensors. As a countermeasure, Patent Document 3 discloses a method that uses the heater resistance value of each zone as an alternative to a temperature sensor. While this method is effective for uniform control of wafer temperature, it has become clear that the accuracy of temperature control decreases when a temperature gradient is actively applied to the wafer surface. This is because the temperature gradient in the heater area differs from that in the wafer surface due to heat diffusion within the wafer surface. Although it is possible to estimate the temperature of the heater area using the resistance value, the temperature of the wafer area corresponding to the heater location is affected by the ambient temperature. On the other hand, Patent Document 4 discloses a method for controlling the in-plane temperature distribution using a thermal interference matrix that takes into account thermal crosstalk between zones. This method is divided into two steps: one step of performing feedback control to reduce the error between the output from temperature sensors (which are fewer than the number of heaters) and the target temperature; and the other step of controlling the heater output using a thermal interference matrix that shows a predetermined temperature correlation between zones near the target temperature. While this method is effective when controlling the temperature distribution to a predetermined level before the device is put into operation, it has become clear that the accuracy of temperature control decreases when the temperature distribution is changed according to the type of wafer or when the temperature distribution is flexibly changed according to the physical quantities of the wafer before etching. The reason for this is similar: the correlation between zones regarding wafer temperature fluctuates depending on the temperature distribution conditions. As a result, deviations from the target temperature occur, and it has been found that the yield of the process is impaired, such as when the formed circuit pattern fails to achieve the desired performance.

[0008] Thus, while conventional technologies considered minimizing the temperature difference of the wafer during processing, they did not adequately consider the yield of wafer processing when precise temperature control is required under conditions of large temperature differences. The object of the present invention is to provide a technology that enables improvement of processing yield. [Means for solving the problem]

[0009] To solve the above problems, one representative semiconductor device manufacturing system of the present invention is a semiconductor device manufacturing system including a semiconductor manufacturing apparatus and a wafer temperature calculation system, wherein the semiconductor manufacturing apparatus comprises N heaters arranged in N (N is a positive integer of 1 or more) zones arranged inside a stage in a processing chamber, and P (P is a positive integer of N or less) temperature sensors arranged at predetermined measurement locations inside the stage, and the wafer temperature calculation system comprises a plurality of first correlation data showing a correlation function between the operating state of the N heaters and the temperature at L (L is a positive integer of 1 or more) locations on the wafer on the stage for each of a plurality of temperature distribution conditions obtained in advance, and a plurality of second correlation data showing a correlation function between the operating state of the N heaters and the temperature at P locations measured by the P temperature sensors for each of the temperature distribution conditions, and each paired with the plurality of first correlation data, The wafer temperature calculation system comprises a storage device for storing the following, and is characterized in that, in a state in which the operating state of the N heaters is controlled using the plurality of first correlation data so that the temperature of the L location on the wafer becomes a target temperature distribution, the temperature of the wafer is adjusted so that the difference between the measured values ​​of the P temperature sensors corresponding to the temperature distribution condition and the predicted values ​​of the P temperature sensors calculated using any of the second correlation data from the plurality of second correlation data is minimized or less than a predetermined value, or the temperature of the wafer is adjusted so that the variation in the difference between the measured values ​​of the P temperature sensors calculated at a predetermined measurement location and the predicted values ​​calculated using the second correlation data is minimized or less than a predetermined value, by selecting a first correlation data paired with the second correlation data from the plurality of first correlation data. [Effects of the Invention]

[0010] According to the present invention, the yield of processing is improved. Other issues, configurations, and effects not mentioned above will be clarified by the description of the embodiments for carrying out the invention below. [Brief explanation of the drawing]

[0011] [Figure 1] Figure 1 is a schematic diagram showing the configuration of a semiconductor device manufacturing system according to Embodiment 1 of the present invention. [Figure 2] Figure 2 is a schematic longitudinal cross-sectional view showing the configuration of the wafer stage in the semiconductor device manufacturing apparatus according to Example 1. [Figure 3] Figure 3 is a schematic plan view showing an example of the arrangement of zones on the upper surface of the wafer stage. [Figure 4] Figure 4 shows the relationship between heater temperature and heater resistance. [Figure 5] Figure 5 shows the correlation between the temperatures from which data is acquired in advance. [Figure 6] Figure 6 is a flowchart for setting the target temperature value to be entered into the recipe. [Figure 7] Figure 7 shows the pre-acquired data used to calculate the target temperature value to be entered into the recipe. [Figure 8] Figure 8 is a flowchart showing the wafer temperature control operation related to Example 1. [Figure 9] Figure 9 is a flowchart showing the operation of wafer temperature control related to Example 2. [Figure 10] Figure 10 is a flowchart showing the operation of temperature distribution determination in Example 2. [Figure 11] Figure 11 shows an example of a method for selecting a thermal interference matrix related to Example 3. [Figure 12] Figure 12 is a diagram relating to the correlation of temperatures at which data is acquired in advance, in the context of Example 4. [Figure 13] Figure 13 is a flowchart showing the operation of wafer temperature control in Example 4. [Figure 14] Figure 14 is a diagram comparing the effects of the present invention with those of the prior art. [Modes for carrying out the invention]

[0012] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to these embodiments. Furthermore, in the drawings, identical parts are denoted by the same reference numerals. When there are multiple components with the same or similar function, they may be described using the same symbol but with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted in the description. The positions, sizes, shapes, and ranges of the components shown in the drawings may not represent their actual positions, sizes, shapes, and ranges in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings.

[0013] In this disclosure, "surface" may refer not only to the surface of the plate-like member, but also to the interface of a layer contained within the plate-like member that is substantially parallel to the surface of the plate-like member. Furthermore, "upper surface" and "lower surface" refer to the surfaces shown above or below the plate-like member or the layers contained within the plate-like member in the drawing. In addition, "upper surface" and "lower surface" may also be referred to as "first surface" and "second surface." Furthermore, "upward" refers to the direction vertically upward when a plate-like member or layer is placed horizontally. The direction opposite to upward is called "downward." Furthermore, "in-plane distribution" refers to the distribution in the in-plane direction. It is also called "distribution in the in-plane direction." For example, when we refer to the in-plane direction of a wafer (hereinafter also referred to as "wafer"), it refers to the position in the direction parallel to the main surface of the wafer when the wafer is placed.

[0014] [Example 1] (Manufacturing system configuration) Figure 1 is a schematic diagram showing the configuration of a semiconductor device manufacturing system according to Embodiment 1 of the present invention. Figure 1 schematically shows the overall configuration of a semiconductor device manufacturing system, and shows a semiconductor wafer processing apparatus such as an etching apparatus, which processes a semiconductor wafer to realize the distribution of a predetermined physical quantity (for example, the shape or dimensions of a circuit pattern formed on the wafer surface) in the in-plane direction of the wafer.

[0015] The semiconductor device manufacturing system of this embodiment includes a plurality of semiconductor device manufacturing apparatuses 101 (shown as 101a, 101b, ... in this figure), such as etching apparatuses, each equipped with a sample stage (wafer stage) on which a wafer is placed on the upper surface and which has the function of variably adjusting the temperature distribution in the in-plane direction of the wafer, along with a plurality of wafer measuring devices 102 (102a to 102z) capable of measuring the distribution of a predetermined physical quantity in the in-plane direction of the wafer, and a wafer temperature calculation system 100 that calculates the temperature distribution in the in-plane direction of the wafer processed by the semiconductor device manufacturing apparatus 101. In the following description, unless otherwise necessary, they will be referred to as semiconductor device manufacturing apparatus 101 and wafer measuring device 102. Furthermore, these wafer temperature calculation system 100, the plurality of semiconductor device manufacturing apparatuses 101, and wafer measuring devices 102 are connected to each other via wired or wireless communication means so that they can send and receive signals to each other. For data transmission and reception, it is desirable that the wafer temperature calculation system 100, each semiconductor device manufacturing apparatus 101, and each wafer measurement apparatus 102 are connected to a so-called network such as Ethernet and configured to communicate via the network. However, any configuration that allows data to be sent and received mutually is acceptable. For example, data may be exchanged mutually using recording media such as floppy disks, USB memory or SD cards, or CDs, DVDs or Blu-ray discs (registered trademarks).

[0016] Furthermore, the wafer temperature calculation system 100 includes a arithmetic unit 103 such as a microprocessor, a storage device 104 in which data related to the wafer and software that drives the arithmetic unit 103 are stored in a read / write manner, and an interface 105 that is connected to a network in a communicative manner and sends and receives signals including data, and these are configured to communicate. The wafer temperature calculation system 100 may also be configured in which the arithmetic unit 103, storage device 104 and interface 105 are built into a so-called computer such as a PC or server, and the storage device 104 may be located in a remote location that is connected in a communicative manner. Each semiconductor device manufacturing device 101 and each wafer measurement device 102 do not need to be located inside the same building, and each may be located in a separate building or in a separate location that is connected in a communicative manner.

[0017] The wafers 205 processed by each semiconductor device manufacturing apparatus 101 (wafers 205 will be described later) are transported to one of the multiple wafer measuring devices 102 (102a to 102z), where the distribution of predetermined physical quantities to be detected or evaluated in the in-plane direction of the wafer 205 is detected. If necessary, the distribution of predetermined physical quantities before processing by each semiconductor device manufacturing apparatus 101 can also be detected by one of the wafer measuring devices 102. However, it is not necessarily limited to detecting predetermined physical quantities of the processed wafer 205 immediately after processing by each semiconductor device manufacturing apparatus 101; the wafers 205 processed by each semiconductor device manufacturing apparatus 101 may be transported to the wafer measuring device 102, and the distribution of predetermined physical quantities in the in-plane direction of the wafer 205 may be detected.

[0018] Furthermore, the surface of a wafer 205 processed by a single semiconductor device manufacturing apparatus 101 can also be measured using multiple wafer measuring devices 102. That is, the wafer 205 processed by the semiconductor device manufacturing apparatus 101a can be transported to wafer measuring device 102a, and then to wafer measuring device 102b, and the distribution of predetermined physical quantities on the surface of the wafer 205 can be detected in each of these devices.

[0019] (Wafer stage configuration) Figure 2 is a schematic longitudinal cross-sectional view showing the configuration of the wafer stage 200 of the semiconductor device manufacturing apparatus according to Embodiment 1. As will be described later, the wafer stage (hereinafter also simply referred to as "stage") 200 has a disc shape passing through the central axis cl in a plan view, and the internal structure of the wafer stage 200 is approximately symmetrical with respect to the central axis cl, so one side of the structure is omitted from the description from the central axis cl. The semiconductor device manufacturing apparatus (hereinafter also referred to as "semiconductor manufacturing apparatus") 101 includes N heaters 201 arranged in N (N is a positive integer of 1 or more) zones located inside the stage 200 in the processing chamber 1010, and P (P is a positive integer of N or less) temperature sensors 206a and 206d arranged at predetermined measurement locations inside the wafer stage 200. Specifically, Embodiment 1 will describe the case of four heaters 201 and two temperature sensors 206a and 206d.

[0020] Each semiconductor device manufacturing apparatus 101 in this embodiment has a wafer stage 200, as shown in Figure 2, inside a processing chamber 1010 within a container. The wafer stage 200 has a disc or cylindrical shape that shares a central axis cl with the central axis of the cylindrical processing chamber 1010, and is equipped with a plurality of heaters 201 (201a to 201d) arranged inside along the upper surface of its metal substrate, and multiple concentric or spiral arrangements inside the substrate below the heaters 201, through which a coolant for cooling the wafer flows.

[0021] By adjusting the heat output of the multiple heaters 201 and the temperature of the refrigerant flowing through the refrigerant channel 204, the temperature distribution in the in-plane direction of the wafer 205 is adjusted while the wafer 205 is placed and held on the upper surface of the wafer stage 200. The upper surface of the wafer stage 200 may be covered with, for example, a dielectric film. In the wafer stage 200 of this embodiment, each heater 201 is arranged in four heater zones (four regions formed between concentric circles and divided into annular sections; also simply referred to as "zones") radially on the upper surface of the wafer stage 200 on which the wafer 205 is placed. For example, concentric annular heaters can be used for the heaters 201. This example is not limited to this one, and multiple zones divided in multiple radial and circumferential directions may be arranged. Each heater power supply 202 (202a~202d) electrically connected to each heater 201 receives a command signal from the heater control unit 203, which is connected to them for communication purposes. Based on this command signal, the power (current, voltage) output is adjusted, thereby adjusting the amount of heat generated and the temperature of each zone 1~4, and consequently the temperature of the area of ​​the wafer 205 placed on the wafer stage 200 that corresponds to zones 1~4. Here, if there are N heaters 201, each heater power supply 202 is assigned a number from 1 to N (the number of heater power supplies) as its name, so that it can be determined which zone the heater power supply is connected to. The name of the heater power supply can be any name as long as each heater power supply can be distinguished, but in this embodiment, a positive integer from 1 to N (N=4) is assigned.

[0022] In this embodiment, the wafer stage 200 is divided into zones 1 to 4. Zone 1 is a circular area located in the center of the wafer stage 200 and is mainly heated by the heater 201a. The heater power supply 202a that supplies power to the heater 201a is named "1". Zone 2 is an annular region located outside Zone 1, and is primarily heated by heater 201b. The heater power supply 202b that supplies power to heater 201b is designated as "2". Zone 3 is an annular region outside of Zone 2, and is primarily heated by heater 201c. The heater power supply 202c that supplies power to heater 201c is designated "3". Also, Zone 4 is Zone 3 Outside a This is an annular region, primarily heated by heater 201d. The heater power supply 202d that supplies power to heater 201d is designated "4".

[0023] Furthermore, the predetermined measurement locations where the temperature sensors are placed are located at different positions in the radial direction of the wafer stage 200. The predetermined measurement locations are divided into at least two locations, one towards the center and the other towards the edge, starting from a point 1 / 2R radially relative to the radius R of the wafer stage 200. Additionally, the predetermined measurement locations overlap with the downward projection plane of the area of ​​the wafer stage 200 where the heater 201 is located. In this embodiment, temperature sensors 206a and 206d are placed inside the substrate 207 below the zone to detect the temperature of the substrate 207 of the wafer stage 200. In this embodiment, two temperature sensors, 206a and 206d, are placed in the central part (corresponding to the vicinity of zone 1) and the edge (corresponding to the vicinity of zone 4). In the radial direction, the central part is closer to the center than the 1 / 2R position, and the edge is further out than the 1 / 2R position. Furthermore, the measurement location for temperature sensor 206a overlaps with the downward projection plane of zone 1, and the measurement location for temperature sensor 206d overlaps with the downward projection plane of zone 4. Furthermore, the measured values ​​from temperature sensors 206a and 206d are transmitted to the heater control unit 203 or the wafer temperature calculation system 100, and are linked (associated) with data for setting the output of the heater power supply 202 using the measured temperature information.

[0024] Furthermore, the refrigerant circulates between the refrigerant flow path 204 and a refrigerant temperature controller connected via a pipeline (not shown), and is regulated to a predetermined temperature range in the refrigerant temperature controller. If necessary, multiple refrigerants set to different temperatures may be supplied to each of the refrigerant flow paths 204. Also, the wafer stage 200 can be configured without the refrigerant flow path 204 if sufficient temperature control is possible within the wafer surface.

[0025] In Figure 2, the refrigerant flow path 204 is located below the heater 201, but the refrigerant flow path 204 can also be located above the heater. Furthermore, although not shown in Figure 2, the wafer stage 200 may be equipped with a holding mechanism such as a mechanical chuck, vacuum chuck, or electrostatic chuck that can hold the wafer 205 placed on its upper surface and suppress misalignment.

[0026] Figure 3 shows an example of zones on the upper surface of the wafer stage 200 as seen from above. Figure 3 is a schematic plan view showing an example of the arrangement of zones on the upper surface of the wafer stage. In Figure 3(a), an example of a pattern divided into four concentric circles in the radial direction, as in this embodiment, is shown, and the wafer stage 200 is divided into zones 1 to 4 radially from the center. Figure 3(b) shows an example of a concentric circle pattern divided in the circumferential direction as well, and Figure 3(c) shows an example of a pattern in which the zones are divided in a grid. In the example in Figure 3(b), in addition to being divided into four concentric circles in the radial direction, it is divided into eight in the circumferential direction, resulting in 32 regions. In the example in Figure 3(c), it is divided into rectangular regions.

[0027] In this embodiment, the size, arrangement, and number of zones are not limited to those illustrated in Figure 3, as long as the desired temperature distribution in the in-plane direction of the wafer 205 is achieved by appropriately selecting the shape and position of the heater 201 or the output of the heater power supply 202. Similarly, the temperature sensor is not limited to the two cases, and the plane Inside Any configuration that allows for the measurement of temperature distribution in a given direction is acceptable.

[0028] (Controlling wafer temperature) In each semiconductor device manufacturing apparatus 101, a specific correlation exists between the output (heat generation) of the multiple heaters 201 provided in each apparatus, or the output from the heater power supply 202 and the temperature of the refrigerant, and the temperature of each zone of the wafer 205 placed on the wafer stage 200 (hereinafter also referred to as "wafer temperature"). Specific examples will be described later, but this correlation between the heater 201 and the wafer temperature is referred to as the first correlation. Furthermore, a specific correlation also exists between the output from the heater power supply 202 and the temperature of the refrigerant, and the measured values ​​(detected values) of the multiple temperature sensors 206a and 206d placed in the wafer stage 200. This correlation is referred to as the second correlation. It is preferable to maintain multiple correlations depending on the previously acquired in-plane temperature distribution conditions of the wafer (hereinafter also referred to as "temperature distribution conditions" or simply "conditions"). For example, the correlation between the first and second conditions is stored as linked data, including the in-plane distribution conditions, such as the first and second correlation pairs for in-plane distribution condition 1, the first and second correlation pairs for in-plane distribution condition 2, and the first and second correlation pairs for in-plane distribution condition 3.

[0029] In this embodiment, such a correlation is referred to as the first correlation, and using the data showing the first correlation, which has been calculated or acquired in advance, along with the output of the heater power supply 202 and the set value of the refrigerant temperature, the in-plane direction of the wafer 205 is measured. oh The temperature distribution can be predicted. Alternatively, by setting the in-plane temperature distribution of the wafer 205 and using the first correlation, the output value of the heater power supply 202 can be estimated.

[0030] Furthermore, multiple temperature sensors 206a and 206d can be placed to detect temperature and acquire data on the temperature gradient of the zone being processed. In addition, the accuracy of the data on the zone's temperature gradient can be evaluated by comparing the predicted values ​​of temperature sensors 206a and 206d, which are predicted from the second correlation, with the measured values ​​of temperature sensors 206a and 206d during processing. The evaluation of accuracy involves selecting the correlation with the smallest prediction error of the temperature sensor output from among the second correlations maintained as in-plane distribution condition 1, in-plane distribution condition 2, and in-plane distribution condition 3.

[0031] (Prior data acquisition) In this invention, the acquisition of prior data (correlation data) used to adjust the temperature of wafer 205 is divided into two steps. The prior data consists of multiple first correlation data (W) corresponding to the temperature distribution conditions (hereinafter also simply referred to as "conditions"). a k ) and multiple second correlation data (W b k ) is obtained. Multiple first correlation data (W a k ) and multiple second correlation data (W b k The data includes at least three temperature distributions corresponding to the temperature of the wafer: a temperature distribution where the center is hotter than the edges, a temperature distribution where the edges are hotter than the center, and a uniform temperature distribution across the wafer surface. First, let's explain the first step.

[0032] The operating state of heater 201 can be calculated using at least one of the following: heater temperature, heater power, and heater current. In this embodiment, the resistance value of heater 201 (hereinafter also referred to as "heater resistance value") is used as a parameter for controlling the output of heater 201. The heater resistance value was calculated from the heater current and heater voltage attached to the heater power supply 202, but any means capable of measuring or calculating the heater resistance value, such as heater current and heater voltage, may be applied to this embodiment. Generally, the electrical resistance of a material changes with temperature, and many metal conductors increase in resistance as the temperature rises. To utilize the correlation between the resistance value of heater 201 and the temperature of heater 201, a conversion table between the resistance value and temperature of heater 201 is prepared in advance. The temperature at the time of creating the conversion table was measured using a temperature-measuring sensor wafer. The sensor wafer is, for example, a device equipped with a substrate body having the same shape as wafer 205 and temperature sensors that measure the temperature at multiple locations on the substrate body. The relationship (conversion table) between each heater temperature of heater 201 and the corresponding heater resistance value is calculated under conditions where the temperature distribution across the wafer surface is uniform. Specifically, the measurement conditions are preferably such that there is no temperature distribution across the wafer surface on the wafer stage 200 (a condition in which the temperature measured by the sensor wafer is within a predetermined temperature range (e.g., ±1°C) at any measurement point on the wafer stage 200). In this embodiment, the heater power was controlled so that the temperature at 30 points output from the sensor wafer was uniform, and the heater resistance value and the measured value of the sensor wafer were acquired. The measured temperatures of temperature sensors 206a and 206d placed on the wafer stage 200 were also acquired simultaneously.

[0033] In the wafer stage 200, making the temperature uniform within the wafer surface (a state without temperature distribution) is to reduce the influence of heat diffusion in the in-plane direction of the wafer. When the temperature within the wafer surface becomes uniform, the temperatures of heaters 201a to 201d and the temperature of the sensor wafer approximately coincide. In this embodiment, the coordinates of heater 201 were used with the coordinates of the central part of each heater as representative values. The coordinates of the central part of the heater correspond to the position at the center of the length (width) of the heater in the radial direction. Although it is preferable that the measurement points of the sensor wafer and the central parts of each heater approximately coincide, in the case of non-coincidence, from the measured values of 30 points of the sensor wafer, sensor wafer Ha the in-plane distribution of temperature may be interpolated to approximate the temperature at the central part of each heater.

[0034] With the above procedure, the wafer temperature and the resistance value of heater 201 were measured. FIG. 4 is a diagram showing the relationship between the sensor wafer temperature and the heater resistance value. The horizontal axis "sensor wafer temperature" indicates the temperature (measured value) of the sensor wafer, and the vertical axis "heater resistance" indicates the heater resistance value of heater 2*. FIG. 4(a) shows the relationship between the temperature of the sensor wafer in zone 1 and the heater resistance value R1 of heater 201a calculated from heater power supply 202a. FIG. 4(b) shows the relationship between the temperature of the sensor wafer in zone 2 and the heater resistance value R2 of heater 201b calculated from heater power supply 202b. FIG. 4(c) shows the relationship between the temperature of the sensor wafer in zone 3 and the heater resistance value R3 of heater 201c calculated from heater power supply 202c. FIG. 4(d) shows the relationship between the temperature of the sensor wafer in zone 4 and the heater resistance value R4 of heater 201d calculated from heater power supply 202d. As shown in FIGS. 4(a) to (d), the resistance values of heater 201 were obtained under the conditions that the temperature of the sensor wafer is uniform at each measurement location and the temperatures are 10°C, 30°C, and 50°C, respectively. In this embodiment, the resistance value of each heater and the temperature of the corresponding sensor wafer showed an approximately linear relationship. Therefore, linear approximation was performed for each relationship in zones 1 to 4 (Equation (1)), and the conversion coefficients a and b shown in FIG. 4(e) were calculated. FIG. 4(e) corresponds to the conversion table of the heater resistance value and temperature. R nThis indicates the heater resistance value (heater resistance value) in zone n (in this embodiment, n is an integer from 1 to 4). h_n This indicates the heater temperature (heater temperature) in zone n. n This is the heater resistance value R n and heater temperature T h_n The intercept of the relationship is shown. Also, equation (2) is given by the temperature T of the sensor wafer. sw The surface is uniform, and the sensor wafer temperature T sw Heater temperature T in zone n h_n We will show the condition that it is equal to [the given condition].

number

[0035] The number of measurement points on the sensor wafer does not have to be limited to three; at least two points are sufficient. Furthermore, when acquiring data from three or more points, a polynomial of degree two or higher may be used instead of a linear equation, and the choice of polynomial can be made depending on the material properties of the heater electrodes and the characteristics of the acquired data.

[0036] Next, we will explain the second step of pre-data acquisition. Following that, we will explain pre-data acquisition under conditions where there is a temperature distribution in the wafer plane. Figure 5 is a diagram showing the correlation of temperatures for which data is acquired in advance. Similar to when creating the conversion table between the resistance value and temperature of heater 201 shown in Figure 4(e), the temperature T of the sensor wafer is used. sw Heater resistance value R n The temperature (measured value) combinations of temperature sensors 206a and 206d are acquired, and a table is created as shown in Figure 5. In Figure 5, there are 4 zones to match the number of heaters, but the number of zones on the sensor wafer may also be 4 to match the number of heaters, or it may be other than 4 to match the measurement locations on the sensor wafer. The temperatures of temperature sensors 206a and 206d are entered in the corresponding zone columns in the table. In this embodiment, the temperature sensor measured values ​​are entered in zone 1 and zone 4, while zone 2 and zone 3 are left blank with no data. When entering data into the table, it is preferable to input the average value over a certain time interval to reduce the influence of noise.

[0037] At this time, data is acquired for both temperature distributions where the temperature in the center of the wafer stage 200 is higher than that at the edges, and conversely, where the temperature in the center of the wafer stage 200 is lower than that at the edges. For example, if the heater has a concentric structure, the temperature of the sensor wafer at the corresponding locations will be recorded as follows: (50°C (temperature of zone 1), 40°C (temperature of zone 2), 30°C (temperature of zone 3), 20°C (temperature of zone 4)), (45°C, 40°C, 35°C, 30°C), with the inner temperature being higher; and as an example, as follows, the outer temperature will be higher, with the outer temperature being higher; and the heater resistance value, sensor wafer temperature, and measured values ​​from the temperature sensors 206a and 206d below the heater will be recorded.

[0038] In this embodiment, as shown in Figure 5(a), three temperature distributions were generated and data acquired under condition 1, where the temperature in the center of the sensor wafer was 25°C or more higher than the temperature at the edges. These temperature distributions are denoted as temperature distributions 1-1, 1-2, and 1-3, respectively. Specifically, they are (50°C, 40°C, 30°C, 20°C) (temperature distribution 1-1) and (50°C, 40°C, 25°C, 10°C) (temperature distribution 1-2). Furthermore, as shown in Figure 5(b), under condition 2, where the temperature in the center of the sensor wafer is 10°C to 25°C higher than the temperature at the edges, three temperature distributions were generated and data was acquired. These temperature distributions were designated as temperature distributions 2-1, 2-2, and 2-3, respectively. Specifically, they were (45°C, 40°C, 35°C, 30°C) (temperature distribution 2-1) and (50°C, 50°C, 45°C, 40°C) (temperature distribution 2-2). Similarly, as shown in Figure 5(c), three temperature distributions (5-1, 5-2, 5-3) ((10°C, 20°C, 35°C, 45°C) (temperature distribution 5-1), (15°C, 30°C, 45°C, 60°C) (temperature distribution 5-2)) were generated under condition 5, where the temperature of the center of the sensor wafer was 25°C or more lower than the temperature of the edges, and as shown in Figure 5(d), three temperature distributions (4-1, 4-2, 4-3) ((10°C, 15°C, 20°C, 25°C) (temperature distribution 4-1), (15°C, 18°C, 22°C, 24°C) (temperature distribution 4-2)) were generated and data was acquired. Furthermore, as shown in Figure 5(e), under condition 3 where there is no temperature distribution within the wafer surface and the temperature is uniform, three temperature distribution patterns (3-1, 3-2, 3-3) were created: (10°C, 10°C, 10°C, 10°C) (temperature distribution 3-1), (30°C, 30°C, 30°C, 30°C) (temperature distribution 3-2), and (50°C, 50°C, 50°C, 50°C) (temperature distribution 3-3). In this way, three temperature distribution patterns were generated for each of the five temperature distribution conditions, and the data was acquired in advance.

[0039] Although not used in this embodiment, data with discontinuous gradient conditions, such as (50°C, 50°C, 50°C, 30°C) for zones 1-4, may be obtained and added as the sixth and subsequent conditions in addition to the five conditions mentioned above. This is to consider thermal diffusion in a part of the wafer rather than the entire wafer.

[0040] The above pre-data acquisition process allows us to determine the case where the sensor wafer temperature is uniform (Condition 3, temperature distribution 3-1~3-3), and the case where the temperature in the center is high and there is a large temperature difference (Condition 1). , Warm For five conditions—a small temperature distribution (condition 2, temperature distribution 2-1 to 2-3), a low temperature in the center with a large temperature difference (condition 5, temperature distribution 5-1 to 5-3), and a small temperature difference (condition 4, temperature distribution 4-1 to 4-3)—data was acquired for the temperature of the sensor wafer, the heater resistance value, and the temperature sensors 206a and 206d.

[0041] Here, the heater resistance value was converted to heater temperature using equation (1), and temperature data for the three elements of the sensor wafer temperature, heater temperature, and temperature sensor was obtained. Note that, considering thermal diffusion within the wafer surface, the sensor wafer temperature T in zone n was calculated using equation (3). sw and heater temperature T in zone n h_n It is assumed that they are different. Therefore, although the temperature of the sensor wafer in zone 3 in temperature distribution 1-1 and zone 3 in temperature distribution 3-2 are the same at 30°C, the heater resistance value at this time may be different, and as a result the heater temperature T h_3 Consider that these may also be different.

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[0042] Next, the temperature T of the sensor wafer. sw and heater temperature T h The relationship (first correlation) was extracted. The matrix showing this relationship is W a This was done. Matrix W a The temperature T of the sensor wafer sw and heater temperature T h It is sometimes expressed as a thermal interference matrix that shows the correlation between W. a The number of rows is equal to the number of measurement points on the sensor wafer or the number of temperature estimation points on the wafer stage 200 interpolated from the sensor wafer, and the number of columns is equal to the number of heaters placed on the wafer stage 200. In the following explanation, the subscript n indicating a zone is omitted when it is not necessary to specify a zone.

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[0043] Matrix W a The elements were calculated by performing the following two-step process. As the first step, matrix W a Let's explain the elements in the first row. The first correlation data (W a k ) and the second correlation data (W bk ) is calculated as a linear combination using matrices. Specifically, matrix W a The element W in the first row a_11 The temperature of the portion of wafer 205 corresponding to zone 1 when heated using only heater 201a, and element W a_12 This corresponds to the temperature of the portion of wafer 205 corresponding to zone 1 when heated using only heater 201b. a The elements can be determined by performing the procedure described above, which involves operating one heater individually and measuring the temperature of the sensor wafer, for all heaters. Alternatively, they may be calculated by thermal simulation. Alternatively, the W of another device with a similar configuration to heater 201 can be used. a You may use this as an approximate value.

[0044] As a second step, the values ​​obtained in the first step are adjusted to match the correlation when multiple heaters 201 are operating simultaneously in the semiconductor device manufacturing apparatus 101. The temperature data of temperature distributions 1-1, 1-2, and 1-3 under condition 1 where the temperature of the central part is 25°C or more greater than the temperature of the edges, and the W obtained in the first step are used. a Set as the initial value ,formula (5) The matrix W is such that the difference between the left and right sides of equation (5) is small. a The elements were fine-tuned. As an example, as shown in equation (6), the matrix W was obtained using gradient descent. a Each element was corrected. m is the number of patterns of pre-acquired data, and when optimized with 3 temperature distribution patterns in condition 1, m=3. η is the learning rate, W a new Repeat equation (6) until convergence occurs. Once converged, the corrected matrix is ​​obtained as matrix W for condition 1. a 1 Let's assume that.

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[0045] Similarly, using the data for temperature distributions 2-1, 2-2, and 2-3 under condition 2, W a The corrected matrix is ​​W a 2This is how it works. By performing corrections for each of the five conditions of the temperature distribution, the heater temperature T h Matrix W for estimating the wafer temperature of wafer 205 a 1 ~W a 5 The following was calculated. In the following explanation, conditions 1 to 5 of the first correlation are shown in superscripts, but if the conditions are not distinguishable, the superscripts are omitted.

[0046] As shown in the tables in Figures 5(a) to 5(e), the matrix W a While acquiring data to determine the elements, the measured values ​​of temperature sensors 206a and 206d are also simultaneously stored. Using this data, W a Using a similar procedure to the method for calculating the elements, the heater temperature T is shown in equation (7) or equation (8). h and the measured values ​​T from temperature sensors 206a and 206d s Matrix W that shows the relationship b We find the matrix W. b This is the measured value T from temperature sensors 206a and 206d. s and temperature T h The term "thermal interference matrix" is sometimes used to describe the correlation between the two. Matrix W b The number of rows is the number of temperature sensors 206a and 206d, which is 2 in this embodiment. The number of columns is the number of heaters 201, which is 4 in this embodiment. Heater temperature T h From the measured values ​​T of temperature sensors 206a and 206d s The matrix W that estimates b Also, W for each of the five conditions of temperature distribution b 1 ~W b 5 This is calculated.

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[0047] The W calculated here a 1 ~W a 5 and W b 1 ~W b5 are respectively linked and held. As shown in FIG. 5(f), for condition k (where k is an integer from 1 to 5), the thermal interference matrix W a k and W b k when taking them, a pre-data acquisition DB (database) for storing the thermal interference matrices W a k and W b k is configured. The pre-data acquisition DB may be included in a storage unit (not shown) of the semiconductor device manufacturing apparatus 101, or may also be included in the storage device 104 of the wafer temperature calculation system 100. For example, for each of a plurality of previously obtained temperature distribution conditions, the wafer temperature calculation system 100 stores a plurality of first correlation data (W a k , (k = 1, 2,...)) indicating the correlation function between the operating states of the N heaters 201 and the temperatures at L (where L is a positive integer of 1 or more) locations of the wafer 205 on the wafer stage 200, and for each of the temperature distribution conditions, a correlation function between the operating states of the N heaters 201 and the temperatures at P locations measured by P temperature sensors, and a plurality of second correlation data (W b k ) that are paired with the plurality of first correlation data respectively. of It is also possible to have a storage device 104 for storing them. Note that the pre-data acquisition DB is not limited to hardware and may be configured by the cloud. The pre-data acquisition process is completed as above.

[0048] (Method for calculating wafer temperature) Next, a method for calculating the set value of the wafer temperature to be actually processed will be described using FIG. 6. FIG. 6 is a flowchart for setting the temperature target value input to the recipe.

[0049] This section describes the operation of calculating a target temperature distribution in the in-plane direction of a wafer 205 in one of the semiconductor device manufacturing apparatuses 101 using the wafer temperature calculation system 100. In the following description, the semiconductor device manufacturing apparatus 101a is used as the target for calculating the target temperature distribution, and the wafer measuring apparatus 102a is used as the device for detecting a predetermined physical quantity. However, in the embodiments of the present invention, the same operation can be performed when other semiconductor device manufacturing apparatuses or wafer measuring apparatuses are used.

[0050] The wafer temperature calculation system 100 calculates matrix W at each wafer stage 200 in each semiconductor device manufacturing apparatus 101. a and matrix W b The correlation expressed by the data is stored in each semiconductor device manufacturing apparatus 101 in a read-write manner, and each data has a function to update as needed. This data is periodically transmitted and received between the wafer temperature calculation system 100 and the semiconductor device manufacturing apparatus 101, and the same content is maintained in both. If the structure of the wafer stage 200, including the heater 201 and heater power supply 202 of the wafer stage 200, or the temperature of the refrigerant is changed, the information related to that change is stored and remembered in the wafer temperature calculation system 100 during the periodic data transmission and reception and is reflected in its operation. As a result, by using the shared data for any wafer 205, a target temperature distribution can be achieved and wafer 205 can be processed with high accuracy.

[0051] First, in step 601, the wafer temperature calculation system 100 has the function of associating the processing recipe used to process the wafer 205 in the semiconductor device manufacturing apparatus 101a with data obtained by the wafer measuring apparatus 102a from the distribution of a predetermined physical quantity in the in-plane direction for the processed wafer 205. Here, the processing recipe includes the target temperature distribution in the in-plane direction of the wafer 205 set in the wafer stage 200, and EachThe data also includes output values ​​and resistance values ​​of the heater power supply 202. This makes it possible to correlate the temperature distribution of the wafer 205 in the semiconductor device manufacturing apparatus 101 with the distribution of a predetermined physical quantity in the in-plane direction of the wafer 205 measured by the wafer measurement apparatus 102.

[0052] Furthermore, the wafer temperature calculation system 100 has a function to associate data with the processing recipe of the semiconductor device manufacturing apparatus 101a if a predetermined distribution of physical quantities in the in-plane direction of the wafer 205 is detected before the wafer 205 is processed in the semiconductor device manufacturing apparatus 101a. With this configuration, the distribution of predetermined physical quantities in the in-plane direction of the wafer 205 before and after processing in the semiconductor device manufacturing apparatus 101a can be associated, and the temperature distribution in the in-plane direction of the wafer set in the semiconductor device manufacturing apparatus 101a and the distribution of the change in the predetermined physical quantities before and after processing can be associated from the difference in the distribution of physical quantities before and after processing.

[0053] Furthermore, in step 602, the wafer temperature calculation system 100 has the function of calculating the correlation between the set value of the in-plane temperature distribution of the wafer 205 in the semiconductor device manufacturing apparatus 101a and the distribution of a predetermined physical quantity in the in-plane direction of the wafer 205, and storing and remembering this as data related to the semiconductor device manufacturing apparatus 101a. This correlation is referred to as the third correlation in this disclosure. This third correlation can be calculated, for example, using data obtained by transporting each wafer 205 to the wafer measuring device 102a and detecting a predetermined physical quantity after processing two or more wafers 205 in the semiconductor device manufacturing apparatus 101a using different temperature distribution settings, prior to processing the wafers 205 for manufacturing semiconductor devices.

[0054] That is, the third correlation is calculated using the result of associating the set conditions of different temperature distributions for two or more wafers 205 with the data of the detection results of the distribution of a predetermined physical quantity in the in-plane direction for each wafer 205. FIG. 7 is a diagram regarding pre-acquired data for calculating the temperature target value input to the recipe. FIG. 7 shows the measurement results for calculating the third correlation with the CD value as the physical quantity. As a method for calculating the third correlation, the least squares method using linear or polynomial approximation can be used, but other methods may also be used.

[0055] FIG. 7(a) shows the CD value (CD1) in zone 1 and the wafer temperature T W_1 The wafer temperature T W_1 is the temperature set for zone 1 defined in the process recipe used in the semiconductor device manufacturing apparatus 101a, and CD1 is the CD value detected when the wafer 205 on which the process defined in the process recipe was performed was measured in the wafer measuring apparatus 102a. Here, different wafer temperatures T W_1 are set for each of the three process recipes, and wafers subjected to three types of processes are obtained. The CD value is measured for each wafer. Also, linear interpolation is performed between the wafer temperature T W_1 and the CD value, and it is shown by a Ta line. Also, the points indicated by the broken lines correspond to the CD values to be formed in zone 1, and vertical broken lines are drawn so that the wafer temperature corresponding to the linearly interpolated straight line and the desired CD value can be understood. Also, horizontal broken lines are drawn at the upper and lower limits of the range of the control target of the CD value.

[0056] Similarly, FIG. 7(b) shows the CD value (CD2) in zone 2 and the wa Haon fer temperature T W_2 FIG. 7(c) shows the CD value (CD3) in zone 3 and the wafer temperature T W_3 FIG. 7(d) shows the CD value (CD4) in zone 4 and the wafer temperature T W_4 In any case, the CD values for the set temperatures of the three wafers are measured.

[0057] Figure 7(e) shows the relationship between CD value and wafer temperature T W_1 Linear complement between When this happens, the slope a n and intercept b n The relationship is shown in Figure 7(e). The relationship shown is the third relationship when a given physical quantity is the CD value. correlation It corresponds to a relationship.

[0058] Next, in step 603, the wafer temperature calculation system 100 has a function to calculate a target temperature distribution that minimizes an objective function using predetermined physical quantities on the wafer stage 200 of the semiconductor device manufacturing apparatus 101a, using the stored third correlation. As an example of the objective function in this embodiment, target values ​​of predetermined physical quantities are set on multiple coordinates in the in-plane direction of the wafer 205, the difference between the target value at a specified coordinate on the surface of the wafer 205 and the predicted value at that specified coordinate calculated based on the third correlation is squared, and these squared values ​​are summed up for the multiple specified coordinates.

[0059] The target values ​​of the predetermined physical quantities used when calculating such an objective function do not necessarily have to be set to the same value in the in-plane direction of the wafer 205. Different target values ​​may be set for each coordinate in the in-plane direction of the wafer 205, for example, so that the processed shape can be obtained as a result of the processing. Furthermore, even at the same coordinate on the wafer 205, the target value may differ depending on the type, content, and conditions of the preceding and succeeding processing. Thus, in this embodiment, an appropriate objective function is set, and the temperature distribution in the in-plane direction of the wafer 205 that minimizes the set objective function is calculated. The target temperature distribution of the wafer 205 during processing is calculated so that the distribution of the desired physical quantities is achieved after processing.

[0060] (Processing in the wafer temperature calculation system) Referring to Figure 8, the flow of processing performed by the semiconductor device manufacturing apparatus 101a based on the conditions calculated in step 603 of Figure 6 will be described. Figure 8 is a flowchart of the wafer temperature control operation related to Example 1. The wafer temperature calculation system 100 uses the plurality of first correlation data (W) to ensure that the temperature at point L of the wafer 205 becomes a target temperature distribution, which is the target temperature distribution. a In a state where the operating state of the N heaters 201 is controlled using ), the measured values ​​of the P temperature sensors 206a and 206d corresponding to the temperature distribution conditions and the plurality of second correlation data (W b The wafer temperature is adjusted so that the difference between the predicted values ​​of the P temperature sensors calculated using any second correlation data from the ) is minimized or less than a predetermined value. Hereinafter, as an example, in step 603, the wafer temperature T w Let's explain the case where the temperature is set to (50°C, 42°C, 35°C, 30°C).

[0061] Step 801 involves the wafer temperature T w Enter the target value. For example, the wafer temperature T calculated in step 603 of Figure 6. w This is input to the wafer temperature calculation system 100. If wafer temperatures are set for each zone, the wafer temperature T for each zone is entered. w_n The following is entered.

[0062] Next, in step 802, the heater temperature T h and heater resistance value R n The target value is calculated. Specifically, the wafer temperature calculation system 100 calculates the first correlation matrix W in the semiconductor device manufacturing apparatus 101a. a It has the function of calculating the heater power supply 202 temperature and corresponding resistance value connected to each zone in order to achieve the above-calculated target temperature distribution. Equation (9) shows the heater temperature T from the wafer temperature distribution. h This is an example of calculating the wafer temperature T in step 801. w and the matrix W representing the first correlation a From the inverse matrix, the heater temperature T hThe temperature of the sensor wafer T at the time of prior data acquisition is calculated. Here, the temperature of the central part (50°C in Zone 1) is higher than the temperature of the edge (30°C in Zone 4), with a difference of 20°C. sw and heater temperature T h Matrix W showing the relationship (first correlation) a Of these, W that falls under condition 2 a 2 Using W a =W a 2 Heater temperature T h The following was calculated. Note that in the following explanation, the temperature T of the sensor wafer in equation (4) is used. sw Since this is closest to the temperature of the wafer 205 itself, in equation (9) the temperature T of the sensor wafer is used. sw wafer temperature T W The temperature distribution is calculated based on this assumption.

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[0063] Next, in steps 802 to 809, the operating state of the heater 201 is determined by the heater resistance value R n The heater resistance value R of heater 201 during processing is set by [the specified method]. n It detects multiple first correlation data (W a k ) brain The heater resistance value R calculated from one of the first correlated data points. n Control target R0 n It is set by feedback control.

[0064] First, in step 802, the heater temperature T is further heated using equation (1). h Corresponding heater resistance value R n Calculate this value and set it as the control target value.

[0065] Next, in step 803, the predicted value of the temperature sensor is calculated. As shown in equation (8), matrix W b2Using this method, the predicted temperature T is obtained by the temperature sensors 206a and 206d located below. sp The predicted values ​​T of temperature sensors 206a and 206d are calculated here. sp and the measured values ​​T from temperature sensors 206a and 206d sm They are distinguished as such. Note that the measured values ​​T of temperature sensors 206a and 206d sm This represents the time average of the measured value. For example, in equation (7), the measured value T s However, since the response speed of temperature changes affects the measured value, the time-averaged value is used in the following explanation. The matrix W applied in this case is b This is the W used in step 802. a 2 W b 2 In this example, there are two temperature sensors, and matrix W b 2 The predicted values ​​of temperature sensors 206a and 206d using (T sp 2 ,1 , T sp 2 ,2 This is expressed as [expression]. Regarding the time average, for example, if the temperature is measured every 0.1 seconds, it is possible to use the average of the 10 temperatures measured in 1 second. The method for calculating the time average can be set as appropriate.

[0066] The device processing begins and in step 804 the heaters 201 in each zone are controlled. For example, the wafer temperature calculation system 100 notifies the heater control unit 203 of the target value of the heater resistance, and the heater control unit 203 controls the heater power supply 202 based on the heater resistance value. When the heaters 201 are heated, the heater control unit 203 controls the heater resistance value R of each heater. n The power P of the heater 201 in zone n is calculated. In this embodiment, the power P of the heater 201 in zone n is calculated. n and voltage V n It constantly acquires the heater resistance value R of each heater 201. n This was calculated from equation (10). However, before heating the heater, the resistance value R was calculated using equation (10). nSince it cannot be calculated, the measured values ​​T of temperature sensors 206a and 206d sm Using equation (1), the resistance value R n Calculate.

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[0067] Next, in step 805, the heater resistance value R n It is determined whether or not it is within the target range. If it is not within the target range (No), the heater resistance value R n This is fed back to the wafer temperature calculation system 100, and the arithmetic unit 103, upon receiving this, reads the heater resistance value R according to the software algorithm read from the storage device 104. n The magnitude of each power is calculated according to the difference from the target value. The arithmetic unit 103 adjusts the amount of heat generated by the heater electrodes in relation to the heater power supply 202. For example, the heater resistance value R in zone n at time t. n The calculated value of R n (t), target value R0 n Then, as shown in equation (11), the current I(t) supplied to the heater electrodes, which are the electrodes of each heater 201, can be calculated. Equation (11) is an example of PI (Proportional-Integral) control, but other control methods such as PID (Proportional-Integral-Differential) control may be used depending on the application. Note that K p and K i This is a predetermined constant.

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[0068] Heater resistance value R of each heater 201 n The calculated value R n(t) includes two elements: the change in the temperature and resistance of the heater itself due to the change in heater current I(t), and the change in heater resistance affected by the wafer temperature. These two elements result in a difference in response speed. The resistance change affected by the wafer temperature is a relatively slow change due to heat conduction. When used in feedback control, it is desirable to include the effect of wafer temperature, so the heater resistance value R n The calculated value R n A delay time may be introduced in (t). In other words, the heater resistance R during processing. n It has a delay time, and at time t, the heater resistance value R is the same as at time (tu) before the delay time u. n The error with respect to the control target is calculated using this method, and feedback control is performed. For example, the heater resistance value R at the current time t seconds. n (t) Target value R0 n The error ΔR(t) is given by ΔR(t) = R0 n -R n It is possible to set a delay of 10 seconds, as shown in (t-10). Also, the heater resistance value R n The calculated value R n To reduce noise in (t), for example, the moving average of multiple data from (t-10) seconds to (t-8) seconds is calculated using the heater resistance R. n The calculated value R n (t) is also acceptable.

[0069] In addition, during the temperature control process in steps 804 and 805, the heater resistance value R is used as the user interface for the wafer temperature calculation system 100 and the semiconductor device manufacturing apparatus 101. n The transient course of the wafer temperature estimated using equations (1) and (4) may also be displayed. Also, the heater resistance value R n The calculated value R n Using equation (1) from (t), we can determine the heater temperature T h It is also possible to calculate and predict the output of temperature sensors 206a and 206d. Heater resistance value R n The target value R0 n When this is reached, or in step 803, matrix W b 1 ~W b5 Using this, the predicted values ​​(T) of each temperature sensor are used. sp 1 ,1 , T sp 1 ,2 ), (T sp 2 ,1 , T sp 2 ,2 ), (T sp 3 ,1 , T sp 3 ,2 ), (T sp 4 ,1 , T sp 4 ,2 ), (T sp 5 ,1 , T sp 5 ,2 It calculates these predicted values. These predicted values ​​can also be displayed in the user interface.

[0070] Heater resistance value R n If the value is within the target range (Yes in step 805), proceed to step 806. The measured and predicted values ​​of the temperature sensors are the measured and predicted values ​​corresponding to any two of the predetermined measurement locations. Specifically, in step 806, the measured values ​​T of the two temperature sensors 206a and 206d are used. sm (T sm,1 , T sm,2 The following data is obtained from temperature sensors 206a and 206d: the in-plane tilt of the wafer temperature is estimated.

[0071] Next, in step 807, the predicted values ​​T of these temperature sensors 206a and 206d are obtained. sp and detected value T sm From this, it is determined whether the temperature distribution is within an appropriate range. As an example, the predicted temperature values ​​measured by temperature sensors 206a and 206d shown in equations (7) and (8), T slp k (=T spk ,1 ―T sp k ,2 , k is matrix W b k The difference measurement value T is the difference between the measured values ​​of temperature sensors 206a and 206d, and the integer (1 to 5) indicating the type of sensor. sl,m (=T sm,1 -T sm,2 ) difference ΔT sl k Select the k that is smallest, and the current (W b 2 It is determined whether or not they match (Yes in step 807). If they match, the process proceeds to the next step (machining step) (step 810). Note that the difference ΔT sl k Instead of choosing the k that minimizes the difference ΔT, sl k It is also possible to select k such that k is less than a predetermined value.

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[0072] If they do not match (No in step 807), then in step 808, the difference ΔT sl k The matrix W that minimizes this value b k The value of k is displayed as the recommended value for matrix modification. For example, in step 807, the difference ΔT sl kIf the temperature distribution deviates from the appropriate range, step 808 may display an alert indicating that the temperature distribution has deviated from the set value, and may also show a guideline for how to improve the control, as described later. Alternatively, using the first wafer, one first correlation data and one second correlation data are selected from the first and second correlation data corresponding to the conditions, and the second wafer is heated and processed using the selected first and second correlation data. Specifically, in step 808, only an alert may be displayed, and the wafer may proceed to the next step 810 as a dummy wafer, or in step 809, the target value for temperature control may be updated in the method described later (step 802), and the temperature control in step 804 may be performed again.

[0073] Next, in step 809, the target value for temperature control is updated according to the recommended value shown in step 808. The temperature of the wafer 205 is adjusted for the wafer 205 during processing using the plurality of first correlation data (W a k This includes updating the ΔT. Specifically, if, for example, in step 808, k=1 is better than k=2 in terms of ΔT sl k If it is determined that is small, the matrix to apply is W a 1 and W b 1 Update to . Then return to step 802 and equation (9) and (10) Using the heater resistance value R n Target value R0 n Update (t) and proceed with the processing from step 803 onwards. Note that while Wa is represented in matrix form, in step 809 of Figure 8 it is shown in a heatmap format for easier understanding.

[0074] (Effects / Actions) According to the above embodiment, in a semiconductor device manufacturing apparatus 101 and wafer temperature calculation system 100 that adjusts the temperature and distribution of a wafer 205 placed on a wafer stage 200 using a plurality of heaters 201 inside the wafer stage 200, it is determined whether or not the target in-plane distribution of wafer temperature is achieved using fewer temperature sensors 206a and 206d than the plurality of heaters 201a to 201d. A thermal interference matrix more suitable for achieving the target temperature distribution is selected from among the thermal interference matrices held by the semiconductor device manufacturing apparatus 101 and wafer temperature calculation system 100, thereby improving the yield of the process.

[0075] Furthermore, using the relationship between the previously acquired wafer temperature and a predetermined physical quantity, a target temperature distribution capable of forming the desired shape in the in-plane direction of the wafer is calculated, and then the amount of power to be supplied to multiple heaters capable of achieving that target temperature distribution is calculated. During temperature control, it is possible to detect when the wafer temperature distribution deviates from the target using a small number of temperature sensors relative to the number of zones, thereby reducing the error with the target temperature distribution and providing a means to solve both the cost and placement space issues associated with increasing the number of sensors. This also suppresses deviations from the desired temperature during wafer processing.

[0076] [Example 2] Example 2 shows the predicted values ​​T of temperature sensors 206a and 206d. sp and detected value T sm This differs from Example 1 in that it uses a determination threshold in the process of determining whether the temperature distribution is within an appropriate range. In other words, the wafer temperature calculation system 100 calculates the measured values ​​of P temperature sensors 206a and 206d, which are calculated at predetermined measurement locations, and second correlation data (W b k The second correlation data (W) is used so that the variation in the difference between the predicted value calculated using () is minimized or less than a predetermined value. b k ) and the first correlation data (W a k) is selected from a plurality of first correlation data, and the temperature of the wafer 205 is adjusted. In the following description, components that are the same or equivalent as those in Example 1 described above are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0077] Figure 9 is a flowchart showing the operation of wafer temperature control in Example 2. Steps 801 to 806 and step 810 in Example 2 are the same as steps 801 to 806 and step 810 in Example 1. Also, steps 807a to 809a in Example 2 correspond to steps 807 to 809 in Example 1. In Example 2, as shown in Figure 9, a method of making a judgment using a temperature distribution determination threshold (step 811) is described in step 807a. If the temperature distribution is within the acceptable range, the throughput of processing can be increased by omitting excessive parameter adjustments.

[0078] Figure 10 is a flowchart illustrating the operation of temperature distribution determination in Example 2. Figure 10(a) is a diagram illustrating the details of step 807a, showing the flow of determining the temperature distribution in step 807a and then moving to more suitable temperature control in steps 808a and 809a. Figures 10(b) to 10(d) show the patterns of the magnitude relationship between the predicted and measured values ​​of temperature sensors 206a and 206d.

[0079] First, in step 901, a judgment threshold for temperature accuracy is set. Step 901 corresponds to step 811 in Figure 9. This can also be set as a process recipe, and in this embodiment, it is set to 3°C as an example.

[0080] Next, in step 902, the temperature gradient between the two temperature sensors 206a and 206d is calculated. Specifically, T slp 2 (=T sp 2 ,1 ―T sp 2 ,2 ) and T sl,m (=T sm,1 ―T sm,2The difference between the predicted and determined values ​​is calculated, and it is determined whether the absolute value is greater than the judgment threshold given in step 901. If it is less than the judgment threshold (Yes in step 902), it can be determined that there is a high probability that the in-plane temperature distribution at temperature sensors 206a and 206d has been accurately predicted. At this time, for example as shown in Figure 10(b), the in-plane temperature slope (temperature for each zone) between the predicted value and the determined value is almost the same, and the difference between the predicted value and the determined value is less than or equal to the judgment threshold. This is matrix W b 2 This means that the prediction using is accurate, so matrix W b 2 The matrix W is held in pairs with the matrix W. a 2 Similarly, it is presumed that the in-plane temperature gradient is accurately represented. The above corresponds to the determination in step 807a of Figure 9.

[0081] If the value is greater than the judgment threshold in step 902 (No in step 902), proceed to step 903 to determine the relationship between the predicted value and the measured value. Specifically, the predicted value T slp 2 (=T sp 2 ,1 ―T sp 2 ,2 ) and the difference measurement value T sl,m (=T sm,1 ―T sm,2 ) is calculated, and if the difference measurement is greater than the judgment threshold, i.e., T slp 2 ―T sl,m If the value is <-3, it indicates that the temperature sensor reading in the central region is relatively higher than the predicted value. In other words, with the setting that the central region is high, the actual in-plane distribution shows that the central region is higher and the gradient is larger than expected (Figure 10(c)). Alternatively, with the setting that the central region is low, the actual in-plane distribution shows that the relative temperature in the central region is higher and the gradient is smaller than expected (Figure 10(d)). This discrepancy between the predicted in-plane temperature gradient and the sensor-detected value is represented by matrix W. b It depends on [something] and indicates the possibility of improvement.

[0082] In this embodiment, the central temperature is set to be high, W b 2 Let's assume that using this, the temperature in the central part becomes higher than predicted, and the determination in step 903 becomes Yes. In this case, it means that the effect of heat diffusion from the central part to the edges was underestimated, and the central part was overheated. Therefore, as shown in step 903y, the thermal interference matrix W b It is determined that changing the condition to an internal height condition is preferable. That is, matrix W b Matrix W is one where heat diffusion from the center to the edges is greater, meaning the temperature in the center is relatively higher. b 1 This means that the predicted and measured in-plane distributions are more likely to match.

[0083] Conversely, if the judgment in step 903 is No, and the temperature gradient calculated from the temperature sensor output is smaller, then T slp 2 -T sl,m If the relationship is >3, it means that the effect of heat diffusion from the center to the edges was overestimated. Therefore, as shown in step 903n, it is determined that it is preferable to change the thermal interference matrix to the outer height condition. That is, matrix W b W has less heat diffusion from the center to the edges. b 3 This suggests that the error between the predicted and actual in-plane distribution may be smaller. Thus, the current thermal interference matrix pair (W a 2 , W b 2 ) vs. (W a k , W b k The process of selecting (k is one of 1, 3, 4, or 5) (steps 903, 903y, 903n) corresponds to step 808a in Figure 9.

[0084] From the above processing, a suitable thermal interference matrix (W a k , W b k) is selected in step 904. In step 905, the temperature gradient error T due to the selected thermal interference matrix is ​​selected. slp k -T sl,m This value is retained and used as an indicator when repeating the matrix selection process.

[0085] Step 906 is not essential to the present invention, but it describes an additional temperature control flow. From steps 902 and 903, it is assumed that the magnitude of the temperature distribution slope across the wafer surface is approximately the same for both the predicted and measured values ​​from temperature sensors 206a and 206d, but the predicted values ​​are generally shifted towards higher temperatures. In such a case, a process is performed to correct the heater resistance value of the control target in order to match the measured and predicted temperatures. Specifically, if the measured values ​​from temperature sensors 206a and 206d in zone 1 are lower than the predicted values, the output of heater 201 is increased. The temperature difference detected by temperature sensors 206a and 206d is ΔT. s k ,1 =T sp k ,1 -T sm,1 (k represents the type of thermal interference matrix W) a k , W b k This is the same as, and in this embodiment, it is any of 1 to 5). The temperature difference ΔT between these temperature sensors 206a and 206d s k ,1 The temperature difference ΔT of heater 201 corresponds to this. h This is calculated from the following formula. Note that in formula (13), k, which represents the type of thermal interference matrix, is omitted. Steps 904 to 906 correspond to step 809a in Figure 9.

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[0086] From the correlation shown in Figure 4, this ΔT h The difference ΔR in the corresponding heater resistance value is calculated, the target value of the heater resistance value in step 802 is updated from R to R+ΔR, and the process proceeds to step 803 and beyond.

[0087] [Example 3] Example 3 describes an example of determining the temperature distribution when there are three or more temperature sensors. In Example 1, temperature sensor 206a was placed in zone 1 and temperature sensor 206d was placed in zone 4. Example 3 describes a state where temperature sensors 206a, 206c, and 206d are placed in zones 1, 3, and 4.

[0088] In the flowchart of the wafer temperature control operation in Figure 8 of Example 1, steps 801 to 806 are common to Example 3, except that the number of temperature sensor prediction values ​​Tp in step 803 and temperature sensor outputs Ts in step 806 increases according to the number of temperature sensors.

[0089] In Example 3, when there are three temperature sensors, step 803 calculates the predicted value (T) of each temperature sensor. sp 1 ,1 , T sp 1 ,2 , T sp 1 ,3 ), (T sp 2 ,1 , T sp 2 ,2 , T sp 2 ,3 ), (T sp 3 ,1 , T sp 3 ,2 , T sp 3 ,3 ), (T sp 4 ,1 , T sp 4 ,2 , T sp 4 ,3 ), (T sp 5 ,1 , Tsp 5 ,2 , T sp 5 ,3 ) is calculated. Also in step 806, the measured value T of the temperature sensor is calculated. sm as (T sm,1 , T sm,2 , T sm,3 ) obtain.

[0090] Even with three sensors, the thermal interference matrix that minimizes the difference between the predicted and measured values ​​can be selected from the in-plane temperature gradient, similar to Example 1. Figure 11 shows an example of a method for selecting a thermal interference matrix related to Example 3. Figure 11(a) is W a k and W b k This is the case where we compare each pair of matrices, while Figure 11(b) shows the case where we compare the variability between pairs of matrices.

[0091] As shown in Figure 11(a), the predicted and measured values ​​are plotted with respect to the radial position of the temperature sensor, with the wafer center as the origin. Linear approximation is performed using the least squares method, and the thermal interference matrix pair with the closest slope between the predicted and measured values ​​is selected. In Figure 11(a), the predicted values ​​are shown as white circles and the measured values ​​as black circles. The solid line shows the approximation curve for the predicted values, and the dashed line shows the approximation curve for the measured values. Figure 11(a) shows a comparison for conditions 1 and 2, but similar comparisons should be made for matrix pairs under other conditions. Alternatively, as shown in Figure 11(b), the error for each zone can be calculated for each matrix, the standard deviation σ of the errors at the three points can be calculated, and the condition with the smallest σ can be selected.

[0092] [Example 4] This embodiment describes a method for controlling wafer temperature using heater power. Figure 12 is a diagram relating to the correlation of the temperature at which data is acquired in advance, in Example 4. In this example, the heater resistance value R n Since this method is not used, the temperature of the sensor wafer T is used for pre-data acquisition as shown in Figure 12. sw Heater Power P h, the measured values ​​T of temperature sensors 206a and 206d s The correlation between the three parameters is obtained. Also, equations (4) and (7) are replaced as shown in equations (15) and (16).

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[0093] Matrix (W a , W b ) uses the same notation as in Example 1, but Heater Power P h and the measured values ​​T from temperature sensors 206a and 206d s To represent the relationship, the values ​​of the matrix elements are different from those in Example 1. Figure 13 is a flowchart showing the operation of wafer temperature control related to Example 4. It is almost the same as Figure 8, but the target value set in step 8024 is the heater power P h The difference from Example 1 is that this is the case, and there is no feedback from step 805 to step 804. The acquisition of the measured values ​​Ts from temperature sensors 206a and 206d in step 806, and the temperature distribution determination in steps 807 and 808 are the same as in Example 1.

[0094] In this embodiment, the absence of feedback control has the advantage of simplifying temperature control in the heater control unit 203. Furthermore, by using the predicted and measured values ​​of temperature sensors 206a and 206d, as well as the slope information between multiple temperature sensors, it becomes possible to obtain more information about the in-plane distribution compared to simply monitoring the temperature using only the measured values ​​of temperature sensors 206a and 206d. If there is a large deviation from the intended conditions, information that serves as a basis for updating the thermal interference matrix can be obtained.

[0095] (Examples of application) Figure 14 shows a comparison of the present disclosure, which uses multiple temperature sensors, with the conventional technology using a single temperature sensor (when offset correction with the sensor temperature is performed), which is intended to uniformly control the in-plane distribution of wafer temperature, as described in Patent Document 3. Figure 14 is a diagram comparing the effects of the present invention and the conventional technology, with W as the initial value of the thermal interference matrix. a1 and W b 1 An example of its application is shown. Step 1001 plots the predicted and measured temperatures of the temperature sensors from steps 803 and 806 in Figure 8. The triangular points represent predicted values, and the circular points represent measured values ​​(detected values, actual values). Measured values ​​are also shown for zones 2 and 3, assuming the presence of temperature sensors. In the conventional technology, temperature sensors are placed only in zone 4, and the target value of the overall heater resistance is updated based on the temperature error in zone 4. The error between the corrected predicted and measured values ​​of the temperature sensors is minimized in zone 4, as shown in step 1002, but increases in zone 1. At this time, although it is not possible during actual processing, if the wafer temperature is measured, the target value T using equation (4) is obtained in zone 4, as shown in step 1003. sw_4 While this is in close agreement, the measured values ​​in Zone 1 were approximately 4°C lower than the target values.

[0096] In contrast, in step 1001, this disclosure focuses on the temperature difference between zone 1 and zone 4 and uses a thermal interference matrix W that shows the correlation between the heater operating state and the temperature sensor. b Corrects W in this example. b 1 From W b 2 When this was changed, the predicted and measured values ​​almost matched, as shown in step 1004. This matrix W b Matrix W based on the correction a to W a 1 From W a 2 The wafer temperature was updated and the results are shown in step 1005. As shown in the graph in step 1005, the target value and the measured value are in close agreement.

[0097] It should be noted that the present invention is not limited to the embodiments described above, and various modifications are included. For example, the embodiments described above are described in detail to make the present invention easier to understand, and are not necessarily limited to those having all the configurations described. It is also possible to replace parts of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add configurations from other embodiments to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace parts of the configuration of each embodiment with other configurations.

[0098] The following describes, but is not limited to, embodiments that may constitute the present invention. (Aspect 1) A semiconductor device manufacturing system including semiconductor manufacturing equipment and a wafer temperature calculation system, The aforementioned semiconductor manufacturing apparatus, The system comprises N heaters arranged in N zones (where N is a positive integer greater than or equal to 1) located inside a stage within a processing chamber, and P temperature sensors (where P is a positive integer less than or equal to N) located at predetermined measurement points inside the stage. The wafer temperature calculation system is, For each of the pre-obtained temperature distribution conditions, a plurality of first correlation data showing the correlation function between the operating state of the N heaters and the temperature at L (where L is a positive integer of 1 or more) locations on the wafer on the stage, The system includes a storage device that stores, for each of the aforementioned temperature distribution conditions, a correlation function between the operating state of the N heaters and the temperature at P locations measured by the P temperature sensors, and a plurality of second correlation data sets that are paired with each of the plurality of first correlation data sets. The wafer temperature calculation system is, In a state where the operating states of the N heaters are controlled using the plurality of first correlation data so that the temperature at location L on the wafer becomes a target temperature distribution, Adjust the temperature of the wafer so that the difference between the measured values of the P temperature sensors corresponding to the temperature distribution conditions and the predicted values of the P temperature sensors calculated using any one of the plurality of second correlation data is minimized or less than a predetermined value. Or select the first correlation data paired with the second correlation data from the plurality of first correlation data so that the variation in the difference between the measured values of the P temperature sensors calculated at the predetermined measurement locations and the predicted values calculated using the second correlation data is minimized or less than a predetermined value, and adjust the temperature of the wafer. A semiconductor device manufacturing system characterized by this. (Aspect 2) The adjustment of the temperature of the wafer includes updating the plurality of first correlation data for the wafer during processing. The semiconductor device manufacturing system according to Aspect 1. (Aspect 3) Using the first wafer, select one first correlation data and second correlation data from the first correlation data and second correlation data corresponding to the temperature distribution conditions, and heat and process the second wafer using the selected first correlation data and second correlation data. The semiconductor device manufacturing system according to Aspect 1 or Aspect 2, characterized by this. (Aspect 4) The measured values and predicted values of the P temperature sensors are Any two of the predetermined measurement locations are selected, and the measured values and predicted values corresponding to the two locations. The semiconductor device manufacturing system according to any one of Aspects 1 to 3, characterized by this. (Aspect 5) The plurality of first correlation data and the plurality of second correlation data corresponding to the temperature distribution conditions include at least data corresponding to three temperature distributions: a temperature distribution where the center part is hotter than the edge part, a temperature distribution where the edge part is hotter than the center part, and a uniform temperature distribution within the wafer surface. The semiconductor device manufacturing system according to any one of Aspects 1 to 4, characterized by this. (Aspect 6) A semiconductor device manufacturing system according to any one of embodiments 1 to 5, characterized in that the operating state of the N heaters is set by heater resistance values, the heater resistance values ​​of the N heaters during processing are detected, and the operating state is set by feedback control with the heater resistance value calculated from any one of the plurality of first correlation data as the control target. (Aspect 7) A semiconductor device manufacturing system according to any one of embodiments 1 to 6, characterized in that the relationship between the heater temperature of each of the N heaters and the corresponding heater resistance value is calculated when there is a uniform temperature distribution across the wafer surface. (Pattern 8) A semiconductor device manufacturing system according to any one of embodiments 1 to 7, characterized in that the heater resistance value during processing has a delay time, and at time t, the error with the control target is calculated using the heater resistance value at time (tu) prior to the delay time u, and the feedback control is performed. (Aspect 9) A semiconductor device manufacturing system according to any one of embodiments 1 to 8, characterized in that the operating state of the heater is calculated using at least one of the heater temperature, heater power, and heater current. (Aspect 10) A semiconductor device manufacturing system according to any one of embodiments 1 to 9, characterized in that the predetermined measurement points are located at different radial positions of the stage. (Aspect 11) A semiconductor device manufacturing system according to any one of embodiments 1 to 10, characterized in that the predetermined measurement points are divided into at least two locations, one on the center side and one on the edge side, from a point 1 / 2R radially with respect to the radius R of the stage. (Aspect 12) A semiconductor device manufacturing system according to any one of embodiments 1 to 11, characterized in that the predetermined measurement location is a location that overlaps with the downward projection plane of the area of ​​the stage on which the N heaters are arranged. (Aspect 13) A semiconductor device manufacturing system according to any one of embodiments 1 to 12, characterized in that each of the plurality of first correlation data and each of the second correlation data are calculated as a linear combination using matrices. (Aspect 14) A method for manufacturing semiconductor devices, including semiconductor manufacturing equipment and a wafer temperature calculation system, The aforementioned semiconductor manufacturing apparatus, The system comprises N heaters arranged in N zones (where N is a positive integer greater than or equal to 1) located inside a stage within a processing chamber, and P temperature sensors (where P is a positive integer less than or equal to N) located at predetermined measurement points inside the stage. The wafer temperature calculation system is, For each of the pre-obtained temperature distribution conditions, a plurality of first correlation data showing the correlation function between the operating state of the N heaters and the temperature at L (where L is a positive integer of 1 or more) locations on the wafer on the stage, The system includes a storage device that stores, for each of the aforementioned temperature distribution conditions, a correlation function between the operating state of the N heaters and the temperature at P locations measured by the P temperature sensors, and a plurality of second correlation data sets that are paired with each of the plurality of first correlation data sets. The operating states of the N heaters are controlled using the plurality of first correlation data so that the temperature at location L on the wafer becomes a target temperature distribution, which is a target temperature distribution. The wafer temperature is adjusted such that the difference between the measured values ​​of the P temperature sensors corresponding to the temperature distribution conditions and the predicted values ​​of the P temperature sensors calculated using one of the second correlation data from the plurality of second correlation data is minimized or less than a predetermined value. A method for manufacturing a semiconductor device, characterized by selecting a first correlation data paired with the second correlation data from a plurality of first correlation data so that the variation in the difference between the measured values ​​of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized or less than a predetermined value, and adjusting the temperature of the wafer. [Explanation of Symbols]

[0099] 100: Wafer temperature calculation system, 101, 101a, 101b: Semiconductor device manufacturing equipment, 102, 102a~102z: Wafer measurement equipment, 103: Calculator, 104: Memory device, 105: Interface, 200: Wafer stage, 201, 201a~201d: Heater, 202, 202a~202d: Heater power supply, 203: Heater control unit, 204: Refrigerant flow path, 205: Wafer, 206a, 206c, 206d: Temperature sensor, 207: Substrate, 1010: Processing chamber

Claims

1. A semiconductor device manufacturing system including semiconductor manufacturing equipment and a wafer temperature calculation system, The aforementioned semiconductor manufacturing apparatus, The system comprises N heaters arranged in N zones (where N is a positive integer greater than or equal to 1) located inside a stage within a processing chamber, and P temperature sensors (where P is a positive integer less than or equal to N) located at predetermined measurement points inside the stage. The wafer temperature calculation system is, For each of the multiple temperature distribution conditions obtained in advance, a plurality of first correlation data showing the correlation function between the operating state of the N heaters and the temperature at L (where L is a positive integer of 1 or more) locations on the wafer on the stage, The system includes a storage device that stores, for each of the aforementioned temperature distribution conditions, a correlation function between the operating state of the N heaters and the temperature at P locations measured by the P temperature sensors, and a plurality of second correlation data sets that are paired with each of the plurality of first correlation data sets. The wafer temperature calculation system is, In a state where the operating states of the N heaters are controlled using the plurality of first correlation data so that the temperature at location L on the wafer becomes a target temperature distribution, The wafer temperature is adjusted such that the difference between the measured values ​​of the P temperature sensors corresponding to the temperature distribution conditions and the predicted values ​​of the P temperature sensors calculated using one of the second correlation data from the plurality of second correlation data is minimized or less than a predetermined value. Alternatively, the variation in the difference between the measured values ​​of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized. Alternatively, select a first correlation data to pair with the second correlation data from the plurality of first correlation data so that it is less than a predetermined value, and adjust the wafer temperature. A semiconductor device manufacturing system characterized by the following features.

2. The semiconductor device manufacturing system according to claim 1, characterized in that the temperature control of the wafer includes updating the plurality of first correlation data for the wafer during processing.

3. A semiconductor device manufacturing system according to claim 1, characterized in that, using a first wafer, one first correlation data and one second correlation data are selected from first and second correlation data corresponding to the temperature distribution conditions, and the second wafer is heated and processed using the selected first and second correlation data.

4. The measured and predicted values ​​of the P temperature sensors are as follows: A semiconductor device manufacturing system according to claim 2 or 3, characterized in that any two of the predetermined measurement locations are selected, and the measurement values ​​and predicted values ​​correspond to the two locations.

5. The semiconductor device manufacturing system according to claim 2 or 3, characterized in that the plurality of first correlation data and the plurality of second correlation data corresponding to the temperature distribution conditions include at least data corresponding to three temperature distributions for the wafer temperature: a temperature distribution where the center is hotter than the edges, a temperature distribution where the edges are hotter than the center, and a uniform temperature distribution across the wafer surface.

6. The semiconductor device manufacturing system according to claim 5, characterized in that the operating state of the N heaters is set by heater resistance values, and the heater resistance values ​​of the N heaters during processing are detected and set by feedback control with the heater resistance value calculated from any one of the plurality of first correlation data as the control target.

7. The semiconductor device manufacturing system according to claim 6, characterized in that the relationship between the heater temperature of each of the N heaters and the corresponding heater resistance value is calculated when there is a uniform temperature distribution across the wafer surface.

8. The semiconductor device manufacturing system according to claim 7, characterized in that the heater resistance value during processing has a delay time, and at time t, the error with the control target is calculated using the heater resistance value at time (t-u) prior to the delay time u, and the feedback control is performed.

9. The semiconductor device manufacturing system according to claim 2 or 3, characterized in that the operating state of the heater is calculated using at least one of the heater temperature, heater power, and heater current.

10. The semiconductor device manufacturing system according to claim 2 or 3, characterized in that the predetermined measurement points are located at different radial positions of the stage.

11. The semiconductor device manufacturing system according to claim 2 or 3, characterized in that the predetermined measurement points are divided into at least two locations, one on the center side and one on the edge side, from a point 1 / 2R radially with respect to the radius R of the stage.

12. The semiconductor device manufacturing system according to claim 2 or 3, characterized in that the predetermined measurement location is a location that overlaps with the downward projection plane of the area of ​​the stage on which the N heaters are arranged.

13. The semiconductor device manufacturing system according to claim 5, characterized in that each of the plurality of first correlation data and each of the second correlation data are calculated as a linear combination using matrices.

14. A method for manufacturing semiconductor devices, including semiconductor manufacturing equipment and a wafer temperature calculation system, The aforementioned semiconductor manufacturing apparatus, The system comprises N heaters arranged in N zones (where N is a positive integer greater than or equal to 1) located inside a stage within a processing chamber, and P temperature sensors (where P is a positive integer less than or equal to N) located at predetermined measurement points inside the stage. The wafer temperature calculation system is, For each of the multiple temperature distribution conditions obtained in advance, a plurality of first correlation data showing the correlation function between the operating state of the N heaters and the temperature at L (where L is a positive integer of 1 or more) locations on the wafer on the stage, The system includes a storage device that stores, for each of the aforementioned temperature distribution conditions, a correlation function between the operating state of the N heaters and the temperature at P locations measured by the P temperature sensors, and a plurality of second correlation data sets that are paired with each of the plurality of first correlation data sets. The operating states of the N heaters are controlled using the plurality of first correlation data so that the temperature at location L on the wafer becomes a target temperature distribution, which is a target temperature distribution. The wafer temperature is adjusted such that the difference between the measured values ​​of the P temperature sensors corresponding to the temperature distribution conditions and the predicted values ​​of the P temperature sensors calculated using one of the second correlation data from the plurality of second correlation data is minimized or less than a predetermined value. A method for manufacturing a semiconductor device, characterized by selecting a first correlation data paired with the second correlation data from a plurality of first correlation data so that the variation in the difference between the measured values ​​of the P temperature sensors calculated at the predetermined measurement location and the predicted value calculated using the second correlation data is minimized or less than a predetermined value, and adjusting the temperature of the wafer.

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